From: Kenneth Kasilag <kenneth@kasilag.me>
Date: Wed, 01 Jul 2026 00:00:00 +0000
Subject: [PATCH] net: pcs: qcom-ipq9574: pulse uniphy sys/soft resets during config

The uniphy never receives a software reset pulse during interface mode
configuration. The vendor SSDK asserts the GCC system reset and the
NSSCC soft reset together for 100ms on every uniphy mode change;
without the pulse, parts of the uniphy analog block can remain in
their power-on state.

Pulse both resets, when the devicetree provides them, after the mode
is programmed. Both resets are optional so existing devicetrees keep
working.

Signed-off-by: Kenneth Kasilag <kenneth@kasilag.me>
---
 drivers/net/pcs/pcs-qcom-ipq9574.c | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

--- a/drivers/net/pcs/pcs-qcom-ipq9574.c
+++ b/drivers/net/pcs/pcs-qcom-ipq9574.c
@@ -157,6 +157,8 @@ struct ipq_pcs {
 
 	struct ipq_pcs_mii *qpcs_mii[PCS_MAX_MII_NRS];
 	struct reset_control *xpcs_rstc;
+	struct reset_control *sys_rstc;
+	struct reset_control *soft_rstc;
 };
 
 #define phylink_pcs_to_qpcs_mii(_pcs)	\
@@ -361,6 +363,18 @@ static int ipq_pcs_config_mode(struct ip
 			return ret;
 	}
 
+	/* Pulse the resets as the vendor SSDK does: both held for
+	 * 100ms, then another 100ms to settle after release.
+	 */
+	if (qpcs->sys_rstc || qpcs->soft_rstc) {
+		reset_control_assert(qpcs->sys_rstc);
+		reset_control_assert(qpcs->soft_rstc);
+		msleep(100);
+		reset_control_deassert(qpcs->sys_rstc);
+		reset_control_deassert(qpcs->soft_rstc);
+		msleep(100);
+	}
+
 	/* PCS PLL reset */
 	ret = regmap_clear_bits(qpcs->regmap, PCS_PLL_RESET, PCS_ANA_SW_RESET);
 	if (ret)
@@ -1075,6 +1089,16 @@ static int ipq9574_pcs_probe(struct plat
 		return dev_err_probe(dev, PTR_ERR(qpcs->xpcs_rstc),
 				     "Failed to get XPCS reset\n");
 
+	qpcs->sys_rstc = devm_reset_control_get_optional_exclusive(dev, "sys");
+	if (IS_ERR(qpcs->sys_rstc))
+		return dev_err_probe(dev, PTR_ERR(qpcs->sys_rstc),
+				     "Failed to get uniphy sys reset\n");
+
+	qpcs->soft_rstc = devm_reset_control_get_optional_exclusive(dev, "soft");
+	if (IS_ERR(qpcs->soft_rstc))
+		return dev_err_probe(dev, PTR_ERR(qpcs->soft_rstc),
+				     "Failed to get uniphy soft reset\n");
+
 	ret = ipq_pcs_clk_register(qpcs);
 	if (ret)
 		return ret;
