From 665d7ac2a43ac957fe299af59d3ad92bafc2d585 Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Fri, 19 Jun 2026 15:33:09 +0100
Subject: [PATCH] Revert "arm64: errata: Mitigate TLBI errata on various Arm
 CPUs"

This reverts commit 308ed83bec327158d2822133e42f99979e978f8f.
---
 arch/arm64/Kconfig             | 36 ----------------------------------
 arch/arm64/kernel/cpu_errata.c | 30 ++--------------------------
 2 files changed, 2 insertions(+), 64 deletions(-)

--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -1205,42 +1205,6 @@ config ARM64_ERRATUM_4118414
 
 	  If unsure, say Y.
 
-config ARM64_ERRATUM_4118414
-	bool "Cortex-*/Neoverse-*/C1-*: Completion of affected memory accesses might not be guaranteed by completion of a TLBI"
-	default y
-	select ARM64_WORKAROUND_REPEAT_TLBI
-	help
-	  This option adds a workaround for the following errata:
-
-	  * ARM C1-Premium erratum 4193780
-	  * ARM C1-Ultra erratum 4193780
-	  * ARM Cortex-A76 erratum 4193800
-	  * ARM Cortex-A76AE erratum 4193801
-	  * ARM Cortex-A77 erratum 4193798
-	  * ARM Cortex-A78 erratum 4193791
-	  * ARM Cortex-A78AE erratum 4193793
-	  * ARM Cortex-A78C erratum 4193794
-	  * ARM Cortex-A710 erratum 4193788
-	  * ARM Cortex-X1 erratum 4193791
-	  * ARM Cortex-X1C erratum 4193792
-	  * ARM Cortex-X2 erratum 4193788
-	  * ARM Cortex-X3 erratum 4193786
-	  * ARM Cortex-X4 erratum 4118414
-	  * ARM Cortex-X925 erratum 4193781
-	  * ARM Neoverse-N1 erratum 4193800
-	  * ARM Neoverse-N2 erratum 4193789
-	  * ARM Neoverse-V1 erratum 4193790
-	  * ARM Neoverse-V2 erratum 4193787
-	  * ARM Neoverse-V3 erratum 4193784
-	  * ARM Neoverse-V3AE erratum 4193784
-
-	  On affected cores, some memory accesses might not be completed by
-	  broadcast TLB invalidation.
-
-	  This issue is also known as CVE-2025-10263.
-
-	  If unsure, say Y.
-
 config CAVIUM_ERRATUM_22375
 	bool "Cavium erratum 22375, 24313"
 	default y
--- a/arch/arm64/kernel/cpu_errata.c
+++ b/arch/arm64/kernel/cpu_errata.c
@@ -412,33 +412,7 @@ static const struct midr_range workaroun
 	/* Cortex-A53 r0p[01] : ARM errata 819472 */
 	MIDR_REV_RANGE(MIDR_CORTEX_A53, 0, 0, 1),
 #endif
-#ifdef CONFIG_ARM64_ERRATUM_4118414
-	{
-		ERRATA_MIDR_RANGE_LIST(((const struct midr_range[]) {
-			MIDR_ALL_VERSIONS(MIDR_CORTEX_A76),
-			MIDR_ALL_VERSIONS(MIDR_CORTEX_A76AE),
-			MIDR_ALL_VERSIONS(MIDR_CORTEX_A77),
-			MIDR_ALL_VERSIONS(MIDR_CORTEX_A78),
-			MIDR_ALL_VERSIONS(MIDR_CORTEX_A78AE),
-			MIDR_ALL_VERSIONS(MIDR_CORTEX_A78C),
-			MIDR_ALL_VERSIONS(MIDR_CORTEX_A710),
-			MIDR_ALL_VERSIONS(MIDR_CORTEX_X1),
-			MIDR_ALL_VERSIONS(MIDR_CORTEX_X1C),
-			MIDR_ALL_VERSIONS(MIDR_CORTEX_X2),
-			MIDR_ALL_VERSIONS(MIDR_CORTEX_X3),
-			MIDR_ALL_VERSIONS(MIDR_CORTEX_X4),
-			MIDR_ALL_VERSIONS(MIDR_CORTEX_X925),
-			MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1),
-			MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2),
-			MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1),
-			MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2),
-			MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3),
-			MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3AE),
-			{}
-		})),
-	},
-#endif
-	{}
+	{},
 };
 #endif
 
@@ -725,7 +699,7 @@ const struct arm64_cpu_capabilities arm6
 #endif
 #ifdef CONFIG_ARM64_WORKAROUND_REPEAT_TLBI
 	{
-		.desc = "Broken broadcast TLBI completion",
+		.desc = "Qualcomm erratum 1009, or ARM erratum 1286807, 2441009",
 		.capability = ARM64_WORKAROUND_REPEAT_TLBI,
 		.type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM,
 		.matches = cpucap_multi_entry_cap_matches,
