// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "rtl8382_hpe_1920.dtsi"

/ {
	compatible = "hpe,1920-24g", "realtek,rtl838x-soc";
	model = "HPE 1920-24G (JG924A)";
};

&mdio_bus0 {
	EXTERNAL_PHY(0)
	EXTERNAL_PHY(1)
	EXTERNAL_PHY(2)
	EXTERNAL_PHY(3)
	EXTERNAL_PHY(4)
	EXTERNAL_PHY(5)
	EXTERNAL_PHY(6)
	EXTERNAL_PHY(7)
};

&switch0 {
	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		SWITCH_PORT_SDS(0, 1, 0, qsgmii)
		SWITCH_PORT_SDS(1, 2, 0, qsgmii)
		SWITCH_PORT_SDS(2, 3, 0, qsgmii)
		SWITCH_PORT_SDS(3, 4, 0, qsgmii)
		SWITCH_PORT_SDS(4, 5, 1, qsgmii)
		SWITCH_PORT_SDS(5, 6, 1, qsgmii)
		SWITCH_PORT_SDS(6, 7, 1, qsgmii)
		SWITCH_PORT_SDS(7, 8, 1, qsgmii)

		SWITCH_PORT(8, 9, internal)
		SWITCH_PORT(9, 10, internal)
		SWITCH_PORT(10, 11, internal)
		SWITCH_PORT(11, 12, internal)
		SWITCH_PORT(12, 13, internal)
		SWITCH_PORT(13, 14, internal)
		SWITCH_PORT(14, 15, internal)
		SWITCH_PORT(15, 16, internal)

		SWITCH_PORT_SDS(16, 17, 2, qsgmii)
		SWITCH_PORT_SDS(17, 18, 2, qsgmii)
		SWITCH_PORT_SDS(18, 19, 2, qsgmii)
		SWITCH_PORT_SDS(19, 20, 2, qsgmii)
		SWITCH_PORT_SDS(20, 21, 3, qsgmii)
		SWITCH_PORT_SDS(21, 22, 3, qsgmii)
		SWITCH_PORT_SDS(22, 23, 3, qsgmii)
		SWITCH_PORT_SDS(23, 24, 3, qsgmii)

		SWITCH_PORT_SDS(24, 25, 4, qsgmii)
		SWITCH_PORT_SDS(25, 26, 4, qsgmii)
		SWITCH_PORT_SDS(26, 27, 4, qsgmii)
		SWITCH_PORT_SDS(27, 28, 4, qsgmii)

		port@28 {
			ethernet = <&ethernet0>;
			reg = <28>;
			phy-mode = "internal";
			fixed-link {
				speed = <1000>;
				full-duplex;
			};
		};
	};
};
