From 335c1e7cfdfd477a1106ca05c96ff8949ecd953f Mon Sep 17 00:00:00 2001
From: Furong Xu <xfr@outlook.com>
Date: Fri, 16 Dec 2022 21:13:37 +0800
Subject: [PATCH] mediatek: enable sel_clk for spi-mt65xx

Without explicitly enabling sel_clk, clk_disable_unused() will disable
it when boot is done, causing CPU hang on SPI1 register access on MT7986.
Explicitly enable sel_clk to make SPI1 functional.

Signed-off-by: Furong Xu <xfr@outlook.com>
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
---
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -1289,8 +1289,15 @@ static int mtk_spi_probe(struct platform
 	if (ret < 0)
 		return dev_err_probe(dev, ret, "failed to enable hclk\n");
 
+	ret = clk_prepare_enable(mdata->sel_clk);
+	if (ret < 0) {
+		clk_disable_unprepare(mdata->spi_hclk);
+		return dev_err_probe(dev, ret, "failed to enable sel_clk\n");
+	}
+
 	ret = clk_prepare_enable(mdata->spi_clk);
 	if (ret < 0) {
+		clk_disable_unprepare(mdata->sel_clk);
 		clk_disable_unprepare(mdata->spi_hclk);
 		return dev_err_probe(dev, ret, "failed to enable spi_clk\n");
 	}
