From 976d946885a38da165b3e5195b388d000fe443e6 Mon Sep 17 00:00:00 2001 From: Markus Stockhausen Date: Thu, 2 Apr 2026 21:09:04 +0200 Subject: [PATCH 01/78] realtek: cleanup config-6.18 Some obsolete values made their way into the Realtek config files. Identified via: make menuconfig -> choose target -> save -> exit make kernel_menuconfig -> save -> exit Signed-off-by: Markus Stockhausen Link: https://github.com/openwrt/openwrt/pull/22747 Signed-off-by: Robert Marko --- target/linux/realtek/rtl838x/config-6.18 | 4 ---- target/linux/realtek/rtl839x/config-6.18 | 4 ---- target/linux/realtek/rtl930x/config-6.18 | 4 ---- target/linux/realtek/rtl930x_nand/config-6.18 | 4 ---- target/linux/realtek/rtl931x/config-6.18 | 4 ---- target/linux/realtek/rtl931x_nand/config-6.18 | 4 ---- 6 files changed, 24 deletions(-) diff --git a/target/linux/realtek/rtl838x/config-6.18 b/target/linux/realtek/rtl838x/config-6.18 index 93f3ef6998..1683a494f6 100644 --- a/target/linux/realtek/rtl838x/config-6.18 +++ b/target/linux/realtek/rtl838x/config-6.18 @@ -170,11 +170,8 @@ CONFIG_NEED_DMA_MAP_STATE=y CONFIG_NEED_PER_CPU_KM=y CONFIG_NET_DEVLINK=y CONFIG_NET_DSA=y -# CONFIG_NET_DSA_MXL862 is not set CONFIG_NET_DSA_RTL83XX=y # CONFIG_NET_DSA_RTL83XX_RTL930X_L3_OFFLOAD is not set -# CONFIG_NET_DSA_TAG_MXL_862XX is not set -# CONFIG_NET_DSA_TAG_MXL_862XX_8021Q is not set CONFIG_NET_DSA_TAG_RTL_OTTO=y CONFIG_NET_EGRESS=y CONFIG_NET_INGRESS=y @@ -228,7 +225,6 @@ CONFIG_RESET_CONTROLLER=y CONFIG_RTL838X=y # CONFIG_RTL839X is not set # CONFIG_RTL930X is not set -CONFIG_RUSTC_HAS_COERCE_POINTEE=y CONFIG_SERIAL_MCTRL_GPIO=y CONFIG_SERIAL_OF_PLATFORM=y CONFIG_SFP=y diff --git a/target/linux/realtek/rtl839x/config-6.18 b/target/linux/realtek/rtl839x/config-6.18 index ca920a8fbe..42019d25e3 100644 --- a/target/linux/realtek/rtl839x/config-6.18 +++ b/target/linux/realtek/rtl839x/config-6.18 @@ -176,11 +176,8 @@ CONFIG_NEED_DMA_MAP_STATE=y CONFIG_NEED_SRCU_NMI_SAFE=y CONFIG_NET_DEVLINK=y CONFIG_NET_DSA=y -# CONFIG_NET_DSA_MXL862 is not set CONFIG_NET_DSA_RTL83XX=y # CONFIG_NET_DSA_RTL83XX_RTL930X_L3_OFFLOAD is not set -# CONFIG_NET_DSA_TAG_MXL_862XX is not set -# CONFIG_NET_DSA_TAG_MXL_862XX_8021Q is not set CONFIG_NET_DSA_TAG_RTL_OTTO=y CONFIG_NET_EGRESS=y CONFIG_NET_FLOW_LIMIT=y @@ -241,7 +238,6 @@ CONFIG_RPS=y # CONFIG_RTL838X is not set CONFIG_RTL839X=y # CONFIG_RTL930X is not set -CONFIG_RUSTC_HAS_COERCE_POINTEE=y CONFIG_SERIAL_MCTRL_GPIO=y CONFIG_SERIAL_OF_PLATFORM=y CONFIG_SFP=y diff --git a/target/linux/realtek/rtl930x/config-6.18 b/target/linux/realtek/rtl930x/config-6.18 index 144f032822..add61a8b55 100644 --- a/target/linux/realtek/rtl930x/config-6.18 +++ b/target/linux/realtek/rtl930x/config-6.18 @@ -164,11 +164,8 @@ CONFIG_NEED_DMA_MAP_STATE=y CONFIG_NEED_SRCU_NMI_SAFE=y CONFIG_NET_DEVLINK=y CONFIG_NET_DSA=y -# CONFIG_NET_DSA_MXL862 is not set CONFIG_NET_DSA_RTL83XX=y # CONFIG_NET_DSA_RTL83XX_RTL930X_L3_OFFLOAD is not set -# CONFIG_NET_DSA_TAG_MXL_862XX is not set -# CONFIG_NET_DSA_TAG_MXL_862XX_8021Q is not set CONFIG_NET_DSA_TAG_RTL_OTTO=y CONFIG_NET_EGRESS=y CONFIG_NET_FLOW_LIMIT=y @@ -232,7 +229,6 @@ CONFIG_RTL8261N_PHY=y # CONFIG_RTL839X is not set CONFIG_RTL930X=y # CONFIG_RTL931X is not set -CONFIG_RUSTC_HAS_COERCE_POINTEE=y CONFIG_SENSORS_GPIO_FAN=y CONFIG_SERIAL_MCTRL_GPIO=y CONFIG_SERIAL_OF_PLATFORM=y diff --git a/target/linux/realtek/rtl930x_nand/config-6.18 b/target/linux/realtek/rtl930x_nand/config-6.18 index 07e658fa55..3f8332e230 100644 --- a/target/linux/realtek/rtl930x_nand/config-6.18 +++ b/target/linux/realtek/rtl930x_nand/config-6.18 @@ -177,11 +177,8 @@ CONFIG_NEED_DMA_MAP_STATE=y CONFIG_NEED_SRCU_NMI_SAFE=y CONFIG_NET_DEVLINK=y CONFIG_NET_DSA=y -# CONFIG_NET_DSA_MXL862 is not set CONFIG_NET_DSA_RTL83XX=y # CONFIG_NET_DSA_RTL83XX_RTL930X_L3_OFFLOAD is not set -# CONFIG_NET_DSA_TAG_MXL_862XX is not set -# CONFIG_NET_DSA_TAG_MXL_862XX_8021Q is not set CONFIG_NET_DSA_TAG_RTL_OTTO=y CONFIG_NET_EGRESS=y CONFIG_NET_FLOW_LIMIT=y @@ -243,7 +240,6 @@ CONFIG_RTL8261N_PHY=y # CONFIG_RTL839X is not set CONFIG_RTL930X=y # CONFIG_RTL931X is not set -CONFIG_RUSTC_HAS_COERCE_POINTEE=y CONFIG_SERIAL_MCTRL_GPIO=y CONFIG_SERIAL_OF_PLATFORM=y CONFIG_SFP=y diff --git a/target/linux/realtek/rtl931x/config-6.18 b/target/linux/realtek/rtl931x/config-6.18 index 939752de99..a78414398c 100644 --- a/target/linux/realtek/rtl931x/config-6.18 +++ b/target/linux/realtek/rtl931x/config-6.18 @@ -170,11 +170,8 @@ CONFIG_NEED_DMA_MAP_STATE=y CONFIG_NEED_SRCU_NMI_SAFE=y CONFIG_NET_DEVLINK=y CONFIG_NET_DSA=y -# CONFIG_NET_DSA_MXL862 is not set CONFIG_NET_DSA_RTL83XX=y # CONFIG_NET_DSA_RTL83XX_RTL930X_L3_OFFLOAD is not set -# CONFIG_NET_DSA_TAG_MXL_862XX is not set -# CONFIG_NET_DSA_TAG_MXL_862XX_8021Q is not set CONFIG_NET_DSA_TAG_RTL_OTTO=y CONFIG_NET_EGRESS=y CONFIG_NET_FLOW_LIMIT=y @@ -233,7 +230,6 @@ CONFIG_RPS=y # CONFIG_RTL839X is not set CONFIG_RTL930X=y CONFIG_RTL931X=y -CONFIG_RUSTC_HAS_COERCE_POINTEE=y CONFIG_SENSORS_GPIO_FAN=y CONFIG_SENSORS_LM75=y CONFIG_SERIAL_MCTRL_GPIO=y diff --git a/target/linux/realtek/rtl931x_nand/config-6.18 b/target/linux/realtek/rtl931x_nand/config-6.18 index c3a4047b2c..a7b1961e82 100644 --- a/target/linux/realtek/rtl931x_nand/config-6.18 +++ b/target/linux/realtek/rtl931x_nand/config-6.18 @@ -185,11 +185,8 @@ CONFIG_NEED_DMA_MAP_STATE=y CONFIG_NEED_SRCU_NMI_SAFE=y CONFIG_NET_DEVLINK=y CONFIG_NET_DSA=y -# CONFIG_NET_DSA_MXL862 is not set CONFIG_NET_DSA_RTL83XX=y # CONFIG_NET_DSA_RTL83XX_RTL930X_L3_OFFLOAD is not set -# CONFIG_NET_DSA_TAG_MXL_862XX is not set -# CONFIG_NET_DSA_TAG_MXL_862XX_8021Q is not set CONFIG_NET_DSA_TAG_RTL_OTTO=y CONFIG_NET_EGRESS=y CONFIG_NET_FLOW_LIMIT=y @@ -246,7 +243,6 @@ CONFIG_RPS=y # CONFIG_RTL839X is not set CONFIG_RTL930X=y CONFIG_RTL931X=y -CONFIG_RUSTC_HAS_COERCE_POINTEE=y CONFIG_SENSORS_GPIO_FAN=y CONFIG_SENSORS_LM75=y CONFIG_SERIAL_MCTRL_GPIO=y From 406a5d35e079d76f73e7f29671bf2c129c3342d9 Mon Sep 17 00:00:00 2001 From: Markus Stockhausen Date: Thu, 2 Apr 2026 21:18:08 +0200 Subject: [PATCH 02/78] realtek: refresh patches Builders are currently complaining. Refresh patches. Automatic update, no manual intervention needed. Signed-off-by: Markus Stockhausen Link: https://github.com/openwrt/openwrt/pull/22747 Signed-off-by: Robert Marko --- .../700-dsa-mdio-increase-max-ports-for-rtl839x-rtl931x.patch | 4 ++-- .../721-net-dsa-add-support-for-tag-rtl-otto.patch | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/target/linux/realtek/patches-6.18/700-dsa-mdio-increase-max-ports-for-rtl839x-rtl931x.patch b/target/linux/realtek/patches-6.18/700-dsa-mdio-increase-max-ports-for-rtl839x-rtl931x.patch index 40d181da73..24d87e4bbe 100644 --- a/target/linux/realtek/patches-6.18/700-dsa-mdio-increase-max-ports-for-rtl839x-rtl931x.patch +++ b/target/linux/realtek/patches-6.18/700-dsa-mdio-increase-max-ports-for-rtl839x-rtl931x.patch @@ -70,7 +70,7 @@ Signed-off-by: Markus Stockhausen struct dsa_chip_data { --- a/include/net/dsa.h +++ b/include/net/dsa.h -@@ -481,7 +481,7 @@ struct dsa_switch { +@@ -480,7 +480,7 @@ struct dsa_switch { /* * User mii_bus and devices for the individual ports. */ @@ -79,7 +79,7 @@ Signed-off-by: Markus Stockhausen struct mii_bus *user_mii_bus; /* Ageing Time limits in msecs */ -@@ -617,24 +617,24 @@ static inline bool dsa_is_user_port(stru +@@ -616,24 +616,24 @@ static inline bool dsa_is_user_port(stru dsa_switch_for_each_port_continue_reverse((_dp), (_ds)) \ if (dsa_port_is_cpu((_dp))) diff --git a/target/linux/realtek/patches-6.18/721-net-dsa-add-support-for-tag-rtl-otto.patch b/target/linux/realtek/patches-6.18/721-net-dsa-add-support-for-tag-rtl-otto.patch index d82a05edc2..dba3418a69 100644 --- a/target/linux/realtek/patches-6.18/721-net-dsa-add-support-for-tag-rtl-otto.patch +++ b/target/linux/realtek/patches-6.18/721-net-dsa-add-support-for-tag-rtl-otto.patch @@ -39,9 +39,9 @@ Signed-off-by: Markus Stockhausen #define DSA_TAG_PROTO_MXL862_8021Q_VALUE 31 +#define DSA_TAG_PROTO_RTL_OTTO_VALUE 32 - enum dsa_tag_protocol { -@@ -92,6 +93,7 @@ enum dsa_tag_protocol { + DSA_TAG_PROTO_NONE = DSA_TAG_PROTO_NONE_VALUE, +@@ -91,6 +92,7 @@ enum dsa_tag_protocol { DSA_TAG_PROTO_VSC73XX_8021Q = DSA_TAG_PROTO_VSC73XX_8021Q_VALUE, DSA_TAG_PROTO_MXL862 = DSA_TAG_PROTO_MXL862_VALUE, DSA_TAG_PROTO_MXL862_8021Q = DSA_TAG_PROTO_MXL862_8021Q_VALUE, From e1c2f02325af5b55a4044d0f59adf23e6851f07f Mon Sep 17 00:00:00 2001 From: Rosen Penev Date: Wed, 1 Apr 2026 16:41:03 -0700 Subject: [PATCH 03/78] treewide: dts: reg: use new syntax for arrays <>, <> is the preferred way to specify multiple entries. Signed-off-by: Rosen Penev Link: https://github.com/openwrt/openwrt/pull/22736 Signed-off-by: Robert Marko --- target/linux/apm821xx/dts/apm82181.dtsi | 3 +-- target/linux/ath79/dts/ar7100.dtsi | 6 ++---- target/linux/ath79/dts/ar9132.dtsi | 3 +-- target/linux/ath79/dts/ar9132_buffalo_wzr-hp-g300nh.dtsi | 3 +-- target/linux/ath79/dts/qca953x.dtsi | 3 +-- .../lantiq/files/arch/mips/boot/dts/lantiq/amazonse.dtsi | 3 +-- .../lantiq/files/arch/mips/boot/dts/lantiq/ar9.dtsi | 9 +++------ .../lantiq/files/arch/mips/boot/dts/lantiq/danube.dtsi | 3 +-- .../lantiq/files/arch/mips/boot/dts/lantiq/vr9.dtsi | 3 +-- target/linux/ramips/dts/mt7620a.dtsi | 3 +-- target/linux/ramips/dts/mt7621.dtsi | 6 ++---- target/linux/ramips/dts/mt7628an.dtsi | 3 +-- 12 files changed, 16 insertions(+), 32 deletions(-) diff --git a/target/linux/apm821xx/dts/apm82181.dtsi b/target/linux/apm821xx/dts/apm82181.dtsi index 71dea7ae20..a1154f4018 100644 --- a/target/linux/apm821xx/dts/apm82181.dtsi +++ b/target/linux/apm821xx/dts/apm82181.dtsi @@ -115,8 +115,7 @@ L2C0: l2c { compatible = "ibm,l2-cache-apm82181", "ibm,l2-cache"; - dcr-reg = <0x020 0x008 - 0x030 0x008>; + dcr-reg = <0x020 0x008>, <0x030 0x008>; cache-line-size = <32>; cache-size = <262144>; interrupt-parent = <&UIC1>; diff --git a/target/linux/ath79/dts/ar7100.dtsi b/target/linux/ath79/dts/ar7100.dtsi index 1cfe82ded8..beb52a1685 100644 --- a/target/linux/ath79/dts/ar7100.dtsi +++ b/target/linux/ath79/dts/ar7100.dtsi @@ -210,8 +210,7 @@ ð0 { compatible = "qca,ar7100-eth", "syscon"; - reg = <0x19000000 0x200 - 0x18070000 0x4>; + reg = <0x19000000 0x200>, <0x18070000 0x4>; pll-data = <0x00110000 0x00001099 0x00991099>; pll-reg = <0x4 0x10 17>; @@ -229,8 +228,7 @@ ð1 { compatible = "qca,ar7100-eth", "syscon"; - reg = <0x1a000000 0x200 - 0x18070004 0x4>; + reg = <0x1a000000 0x200>, <0x18070004 0x4>; pll-data = <0x00110000 0x00001099 0x00991099>; pll-reg = <0x4 0x14 19>; diff --git a/target/linux/ath79/dts/ar9132.dtsi b/target/linux/ath79/dts/ar9132.dtsi index ee9eab4ed1..0633080daa 100644 --- a/target/linux/ath79/dts/ar9132.dtsi +++ b/target/linux/ath79/dts/ar9132.dtsi @@ -199,8 +199,7 @@ ð0 { compatible = "qca,ar9130-eth", "syscon"; - reg = <0x19000000 0x200 - 0x18070000 0x4>; + reg = <0x19000000 0x200>, <0x18070000 0x4>; pll-data = <0x1a000000 0x13000a44 0x00441099>; pll-reg = <0x4 0x14 20>; pll-handle = <&pll>; diff --git a/target/linux/ath79/dts/ar9132_buffalo_wzr-hp-g300nh.dtsi b/target/linux/ath79/dts/ar9132_buffalo_wzr-hp-g300nh.dtsi index 981173c0cd..e41031d683 100644 --- a/target/linux/ath79/dts/ar9132_buffalo_wzr-hp-g300nh.dtsi +++ b/target/linux/ath79/dts/ar9132_buffalo_wzr-hp-g300nh.dtsi @@ -236,8 +236,7 @@ status = "disabled"; compatible = "qca,ar9130-eth", "syscon"; - reg = <0x1a000000 0x200 - 0x18070004 0x4>; + reg = <0x1a000000 0x200>, <0x18070004 0x4>; pll-reg = <0x4 0x18 22>; pll-handle = <&pll>; diff --git a/target/linux/ath79/dts/qca953x.dtsi b/target/linux/ath79/dts/qca953x.dtsi index b5b51275cb..ca1ba6ce20 100644 --- a/target/linux/ath79/dts/qca953x.dtsi +++ b/target/linux/ath79/dts/qca953x.dtsi @@ -234,8 +234,7 @@ ð0 { compatible = "qca,qca9530-eth", "syscon"; pll-data = <0x82000101 0x80000101 0x80001313>; - reg = <0x19000000 0x200 - 0x18070000 0x4>; + reg = <0x19000000 0x200>, <0x18070000 0x4>; pll-reg = <0x4 0x2c 17>; pll-handle = <&pll>; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/amazonse.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/amazonse.dtsi index 042b7f828a..e396ed2496 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/amazonse.dtsi +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/amazonse.dtsi @@ -202,8 +202,7 @@ usb: usb@e101000 { compatible = "lantiq,ase-usb"; - reg = <0xe101000 0x1000 - 0xe120000 0x3f000>; + reg = <0xe101000 0x1000>, <0xe120000 0x3f000>; interrupt-parent = <&icu0>; interrupts = <39>; dr_mode = "host"; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9.dtsi index fdea51192b..541c58a26e 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9.dtsi +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9.dtsi @@ -335,8 +335,7 @@ usb0: usb@e101000 { compatible = "lantiq,arx100-usb"; - reg = <0xe101000 0x1000 - 0xe120000 0x3f000>; + reg = <0xe101000 0x1000>, <0xe120000 0x3f000>; interrupt-parent = <&icu0>; interrupts = <62 91>; dr_mode = "host"; @@ -347,8 +346,7 @@ usb1: usb@e106000 { compatible = "lantiq,arx100-usb"; - reg = <0xe106000 0x1000 - 0xe1e0000 0x3f000>; + reg = <0xe106000 0x1000>, <0xe1e0000 0x3f000>; interrupt-parent = <&icu0>; interrupts = <91>; dr_mode = "host"; @@ -381,8 +379,7 @@ gsw: ethernet@e180000 { compatible = "lantiq,etop-xway"; - reg = <0xe180000 0x40000 - 0xe108000 0x200>; + reg = <0xe180000 0x40000>, <0xe108000 0x200>; interrupt-parent = <&icu0>; interrupts = <73 72>; pinctrl-0 = <&mdio_pins>; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube.dtsi index 8c75f4ad43..45fdeec9bd 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube.dtsi +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube.dtsi @@ -257,8 +257,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "lantiq,danube-usb"; - reg = <0xe101000 0x1000 - 0xe120000 0x3f000>; + reg = <0xe101000 0x1000>, <0xe120000 0x3f000>; interrupt-parent = <&icu0>; interrupts = <62>; dr_mode = "host"; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9.dtsi index ffad822690..1a2e51032d 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9.dtsi +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9.dtsi @@ -398,8 +398,7 @@ #size-cells = <0>; status = "disabled"; compatible = "lantiq,xrx200-usb"; - reg = <0xe101000 0x1000 - 0xe120000 0x3f000>; + reg = <0xe101000 0x1000>, <0xe120000 0x3f000>; interrupt-parent = <&icu0>; interrupts = <62 91>; dr_mode = "host"; diff --git a/target/linux/ramips/dts/mt7620a.dtsi b/target/linux/ramips/dts/mt7620a.dtsi index 781919df5c..43c497b4b7 100644 --- a/target/linux/ramips/dts/mt7620a.dtsi +++ b/target/linux/ramips/dts/mt7620a.dtsi @@ -591,8 +591,7 @@ pcie: pcie@10140000 { compatible = "mediatek,mt7620-pci"; - reg = <0x10140000 0x100 - 0x10142000 0x100>; + reg = <0x10140000 0x100>, <0x10142000 0x100>; #address-cells = <3>; #size-cells = <2>; diff --git a/target/linux/ramips/dts/mt7621.dtsi b/target/linux/ramips/dts/mt7621.dtsi index 64a2982137..89f7ff457a 100644 --- a/target/linux/ramips/dts/mt7621.dtsi +++ b/target/linux/ramips/dts/mt7621.dtsi @@ -393,8 +393,7 @@ #size-cells = <0>; compatible = "mediatek,mt8173-xhci"; - reg = <0x1e1c0000 0x1000 - 0x1e1d0700 0x0100>; + reg = <0x1e1c0000 0x1000>, <0x1e1d0700 0x0100>; reg-names = "mac", "ippc"; clocks = <&sysc MT7621_CLK_XTAL>; @@ -456,8 +455,7 @@ status = "disabled"; compatible = "mediatek,mt7621-nfc"; - reg = <0x1e003000 0x800 - 0x1e003800 0x800>; + reg = <0x1e003000 0x800>, <0x1e003800 0x800>; reg-names = "nfi", "ecc"; clocks = <&sysc MT7621_CLK_NAND>; diff --git a/target/linux/ramips/dts/mt7628an.dtsi b/target/linux/ramips/dts/mt7628an.dtsi index bf39ec307b..650ccbbc6d 100644 --- a/target/linux/ramips/dts/mt7628an.dtsi +++ b/target/linux/ramips/dts/mt7628an.dtsi @@ -481,8 +481,7 @@ pcie: pcie@10140000 { compatible = "mediatek,mt7620-pci"; - reg = <0x10140000 0x100 - 0x10142000 0x8000>; + reg = <0x10140000 0x100>, <0x10142000 0x8000>; #address-cells = <3>; #size-cells = <2>; From 39b31b31f58474221713bcb806141133cfc59f80 Mon Sep 17 00:00:00 2001 From: Rustam Adilov Date: Sun, 29 Mar 2026 14:29:30 +0500 Subject: [PATCH 04/78] realtek: i2c: rtl9300: backport rtl9607c i2c support and speed patches The [1] patch and [2] patch series has been accepted by upstream linux so backport them to OpenWrt. Patch from [1] adds 50 kHz and 2.5 MHz bus speeds. Patch series from [2] adds support for RTL9607C i2c controller. [1] - https://lore.kernel.org/linux-i2c/20260227111134.2163701-1-jan-kernel@kantert.net/ [2] - https://lore.kernel.org/linux-i2c/20260401180648.337834-1-adilov@disroot.org/ Signed-off-by: Rustam Adilov Link: https://github.com/openwrt/openwrt/pull/22663 Signed-off-by: Hauke Mehrtens --- ...300-add-support-for-more-bus-speeds.patch} | 14 +- ...lit-data_reg-into-read-and-write-reg.patch | 112 +++++++++++++ ...oduce-max-length-property-to-driver-.patch | 66 ++++++++ ...oduce-F_BUSY-to-the-reg_fields-struc.patch | 56 +++++++ ...oduce-a-property-for-8-bit-width-reg.patch | 79 +++++++++ ...realtek-rtl9301-i2c-extend-for-clock.patch | 73 +++++++++ ...oduce-clk-struct-for-upcoming-rtl960.patch | 70 ++++++++ ...duce-new-function-properties-to-driv.patch | 147 +++++++++++++++++ ...-add-RTL9607C-i2c-controller-support.patch | 154 ++++++++++++++++++ ...300-add-support-for-more-bus-speeds.patch} | 14 +- ...lit-data_reg-into-read-and-write-reg.patch | 112 +++++++++++++ ...oduce-max-length-property-to-driver-.patch | 66 ++++++++ ...oduce-F_BUSY-to-the-reg_fields-struc.patch | 56 +++++++ ...oduce-a-property-for-8-bit-width-reg.patch | 79 +++++++++ ...realtek-rtl9301-i2c-extend-for-clock.patch | 73 +++++++++ ...oduce-clk-struct-for-upcoming-rtl960.patch | 70 ++++++++ ...duce-new-function-properties-to-driv.patch | 147 +++++++++++++++++ ...-add-RTL9607C-i2c-controller-support.patch | 154 ++++++++++++++++++ 18 files changed, 1528 insertions(+), 14 deletions(-) rename target/linux/realtek/patches-6.12/{100-rtl9300-i2c-add-more-speeds.patch => 026-v7.1-i2c-rtl9300-add-support-for-more-bus-speeds.patch} (77%) create mode 100644 target/linux/realtek/patches-6.12/027-01-v7.1-i2c-rtl9300-split-data_reg-into-read-and-write-reg.patch create mode 100644 target/linux/realtek/patches-6.12/027-02-v7.1-i2c-rtl9300-introduce-max-length-property-to-driver-.patch create mode 100644 target/linux/realtek/patches-6.12/027-03-v7.1-i2c-rtl9300-introduce-F_BUSY-to-the-reg_fields-struc.patch create mode 100644 target/linux/realtek/patches-6.12/027-04-v7.1-i2c-rtl9300-introduce-a-property-for-8-bit-width-reg.patch create mode 100644 target/linux/realtek/patches-6.12/027-05-v7.1-dt-bindings-i2c-realtek-rtl9301-i2c-extend-for-clock.patch create mode 100644 target/linux/realtek/patches-6.12/027-06-v7.1-i2c-rtl9300-introduce-clk-struct-for-upcoming-rtl960.patch create mode 100644 target/linux/realtek/patches-6.12/027-07-v7.1-i2c-rtl9300-introduce-new-function-properties-to-driv.patch create mode 100644 target/linux/realtek/patches-6.12/027-08-v7.1-i2c-rtl9300-add-RTL9607C-i2c-controller-support.patch rename target/linux/realtek/patches-6.18/{100-rtl9300-i2c-add-more-speeds.patch => 026-v7.1-i2c-rtl9300-add-support-for-more-bus-speeds.patch} (77%) create mode 100644 target/linux/realtek/patches-6.18/027-01-v7.1-i2c-rtl9300-split-data_reg-into-read-and-write-reg.patch create mode 100644 target/linux/realtek/patches-6.18/027-02-v7.1-i2c-rtl9300-introduce-max-length-property-to-driver-.patch create mode 100644 target/linux/realtek/patches-6.18/027-03-v7.1-i2c-rtl9300-introduce-F_BUSY-to-the-reg_fields-struc.patch create mode 100644 target/linux/realtek/patches-6.18/027-04-v7.1-i2c-rtl9300-introduce-a-property-for-8-bit-width-reg.patch create mode 100644 target/linux/realtek/patches-6.18/027-05-v7.1-dt-bindings-i2c-realtek-rtl9301-i2c-extend-for-clock.patch create mode 100644 target/linux/realtek/patches-6.18/027-06-v7.1-i2c-rtl9300-introduce-clk-struct-for-upcoming-rtl960.patch create mode 100644 target/linux/realtek/patches-6.18/027-07-v7.1-i2c-rtl9300-introduce-new-function-properties-to-driv.patch create mode 100644 target/linux/realtek/patches-6.18/027-08-v7.1-i2c-rtl9300-add-RTL9607C-i2c-controller-support.patch diff --git a/target/linux/realtek/patches-6.12/100-rtl9300-i2c-add-more-speeds.patch b/target/linux/realtek/patches-6.12/026-v7.1-i2c-rtl9300-add-support-for-more-bus-speeds.patch similarity index 77% rename from target/linux/realtek/patches-6.12/100-rtl9300-i2c-add-more-speeds.patch rename to target/linux/realtek/patches-6.12/026-v7.1-i2c-rtl9300-add-support-for-more-bus-speeds.patch index 8c1115aa23..a31b72e437 100644 --- a/target/linux/realtek/patches-6.12/100-rtl9300-i2c-add-more-speeds.patch +++ b/target/linux/realtek/patches-6.12/026-v7.1-i2c-rtl9300-add-support-for-more-bus-speeds.patch @@ -1,10 +1,7 @@ -From linux-i2c Fri Feb 27 11:11:34 2026 -From: Jan Kantert -Date: Fri, 27 Feb 2026 11:11:34 +0000 -To: linux-i2c -Subject: [PATCH] i2c: rtl9300: add support for 50 kHz and 2.5 MHz bus speeds -Message-Id: <20260227111134.2163701-1-jan-kernel () kantert ! net> -X-MARC-Message: https://marc.info/?l=linux-i2c&m=177219358420283 +From 879766b58ea5cba79ff5fe46f062ed8e05e715aa Mon Sep 17 00:00:00 2001 +From: Jan Kantert +Date: Fri, 27 Feb 2026 12:11:34 +0100 +Subject: i2c: rtl9300: add support for 50 kHz and 2.5 MHz bus speeds Some SFP modules on certain switches (for example the ONTi ONT-S508CL-8S and XikeStor SKS8300-8X) exhibit unreliable I2C communication at the currently @@ -12,6 +9,9 @@ supported speeds. Add support for 50 kHz and 2.5 MHz I2C bus modes on the RTL9300 to improve compatibility with these devices. Signed-off-by: Jan Kantert +Reviewed-by: Chris Packham +Signed-off-by: Andi Shyti +Link: https://lore.kernel.org/r/20260227111134.2163701-1-jan-kernel@kantert.net --- drivers/i2c/busses/i2c-rtl9300.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/target/linux/realtek/patches-6.12/027-01-v7.1-i2c-rtl9300-split-data_reg-into-read-and-write-reg.patch b/target/linux/realtek/patches-6.12/027-01-v7.1-i2c-rtl9300-split-data_reg-into-read-and-write-reg.patch new file mode 100644 index 0000000000..502ca2217c --- /dev/null +++ b/target/linux/realtek/patches-6.12/027-01-v7.1-i2c-rtl9300-split-data_reg-into-read-and-write-reg.patch @@ -0,0 +1,112 @@ +From 4c53b2eb4f18102c36d4bcaf8c604a1825701ffb Mon Sep 17 00:00:00 2001 +From: Rustam Adilov +Date: Wed, 1 Apr 2026 23:06:41 +0500 +Subject: i2c: rtl9300: split data_reg into read and write reg + +In RTL9607C i2c controller, there are 2 separate registers for reads +and writes as opposed the combined 1 on rtl9300 and rtl9310. + +In preparation for RTL9607C support, split it up into rd_reg and wd_reg +properties and change the i2c read and write functions accordingly. + +Signed-off-by: Rustam Adilov +Reviewed-by: Chris Packham +Signed-off-by: Andi Shyti +Link: https://lore.kernel.org/r/20260401180648.337834-2-adilov@disroot.org +--- + drivers/i2c/busses/i2c-rtl9300.c | 25 +++++++++++++++---------- + 1 file changed, 15 insertions(+), 10 deletions(-) + +--- a/drivers/i2c/busses/i2c-rtl9300.c ++++ b/drivers/i2c/busses/i2c-rtl9300.c +@@ -61,7 +61,8 @@ enum rtl9300_i2c_reg_fields { + struct rtl9300_i2c_drv_data { + struct rtl9300_i2c_reg_field field_desc[F_NUM_FIELDS]; + int (*select_scl)(struct rtl9300_i2c *i2c, u8 scl); +- u32 data_reg; ++ u32 rd_reg; ++ u32 wd_reg; + u8 max_nchan; + }; + +@@ -74,7 +75,8 @@ struct rtl9300_i2c { + struct rtl9300_i2c_chan chans[RTL9310_I2C_MUX_NCHAN]; + struct regmap_field *fields[F_NUM_FIELDS]; + u32 reg_base; +- u32 data_reg; ++ u32 rd_reg; ++ u32 wd_reg; + u8 scl_num; + u8 sda_num; + struct mutex lock; +@@ -171,7 +173,7 @@ static int rtl9300_i2c_read(struct rtl93 + if (len > 16) + return -EIO; + +- ret = regmap_bulk_read(i2c->regmap, i2c->data_reg, vals, ARRAY_SIZE(vals)); ++ ret = regmap_bulk_read(i2c->regmap, i2c->rd_reg, vals, ARRAY_SIZE(vals)); + if (ret) + return ret; + +@@ -198,12 +200,12 @@ static int rtl9300_i2c_write(struct rtl9 + vals[reg] |= buf[i] << shift; + } + +- return regmap_bulk_write(i2c->regmap, i2c->data_reg, vals, ARRAY_SIZE(vals)); ++ return regmap_bulk_write(i2c->regmap, i2c->wd_reg, vals, ARRAY_SIZE(vals)); + } + + static int rtl9300_i2c_writel(struct rtl9300_i2c *i2c, u32 data) + { +- return regmap_write(i2c->regmap, i2c->data_reg, data); ++ return regmap_write(i2c->regmap, i2c->wd_reg, data); + } + + static int rtl9300_i2c_prepare_xfer(struct rtl9300_i2c *i2c, struct rtl9300_i2c_xfer *xfer) +@@ -268,14 +270,14 @@ static int rtl9300_i2c_do_xfer(struct rt + if (!xfer->write) { + switch (xfer->type) { + case RTL9300_I2C_XFER_BYTE: +- ret = regmap_read(i2c->regmap, i2c->data_reg, &val); ++ ret = regmap_read(i2c->regmap, i2c->rd_reg, &val); + if (ret) + return ret; + + *xfer->data = val & 0xff; + break; + case RTL9300_I2C_XFER_WORD: +- ret = regmap_read(i2c->regmap, i2c->data_reg, &val); ++ ret = regmap_read(i2c->regmap, i2c->rd_reg, &val); + if (ret) + return ret; + +@@ -408,7 +410,8 @@ static int rtl9300_i2c_probe(struct plat + if (device_get_child_node_count(dev) > drv_data->max_nchan) + return dev_err_probe(dev, -EINVAL, "Too many channels\n"); + +- i2c->data_reg = i2c->reg_base + drv_data->data_reg; ++ i2c->rd_reg = i2c->reg_base + drv_data->rd_reg; ++ i2c->wd_reg = i2c->reg_base + drv_data->wd_reg; + for (i = 0; i < F_NUM_FIELDS; i++) { + fields[i] = drv_data->field_desc[i].field; + if (drv_data->field_desc[i].scope == REG_SCOPE_MASTER) +@@ -499,7 +502,8 @@ static const struct rtl9300_i2c_drv_data + [F_SDA_SEL] = GLB_REG_FIELD(RTL9300_I2C_MST_GLB_CTRL, 0, 7), + }, + .select_scl = rtl9300_i2c_select_scl, +- .data_reg = RTL9300_I2C_MST_DATA_WORD0, ++ .rd_reg = RTL9300_I2C_MST_DATA_WORD0, ++ .wd_reg = RTL9300_I2C_MST_DATA_WORD0, + .max_nchan = RTL9300_I2C_MUX_NCHAN, + }; + +@@ -519,7 +523,8 @@ static const struct rtl9300_i2c_drv_data + [F_MEM_ADDR] = MST_REG_FIELD(RTL9310_I2C_MST_MEMADDR_CTRL, 0, 23), + }, + .select_scl = rtl9310_i2c_select_scl, +- .data_reg = RTL9310_I2C_MST_DATA_CTRL, ++ .rd_reg = RTL9310_I2C_MST_DATA_CTRL, ++ .wd_reg = RTL9310_I2C_MST_DATA_CTRL, + .max_nchan = RTL9310_I2C_MUX_NCHAN, + }; + diff --git a/target/linux/realtek/patches-6.12/027-02-v7.1-i2c-rtl9300-introduce-max-length-property-to-driver-.patch b/target/linux/realtek/patches-6.12/027-02-v7.1-i2c-rtl9300-introduce-max-length-property-to-driver-.patch new file mode 100644 index 0000000000..ba28e5a5fa --- /dev/null +++ b/target/linux/realtek/patches-6.12/027-02-v7.1-i2c-rtl9300-introduce-max-length-property-to-driver-.patch @@ -0,0 +1,66 @@ +From 98773df61f8416594ac993e8464df596755ee1b8 Mon Sep 17 00:00:00 2001 +From: Rustam Adilov +Date: Wed, 1 Apr 2026 23:06:42 +0500 +Subject: i2c: rtl9300: introduce max length property to driver data + +In RTL9607C i2c controller, theoretical maximum the data length +can be is 4 bytes as opposed to 16 bytes on rtl9300 and rtl9310. + +Introduce a new property to the driver data struct for that. +Adjust if statement in prepare_xfer function to follow that new +property instead of the hardcoded value. + +Signed-off-by: Rustam Adilov +Reviewed-by: Chris Packham +Signed-off-by: Andi Shyti +Link: https://lore.kernel.org/r/20260401180648.337834-3-adilov@disroot.org +--- + drivers/i2c/busses/i2c-rtl9300.c | 9 ++++++++- + 1 file changed, 8 insertions(+), 1 deletion(-) + +--- a/drivers/i2c/busses/i2c-rtl9300.c ++++ b/drivers/i2c/busses/i2c-rtl9300.c +@@ -64,11 +64,14 @@ struct rtl9300_i2c_drv_data { + u32 rd_reg; + u32 wd_reg; + u8 max_nchan; ++ u8 max_data_len; + }; + + #define RTL9300_I2C_MUX_NCHAN 8 + #define RTL9310_I2C_MUX_NCHAN 12 + ++#define RTL9300_I2C_MAX_DATA_LEN 16 ++ + struct rtl9300_i2c { + struct regmap *regmap; + struct device *dev; +@@ -210,9 +213,11 @@ static int rtl9300_i2c_writel(struct rtl + + static int rtl9300_i2c_prepare_xfer(struct rtl9300_i2c *i2c, struct rtl9300_i2c_xfer *xfer) + { ++ const struct rtl9300_i2c_drv_data *drv_data; + int ret; + +- if (xfer->data_len < 1 || xfer->data_len > 16) ++ drv_data = device_get_match_data(i2c->dev); ++ if (xfer->data_len < 1 || xfer->data_len > drv_data->max_data_len) + return -EINVAL; + + ret = regmap_field_write(i2c->fields[F_DEV_ADDR], xfer->dev_addr); +@@ -505,6 +510,7 @@ static const struct rtl9300_i2c_drv_data + .rd_reg = RTL9300_I2C_MST_DATA_WORD0, + .wd_reg = RTL9300_I2C_MST_DATA_WORD0, + .max_nchan = RTL9300_I2C_MUX_NCHAN, ++ .max_data_len = RTL9300_I2C_MAX_DATA_LEN, + }; + + static const struct rtl9300_i2c_drv_data rtl9310_i2c_drv_data = { +@@ -526,6 +532,7 @@ static const struct rtl9300_i2c_drv_data + .rd_reg = RTL9310_I2C_MST_DATA_CTRL, + .wd_reg = RTL9310_I2C_MST_DATA_CTRL, + .max_nchan = RTL9310_I2C_MUX_NCHAN, ++ .max_data_len = RTL9300_I2C_MAX_DATA_LEN, + }; + + static const struct of_device_id i2c_rtl9300_dt_ids[] = { diff --git a/target/linux/realtek/patches-6.12/027-03-v7.1-i2c-rtl9300-introduce-F_BUSY-to-the-reg_fields-struc.patch b/target/linux/realtek/patches-6.12/027-03-v7.1-i2c-rtl9300-introduce-F_BUSY-to-the-reg_fields-struc.patch new file mode 100644 index 0000000000..67dd19bccb --- /dev/null +++ b/target/linux/realtek/patches-6.12/027-03-v7.1-i2c-rtl9300-introduce-F_BUSY-to-the-reg_fields-struc.patch @@ -0,0 +1,56 @@ +From 55284a806b63a412846b9ecd3846f2639eaeaff4 Mon Sep 17 00:00:00 2001 +From: Rustam Adilov +Date: Wed, 1 Apr 2026 23:06:43 +0500 +Subject: i2c: rtl9300: introduce F_BUSY to the reg_fields struct + +In RTL9607C i2c controller the busy check operation is done on the +separate bit of the command register as opposed to self clearing +command trigger bit on the rtl9300 and rtl9310 i2c controllers. + +Introduce a new F_BUSY field to the reg_fields struct for that +and change the regmap read poll function to use F_BUSY +instead of I2C_TRIG. + +Signed-off-by: Rustam Adilov +Reviewed-by: Chris Packham +Signed-off-by: Andi Shyti +Link: https://lore.kernel.org/r/20260401180648.337834-4-adilov@disroot.org +--- + drivers/i2c/busses/i2c-rtl9300.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +--- a/drivers/i2c/busses/i2c-rtl9300.c ++++ b/drivers/i2c/busses/i2c-rtl9300.c +@@ -53,6 +53,7 @@ enum rtl9300_i2c_reg_fields { + F_SCL_SEL, + F_SDA_OUT_SEL, + F_SDA_SEL, ++ F_BUSY, + + /* keep last */ + F_NUM_FIELDS +@@ -262,7 +263,7 @@ static int rtl9300_i2c_do_xfer(struct rt + if (ret) + return ret; + +- ret = regmap_field_read_poll_timeout(i2c->fields[F_I2C_TRIG], val, !val, 100, 100000); ++ ret = regmap_field_read_poll_timeout(i2c->fields[F_BUSY], val, !val, 100, 100000); + if (ret) + return ret; + +@@ -505,6 +506,7 @@ static const struct rtl9300_i2c_drv_data + [F_MEM_ADDR_WIDTH] = MST_REG_FIELD(RTL9300_I2C_MST_CTRL2, 2, 3), + [F_SCL_FREQ] = MST_REG_FIELD(RTL9300_I2C_MST_CTRL2, 0, 1), + [F_SDA_SEL] = GLB_REG_FIELD(RTL9300_I2C_MST_GLB_CTRL, 0, 7), ++ [F_BUSY] = MST_REG_FIELD(RTL9300_I2C_MST_CTRL1, 0, 0), + }, + .select_scl = rtl9300_i2c_select_scl, + .rd_reg = RTL9300_I2C_MST_DATA_WORD0, +@@ -527,6 +529,7 @@ static const struct rtl9300_i2c_drv_data + [F_I2C_FAIL] = MST_REG_FIELD(RTL9310_I2C_MST_CTRL, 1, 1), + [F_I2C_TRIG] = MST_REG_FIELD(RTL9310_I2C_MST_CTRL, 0, 0), + [F_MEM_ADDR] = MST_REG_FIELD(RTL9310_I2C_MST_MEMADDR_CTRL, 0, 23), ++ [F_BUSY] = MST_REG_FIELD(RTL9310_I2C_MST_CTRL, 0, 0), + }, + .select_scl = rtl9310_i2c_select_scl, + .rd_reg = RTL9310_I2C_MST_DATA_CTRL, diff --git a/target/linux/realtek/patches-6.12/027-04-v7.1-i2c-rtl9300-introduce-a-property-for-8-bit-width-reg.patch b/target/linux/realtek/patches-6.12/027-04-v7.1-i2c-rtl9300-introduce-a-property-for-8-bit-width-reg.patch new file mode 100644 index 0000000000..ec6f6578d2 --- /dev/null +++ b/target/linux/realtek/patches-6.12/027-04-v7.1-i2c-rtl9300-introduce-a-property-for-8-bit-width-reg.patch @@ -0,0 +1,79 @@ +From 6afde011baaf722aa66c11696b6383f9ce85b653 Mon Sep 17 00:00:00 2001 +From: Rustam Adilov +Date: Wed, 1 Apr 2026 23:06:44 +0500 +Subject: i2c: rtl9300: introduce a property for 8 bit width reg address + +In RTL9607C i2c controller, in order to indicate that the width of +memory address is 8 bits, 0 is written to MEM_ADDR_WIDTH field as +opposed to 1 for RTL9300 and RTL9310. + +Introduce a new property to a driver data to indicate what value +need to written to MEM_ADDR_WIDTH field for this case. + +Signed-off-by: Rustam Adilov +Reviewed-by: Chris Packham +Signed-off-by: Andi Shyti +Link: https://lore.kernel.org/r/20260401180648.337834-5-adilov@disroot.org +--- + drivers/i2c/busses/i2c-rtl9300.c | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +--- a/drivers/i2c/busses/i2c-rtl9300.c ++++ b/drivers/i2c/busses/i2c-rtl9300.c +@@ -66,6 +66,7 @@ struct rtl9300_i2c_drv_data { + u32 wd_reg; + u8 max_nchan; + u8 max_data_len; ++ u8 reg_addr_8bit_len; + }; + + #define RTL9300_I2C_MUX_NCHAN 8 +@@ -111,6 +112,7 @@ struct rtl9300_i2c_xfer { + #define RTL9300_I2C_MST_DATA_WORD2 0x10 + #define RTL9300_I2C_MST_DATA_WORD3 0x14 + #define RTL9300_I2C_MST_GLB_CTRL 0x384 ++#define RTL9300_REG_ADDR_8BIT_LEN 1 + + #define RTL9310_I2C_MST_IF_CTRL 0x1004 + #define RTL9310_I2C_MST_IF_SEL 0x1008 +@@ -305,6 +307,7 @@ static int rtl9300_i2c_smbus_xfer(struct + union i2c_smbus_data *data) + { + struct rtl9300_i2c_chan *chan = i2c_get_adapdata(adap); ++ const struct rtl9300_i2c_drv_data *drv_data; + struct rtl9300_i2c *i2c = chan->i2c; + struct rtl9300_i2c_xfer xfer = {0}; + int ret; +@@ -314,6 +317,7 @@ static int rtl9300_i2c_smbus_xfer(struct + + guard(rtl9300_i2c)(i2c); + ++ drv_data = device_get_match_data(i2c->dev); + ret = rtl9300_i2c_config_chan(i2c, chan); + if (ret) + return ret; +@@ -321,7 +325,7 @@ static int rtl9300_i2c_smbus_xfer(struct + xfer.dev_addr = addr & 0x7f; + xfer.write = (read_write == I2C_SMBUS_WRITE); + xfer.reg_addr = command; +- xfer.reg_addr_len = 1; ++ xfer.reg_addr_len = drv_data->reg_addr_8bit_len; + + switch (size) { + case I2C_SMBUS_BYTE: +@@ -513,6 +517,7 @@ static const struct rtl9300_i2c_drv_data + .wd_reg = RTL9300_I2C_MST_DATA_WORD0, + .max_nchan = RTL9300_I2C_MUX_NCHAN, + .max_data_len = RTL9300_I2C_MAX_DATA_LEN, ++ .reg_addr_8bit_len = RTL9300_REG_ADDR_8BIT_LEN, + }; + + static const struct rtl9300_i2c_drv_data rtl9310_i2c_drv_data = { +@@ -536,6 +541,7 @@ static const struct rtl9300_i2c_drv_data + .wd_reg = RTL9310_I2C_MST_DATA_CTRL, + .max_nchan = RTL9310_I2C_MUX_NCHAN, + .max_data_len = RTL9300_I2C_MAX_DATA_LEN, ++ .reg_addr_8bit_len = RTL9300_REG_ADDR_8BIT_LEN, + }; + + static const struct of_device_id i2c_rtl9300_dt_ids[] = { diff --git a/target/linux/realtek/patches-6.12/027-05-v7.1-dt-bindings-i2c-realtek-rtl9301-i2c-extend-for-clock.patch b/target/linux/realtek/patches-6.12/027-05-v7.1-dt-bindings-i2c-realtek-rtl9301-i2c-extend-for-clock.patch new file mode 100644 index 0000000000..9a1f2b3d39 --- /dev/null +++ b/target/linux/realtek/patches-6.12/027-05-v7.1-dt-bindings-i2c-realtek-rtl9301-i2c-extend-for-clock.patch @@ -0,0 +1,73 @@ +From 1211ce1e11d23ec05d80a85b7187baa6abed3232 Mon Sep 17 00:00:00 2001 +From: Rustam Adilov +Date: Wed, 1 Apr 2026 23:06:45 +0500 +Subject: dt-bindings: i2c: realtek,rtl9301-i2c: extend for clocks and RTL9607C + support + +Add the "realtek,rtl9607-i2c" compatible for i2c controller on the +RTL9607C SoC series. + +Add a clocks property to the properties to describe the i2c reference +clock and make it available for all the compatibles. This i2c reference +clock is assumed to be coming from switchcore region via Lexra bus as +the other SoC peripherals. + +According to the info available about the existing devices, they also +have the i2c master controller clocks. + +RTL9607C requires the "realtek,scl" and "clocks" to be specified +and so handle it under separate if check for "realtek,rtl9607-i2c". + +Signed-off-by: Rustam Adilov +Acked-by: Conor Dooley +Signed-off-by: Andi Shyti +Link: https://lore.kernel.org/r/20260401180648.337834-6-adilov@disroot.org +--- + .../devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +--- a/Documentation/devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml ++++ b/Documentation/devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml +@@ -15,6 +15,8 @@ description: + assigned to either I2C controller. + RTL9310 SoCs have equal capabilities but support 12 common SDA lines which + can be assigned to either I2C controller. ++ RTL9607C SoCs have equal capabilities but each controller only supports 1 ++ SCL/SDA line. + + properties: + compatible: +@@ -34,6 +36,7 @@ properties: + - enum: + - realtek,rtl9301-i2c + - realtek,rtl9310-i2c ++ - realtek,rtl9607-i2c + + reg: + items: +@@ -51,6 +54,9 @@ properties: + The SCL line number of this I2C controller. + enum: [ 0, 1 ] + ++ clocks: ++ maxItems: 1 ++ + patternProperties: + '^i2c@[0-9ab]$': + $ref: /schemas/i2c/i2c-controller.yaml +@@ -82,6 +88,15 @@ allOf: + then: + patternProperties: + '^i2c@[89ab]$': false ++ - if: ++ properties: ++ compatible: ++ contains: ++ const: realtek,rtl9607-i2c ++ then: ++ required: ++ - realtek,scl ++ - clocks + + required: + - compatible diff --git a/target/linux/realtek/patches-6.12/027-06-v7.1-i2c-rtl9300-introduce-clk-struct-for-upcoming-rtl960.patch b/target/linux/realtek/patches-6.12/027-06-v7.1-i2c-rtl9300-introduce-clk-struct-for-upcoming-rtl960.patch new file mode 100644 index 0000000000..56bb8a8f58 --- /dev/null +++ b/target/linux/realtek/patches-6.12/027-06-v7.1-i2c-rtl9300-introduce-clk-struct-for-upcoming-rtl960.patch @@ -0,0 +1,70 @@ +From f60d27926c9e2d547200fb0d26f61eec9b8291a6 Mon Sep 17 00:00:00 2001 +From: Rustam Adilov +Date: Wed, 1 Apr 2026 23:06:46 +0500 +Subject: i2c: rtl9300: introduce clk struct for upcoming rtl9607 support + +In RTL9607C i2c controller, there is 10 bit CLK_DIV field for +setting the clock of i2c interface which depends on the rate +of i2c clk (which seems be fixed to 62.5MHz according to Realtek SDK). + +Introduce the clk struct and the respective F_CLK_DIV and clk_div +which are going to be used in the upcoming patch for rtl9607c i2c +controller support addition. + +devm_clk_get_optional_enabled() function was used for cleaner code +as it automatically returns NULL if the clk is not present, which is +going to be the case for RTL9300 and RTL9310 i2c controllers. + +Signed-off-by: Rustam Adilov +Reviewed-by: Chris Packham +Signed-off-by: Andi Shyti +Link: https://lore.kernel.org/r/20260401180648.337834-7-adilov@disroot.org +--- + drivers/i2c/busses/i2c-rtl9300.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/drivers/i2c/busses/i2c-rtl9300.c ++++ b/drivers/i2c/busses/i2c-rtl9300.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: GPL-2.0-only + + #include ++#include + #include + #include + #include +@@ -28,6 +29,7 @@ struct rtl9300_i2c_chan { + struct rtl9300_i2c *i2c; + enum rtl9300_bus_freq bus_freq; + u8 sda_num; ++ u32 clk_div; + }; + + enum rtl9300_i2c_reg_scope { +@@ -54,6 +56,7 @@ enum rtl9300_i2c_reg_fields { + F_SDA_OUT_SEL, + F_SDA_SEL, + F_BUSY, ++ F_CLK_DIV, + + /* keep last */ + F_NUM_FIELDS +@@ -85,6 +88,7 @@ struct rtl9300_i2c { + u8 scl_num; + u8 sda_num; + struct mutex lock; ++ struct clk *clk; + }; + + DEFINE_GUARD(rtl9300_i2c, struct rtl9300_i2c *, mutex_lock(&_T->lock), mutex_unlock(&_T->lock)) +@@ -432,6 +436,10 @@ static int rtl9300_i2c_probe(struct plat + if (ret) + return ret; + ++ i2c->clk = devm_clk_get_optional_enabled(dev, NULL); ++ if (IS_ERR(i2c->clk)) ++ return dev_err_probe(dev, PTR_ERR(i2c->clk), "Failed to enable i2c clock\n"); ++ + i = 0; + for_each_child_of_node_scoped(dev->of_node, child) { + struct rtl9300_i2c_chan *chan = &i2c->chans[i]; diff --git a/target/linux/realtek/patches-6.12/027-07-v7.1-i2c-rtl9300-introduce-new-function-properties-to-driv.patch b/target/linux/realtek/patches-6.12/027-07-v7.1-i2c-rtl9300-introduce-new-function-properties-to-driv.patch new file mode 100644 index 0000000000..f2fe9e7dfb --- /dev/null +++ b/target/linux/realtek/patches-6.12/027-07-v7.1-i2c-rtl9300-introduce-new-function-properties-to-driv.patch @@ -0,0 +1,147 @@ +From 991cd899ecd03a1c3ef7d177a0b99e824c6be581 Mon Sep 17 00:00:00 2001 +From: Rustam Adilov +Date: Wed, 1 Apr 2026 23:06:47 +0500 +Subject: i2c: rtl9300: introduce new function properties to driver data + +Due to the very nature of differences between RTL9607C i2c controller +and RTL9300 / RTL9310 that are incompatible with each other in some areas +of this driver, for example in clock configuration, channel configuration +and initialization at the end of the probe, introduce new function +properties to the driver data struct to handle those differences. + +With these new properties, create configuration functions for RTL9300 and +RTL9310 and assign them to their respective driver data structs. + +Signed-off-by: Rustam Adilov +Signed-off-by: Andi Shyti +Link: https://lore.kernel.org/r/20260401180648.337834-8-adilov@disroot.org +--- + drivers/i2c/busses/i2c-rtl9300.c | 66 ++++++++++++++++++++++++++-------------- + 1 file changed, 44 insertions(+), 22 deletions(-) + +--- a/drivers/i2c/busses/i2c-rtl9300.c ++++ b/drivers/i2c/busses/i2c-rtl9300.c +@@ -65,6 +65,9 @@ enum rtl9300_i2c_reg_fields { + struct rtl9300_i2c_drv_data { + struct rtl9300_i2c_reg_field field_desc[F_NUM_FIELDS]; + int (*select_scl)(struct rtl9300_i2c *i2c, u8 scl); ++ int (*config_chan)(struct rtl9300_i2c *i2c, struct rtl9300_i2c_chan *chan); ++ void (*config_clock)(u32 clock_freq, struct rtl9300_i2c_chan *chan); ++ int (*misc_init)(struct rtl9300_i2c *i2c); + u32 rd_reg; + u32 wd_reg; + u8 max_nchan; +@@ -175,6 +178,30 @@ static int rtl9300_i2c_config_chan(struc + return 0; + } + ++static void rtl9300_i2c_config_clock(u32 clock_freq, struct rtl9300_i2c_chan *chan) ++{ ++ struct rtl9300_i2c *i2c = chan->i2c; ++ ++ switch (clock_freq) { ++ case I2C_MAX_STANDARD_MODE_FREQ: ++ chan->bus_freq = RTL9300_I2C_STD_FREQ; ++ break; ++ case I2C_MAX_FAST_MODE_FREQ: ++ chan->bus_freq = RTL9300_I2C_FAST_FREQ; ++ break; ++ case RTL9300_I2C_MAX_SUPER_FAST_FREQ: ++ chan->bus_freq = RTL9300_I2C_SUPER_FAST_FREQ; ++ break; ++ case RTL9300_I2C_MAX_SLOW_FREQ: ++ chan->bus_freq = RTL9300_I2C_SLOW_FREQ; ++ break; ++ default: ++ dev_warn(i2c->dev, "SDA%d clock-frequency %d not supported using default\n", ++ chan->sda_num, clock_freq); ++ break; ++ } ++} ++ + static int rtl9300_i2c_read(struct rtl9300_i2c *i2c, u8 *buf, u8 len) + { + u32 vals[4] = {}; +@@ -322,7 +349,7 @@ static int rtl9300_i2c_smbus_xfer(struct + guard(rtl9300_i2c)(i2c); + + drv_data = device_get_match_data(i2c->dev); +- ret = rtl9300_i2c_config_chan(i2c, chan); ++ ret = drv_data->config_chan(i2c, chan); + if (ret) + return ret; + +@@ -389,6 +416,12 @@ static struct i2c_adapter_quirks rtl9300 + .max_write_len = 16, + }; + ++static int rtl9300_i2c_init(struct rtl9300_i2c *i2c) ++{ ++ /* only use standard read format */ ++ return regmap_field_write(i2c->fields[F_RD_MODE], 0); ++} ++ + static int rtl9300_i2c_probe(struct platform_device *pdev) + { + struct device *dev = &pdev->dev; +@@ -453,27 +486,11 @@ static int rtl9300_i2c_probe(struct plat + if (ret) + clock_freq = I2C_MAX_STANDARD_MODE_FREQ; + +- switch (clock_freq) { +- case I2C_MAX_STANDARD_MODE_FREQ: +- chan->bus_freq = RTL9300_I2C_STD_FREQ; +- break; +- case I2C_MAX_FAST_MODE_FREQ: +- chan->bus_freq = RTL9300_I2C_FAST_FREQ; +- break; +- case RTL9300_I2C_MAX_SUPER_FAST_FREQ: +- chan->bus_freq = RTL9300_I2C_SUPER_FAST_FREQ; +- break; +- case RTL9300_I2C_MAX_SLOW_FREQ: +- chan->bus_freq = RTL9300_I2C_SLOW_FREQ; +- break; +- default: +- dev_warn(i2c->dev, "SDA%d clock-frequency %d not supported using default\n", +- sda_num, clock_freq); +- break; +- } +- + chan->sda_num = sda_num; + chan->i2c = i2c; ++ ++ drv_data->config_clock(clock_freq, chan); ++ + adap = &i2c->chans[i].adap; + adap->owner = THIS_MODULE; + adap->algo = &rtl9300_i2c_algo; +@@ -491,8 +508,7 @@ static int rtl9300_i2c_probe(struct plat + } + i2c->sda_num = 0xff; + +- /* only use standard read format */ +- ret = regmap_field_write(i2c->fields[F_RD_MODE], 0); ++ ret = drv_data->misc_init(i2c); + if (ret) + return ret; + +@@ -521,6 +537,9 @@ static const struct rtl9300_i2c_drv_data + [F_BUSY] = MST_REG_FIELD(RTL9300_I2C_MST_CTRL1, 0, 0), + }, + .select_scl = rtl9300_i2c_select_scl, ++ .config_chan = rtl9300_i2c_config_chan, ++ .config_clock = rtl9300_i2c_config_clock, ++ .misc_init = rtl9300_i2c_init, + .rd_reg = RTL9300_I2C_MST_DATA_WORD0, + .wd_reg = RTL9300_I2C_MST_DATA_WORD0, + .max_nchan = RTL9300_I2C_MUX_NCHAN, +@@ -545,6 +564,9 @@ static const struct rtl9300_i2c_drv_data + [F_BUSY] = MST_REG_FIELD(RTL9310_I2C_MST_CTRL, 0, 0), + }, + .select_scl = rtl9310_i2c_select_scl, ++ .config_chan = rtl9300_i2c_config_chan, ++ .config_clock = rtl9300_i2c_config_clock, ++ .misc_init = rtl9300_i2c_init, + .rd_reg = RTL9310_I2C_MST_DATA_CTRL, + .wd_reg = RTL9310_I2C_MST_DATA_CTRL, + .max_nchan = RTL9310_I2C_MUX_NCHAN, diff --git a/target/linux/realtek/patches-6.12/027-08-v7.1-i2c-rtl9300-add-RTL9607C-i2c-controller-support.patch b/target/linux/realtek/patches-6.12/027-08-v7.1-i2c-rtl9300-add-RTL9607C-i2c-controller-support.patch new file mode 100644 index 0000000000..13a6530a24 --- /dev/null +++ b/target/linux/realtek/patches-6.12/027-08-v7.1-i2c-rtl9300-add-RTL9607C-i2c-controller-support.patch @@ -0,0 +1,154 @@ +From 40890b5fe72b1a0d4913883844854f6641a2f4b3 Mon Sep 17 00:00:00 2001 +From: Rustam Adilov +Date: Wed, 1 Apr 2026 23:06:48 +0500 +Subject: i2c: rtl9300: add RTL9607C i2c controller support + +Add support for the internal I2C controllers of RTL9607C series based +SoCs. Add register definitions, chip-specific functions and macros too. + +Make use of the clk introduced from the previous patch to get the clk_div +value and use it during the rtl9607c channel configuration. + +Introduce a new EXT_SCK_5MS field to the reg fields struct which is going +to be initialized by rtl9607c init function at the end of the probe. + +This patch depends on all the previous patches in this patch series. + +Signed-off-by: Rustam Adilov +Reviewed-by: Chris Packham +Signed-off-by: Andi Shyti +Link: https://lore.kernel.org/r/20260401180648.337834-9-adilov@disroot.org +--- + drivers/i2c/busses/i2c-rtl9300.c | 70 ++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 70 insertions(+) + +--- a/drivers/i2c/busses/i2c-rtl9300.c ++++ b/drivers/i2c/busses/i2c-rtl9300.c +@@ -57,6 +57,7 @@ enum rtl9300_i2c_reg_fields { + F_SDA_SEL, + F_BUSY, + F_CLK_DIV, ++ F_EXT_SCK_5MS, + + /* keep last */ + F_NUM_FIELDS +@@ -77,8 +78,10 @@ struct rtl9300_i2c_drv_data { + + #define RTL9300_I2C_MUX_NCHAN 8 + #define RTL9310_I2C_MUX_NCHAN 12 ++#define RTL9607_I2C_MUX_NCHAN 1 + + #define RTL9300_I2C_MAX_DATA_LEN 16 ++#define RTL9607_I2C_MAX_DATA_LEN 4 + + struct rtl9300_i2c { + struct regmap *regmap; +@@ -127,6 +130,14 @@ struct rtl9300_i2c_xfer { + #define RTL9310_I2C_MST_MEMADDR_CTRL 0x4 + #define RTL9310_I2C_MST_DATA_CTRL 0x8 + ++#define RTL9607_I2C_CONFIG 0x22f50 ++#define RTL9607_IO_MODE_EN 0x23014 ++#define RTL9607_I2C_IND_WD 0x0 ++#define RTL9607_I2C_IND_ADR 0x8 ++#define RTL9607_I2C_IND_CMD 0x10 ++#define RTL9607_I2C_IND_RD 0x18 ++#define RTL9607_REG_ADDR_8BIT_LEN 0 ++ + static int rtl9300_i2c_reg_addr_set(struct rtl9300_i2c *i2c, u32 reg, u16 len) + { + int ret; +@@ -178,6 +189,27 @@ static int rtl9300_i2c_config_chan(struc + return 0; + } + ++static int rtl9607_i2c_config_chan(struct rtl9300_i2c *i2c, struct rtl9300_i2c_chan *chan) ++{ ++ const struct rtl9300_i2c_drv_data *drv_data; ++ int ret; ++ ++ if (i2c->sda_num == chan->sda_num) ++ return 0; ++ ++ ret = regmap_field_write(i2c->fields[F_CLK_DIV], chan->clk_div); ++ if (ret) ++ return ret; ++ ++ drv_data = device_get_match_data(i2c->dev); ++ ret = drv_data->select_scl(i2c, i2c->scl_num); ++ if (ret) ++ return ret; ++ ++ i2c->sda_num = chan->sda_num; ++ return 0; ++} ++ + static void rtl9300_i2c_config_clock(u32 clock_freq, struct rtl9300_i2c_chan *chan) + { + struct rtl9300_i2c *i2c = chan->i2c; +@@ -202,6 +234,13 @@ static void rtl9300_i2c_config_clock(u32 + } + } + ++static void rtl9607_i2c_config_clock(u32 clock_freq, struct rtl9300_i2c_chan *chan) ++{ ++ struct rtl9300_i2c *i2c = chan->i2c; ++ ++ chan->clk_div = clk_get_rate(i2c->clk) / clock_freq - 1; ++} ++ + static int rtl9300_i2c_read(struct rtl9300_i2c *i2c, u8 *buf, u8 len) + { + u32 vals[4] = {}; +@@ -422,6 +461,11 @@ static int rtl9300_i2c_init(struct rtl93 + return regmap_field_write(i2c->fields[F_RD_MODE], 0); + } + ++static int rtl9607_i2c_init(struct rtl9300_i2c *i2c) ++{ ++ return regmap_field_write(i2c->fields[F_EXT_SCK_5MS], 1); ++} ++ + static int rtl9300_i2c_probe(struct platform_device *pdev) + { + struct device *dev = &pdev->dev; +@@ -574,6 +618,31 @@ static const struct rtl9300_i2c_drv_data + .reg_addr_8bit_len = RTL9300_REG_ADDR_8BIT_LEN, + }; + ++static const struct rtl9300_i2c_drv_data rtl9607_i2c_drv_data = { ++ .field_desc = { ++ [F_SCL_SEL] = GLB_REG_FIELD(RTL9607_IO_MODE_EN, 13, 14), ++ [F_EXT_SCK_5MS] = MST_REG_FIELD(RTL9607_I2C_CONFIG, 26, 26), ++ [F_DEV_ADDR] = MST_REG_FIELD(RTL9607_I2C_CONFIG, 14, 20), ++ [F_MEM_ADDR_WIDTH] = MST_REG_FIELD(RTL9607_I2C_CONFIG, 12, 13), ++ [F_DATA_WIDTH] = MST_REG_FIELD(RTL9607_I2C_CONFIG, 10, 11), ++ [F_CLK_DIV] = MST_REG_FIELD(RTL9607_I2C_CONFIG, 0, 9), ++ [F_I2C_FAIL] = MST_REG_FIELD(RTL9607_I2C_IND_CMD, 3, 3), ++ [F_BUSY] = MST_REG_FIELD(RTL9607_I2C_IND_CMD, 2, 2), ++ [F_RWOP] = MST_REG_FIELD(RTL9607_I2C_IND_CMD, 1, 1), ++ [F_I2C_TRIG] = MST_REG_FIELD(RTL9607_I2C_IND_CMD, 0, 0), ++ [F_MEM_ADDR] = MST_REG_FIELD(RTL9607_I2C_IND_ADR, 0, 31), ++ }, ++ .select_scl = rtl9310_i2c_select_scl, ++ .config_chan = rtl9607_i2c_config_chan, ++ .config_clock = rtl9607_i2c_config_clock, ++ .misc_init = rtl9607_i2c_init, ++ .rd_reg = RTL9607_I2C_IND_RD, ++ .wd_reg = RTL9607_I2C_IND_WD, ++ .max_nchan = RTL9607_I2C_MUX_NCHAN, ++ .max_data_len = RTL9607_I2C_MAX_DATA_LEN, ++ .reg_addr_8bit_len = RTL9607_REG_ADDR_8BIT_LEN, ++}; ++ + static const struct of_device_id i2c_rtl9300_dt_ids[] = { + { .compatible = "realtek,rtl9301-i2c", .data = (void *) &rtl9300_i2c_drv_data }, + { .compatible = "realtek,rtl9302b-i2c", .data = (void *) &rtl9300_i2c_drv_data }, +@@ -583,6 +652,7 @@ static const struct of_device_id i2c_rtl + { .compatible = "realtek,rtl9311-i2c", .data = (void *) &rtl9310_i2c_drv_data }, + { .compatible = "realtek,rtl9312-i2c", .data = (void *) &rtl9310_i2c_drv_data }, + { .compatible = "realtek,rtl9313-i2c", .data = (void *) &rtl9310_i2c_drv_data }, ++ { .compatible = "realtek,rtl9607-i2c", .data = (void *) &rtl9607_i2c_drv_data }, + {} + }; + MODULE_DEVICE_TABLE(of, i2c_rtl9300_dt_ids); diff --git a/target/linux/realtek/patches-6.18/100-rtl9300-i2c-add-more-speeds.patch b/target/linux/realtek/patches-6.18/026-v7.1-i2c-rtl9300-add-support-for-more-bus-speeds.patch similarity index 77% rename from target/linux/realtek/patches-6.18/100-rtl9300-i2c-add-more-speeds.patch rename to target/linux/realtek/patches-6.18/026-v7.1-i2c-rtl9300-add-support-for-more-bus-speeds.patch index 8c1115aa23..a31b72e437 100644 --- a/target/linux/realtek/patches-6.18/100-rtl9300-i2c-add-more-speeds.patch +++ b/target/linux/realtek/patches-6.18/026-v7.1-i2c-rtl9300-add-support-for-more-bus-speeds.patch @@ -1,10 +1,7 @@ -From linux-i2c Fri Feb 27 11:11:34 2026 -From: Jan Kantert -Date: Fri, 27 Feb 2026 11:11:34 +0000 -To: linux-i2c -Subject: [PATCH] i2c: rtl9300: add support for 50 kHz and 2.5 MHz bus speeds -Message-Id: <20260227111134.2163701-1-jan-kernel () kantert ! net> -X-MARC-Message: https://marc.info/?l=linux-i2c&m=177219358420283 +From 879766b58ea5cba79ff5fe46f062ed8e05e715aa Mon Sep 17 00:00:00 2001 +From: Jan Kantert +Date: Fri, 27 Feb 2026 12:11:34 +0100 +Subject: i2c: rtl9300: add support for 50 kHz and 2.5 MHz bus speeds Some SFP modules on certain switches (for example the ONTi ONT-S508CL-8S and XikeStor SKS8300-8X) exhibit unreliable I2C communication at the currently @@ -12,6 +9,9 @@ supported speeds. Add support for 50 kHz and 2.5 MHz I2C bus modes on the RTL9300 to improve compatibility with these devices. Signed-off-by: Jan Kantert +Reviewed-by: Chris Packham +Signed-off-by: Andi Shyti +Link: https://lore.kernel.org/r/20260227111134.2163701-1-jan-kernel@kantert.net --- drivers/i2c/busses/i2c-rtl9300.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/target/linux/realtek/patches-6.18/027-01-v7.1-i2c-rtl9300-split-data_reg-into-read-and-write-reg.patch b/target/linux/realtek/patches-6.18/027-01-v7.1-i2c-rtl9300-split-data_reg-into-read-and-write-reg.patch new file mode 100644 index 0000000000..502ca2217c --- /dev/null +++ b/target/linux/realtek/patches-6.18/027-01-v7.1-i2c-rtl9300-split-data_reg-into-read-and-write-reg.patch @@ -0,0 +1,112 @@ +From 4c53b2eb4f18102c36d4bcaf8c604a1825701ffb Mon Sep 17 00:00:00 2001 +From: Rustam Adilov +Date: Wed, 1 Apr 2026 23:06:41 +0500 +Subject: i2c: rtl9300: split data_reg into read and write reg + +In RTL9607C i2c controller, there are 2 separate registers for reads +and writes as opposed the combined 1 on rtl9300 and rtl9310. + +In preparation for RTL9607C support, split it up into rd_reg and wd_reg +properties and change the i2c read and write functions accordingly. + +Signed-off-by: Rustam Adilov +Reviewed-by: Chris Packham +Signed-off-by: Andi Shyti +Link: https://lore.kernel.org/r/20260401180648.337834-2-adilov@disroot.org +--- + drivers/i2c/busses/i2c-rtl9300.c | 25 +++++++++++++++---------- + 1 file changed, 15 insertions(+), 10 deletions(-) + +--- a/drivers/i2c/busses/i2c-rtl9300.c ++++ b/drivers/i2c/busses/i2c-rtl9300.c +@@ -61,7 +61,8 @@ enum rtl9300_i2c_reg_fields { + struct rtl9300_i2c_drv_data { + struct rtl9300_i2c_reg_field field_desc[F_NUM_FIELDS]; + int (*select_scl)(struct rtl9300_i2c *i2c, u8 scl); +- u32 data_reg; ++ u32 rd_reg; ++ u32 wd_reg; + u8 max_nchan; + }; + +@@ -74,7 +75,8 @@ struct rtl9300_i2c { + struct rtl9300_i2c_chan chans[RTL9310_I2C_MUX_NCHAN]; + struct regmap_field *fields[F_NUM_FIELDS]; + u32 reg_base; +- u32 data_reg; ++ u32 rd_reg; ++ u32 wd_reg; + u8 scl_num; + u8 sda_num; + struct mutex lock; +@@ -171,7 +173,7 @@ static int rtl9300_i2c_read(struct rtl93 + if (len > 16) + return -EIO; + +- ret = regmap_bulk_read(i2c->regmap, i2c->data_reg, vals, ARRAY_SIZE(vals)); ++ ret = regmap_bulk_read(i2c->regmap, i2c->rd_reg, vals, ARRAY_SIZE(vals)); + if (ret) + return ret; + +@@ -198,12 +200,12 @@ static int rtl9300_i2c_write(struct rtl9 + vals[reg] |= buf[i] << shift; + } + +- return regmap_bulk_write(i2c->regmap, i2c->data_reg, vals, ARRAY_SIZE(vals)); ++ return regmap_bulk_write(i2c->regmap, i2c->wd_reg, vals, ARRAY_SIZE(vals)); + } + + static int rtl9300_i2c_writel(struct rtl9300_i2c *i2c, u32 data) + { +- return regmap_write(i2c->regmap, i2c->data_reg, data); ++ return regmap_write(i2c->regmap, i2c->wd_reg, data); + } + + static int rtl9300_i2c_prepare_xfer(struct rtl9300_i2c *i2c, struct rtl9300_i2c_xfer *xfer) +@@ -268,14 +270,14 @@ static int rtl9300_i2c_do_xfer(struct rt + if (!xfer->write) { + switch (xfer->type) { + case RTL9300_I2C_XFER_BYTE: +- ret = regmap_read(i2c->regmap, i2c->data_reg, &val); ++ ret = regmap_read(i2c->regmap, i2c->rd_reg, &val); + if (ret) + return ret; + + *xfer->data = val & 0xff; + break; + case RTL9300_I2C_XFER_WORD: +- ret = regmap_read(i2c->regmap, i2c->data_reg, &val); ++ ret = regmap_read(i2c->regmap, i2c->rd_reg, &val); + if (ret) + return ret; + +@@ -408,7 +410,8 @@ static int rtl9300_i2c_probe(struct plat + if (device_get_child_node_count(dev) > drv_data->max_nchan) + return dev_err_probe(dev, -EINVAL, "Too many channels\n"); + +- i2c->data_reg = i2c->reg_base + drv_data->data_reg; ++ i2c->rd_reg = i2c->reg_base + drv_data->rd_reg; ++ i2c->wd_reg = i2c->reg_base + drv_data->wd_reg; + for (i = 0; i < F_NUM_FIELDS; i++) { + fields[i] = drv_data->field_desc[i].field; + if (drv_data->field_desc[i].scope == REG_SCOPE_MASTER) +@@ -499,7 +502,8 @@ static const struct rtl9300_i2c_drv_data + [F_SDA_SEL] = GLB_REG_FIELD(RTL9300_I2C_MST_GLB_CTRL, 0, 7), + }, + .select_scl = rtl9300_i2c_select_scl, +- .data_reg = RTL9300_I2C_MST_DATA_WORD0, ++ .rd_reg = RTL9300_I2C_MST_DATA_WORD0, ++ .wd_reg = RTL9300_I2C_MST_DATA_WORD0, + .max_nchan = RTL9300_I2C_MUX_NCHAN, + }; + +@@ -519,7 +523,8 @@ static const struct rtl9300_i2c_drv_data + [F_MEM_ADDR] = MST_REG_FIELD(RTL9310_I2C_MST_MEMADDR_CTRL, 0, 23), + }, + .select_scl = rtl9310_i2c_select_scl, +- .data_reg = RTL9310_I2C_MST_DATA_CTRL, ++ .rd_reg = RTL9310_I2C_MST_DATA_CTRL, ++ .wd_reg = RTL9310_I2C_MST_DATA_CTRL, + .max_nchan = RTL9310_I2C_MUX_NCHAN, + }; + diff --git a/target/linux/realtek/patches-6.18/027-02-v7.1-i2c-rtl9300-introduce-max-length-property-to-driver-.patch b/target/linux/realtek/patches-6.18/027-02-v7.1-i2c-rtl9300-introduce-max-length-property-to-driver-.patch new file mode 100644 index 0000000000..ba28e5a5fa --- /dev/null +++ b/target/linux/realtek/patches-6.18/027-02-v7.1-i2c-rtl9300-introduce-max-length-property-to-driver-.patch @@ -0,0 +1,66 @@ +From 98773df61f8416594ac993e8464df596755ee1b8 Mon Sep 17 00:00:00 2001 +From: Rustam Adilov +Date: Wed, 1 Apr 2026 23:06:42 +0500 +Subject: i2c: rtl9300: introduce max length property to driver data + +In RTL9607C i2c controller, theoretical maximum the data length +can be is 4 bytes as opposed to 16 bytes on rtl9300 and rtl9310. + +Introduce a new property to the driver data struct for that. +Adjust if statement in prepare_xfer function to follow that new +property instead of the hardcoded value. + +Signed-off-by: Rustam Adilov +Reviewed-by: Chris Packham +Signed-off-by: Andi Shyti +Link: https://lore.kernel.org/r/20260401180648.337834-3-adilov@disroot.org +--- + drivers/i2c/busses/i2c-rtl9300.c | 9 ++++++++- + 1 file changed, 8 insertions(+), 1 deletion(-) + +--- a/drivers/i2c/busses/i2c-rtl9300.c ++++ b/drivers/i2c/busses/i2c-rtl9300.c +@@ -64,11 +64,14 @@ struct rtl9300_i2c_drv_data { + u32 rd_reg; + u32 wd_reg; + u8 max_nchan; ++ u8 max_data_len; + }; + + #define RTL9300_I2C_MUX_NCHAN 8 + #define RTL9310_I2C_MUX_NCHAN 12 + ++#define RTL9300_I2C_MAX_DATA_LEN 16 ++ + struct rtl9300_i2c { + struct regmap *regmap; + struct device *dev; +@@ -210,9 +213,11 @@ static int rtl9300_i2c_writel(struct rtl + + static int rtl9300_i2c_prepare_xfer(struct rtl9300_i2c *i2c, struct rtl9300_i2c_xfer *xfer) + { ++ const struct rtl9300_i2c_drv_data *drv_data; + int ret; + +- if (xfer->data_len < 1 || xfer->data_len > 16) ++ drv_data = device_get_match_data(i2c->dev); ++ if (xfer->data_len < 1 || xfer->data_len > drv_data->max_data_len) + return -EINVAL; + + ret = regmap_field_write(i2c->fields[F_DEV_ADDR], xfer->dev_addr); +@@ -505,6 +510,7 @@ static const struct rtl9300_i2c_drv_data + .rd_reg = RTL9300_I2C_MST_DATA_WORD0, + .wd_reg = RTL9300_I2C_MST_DATA_WORD0, + .max_nchan = RTL9300_I2C_MUX_NCHAN, ++ .max_data_len = RTL9300_I2C_MAX_DATA_LEN, + }; + + static const struct rtl9300_i2c_drv_data rtl9310_i2c_drv_data = { +@@ -526,6 +532,7 @@ static const struct rtl9300_i2c_drv_data + .rd_reg = RTL9310_I2C_MST_DATA_CTRL, + .wd_reg = RTL9310_I2C_MST_DATA_CTRL, + .max_nchan = RTL9310_I2C_MUX_NCHAN, ++ .max_data_len = RTL9300_I2C_MAX_DATA_LEN, + }; + + static const struct of_device_id i2c_rtl9300_dt_ids[] = { diff --git a/target/linux/realtek/patches-6.18/027-03-v7.1-i2c-rtl9300-introduce-F_BUSY-to-the-reg_fields-struc.patch b/target/linux/realtek/patches-6.18/027-03-v7.1-i2c-rtl9300-introduce-F_BUSY-to-the-reg_fields-struc.patch new file mode 100644 index 0000000000..67dd19bccb --- /dev/null +++ b/target/linux/realtek/patches-6.18/027-03-v7.1-i2c-rtl9300-introduce-F_BUSY-to-the-reg_fields-struc.patch @@ -0,0 +1,56 @@ +From 55284a806b63a412846b9ecd3846f2639eaeaff4 Mon Sep 17 00:00:00 2001 +From: Rustam Adilov +Date: Wed, 1 Apr 2026 23:06:43 +0500 +Subject: i2c: rtl9300: introduce F_BUSY to the reg_fields struct + +In RTL9607C i2c controller the busy check operation is done on the +separate bit of the command register as opposed to self clearing +command trigger bit on the rtl9300 and rtl9310 i2c controllers. + +Introduce a new F_BUSY field to the reg_fields struct for that +and change the regmap read poll function to use F_BUSY +instead of I2C_TRIG. + +Signed-off-by: Rustam Adilov +Reviewed-by: Chris Packham +Signed-off-by: Andi Shyti +Link: https://lore.kernel.org/r/20260401180648.337834-4-adilov@disroot.org +--- + drivers/i2c/busses/i2c-rtl9300.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +--- a/drivers/i2c/busses/i2c-rtl9300.c ++++ b/drivers/i2c/busses/i2c-rtl9300.c +@@ -53,6 +53,7 @@ enum rtl9300_i2c_reg_fields { + F_SCL_SEL, + F_SDA_OUT_SEL, + F_SDA_SEL, ++ F_BUSY, + + /* keep last */ + F_NUM_FIELDS +@@ -262,7 +263,7 @@ static int rtl9300_i2c_do_xfer(struct rt + if (ret) + return ret; + +- ret = regmap_field_read_poll_timeout(i2c->fields[F_I2C_TRIG], val, !val, 100, 100000); ++ ret = regmap_field_read_poll_timeout(i2c->fields[F_BUSY], val, !val, 100, 100000); + if (ret) + return ret; + +@@ -505,6 +506,7 @@ static const struct rtl9300_i2c_drv_data + [F_MEM_ADDR_WIDTH] = MST_REG_FIELD(RTL9300_I2C_MST_CTRL2, 2, 3), + [F_SCL_FREQ] = MST_REG_FIELD(RTL9300_I2C_MST_CTRL2, 0, 1), + [F_SDA_SEL] = GLB_REG_FIELD(RTL9300_I2C_MST_GLB_CTRL, 0, 7), ++ [F_BUSY] = MST_REG_FIELD(RTL9300_I2C_MST_CTRL1, 0, 0), + }, + .select_scl = rtl9300_i2c_select_scl, + .rd_reg = RTL9300_I2C_MST_DATA_WORD0, +@@ -527,6 +529,7 @@ static const struct rtl9300_i2c_drv_data + [F_I2C_FAIL] = MST_REG_FIELD(RTL9310_I2C_MST_CTRL, 1, 1), + [F_I2C_TRIG] = MST_REG_FIELD(RTL9310_I2C_MST_CTRL, 0, 0), + [F_MEM_ADDR] = MST_REG_FIELD(RTL9310_I2C_MST_MEMADDR_CTRL, 0, 23), ++ [F_BUSY] = MST_REG_FIELD(RTL9310_I2C_MST_CTRL, 0, 0), + }, + .select_scl = rtl9310_i2c_select_scl, + .rd_reg = RTL9310_I2C_MST_DATA_CTRL, diff --git a/target/linux/realtek/patches-6.18/027-04-v7.1-i2c-rtl9300-introduce-a-property-for-8-bit-width-reg.patch b/target/linux/realtek/patches-6.18/027-04-v7.1-i2c-rtl9300-introduce-a-property-for-8-bit-width-reg.patch new file mode 100644 index 0000000000..ec6f6578d2 --- /dev/null +++ b/target/linux/realtek/patches-6.18/027-04-v7.1-i2c-rtl9300-introduce-a-property-for-8-bit-width-reg.patch @@ -0,0 +1,79 @@ +From 6afde011baaf722aa66c11696b6383f9ce85b653 Mon Sep 17 00:00:00 2001 +From: Rustam Adilov +Date: Wed, 1 Apr 2026 23:06:44 +0500 +Subject: i2c: rtl9300: introduce a property for 8 bit width reg address + +In RTL9607C i2c controller, in order to indicate that the width of +memory address is 8 bits, 0 is written to MEM_ADDR_WIDTH field as +opposed to 1 for RTL9300 and RTL9310. + +Introduce a new property to a driver data to indicate what value +need to written to MEM_ADDR_WIDTH field for this case. + +Signed-off-by: Rustam Adilov +Reviewed-by: Chris Packham +Signed-off-by: Andi Shyti +Link: https://lore.kernel.org/r/20260401180648.337834-5-adilov@disroot.org +--- + drivers/i2c/busses/i2c-rtl9300.c | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +--- a/drivers/i2c/busses/i2c-rtl9300.c ++++ b/drivers/i2c/busses/i2c-rtl9300.c +@@ -66,6 +66,7 @@ struct rtl9300_i2c_drv_data { + u32 wd_reg; + u8 max_nchan; + u8 max_data_len; ++ u8 reg_addr_8bit_len; + }; + + #define RTL9300_I2C_MUX_NCHAN 8 +@@ -111,6 +112,7 @@ struct rtl9300_i2c_xfer { + #define RTL9300_I2C_MST_DATA_WORD2 0x10 + #define RTL9300_I2C_MST_DATA_WORD3 0x14 + #define RTL9300_I2C_MST_GLB_CTRL 0x384 ++#define RTL9300_REG_ADDR_8BIT_LEN 1 + + #define RTL9310_I2C_MST_IF_CTRL 0x1004 + #define RTL9310_I2C_MST_IF_SEL 0x1008 +@@ -305,6 +307,7 @@ static int rtl9300_i2c_smbus_xfer(struct + union i2c_smbus_data *data) + { + struct rtl9300_i2c_chan *chan = i2c_get_adapdata(adap); ++ const struct rtl9300_i2c_drv_data *drv_data; + struct rtl9300_i2c *i2c = chan->i2c; + struct rtl9300_i2c_xfer xfer = {0}; + int ret; +@@ -314,6 +317,7 @@ static int rtl9300_i2c_smbus_xfer(struct + + guard(rtl9300_i2c)(i2c); + ++ drv_data = device_get_match_data(i2c->dev); + ret = rtl9300_i2c_config_chan(i2c, chan); + if (ret) + return ret; +@@ -321,7 +325,7 @@ static int rtl9300_i2c_smbus_xfer(struct + xfer.dev_addr = addr & 0x7f; + xfer.write = (read_write == I2C_SMBUS_WRITE); + xfer.reg_addr = command; +- xfer.reg_addr_len = 1; ++ xfer.reg_addr_len = drv_data->reg_addr_8bit_len; + + switch (size) { + case I2C_SMBUS_BYTE: +@@ -513,6 +517,7 @@ static const struct rtl9300_i2c_drv_data + .wd_reg = RTL9300_I2C_MST_DATA_WORD0, + .max_nchan = RTL9300_I2C_MUX_NCHAN, + .max_data_len = RTL9300_I2C_MAX_DATA_LEN, ++ .reg_addr_8bit_len = RTL9300_REG_ADDR_8BIT_LEN, + }; + + static const struct rtl9300_i2c_drv_data rtl9310_i2c_drv_data = { +@@ -536,6 +541,7 @@ static const struct rtl9300_i2c_drv_data + .wd_reg = RTL9310_I2C_MST_DATA_CTRL, + .max_nchan = RTL9310_I2C_MUX_NCHAN, + .max_data_len = RTL9300_I2C_MAX_DATA_LEN, ++ .reg_addr_8bit_len = RTL9300_REG_ADDR_8BIT_LEN, + }; + + static const struct of_device_id i2c_rtl9300_dt_ids[] = { diff --git a/target/linux/realtek/patches-6.18/027-05-v7.1-dt-bindings-i2c-realtek-rtl9301-i2c-extend-for-clock.patch b/target/linux/realtek/patches-6.18/027-05-v7.1-dt-bindings-i2c-realtek-rtl9301-i2c-extend-for-clock.patch new file mode 100644 index 0000000000..9a1f2b3d39 --- /dev/null +++ b/target/linux/realtek/patches-6.18/027-05-v7.1-dt-bindings-i2c-realtek-rtl9301-i2c-extend-for-clock.patch @@ -0,0 +1,73 @@ +From 1211ce1e11d23ec05d80a85b7187baa6abed3232 Mon Sep 17 00:00:00 2001 +From: Rustam Adilov +Date: Wed, 1 Apr 2026 23:06:45 +0500 +Subject: dt-bindings: i2c: realtek,rtl9301-i2c: extend for clocks and RTL9607C + support + +Add the "realtek,rtl9607-i2c" compatible for i2c controller on the +RTL9607C SoC series. + +Add a clocks property to the properties to describe the i2c reference +clock and make it available for all the compatibles. This i2c reference +clock is assumed to be coming from switchcore region via Lexra bus as +the other SoC peripherals. + +According to the info available about the existing devices, they also +have the i2c master controller clocks. + +RTL9607C requires the "realtek,scl" and "clocks" to be specified +and so handle it under separate if check for "realtek,rtl9607-i2c". + +Signed-off-by: Rustam Adilov +Acked-by: Conor Dooley +Signed-off-by: Andi Shyti +Link: https://lore.kernel.org/r/20260401180648.337834-6-adilov@disroot.org +--- + .../devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +--- a/Documentation/devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml ++++ b/Documentation/devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml +@@ -15,6 +15,8 @@ description: + assigned to either I2C controller. + RTL9310 SoCs have equal capabilities but support 12 common SDA lines which + can be assigned to either I2C controller. ++ RTL9607C SoCs have equal capabilities but each controller only supports 1 ++ SCL/SDA line. + + properties: + compatible: +@@ -34,6 +36,7 @@ properties: + - enum: + - realtek,rtl9301-i2c + - realtek,rtl9310-i2c ++ - realtek,rtl9607-i2c + + reg: + items: +@@ -51,6 +54,9 @@ properties: + The SCL line number of this I2C controller. + enum: [ 0, 1 ] + ++ clocks: ++ maxItems: 1 ++ + patternProperties: + '^i2c@[0-9ab]$': + $ref: /schemas/i2c/i2c-controller.yaml +@@ -82,6 +88,15 @@ allOf: + then: + patternProperties: + '^i2c@[89ab]$': false ++ - if: ++ properties: ++ compatible: ++ contains: ++ const: realtek,rtl9607-i2c ++ then: ++ required: ++ - realtek,scl ++ - clocks + + required: + - compatible diff --git a/target/linux/realtek/patches-6.18/027-06-v7.1-i2c-rtl9300-introduce-clk-struct-for-upcoming-rtl960.patch b/target/linux/realtek/patches-6.18/027-06-v7.1-i2c-rtl9300-introduce-clk-struct-for-upcoming-rtl960.patch new file mode 100644 index 0000000000..56bb8a8f58 --- /dev/null +++ b/target/linux/realtek/patches-6.18/027-06-v7.1-i2c-rtl9300-introduce-clk-struct-for-upcoming-rtl960.patch @@ -0,0 +1,70 @@ +From f60d27926c9e2d547200fb0d26f61eec9b8291a6 Mon Sep 17 00:00:00 2001 +From: Rustam Adilov +Date: Wed, 1 Apr 2026 23:06:46 +0500 +Subject: i2c: rtl9300: introduce clk struct for upcoming rtl9607 support + +In RTL9607C i2c controller, there is 10 bit CLK_DIV field for +setting the clock of i2c interface which depends on the rate +of i2c clk (which seems be fixed to 62.5MHz according to Realtek SDK). + +Introduce the clk struct and the respective F_CLK_DIV and clk_div +which are going to be used in the upcoming patch for rtl9607c i2c +controller support addition. + +devm_clk_get_optional_enabled() function was used for cleaner code +as it automatically returns NULL if the clk is not present, which is +going to be the case for RTL9300 and RTL9310 i2c controllers. + +Signed-off-by: Rustam Adilov +Reviewed-by: Chris Packham +Signed-off-by: Andi Shyti +Link: https://lore.kernel.org/r/20260401180648.337834-7-adilov@disroot.org +--- + drivers/i2c/busses/i2c-rtl9300.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/drivers/i2c/busses/i2c-rtl9300.c ++++ b/drivers/i2c/busses/i2c-rtl9300.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: GPL-2.0-only + + #include ++#include + #include + #include + #include +@@ -28,6 +29,7 @@ struct rtl9300_i2c_chan { + struct rtl9300_i2c *i2c; + enum rtl9300_bus_freq bus_freq; + u8 sda_num; ++ u32 clk_div; + }; + + enum rtl9300_i2c_reg_scope { +@@ -54,6 +56,7 @@ enum rtl9300_i2c_reg_fields { + F_SDA_OUT_SEL, + F_SDA_SEL, + F_BUSY, ++ F_CLK_DIV, + + /* keep last */ + F_NUM_FIELDS +@@ -85,6 +88,7 @@ struct rtl9300_i2c { + u8 scl_num; + u8 sda_num; + struct mutex lock; ++ struct clk *clk; + }; + + DEFINE_GUARD(rtl9300_i2c, struct rtl9300_i2c *, mutex_lock(&_T->lock), mutex_unlock(&_T->lock)) +@@ -432,6 +436,10 @@ static int rtl9300_i2c_probe(struct plat + if (ret) + return ret; + ++ i2c->clk = devm_clk_get_optional_enabled(dev, NULL); ++ if (IS_ERR(i2c->clk)) ++ return dev_err_probe(dev, PTR_ERR(i2c->clk), "Failed to enable i2c clock\n"); ++ + i = 0; + for_each_child_of_node_scoped(dev->of_node, child) { + struct rtl9300_i2c_chan *chan = &i2c->chans[i]; diff --git a/target/linux/realtek/patches-6.18/027-07-v7.1-i2c-rtl9300-introduce-new-function-properties-to-driv.patch b/target/linux/realtek/patches-6.18/027-07-v7.1-i2c-rtl9300-introduce-new-function-properties-to-driv.patch new file mode 100644 index 0000000000..f2fe9e7dfb --- /dev/null +++ b/target/linux/realtek/patches-6.18/027-07-v7.1-i2c-rtl9300-introduce-new-function-properties-to-driv.patch @@ -0,0 +1,147 @@ +From 991cd899ecd03a1c3ef7d177a0b99e824c6be581 Mon Sep 17 00:00:00 2001 +From: Rustam Adilov +Date: Wed, 1 Apr 2026 23:06:47 +0500 +Subject: i2c: rtl9300: introduce new function properties to driver data + +Due to the very nature of differences between RTL9607C i2c controller +and RTL9300 / RTL9310 that are incompatible with each other in some areas +of this driver, for example in clock configuration, channel configuration +and initialization at the end of the probe, introduce new function +properties to the driver data struct to handle those differences. + +With these new properties, create configuration functions for RTL9300 and +RTL9310 and assign them to their respective driver data structs. + +Signed-off-by: Rustam Adilov +Signed-off-by: Andi Shyti +Link: https://lore.kernel.org/r/20260401180648.337834-8-adilov@disroot.org +--- + drivers/i2c/busses/i2c-rtl9300.c | 66 ++++++++++++++++++++++++++-------------- + 1 file changed, 44 insertions(+), 22 deletions(-) + +--- a/drivers/i2c/busses/i2c-rtl9300.c ++++ b/drivers/i2c/busses/i2c-rtl9300.c +@@ -65,6 +65,9 @@ enum rtl9300_i2c_reg_fields { + struct rtl9300_i2c_drv_data { + struct rtl9300_i2c_reg_field field_desc[F_NUM_FIELDS]; + int (*select_scl)(struct rtl9300_i2c *i2c, u8 scl); ++ int (*config_chan)(struct rtl9300_i2c *i2c, struct rtl9300_i2c_chan *chan); ++ void (*config_clock)(u32 clock_freq, struct rtl9300_i2c_chan *chan); ++ int (*misc_init)(struct rtl9300_i2c *i2c); + u32 rd_reg; + u32 wd_reg; + u8 max_nchan; +@@ -175,6 +178,30 @@ static int rtl9300_i2c_config_chan(struc + return 0; + } + ++static void rtl9300_i2c_config_clock(u32 clock_freq, struct rtl9300_i2c_chan *chan) ++{ ++ struct rtl9300_i2c *i2c = chan->i2c; ++ ++ switch (clock_freq) { ++ case I2C_MAX_STANDARD_MODE_FREQ: ++ chan->bus_freq = RTL9300_I2C_STD_FREQ; ++ break; ++ case I2C_MAX_FAST_MODE_FREQ: ++ chan->bus_freq = RTL9300_I2C_FAST_FREQ; ++ break; ++ case RTL9300_I2C_MAX_SUPER_FAST_FREQ: ++ chan->bus_freq = RTL9300_I2C_SUPER_FAST_FREQ; ++ break; ++ case RTL9300_I2C_MAX_SLOW_FREQ: ++ chan->bus_freq = RTL9300_I2C_SLOW_FREQ; ++ break; ++ default: ++ dev_warn(i2c->dev, "SDA%d clock-frequency %d not supported using default\n", ++ chan->sda_num, clock_freq); ++ break; ++ } ++} ++ + static int rtl9300_i2c_read(struct rtl9300_i2c *i2c, u8 *buf, u8 len) + { + u32 vals[4] = {}; +@@ -322,7 +349,7 @@ static int rtl9300_i2c_smbus_xfer(struct + guard(rtl9300_i2c)(i2c); + + drv_data = device_get_match_data(i2c->dev); +- ret = rtl9300_i2c_config_chan(i2c, chan); ++ ret = drv_data->config_chan(i2c, chan); + if (ret) + return ret; + +@@ -389,6 +416,12 @@ static struct i2c_adapter_quirks rtl9300 + .max_write_len = 16, + }; + ++static int rtl9300_i2c_init(struct rtl9300_i2c *i2c) ++{ ++ /* only use standard read format */ ++ return regmap_field_write(i2c->fields[F_RD_MODE], 0); ++} ++ + static int rtl9300_i2c_probe(struct platform_device *pdev) + { + struct device *dev = &pdev->dev; +@@ -453,27 +486,11 @@ static int rtl9300_i2c_probe(struct plat + if (ret) + clock_freq = I2C_MAX_STANDARD_MODE_FREQ; + +- switch (clock_freq) { +- case I2C_MAX_STANDARD_MODE_FREQ: +- chan->bus_freq = RTL9300_I2C_STD_FREQ; +- break; +- case I2C_MAX_FAST_MODE_FREQ: +- chan->bus_freq = RTL9300_I2C_FAST_FREQ; +- break; +- case RTL9300_I2C_MAX_SUPER_FAST_FREQ: +- chan->bus_freq = RTL9300_I2C_SUPER_FAST_FREQ; +- break; +- case RTL9300_I2C_MAX_SLOW_FREQ: +- chan->bus_freq = RTL9300_I2C_SLOW_FREQ; +- break; +- default: +- dev_warn(i2c->dev, "SDA%d clock-frequency %d not supported using default\n", +- sda_num, clock_freq); +- break; +- } +- + chan->sda_num = sda_num; + chan->i2c = i2c; ++ ++ drv_data->config_clock(clock_freq, chan); ++ + adap = &i2c->chans[i].adap; + adap->owner = THIS_MODULE; + adap->algo = &rtl9300_i2c_algo; +@@ -491,8 +508,7 @@ static int rtl9300_i2c_probe(struct plat + } + i2c->sda_num = 0xff; + +- /* only use standard read format */ +- ret = regmap_field_write(i2c->fields[F_RD_MODE], 0); ++ ret = drv_data->misc_init(i2c); + if (ret) + return ret; + +@@ -521,6 +537,9 @@ static const struct rtl9300_i2c_drv_data + [F_BUSY] = MST_REG_FIELD(RTL9300_I2C_MST_CTRL1, 0, 0), + }, + .select_scl = rtl9300_i2c_select_scl, ++ .config_chan = rtl9300_i2c_config_chan, ++ .config_clock = rtl9300_i2c_config_clock, ++ .misc_init = rtl9300_i2c_init, + .rd_reg = RTL9300_I2C_MST_DATA_WORD0, + .wd_reg = RTL9300_I2C_MST_DATA_WORD0, + .max_nchan = RTL9300_I2C_MUX_NCHAN, +@@ -545,6 +564,9 @@ static const struct rtl9300_i2c_drv_data + [F_BUSY] = MST_REG_FIELD(RTL9310_I2C_MST_CTRL, 0, 0), + }, + .select_scl = rtl9310_i2c_select_scl, ++ .config_chan = rtl9300_i2c_config_chan, ++ .config_clock = rtl9300_i2c_config_clock, ++ .misc_init = rtl9300_i2c_init, + .rd_reg = RTL9310_I2C_MST_DATA_CTRL, + .wd_reg = RTL9310_I2C_MST_DATA_CTRL, + .max_nchan = RTL9310_I2C_MUX_NCHAN, diff --git a/target/linux/realtek/patches-6.18/027-08-v7.1-i2c-rtl9300-add-RTL9607C-i2c-controller-support.patch b/target/linux/realtek/patches-6.18/027-08-v7.1-i2c-rtl9300-add-RTL9607C-i2c-controller-support.patch new file mode 100644 index 0000000000..13a6530a24 --- /dev/null +++ b/target/linux/realtek/patches-6.18/027-08-v7.1-i2c-rtl9300-add-RTL9607C-i2c-controller-support.patch @@ -0,0 +1,154 @@ +From 40890b5fe72b1a0d4913883844854f6641a2f4b3 Mon Sep 17 00:00:00 2001 +From: Rustam Adilov +Date: Wed, 1 Apr 2026 23:06:48 +0500 +Subject: i2c: rtl9300: add RTL9607C i2c controller support + +Add support for the internal I2C controllers of RTL9607C series based +SoCs. Add register definitions, chip-specific functions and macros too. + +Make use of the clk introduced from the previous patch to get the clk_div +value and use it during the rtl9607c channel configuration. + +Introduce a new EXT_SCK_5MS field to the reg fields struct which is going +to be initialized by rtl9607c init function at the end of the probe. + +This patch depends on all the previous patches in this patch series. + +Signed-off-by: Rustam Adilov +Reviewed-by: Chris Packham +Signed-off-by: Andi Shyti +Link: https://lore.kernel.org/r/20260401180648.337834-9-adilov@disroot.org +--- + drivers/i2c/busses/i2c-rtl9300.c | 70 ++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 70 insertions(+) + +--- a/drivers/i2c/busses/i2c-rtl9300.c ++++ b/drivers/i2c/busses/i2c-rtl9300.c +@@ -57,6 +57,7 @@ enum rtl9300_i2c_reg_fields { + F_SDA_SEL, + F_BUSY, + F_CLK_DIV, ++ F_EXT_SCK_5MS, + + /* keep last */ + F_NUM_FIELDS +@@ -77,8 +78,10 @@ struct rtl9300_i2c_drv_data { + + #define RTL9300_I2C_MUX_NCHAN 8 + #define RTL9310_I2C_MUX_NCHAN 12 ++#define RTL9607_I2C_MUX_NCHAN 1 + + #define RTL9300_I2C_MAX_DATA_LEN 16 ++#define RTL9607_I2C_MAX_DATA_LEN 4 + + struct rtl9300_i2c { + struct regmap *regmap; +@@ -127,6 +130,14 @@ struct rtl9300_i2c_xfer { + #define RTL9310_I2C_MST_MEMADDR_CTRL 0x4 + #define RTL9310_I2C_MST_DATA_CTRL 0x8 + ++#define RTL9607_I2C_CONFIG 0x22f50 ++#define RTL9607_IO_MODE_EN 0x23014 ++#define RTL9607_I2C_IND_WD 0x0 ++#define RTL9607_I2C_IND_ADR 0x8 ++#define RTL9607_I2C_IND_CMD 0x10 ++#define RTL9607_I2C_IND_RD 0x18 ++#define RTL9607_REG_ADDR_8BIT_LEN 0 ++ + static int rtl9300_i2c_reg_addr_set(struct rtl9300_i2c *i2c, u32 reg, u16 len) + { + int ret; +@@ -178,6 +189,27 @@ static int rtl9300_i2c_config_chan(struc + return 0; + } + ++static int rtl9607_i2c_config_chan(struct rtl9300_i2c *i2c, struct rtl9300_i2c_chan *chan) ++{ ++ const struct rtl9300_i2c_drv_data *drv_data; ++ int ret; ++ ++ if (i2c->sda_num == chan->sda_num) ++ return 0; ++ ++ ret = regmap_field_write(i2c->fields[F_CLK_DIV], chan->clk_div); ++ if (ret) ++ return ret; ++ ++ drv_data = device_get_match_data(i2c->dev); ++ ret = drv_data->select_scl(i2c, i2c->scl_num); ++ if (ret) ++ return ret; ++ ++ i2c->sda_num = chan->sda_num; ++ return 0; ++} ++ + static void rtl9300_i2c_config_clock(u32 clock_freq, struct rtl9300_i2c_chan *chan) + { + struct rtl9300_i2c *i2c = chan->i2c; +@@ -202,6 +234,13 @@ static void rtl9300_i2c_config_clock(u32 + } + } + ++static void rtl9607_i2c_config_clock(u32 clock_freq, struct rtl9300_i2c_chan *chan) ++{ ++ struct rtl9300_i2c *i2c = chan->i2c; ++ ++ chan->clk_div = clk_get_rate(i2c->clk) / clock_freq - 1; ++} ++ + static int rtl9300_i2c_read(struct rtl9300_i2c *i2c, u8 *buf, u8 len) + { + u32 vals[4] = {}; +@@ -422,6 +461,11 @@ static int rtl9300_i2c_init(struct rtl93 + return regmap_field_write(i2c->fields[F_RD_MODE], 0); + } + ++static int rtl9607_i2c_init(struct rtl9300_i2c *i2c) ++{ ++ return regmap_field_write(i2c->fields[F_EXT_SCK_5MS], 1); ++} ++ + static int rtl9300_i2c_probe(struct platform_device *pdev) + { + struct device *dev = &pdev->dev; +@@ -574,6 +618,31 @@ static const struct rtl9300_i2c_drv_data + .reg_addr_8bit_len = RTL9300_REG_ADDR_8BIT_LEN, + }; + ++static const struct rtl9300_i2c_drv_data rtl9607_i2c_drv_data = { ++ .field_desc = { ++ [F_SCL_SEL] = GLB_REG_FIELD(RTL9607_IO_MODE_EN, 13, 14), ++ [F_EXT_SCK_5MS] = MST_REG_FIELD(RTL9607_I2C_CONFIG, 26, 26), ++ [F_DEV_ADDR] = MST_REG_FIELD(RTL9607_I2C_CONFIG, 14, 20), ++ [F_MEM_ADDR_WIDTH] = MST_REG_FIELD(RTL9607_I2C_CONFIG, 12, 13), ++ [F_DATA_WIDTH] = MST_REG_FIELD(RTL9607_I2C_CONFIG, 10, 11), ++ [F_CLK_DIV] = MST_REG_FIELD(RTL9607_I2C_CONFIG, 0, 9), ++ [F_I2C_FAIL] = MST_REG_FIELD(RTL9607_I2C_IND_CMD, 3, 3), ++ [F_BUSY] = MST_REG_FIELD(RTL9607_I2C_IND_CMD, 2, 2), ++ [F_RWOP] = MST_REG_FIELD(RTL9607_I2C_IND_CMD, 1, 1), ++ [F_I2C_TRIG] = MST_REG_FIELD(RTL9607_I2C_IND_CMD, 0, 0), ++ [F_MEM_ADDR] = MST_REG_FIELD(RTL9607_I2C_IND_ADR, 0, 31), ++ }, ++ .select_scl = rtl9310_i2c_select_scl, ++ .config_chan = rtl9607_i2c_config_chan, ++ .config_clock = rtl9607_i2c_config_clock, ++ .misc_init = rtl9607_i2c_init, ++ .rd_reg = RTL9607_I2C_IND_RD, ++ .wd_reg = RTL9607_I2C_IND_WD, ++ .max_nchan = RTL9607_I2C_MUX_NCHAN, ++ .max_data_len = RTL9607_I2C_MAX_DATA_LEN, ++ .reg_addr_8bit_len = RTL9607_REG_ADDR_8BIT_LEN, ++}; ++ + static const struct of_device_id i2c_rtl9300_dt_ids[] = { + { .compatible = "realtek,rtl9301-i2c", .data = (void *) &rtl9300_i2c_drv_data }, + { .compatible = "realtek,rtl9302b-i2c", .data = (void *) &rtl9300_i2c_drv_data }, +@@ -583,6 +652,7 @@ static const struct of_device_id i2c_rtl + { .compatible = "realtek,rtl9311-i2c", .data = (void *) &rtl9310_i2c_drv_data }, + { .compatible = "realtek,rtl9312-i2c", .data = (void *) &rtl9310_i2c_drv_data }, + { .compatible = "realtek,rtl9313-i2c", .data = (void *) &rtl9310_i2c_drv_data }, ++ { .compatible = "realtek,rtl9607-i2c", .data = (void *) &rtl9607_i2c_drv_data }, + {} + }; + MODULE_DEVICE_TABLE(of, i2c_rtl9300_dt_ids); From 5e7ba9801970bca3cf807c281e68f70bbcce6c06 Mon Sep 17 00:00:00 2001 From: Philip Prindeville Date: Thu, 7 Sep 2023 10:19:57 -0600 Subject: [PATCH 05/78] wwan: add Quectel modems Add some of the more current 4G and 5G modems. Signed-off-by: Philip Prindeville Link: https://github.com/openwrt/openwrt/pull/13426 Signed-off-by: Hauke Mehrtens --- package/network/utils/wwan/Makefile | 2 +- package/network/utils/wwan/files/data/1eac-1001 | 4 ++++ package/network/utils/wwan/files/data/1eac-1002 | 4 ++++ package/network/utils/wwan/files/data/2c7c-0620 | 4 ++++ package/network/utils/wwan/files/data/2c7c-0801 | 4 ++++ 5 files changed, 17 insertions(+), 1 deletion(-) create mode 100644 package/network/utils/wwan/files/data/1eac-1001 create mode 100644 package/network/utils/wwan/files/data/1eac-1002 create mode 100644 package/network/utils/wwan/files/data/2c7c-0620 create mode 100644 package/network/utils/wwan/files/data/2c7c-0801 diff --git a/package/network/utils/wwan/Makefile b/package/network/utils/wwan/Makefile index b02f9e11a4..8ada8d6542 100644 --- a/package/network/utils/wwan/Makefile +++ b/package/network/utils/wwan/Makefile @@ -2,7 +2,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=wwan PKG_VERSION:=2019.04.29 -PKG_RELEASE=6 +PKG_RELEASE=7 PKG_LICENSE:=GPL-2.0 PKG_LICENSE_FILES:= diff --git a/package/network/utils/wwan/files/data/1eac-1001 b/package/network/utils/wwan/files/data/1eac-1001 new file mode 100644 index 0000000000..d795fec604 --- /dev/null +++ b/package/network/utils/wwan/files/data/1eac-1001 @@ -0,0 +1,4 @@ +{ + "desc": "Quectel EM120R-GL", + "type": "qmi", +} diff --git a/package/network/utils/wwan/files/data/1eac-1002 b/package/network/utils/wwan/files/data/1eac-1002 new file mode 100644 index 0000000000..ecd46ae31c --- /dev/null +++ b/package/network/utils/wwan/files/data/1eac-1002 @@ -0,0 +1,4 @@ +{ + "desc": "Quectel EM160R-GL", + "type": "qmi", +} diff --git a/package/network/utils/wwan/files/data/2c7c-0620 b/package/network/utils/wwan/files/data/2c7c-0620 new file mode 100644 index 0000000000..d795fec604 --- /dev/null +++ b/package/network/utils/wwan/files/data/2c7c-0620 @@ -0,0 +1,4 @@ +{ + "desc": "Quectel EM120R-GL", + "type": "qmi", +} diff --git a/package/network/utils/wwan/files/data/2c7c-0801 b/package/network/utils/wwan/files/data/2c7c-0801 new file mode 100644 index 0000000000..62808e382c --- /dev/null +++ b/package/network/utils/wwan/files/data/2c7c-0801 @@ -0,0 +1,4 @@ +{ + "desc": "Quectel RM520N-GL", + "type": "qmi", +} From 6767f535be95a428ea62553a99333f63ff12a496 Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Thu, 2 Apr 2026 08:00:59 +0800 Subject: [PATCH 06/78] ramips: dts: mt7621: add missing pinctrl for uart0 This is necessary to make it work properly. Signed-off-by: Shiji Yang Link: https://github.com/openwrt/openwrt/pull/22738 Signed-off-by: Hauke Mehrtens --- target/linux/ramips/dts/mt7621.dtsi | 3 +++ target/linux/ramips/dts/mt7621_elecom_wrc-x1800gs.dts | 5 ----- target/linux/ramips/dts/mt7621_elecom_wxc-x1800gsx.dtsi | 5 ----- 3 files changed, 3 insertions(+), 10 deletions(-) diff --git a/target/linux/ramips/dts/mt7621.dtsi b/target/linux/ramips/dts/mt7621.dtsi index 89f7ff457a..e6ee6d3283 100644 --- a/target/linux/ramips/dts/mt7621.dtsi +++ b/target/linux/ramips/dts/mt7621.dtsi @@ -171,6 +171,9 @@ reg-shift = <2>; reg-io-width = <4>; no-loopback-test; + + pinctrl-0 = <&uart1_pins>; + pinctrl-names = "default"; }; uartlite2: uartlite2@d00 { diff --git a/target/linux/ramips/dts/mt7621_elecom_wrc-x1800gs.dts b/target/linux/ramips/dts/mt7621_elecom_wrc-x1800gs.dts index c0bb5e4969..8b2bd1bf67 100644 --- a/target/linux/ramips/dts/mt7621_elecom_wrc-x1800gs.dts +++ b/target/linux/ramips/dts/mt7621_elecom_wrc-x1800gs.dts @@ -272,8 +272,3 @@ function = "gpio"; }; }; - -&uartlite { - pinctrl-0 = <&uart1_pins>; - pinctrl-names = "default"; -}; diff --git a/target/linux/ramips/dts/mt7621_elecom_wxc-x1800gsx.dtsi b/target/linux/ramips/dts/mt7621_elecom_wxc-x1800gsx.dtsi index 2dcd664b93..91cc3f9952 100644 --- a/target/linux/ramips/dts/mt7621_elecom_wxc-x1800gsx.dtsi +++ b/target/linux/ramips/dts/mt7621_elecom_wxc-x1800gsx.dtsi @@ -225,11 +225,6 @@ }; }; -&uartlite { - pinctrl-0 = <&uart1_pins>; - pinctrl-names = "default"; -}; - &xhci { status = "disabled"; }; From 2d9f174881b0c8e0620c7d01f7857c26d4366457 Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Thu, 2 Apr 2026 08:10:36 +0800 Subject: [PATCH 07/78] ramips: dts: fix uart node names The dt-bindings suggest using "^serial(@.*)?$" as the node name. Signed-off-by: Shiji Yang Link: https://github.com/openwrt/openwrt/pull/22738 Signed-off-by: Hauke Mehrtens --- target/linux/ramips/dts/mt7620a.dtsi | 4 ++-- target/linux/ramips/dts/mt7620n.dtsi | 2 +- target/linux/ramips/dts/mt7621.dtsi | 6 +++--- target/linux/ramips/dts/mt7628an.dtsi | 6 +++--- target/linux/ramips/dts/rt2880.dtsi | 2 +- target/linux/ramips/dts/rt3050.dtsi | 4 ++-- target/linux/ramips/dts/rt3352.dtsi | 4 ++-- target/linux/ramips/dts/rt3883.dtsi | 4 ++-- target/linux/ramips/dts/rt5350.dtsi | 4 ++-- 9 files changed, 18 insertions(+), 18 deletions(-) diff --git a/target/linux/ramips/dts/mt7620a.dtsi b/target/linux/ramips/dts/mt7620a.dtsi index 43c497b4b7..7cb7a6c566 100644 --- a/target/linux/ramips/dts/mt7620a.dtsi +++ b/target/linux/ramips/dts/mt7620a.dtsi @@ -107,7 +107,7 @@ interrupts = <3>; }; - uart: uart@500 { + uart: serial@500 { compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a"; reg = <0x500 0x100>; @@ -277,7 +277,7 @@ pinctrl-0 = <&spi_cs1>; }; - uartlite: uartlite@c00 { + uartlite: serial@c00 { compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a"; reg = <0xc00 0x100>; diff --git a/target/linux/ramips/dts/mt7620n.dtsi b/target/linux/ramips/dts/mt7620n.dtsi index 8db73972c0..9c3f1068f5 100644 --- a/target/linux/ramips/dts/mt7620n.dtsi +++ b/target/linux/ramips/dts/mt7620n.dtsi @@ -223,7 +223,7 @@ pinctrl-0 = <&spi_cs1>; }; - uartlite: uartlite@c00 { + uartlite: serial@c00 { compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a"; reg = <0xc00 0x100>; diff --git a/target/linux/ramips/dts/mt7621.dtsi b/target/linux/ramips/dts/mt7621.dtsi index e6ee6d3283..450e8b0afc 100644 --- a/target/linux/ramips/dts/mt7621.dtsi +++ b/target/linux/ramips/dts/mt7621.dtsi @@ -157,7 +157,7 @@ reg = <0x5000 0x1000>; }; - uartlite: uartlite@c00 { + uartlite: serial@c00 { compatible = "ns16550a"; reg = <0xc00 0x100>; @@ -176,7 +176,7 @@ pinctrl-names = "default"; }; - uartlite2: uartlite2@d00 { + uartlite2: serial@d00 { compatible = "ns16550a"; reg = <0xd00 0x100>; @@ -196,7 +196,7 @@ status = "disabled"; }; - uartlite3: uartlite3@e00 { + uartlite3: serial@e00 { compatible = "ns16550a"; reg = <0xe00 0x100>; diff --git a/target/linux/ramips/dts/mt7628an.dtsi b/target/linux/ramips/dts/mt7628an.dtsi index 650ccbbc6d..6bc7d87646 100644 --- a/target/linux/ramips/dts/mt7628an.dtsi +++ b/target/linux/ramips/dts/mt7628an.dtsi @@ -166,7 +166,7 @@ status = "disabled"; }; - uartlite: uart0@c00 { + uartlite: serial@c00 { compatible = "ns16550a"; reg = <0xc00 0x100>; @@ -185,7 +185,7 @@ pinctrl-0 = <&uart0_pins>; }; - uart1: uart1@d00 { + uart1: serial@d00 { compatible = "ns16550a"; reg = <0xd00 0x100>; @@ -206,7 +206,7 @@ status = "disabled"; }; - uart2: uart2@e00 { + uart2: serial@e00 { compatible = "ns16550a"; reg = <0xe00 0x100>; diff --git a/target/linux/ramips/dts/rt2880.dtsi b/target/linux/ramips/dts/rt2880.dtsi index 0ee5f06af1..72cc994f62 100644 --- a/target/linux/ramips/dts/rt2880.dtsi +++ b/target/linux/ramips/dts/rt2880.dtsi @@ -158,7 +158,7 @@ pinctrl-0 = <&i2c_pins>; }; - uartlite: uartlite@c00 { + uartlite: serial@c00 { compatible = "ralink,rt2880-uart", "ns16550a"; reg = <0xc00 0x100>; diff --git a/target/linux/ramips/dts/rt3050.dtsi b/target/linux/ramips/dts/rt3050.dtsi index b56251ba8e..5332cf3d33 100644 --- a/target/linux/ramips/dts/rt3050.dtsi +++ b/target/linux/ramips/dts/rt3050.dtsi @@ -90,7 +90,7 @@ interrupts = <3>; }; - uart: uart@500 { + uart: serial@500 { compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a"; reg = <0x500 0x100>; @@ -237,7 +237,7 @@ status = "disabled"; }; - uartlite: uartlite@c00 { + uartlite: serial@c00 { compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a"; reg = <0xc00 0x100>; diff --git a/target/linux/ramips/dts/rt3352.dtsi b/target/linux/ramips/dts/rt3352.dtsi index be225cff29..d75dbedd73 100644 --- a/target/linux/ramips/dts/rt3352.dtsi +++ b/target/linux/ramips/dts/rt3352.dtsi @@ -91,7 +91,7 @@ interrupts = <3>; }; - uart: uart@500 { + uart: serial@500 { compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a"; reg = <0x500 0x100>; @@ -237,7 +237,7 @@ status = "disabled"; }; - uartlite: uartlite@c00 { + uartlite: serial@c00 { compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a"; reg = <0xc00 0x100>; diff --git a/target/linux/ramips/dts/rt3883.dtsi b/target/linux/ramips/dts/rt3883.dtsi index a543dd5dab..ad1b4a595b 100644 --- a/target/linux/ramips/dts/rt3883.dtsi +++ b/target/linux/ramips/dts/rt3883.dtsi @@ -91,7 +91,7 @@ interrupts = <3>; }; - uart: uart@500 { + uart: serial@500 { compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a"; reg = <0x500 0x100>; @@ -259,7 +259,7 @@ status = "disabled"; }; - uartlite: uartlite@c00 { + uartlite: serial@c00 { compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a"; reg = <0xc00 0x100>; diff --git a/target/linux/ramips/dts/rt5350.dtsi b/target/linux/ramips/dts/rt5350.dtsi index c469ffc123..b7520c893f 100644 --- a/target/linux/ramips/dts/rt5350.dtsi +++ b/target/linux/ramips/dts/rt5350.dtsi @@ -91,7 +91,7 @@ interrupts = <3>; }; - uart: uart@500 { + uart: serial@500 { compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a"; reg = <0x500 0x100>; @@ -221,7 +221,7 @@ status = "disabled"; }; - uartlite: uartlite@c00 { + uartlite: serial@c00 { compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a"; reg = <0xc00 0x100>; From 400a193d8598c0d62fefc0b523650bd7df76c5d0 Mon Sep 17 00:00:00 2001 From: Rosen Penev Date: Wed, 1 Apr 2026 17:12:25 -0700 Subject: [PATCH 08/78] ath79: ar7161: remove default pll-data ar7100.dtsi specifies this exact pll-data. Signed-off-by: Rosen Penev Link: https://github.com/openwrt/openwrt/pull/22746 Signed-off-by: Hauke Mehrtens --- target/linux/ath79/dts/ar7161_aruba_ap-105.dts | 7 +++---- target/linux/ath79/dts/ar7161_fortinet_fap-220-b.dts | 6 +++--- target/linux/ath79/dts/ar7161_meraki_mr16.dts | 7 +++---- target/linux/ath79/dts/ar7161_ruckus_gd11.dtsi | 6 +++--- target/linux/ath79/dts/ar7161_ruckus_zf7363.dts | 5 +++-- 5 files changed, 15 insertions(+), 16 deletions(-) diff --git a/target/linux/ath79/dts/ar7161_aruba_ap-105.dts b/target/linux/ath79/dts/ar7161_aruba_ap-105.dts index 2d295ff3fb..e214405c49 100644 --- a/target/linux/ath79/dts/ar7161_aruba_ap-105.dts +++ b/target/linux/ath79/dts/ar7161_aruba_ap-105.dts @@ -116,13 +116,12 @@ ð0 { status = "okay"; - nvmem-cells = <&macaddr_hwinfo_1c 0>; - nvmem-cell-names = "mac-address"; - - pll-data = <0x00110000 0x00001099 0x00991099>; phy-mode = "rgmii"; phy-handle = <&phy0>; + + nvmem-cells = <&macaddr_hwinfo_1c 0>; + nvmem-cell-names = "mac-address"; }; &spi { diff --git a/target/linux/ath79/dts/ar7161_fortinet_fap-220-b.dts b/target/linux/ath79/dts/ar7161_fortinet_fap-220-b.dts index 3fe9a5590c..d12e6e8770 100644 --- a/target/linux/ath79/dts/ar7161_fortinet_fap-220-b.dts +++ b/target/linux/ath79/dts/ar7161_fortinet_fap-220-b.dts @@ -135,12 +135,12 @@ ð1 { status = "okay"; - nvmem-cells = <&macaddr_uboot_3ff80 0>; - nvmem-cell-names = "mac-address"; - pll-data = <0x00110000 0x00001099 0x00991099>; phy-handle = <&phy0>; phy-mode = "rgmii"; + + nvmem-cells = <&macaddr_uboot_3ff80 0>; + nvmem-cell-names = "mac-address"; }; &usb1 { diff --git a/target/linux/ath79/dts/ar7161_meraki_mr16.dts b/target/linux/ath79/dts/ar7161_meraki_mr16.dts index 25f29b8323..2a4f5aab6b 100644 --- a/target/linux/ath79/dts/ar7161_meraki_mr16.dts +++ b/target/linux/ath79/dts/ar7161_meraki_mr16.dts @@ -103,13 +103,12 @@ ð0 { status = "okay"; - nvmem-cells = <&macaddr_config_66 0>; - nvmem-cell-names = "mac-address"; - - pll-data = <0x00110000 0x00001099 0x00991099>; phy-mode = "rgmii"; phy-handle = <&phy0>; + + nvmem-cells = <&macaddr_config_66 0>; + nvmem-cell-names = "mac-address"; }; &spi { diff --git a/target/linux/ath79/dts/ar7161_ruckus_gd11.dtsi b/target/linux/ath79/dts/ar7161_ruckus_gd11.dtsi index d64bbe55bf..d74b2f5768 100644 --- a/target/linux/ath79/dts/ar7161_ruckus_gd11.dtsi +++ b/target/linux/ath79/dts/ar7161_ruckus_gd11.dtsi @@ -163,12 +163,12 @@ ð0 { status = "okay"; - nvmem-cells = <&macaddr_bdata_66>; - nvmem-cell-names = "mac-address"; - pll-data = <0x00110000 0x00001099 0x00991099>; phy-handle = <&phy0>; phy-mode = "rgmii-id"; + + nvmem-cells = <&macaddr_bdata_66>; + nvmem-cell-names = "mac-address"; }; &spi { diff --git a/target/linux/ath79/dts/ar7161_ruckus_zf7363.dts b/target/linux/ath79/dts/ar7161_ruckus_zf7363.dts index 723e4d9a3b..78d24c0f53 100644 --- a/target/linux/ath79/dts/ar7161_ruckus_zf7363.dts +++ b/target/linux/ath79/dts/ar7161_ruckus_zf7363.dts @@ -21,10 +21,11 @@ ð1 { status = "okay"; - pll-data = <0x00110000 0x00001099 0x00991099>; + + phy-mode = "rgmii-id"; + nvmem-cells = <&macaddr_bdata_6c>; nvmem-cell-names = "mac-address"; - phy-mode = "rgmii-id"; fixed-link { speed = <100>; From 2fab6c937a363adc5ca88ce562aff0cbe2a98133 Mon Sep 17 00:00:00 2001 From: John Audia Date: Thu, 2 Apr 2026 08:41:46 -0400 Subject: [PATCH 09/78] kernel: bump 6.12 to 6.12.80 Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.12.80 Manually rebased: generic-hack/902-debloat_proc.patch All other patches automatically rebased. Signed-off-by: John Audia Link: https://github.com/openwrt/openwrt/pull/22742 Signed-off-by: Hauke Mehrtens --- ...atomic-helpers-remove-legacy_cursor_update-hacks.patch | 2 +- ...usb-Add-device-quirks-for-Freeway-Airmouse-T3-an.patch | 4 ++-- ...2-spi-Force-CS_HIGH-if-GPIO-descriptors-are-used.patch | 4 ++-- .../950-0347-net-macb-Also-set-DMA-coherent-mask.patch | 2 +- ...0-0685-nvme-pci-Disable-Host-Memory-Buffer-usage.patch | 6 +++--- .../950-0828-media-mc-add-manual-request-completion.patch | 8 ++++---- ...ia-mc-add-debugfs-node-to-keep-track-of-requests.patch | 8 ++++---- target/linux/generic/hack-6.12/204-module_strip.patch | 4 ++-- target/linux/generic/hack-6.12/259-regmap_dynamic.patch | 2 +- target/linux/generic/hack-6.12/902-debloat_proc.patch | 8 ++++---- target/linux/generic/kernel-6.12 | 4 ++-- .../generic/pending-6.12/630-packet_socket_type.patch | 6 +++--- ...10-bridge-add-knob-for-filtering-rx-tx-BPDU-pack.patch | 2 +- ...-drivers-spi-Add-support-for-dynamic-calibration.patch | 6 +++--- 14 files changed, 33 insertions(+), 33 deletions(-) diff --git a/target/linux/bcm27xx/patches-6.12/950-0016-drm-atomic-helpers-remove-legacy_cursor_update-hacks.patch b/target/linux/bcm27xx/patches-6.12/950-0016-drm-atomic-helpers-remove-legacy_cursor_update-hacks.patch index fb66aaceba..6ce3398652 100644 --- a/target/linux/bcm27xx/patches-6.12/950-0016-drm-atomic-helpers-remove-legacy_cursor_update-hacks.patch +++ b/target/linux/bcm27xx/patches-6.12/950-0016-drm-atomic-helpers-remove-legacy_cursor_update-hacks.patch @@ -88,7 +88,7 @@ Signed-off-by: Maxime Ripard commit->event = kzalloc(sizeof(*commit->event), --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c -@@ -7645,6 +7645,19 @@ int intel_atomic_commit(struct drm_devic +@@ -7651,6 +7651,19 @@ int intel_atomic_commit(struct drm_devic state->base.legacy_cursor_update = false; } diff --git a/target/linux/bcm27xx/patches-6.12/950-0132-hid-usb-Add-device-quirks-for-Freeway-Airmouse-T3-an.patch b/target/linux/bcm27xx/patches-6.12/950-0132-hid-usb-Add-device-quirks-for-Freeway-Airmouse-T3-an.patch index c38edf1184..36c7ab69f5 100644 --- a/target/linux/bcm27xx/patches-6.12/950-0132-hid-usb-Add-device-quirks-for-Freeway-Airmouse-T3-an.patch +++ b/target/linux/bcm27xx/patches-6.12/950-0132-hid-usb-Add-device-quirks-for-Freeway-Airmouse-T3-an.patch @@ -22,7 +22,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/hid/hid-ids.h +++ b/drivers/hid/hid-ids.h -@@ -254,6 +254,9 @@ +@@ -255,6 +255,9 @@ #define USB_VENDOR_ID_BAANTO 0x2453 #define USB_DEVICE_ID_BAANTO_MT_190W2 0x0100 @@ -32,7 +32,7 @@ Signed-off-by: Jonathan Bell #define USB_VENDOR_ID_BELKIN 0x050d #define USB_DEVICE_ID_FLIP_KVM 0x3201 -@@ -1480,6 +1483,9 @@ +@@ -1481,6 +1484,9 @@ #define USB_VENDOR_ID_XIAOMI 0x2717 #define USB_DEVICE_ID_MI_SILENT_MOUSE 0x5014 diff --git a/target/linux/bcm27xx/patches-6.12/950-0172-spi-Force-CS_HIGH-if-GPIO-descriptors-are-used.patch b/target/linux/bcm27xx/patches-6.12/950-0172-spi-Force-CS_HIGH-if-GPIO-descriptors-are-used.patch index 4d5aae743a..0f7420cb55 100644 --- a/target/linux/bcm27xx/patches-6.12/950-0172-spi-Force-CS_HIGH-if-GPIO-descriptors-are-used.patch +++ b/target/linux/bcm27xx/patches-6.12/950-0172-spi-Force-CS_HIGH-if-GPIO-descriptors-are-used.patch @@ -32,7 +32,7 @@ Signed-off-by: Phil Elwell --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c -@@ -3906,6 +3906,7 @@ static int spi_set_cs_timing(struct spi_ +@@ -3901,6 +3901,7 @@ static int spi_set_cs_timing(struct spi_ */ int spi_setup(struct spi_device *spi) { @@ -40,7 +40,7 @@ Signed-off-by: Phil Elwell unsigned bad_bits, ugly_bits; int status; -@@ -3932,6 +3933,14 @@ int spi_setup(struct spi_device *spi) +@@ -3927,6 +3928,14 @@ int spi_setup(struct spi_device *spi) "setup: MOSI configured to idle low and high at the same time.\n"); return -EINVAL; } diff --git a/target/linux/bcm27xx/patches-6.12/950-0347-net-macb-Also-set-DMA-coherent-mask.patch b/target/linux/bcm27xx/patches-6.12/950-0347-net-macb-Also-set-DMA-coherent-mask.patch index dcac114e9f..92f7bf7771 100644 --- a/target/linux/bcm27xx/patches-6.12/950-0347-net-macb-Also-set-DMA-coherent-mask.patch +++ b/target/linux/bcm27xx/patches-6.12/950-0347-net-macb-Also-set-DMA-coherent-mask.patch @@ -409,7 +409,7 @@ Signed-off-by: Jonathan Bell static int __maybe_unused macb_suspend(struct device *dev) { struct net_device *netdev = dev_get_drvdata(dev); -@@ -5607,6 +5754,7 @@ static const struct dev_pm_ops macb_pm_o +@@ -5616,6 +5763,7 @@ static const struct dev_pm_ops macb_pm_o static struct platform_driver macb_driver = { .probe = macb_probe, .remove_new = macb_remove, diff --git a/target/linux/bcm27xx/patches-6.12/950-0685-nvme-pci-Disable-Host-Memory-Buffer-usage.patch b/target/linux/bcm27xx/patches-6.12/950-0685-nvme-pci-Disable-Host-Memory-Buffer-usage.patch index 9e5476c9fd..4e15efbde6 100644 --- a/target/linux/bcm27xx/patches-6.12/950-0685-nvme-pci-Disable-Host-Memory-Buffer-usage.patch +++ b/target/linux/bcm27xx/patches-6.12/950-0685-nvme-pci-Disable-Host-Memory-Buffer-usage.patch @@ -18,7 +18,7 @@ Signed-off-by: Phil Elwell --- a/drivers/nvme/host/pci.c +++ b/drivers/nvme/host/pci.c -@@ -2111,6 +2111,7 @@ static void nvme_free_host_mem(struct nv +@@ -2112,6 +2112,7 @@ static void nvme_free_host_mem(struct nv dev->nr_host_mem_descs = 0; } @@ -26,7 +26,7 @@ Signed-off-by: Phil Elwell static int __nvme_alloc_host_mem(struct nvme_dev *dev, u64 preferred, u32 chunk_size) { -@@ -2179,9 +2180,11 @@ out: +@@ -2180,9 +2181,11 @@ out: dev->host_mem_descs = NULL; return -ENOMEM; } @@ -38,7 +38,7 @@ Signed-off-by: Phil Elwell u64 min_chunk = min_t(u64, preferred, PAGE_SIZE * MAX_ORDER_NR_PAGES); u64 hmminds = max_t(u32, dev->ctrl.hmminds * 4096, PAGE_SIZE * 2); u64 chunk_size; -@@ -2194,6 +2197,7 @@ static int nvme_alloc_host_mem(struct nv +@@ -2195,6 +2198,7 @@ static int nvme_alloc_host_mem(struct nv nvme_free_host_mem(dev); } } diff --git a/target/linux/bcm27xx/patches-6.12/950-0828-media-mc-add-manual-request-completion.patch b/target/linux/bcm27xx/patches-6.12/950-0828-media-mc-add-manual-request-completion.patch index 2045c6af97..66c81ab0c6 100644 --- a/target/linux/bcm27xx/patches-6.12/950-0828-media-mc-add-manual-request-completion.patch +++ b/target/linux/bcm27xx/patches-6.12/950-0828-media-mc-add-manual-request-completion.patch @@ -30,7 +30,7 @@ Signed-off-by: Hans Verkuil wake_up_interruptible_all(&req->poll_wait); } -@@ -319,6 +320,7 @@ int media_request_alloc(struct media_dev +@@ -324,6 +325,7 @@ int media_request_alloc(struct media_dev req->mdev = mdev; req->state = MEDIA_REQUEST_STATE_IDLE; req->num_incomplete_objects = 0; @@ -38,7 +38,7 @@ Signed-off-by: Hans Verkuil kref_init(&req->kref); INIT_LIST_HEAD(&req->objects); spin_lock_init(&req->lock); -@@ -465,7 +467,7 @@ void media_request_object_unbind(struct +@@ -470,7 +472,7 @@ void media_request_object_unbind(struct req->num_incomplete_objects--; if (req->state == MEDIA_REQUEST_STATE_QUEUED && @@ -47,7 +47,7 @@ Signed-off-by: Hans Verkuil req->state = MEDIA_REQUEST_STATE_COMPLETE; completed = true; wake_up_interruptible_all(&req->poll_wait); -@@ -494,7 +496,7 @@ void media_request_object_complete(struc +@@ -499,7 +501,7 @@ void media_request_object_complete(struc WARN_ON(req->state != MEDIA_REQUEST_STATE_QUEUED)) goto unlock; @@ -56,7 +56,7 @@ Signed-off-by: Hans Verkuil req->state = MEDIA_REQUEST_STATE_COMPLETE; wake_up_interruptible_all(&req->poll_wait); completed = true; -@@ -505,3 +507,35 @@ unlock: +@@ -510,3 +512,35 @@ unlock: media_request_put(req); } EXPORT_SYMBOL_GPL(media_request_object_complete); diff --git a/target/linux/bcm27xx/patches-6.12/950-0830-media-mc-add-debugfs-node-to-keep-track-of-requests.patch b/target/linux/bcm27xx/patches-6.12/950-0830-media-mc-add-debugfs-node-to-keep-track-of-requests.patch index 7ad80a032c..03871aa480 100644 --- a/target/linux/bcm27xx/patches-6.12/950-0830-media-mc-add-debugfs-node-to-keep-track-of-requests.patch +++ b/target/linux/bcm27xx/patches-6.12/950-0830-media-mc-add-debugfs-node-to-keep-track-of-requests.patch @@ -114,7 +114,7 @@ Signed-off-by: Hans Verkuil } void media_request_put(struct media_request *req) -@@ -332,6 +333,7 @@ int media_request_alloc(struct media_dev +@@ -337,6 +338,7 @@ int media_request_alloc(struct media_dev snprintf(req->debug_str, sizeof(req->debug_str), "%u:%d", atomic_inc_return(&mdev->request_id), fd); @@ -122,7 +122,7 @@ Signed-off-by: Hans Verkuil dev_dbg(mdev->dev, "request: allocated %s\n", req->debug_str); fd_install(fd, filp); -@@ -355,10 +357,12 @@ static void media_request_object_release +@@ -360,10 +362,12 @@ static void media_request_object_release struct media_request_object *obj = container_of(kref, struct media_request_object, kref); struct media_request *req = obj->req; @@ -135,7 +135,7 @@ Signed-off-by: Hans Verkuil } struct media_request_object * -@@ -423,6 +427,7 @@ int media_request_object_bind(struct med +@@ -428,6 +432,7 @@ int media_request_object_bind(struct med obj->req = req; obj->ops = ops; obj->priv = priv; @@ -143,7 +143,7 @@ Signed-off-by: Hans Verkuil if (is_buffer) list_add_tail(&obj->list, &req->objects); -@@ -430,6 +435,7 @@ int media_request_object_bind(struct med +@@ -435,6 +440,7 @@ int media_request_object_bind(struct med list_add(&obj->list, &req->objects); req->num_incomplete_objects++; ret = 0; diff --git a/target/linux/generic/hack-6.12/204-module_strip.patch b/target/linux/generic/hack-6.12/204-module_strip.patch index 6f6f6a70d9..22da0d3cfa 100644 --- a/target/linux/generic/hack-6.12/204-module_strip.patch +++ b/target/linux/generic/hack-6.12/204-module_strip.patch @@ -118,7 +118,7 @@ Signed-off-by: Felix Fietkau /* Parse tag=value strings from .modinfo section */ char *module_next_tag_pair(char *string, unsigned long *secsize) -@@ -2095,9 +2097,11 @@ static void module_augment_kernel_taints +@@ -2102,9 +2104,11 @@ static void module_augment_kernel_taints static int check_modinfo(struct module *mod, struct load_info *info, int flags) { @@ -131,7 +131,7 @@ Signed-off-by: Felix Fietkau if (flags & MODULE_INIT_IGNORE_VERMAGIC) modmagic = NULL; -@@ -2111,6 +2115,7 @@ static int check_modinfo(struct module * +@@ -2118,6 +2122,7 @@ static int check_modinfo(struct module * info->name, modmagic, vermagic); return -ENOEXEC; } diff --git a/target/linux/generic/hack-6.12/259-regmap_dynamic.patch b/target/linux/generic/hack-6.12/259-regmap_dynamic.patch index 4f48fc0690..72b282005e 100644 --- a/target/linux/generic/hack-6.12/259-regmap_dynamic.patch +++ b/target/linux/generic/hack-6.12/259-regmap_dynamic.patch @@ -137,7 +137,7 @@ Signed-off-by: Felix Fietkau #include #include #include -@@ -3523,3 +3524,5 @@ static int __init regmap_initcall(void) +@@ -3545,3 +3546,5 @@ static int __init regmap_initcall(void) return 0; } postcore_initcall(regmap_initcall); diff --git a/target/linux/generic/hack-6.12/902-debloat_proc.patch b/target/linux/generic/hack-6.12/902-debloat_proc.patch index e3e2defa96..fe45d47ec5 100644 --- a/target/linux/generic/hack-6.12/902-debloat_proc.patch +++ b/target/linux/generic/hack-6.12/902-debloat_proc.patch @@ -287,7 +287,7 @@ Signed-off-by: Felix Fietkau goto err; --- a/net/core/net-procfs.c +++ b/net/core/net-procfs.c -@@ -295,10 +295,12 @@ static int __net_init dev_proc_net_init( +@@ -312,10 +312,12 @@ static int __net_init dev_proc_net_init( if (!proc_create_net("dev", 0444, net->proc_net, &dev_seq_ops, sizeof(struct seq_net_private))) goto out; @@ -299,10 +299,10 @@ Signed-off-by: Felix Fietkau - if (!proc_create_net("ptype", 0444, net->proc_net, &ptype_seq_ops, + if (!IS_ENABLED(CONFIG_PROC_STRIPPED) && + !proc_create_net("ptype", 0444, net->proc_net, &ptype_seq_ops, - sizeof(struct seq_net_private))) + sizeof(struct ptype_iter_state))) goto out_softnet; -@@ -308,9 +310,11 @@ static int __net_init dev_proc_net_init( +@@ -325,9 +327,11 @@ static int __net_init dev_proc_net_init( out: return rc; out_ptype: @@ -316,7 +316,7 @@ Signed-off-by: Felix Fietkau out_dev: remove_proc_entry("dev", net->proc_net); goto out; -@@ -320,8 +324,10 @@ static void __net_exit dev_proc_net_exit +@@ -337,8 +341,10 @@ static void __net_exit dev_proc_net_exit { wext_proc_exit(net); diff --git a/target/linux/generic/kernel-6.12 b/target/linux/generic/kernel-6.12 index eda0774e7d..427a005af7 100644 --- a/target/linux/generic/kernel-6.12 +++ b/target/linux/generic/kernel-6.12 @@ -1,2 +1,2 @@ -LINUX_VERSION-6.12 = .79 -LINUX_KERNEL_HASH-6.12.79 = 4bfa751f33de2a5d7ecb4ff964743a027fc726a2225a76a18f92f0582aa0790b +LINUX_VERSION-6.12 = .80 +LINUX_KERNEL_HASH-6.12.80 = c92591d896e79ecddbc3319136f0c2f855e832b397de7593f013ad7590a43e53 diff --git a/target/linux/generic/pending-6.12/630-packet_socket_type.patch b/target/linux/generic/pending-6.12/630-packet_socket_type.patch index 769696e404..fff421bd3c 100644 --- a/target/linux/generic/pending-6.12/630-packet_socket_type.patch +++ b/target/linux/generic/pending-6.12/630-packet_socket_type.patch @@ -87,7 +87,7 @@ Signed-off-by: Felix Fietkau if (!net_eq(dev_net(dev), sock_net(sk))) goto drop; -@@ -3429,6 +3431,7 @@ static int packet_create(struct net *net +@@ -3430,6 +3432,7 @@ static int packet_create(struct net *net mutex_init(&po->pg_vec_lock); po->rollover = NULL; po->prot_hook.func = packet_rcv; @@ -95,7 +95,7 @@ Signed-off-by: Felix Fietkau if (sock->type == SOCK_PACKET) po->prot_hook.func = packet_rcv_spkt; -@@ -4096,6 +4099,16 @@ packet_setsockopt(struct socket *sock, i +@@ -4097,6 +4100,16 @@ packet_setsockopt(struct socket *sock, i packet_sock_flag_set(po, PACKET_SOCK_QDISC_BYPASS, val); return 0; } @@ -112,7 +112,7 @@ Signed-off-by: Felix Fietkau default: return -ENOPROTOOPT; } -@@ -4158,6 +4171,13 @@ static int packet_getsockopt(struct sock +@@ -4159,6 +4172,13 @@ static int packet_getsockopt(struct sock case PACKET_COPY_THRESH: val = READ_ONCE(pkt_sk(sk)->copy_thresh); break; diff --git a/target/linux/generic/pending-6.12/710-bridge-add-knob-for-filtering-rx-tx-BPDU-pack.patch b/target/linux/generic/pending-6.12/710-bridge-add-knob-for-filtering-rx-tx-BPDU-pack.patch index 2f90df6013..48123c32ce 100644 --- a/target/linux/generic/pending-6.12/710-bridge-add-knob-for-filtering-rx-tx-BPDU-pack.patch +++ b/target/linux/generic/pending-6.12/710-bridge-add-knob-for-filtering-rx-tx-BPDU-pack.patch @@ -161,7 +161,7 @@ Signed-off-by: Felix Fietkau struct rtnl_link { rtnl_doit_func doit; -@@ -5009,7 +5009,9 @@ int ndo_dflt_bridge_getlink(struct sk_bu +@@ -5012,7 +5012,9 @@ int ndo_dflt_bridge_getlink(struct sk_bu brport_nla_put_flag(skb, flags, mask, IFLA_BRPORT_MCAST_FLOOD, BR_MCAST_FLOOD) || brport_nla_put_flag(skb, flags, mask, diff --git a/target/linux/mediatek/patches-6.12/432-drivers-spi-Add-support-for-dynamic-calibration.patch b/target/linux/mediatek/patches-6.12/432-drivers-spi-Add-support-for-dynamic-calibration.patch index 9d16a43a28..4e51dc21c6 100644 --- a/target/linux/mediatek/patches-6.12/432-drivers-spi-Add-support-for-dynamic-calibration.patch +++ b/target/linux/mediatek/patches-6.12/432-drivers-spi-Add-support-for-dynamic-calibration.patch @@ -11,7 +11,7 @@ Signed-off-by: SkyLake.Huang --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c -@@ -1494,6 +1494,70 @@ static int spi_transfer_wait(struct spi_ +@@ -1489,6 +1489,70 @@ static int spi_transfer_wait(struct spi_ return 0; } @@ -82,7 +82,7 @@ Signed-off-by: SkyLake.Huang static void _spi_transfer_delay_ns(u32 ns) { if (!ns) -@@ -2352,6 +2416,75 @@ void spi_flush_queue(struct spi_controll +@@ -2347,6 +2411,75 @@ void spi_flush_queue(struct spi_controll /*-------------------------------------------------------------------------*/ #if defined(CONFIG_OF) @@ -158,7 +158,7 @@ Signed-off-by: SkyLake.Huang static void of_spi_parse_dt_cs_delay(struct device_node *nc, struct spi_delay *delay, const char *prop) { -@@ -2516,6 +2649,10 @@ of_register_spi_device(struct spi_contro +@@ -2511,6 +2644,10 @@ of_register_spi_device(struct spi_contro if (rc) goto err_out; From 10e32b9ef63f8f2fa2384b109e78a397555efb0b Mon Sep 17 00:00:00 2001 From: John Audia Date: Thu, 2 Apr 2026 10:47:58 -0400 Subject: [PATCH 10/78] kernel: bump 6.18 to 6.18.21 Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.18.21 All patches automatically rebased. Build system: x86/64 Build-tested: x86/64-glibc Run-tested: Intel N150 Signed-off-by: John Audia Link: https://github.com/openwrt/openwrt/pull/22741 Signed-off-by: Hauke Mehrtens --- target/linux/generic/hack-6.18/204-module_strip.patch | 4 ++-- target/linux/generic/hack-6.18/259-regmap_dynamic.patch | 2 +- target/linux/generic/kernel-6.18 | 4 ++-- .../linux/generic/pending-6.18/630-packet_socket_type.patch | 6 +++--- .../710-bridge-add-knob-for-filtering-rx-tx-BPDU-pack.patch | 2 +- 5 files changed, 9 insertions(+), 9 deletions(-) diff --git a/target/linux/generic/hack-6.18/204-module_strip.patch b/target/linux/generic/hack-6.18/204-module_strip.patch index 3e33bddbf6..11173a2095 100644 --- a/target/linux/generic/hack-6.18/204-module_strip.patch +++ b/target/linux/generic/hack-6.18/204-module_strip.patch @@ -107,7 +107,7 @@ Signed-off-by: Felix Fietkau /* Parse tag=value strings from .modinfo section */ char *module_next_tag_pair(char *string, unsigned long *secsize) -@@ -2572,9 +2574,11 @@ static void module_augment_kernel_taints +@@ -2579,9 +2581,11 @@ static void module_augment_kernel_taints static int check_modinfo(struct module *mod, struct load_info *info, int flags) { @@ -120,7 +120,7 @@ Signed-off-by: Felix Fietkau if (flags & MODULE_INIT_IGNORE_VERMAGIC) modmagic = NULL; -@@ -2588,6 +2592,7 @@ static int check_modinfo(struct module * +@@ -2595,6 +2599,7 @@ static int check_modinfo(struct module * info->name, modmagic, vermagic); return -ENOEXEC; } diff --git a/target/linux/generic/hack-6.18/259-regmap_dynamic.patch b/target/linux/generic/hack-6.18/259-regmap_dynamic.patch index 69dd8cbd44..1486b35650 100644 --- a/target/linux/generic/hack-6.18/259-regmap_dynamic.patch +++ b/target/linux/generic/hack-6.18/259-regmap_dynamic.patch @@ -139,7 +139,7 @@ Signed-off-by: Felix Fietkau #include #include #include -@@ -3525,3 +3526,5 @@ static int __init regmap_initcall(void) +@@ -3547,3 +3548,5 @@ static int __init regmap_initcall(void) return 0; } postcore_initcall(regmap_initcall); diff --git a/target/linux/generic/kernel-6.18 b/target/linux/generic/kernel-6.18 index 5cd89cd490..67a4c93f22 100644 --- a/target/linux/generic/kernel-6.18 +++ b/target/linux/generic/kernel-6.18 @@ -1,2 +1,2 @@ -LINUX_VERSION-6.18 = .20 -LINUX_KERNEL_HASH-6.18.20 = 837a5abd98e46078a0ae1400e2daad89ece45cc3209037b09c2265dab2393553 +LINUX_VERSION-6.18 = .21 +LINUX_KERNEL_HASH-6.18.21 = 1c38214fb137bae85b82b82537b5987358621b915ab2a8e4f09e60697c19474f diff --git a/target/linux/generic/pending-6.18/630-packet_socket_type.patch b/target/linux/generic/pending-6.18/630-packet_socket_type.patch index 36961fc0da..c896893ef8 100644 --- a/target/linux/generic/pending-6.18/630-packet_socket_type.patch +++ b/target/linux/generic/pending-6.18/630-packet_socket_type.patch @@ -87,7 +87,7 @@ Signed-off-by: Felix Fietkau if (!net_eq(dev_net(dev), sock_net(sk))) goto drop; -@@ -3375,6 +3377,7 @@ static int packet_create(struct net *net +@@ -3376,6 +3378,7 @@ static int packet_create(struct net *net mutex_init(&po->pg_vec_lock); po->rollover = NULL; po->prot_hook.func = packet_rcv; @@ -95,7 +95,7 @@ Signed-off-by: Felix Fietkau if (sock->type == SOCK_PACKET) po->prot_hook.func = packet_rcv_spkt; -@@ -4043,6 +4046,16 @@ packet_setsockopt(struct socket *sock, i +@@ -4044,6 +4047,16 @@ packet_setsockopt(struct socket *sock, i packet_sock_flag_set(po, PACKET_SOCK_QDISC_BYPASS, val); return 0; } @@ -112,7 +112,7 @@ Signed-off-by: Felix Fietkau default: return -ENOPROTOOPT; } -@@ -4105,6 +4118,13 @@ static int packet_getsockopt(struct sock +@@ -4106,6 +4119,13 @@ static int packet_getsockopt(struct sock case PACKET_COPY_THRESH: val = READ_ONCE(pkt_sk(sk)->copy_thresh); break; diff --git a/target/linux/generic/pending-6.18/710-bridge-add-knob-for-filtering-rx-tx-BPDU-pack.patch b/target/linux/generic/pending-6.18/710-bridge-add-knob-for-filtering-rx-tx-BPDU-pack.patch index 318cbe6262..d4e5c4bce8 100644 --- a/target/linux/generic/pending-6.18/710-bridge-add-knob-for-filtering-rx-tx-BPDU-pack.patch +++ b/target/linux/generic/pending-6.18/710-bridge-add-knob-for-filtering-rx-tx-BPDU-pack.patch @@ -161,7 +161,7 @@ Signed-off-by: Felix Fietkau struct rtnl_link { rtnl_doit_func doit; -@@ -5295,7 +5295,9 @@ int ndo_dflt_bridge_getlink(struct sk_bu +@@ -5317,7 +5317,9 @@ int ndo_dflt_bridge_getlink(struct sk_bu brport_nla_put_flag(skb, flags, mask, IFLA_BRPORT_MCAST_FLOOD, BR_MCAST_FLOOD) || brport_nla_put_flag(skb, flags, mask, From c9479d48be6bbff04e21ce57bac1f4e9c85dcad6 Mon Sep 17 00:00:00 2001 From: Mieczyslaw Nalewaj Date: Thu, 2 Apr 2026 19:01:10 +0200 Subject: [PATCH 11/78] mt76: pass LED define via ccflags-y Replace the deprecated EXTRA_CFLAGS with ccflags-y so that the -DCONFIG_MT76_LEDS define is applied correctly by the kernel build system. EXTRA_CFLAGS is no longer honored by recent kbuilds[1]; ccflags-y is the supported variable and works on kernels 6.12 and 6.18. 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.20&id=f77bf01425b11947eeb3b5b54685212c302741b8 Signed-off-by: Mieczyslaw Nalewaj Link: https://github.com/openwrt/openwrt/pull/22737 Signed-off-by: Hauke Mehrtens --- .../003-pass-LED-define-via-ccflags-y.patch | 26 +++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 package/kernel/mt76/patches/003-pass-LED-define-via-ccflags-y.patch diff --git a/package/kernel/mt76/patches/003-pass-LED-define-via-ccflags-y.patch b/package/kernel/mt76/patches/003-pass-LED-define-via-ccflags-y.patch new file mode 100644 index 0000000000..243d4efee8 --- /dev/null +++ b/package/kernel/mt76/patches/003-pass-LED-define-via-ccflags-y.patch @@ -0,0 +1,26 @@ +From: Mieczyslaw Nalewaj +Date: Thu, 2 Apr 2026 19:01:10 +0200 +Subject: Subject: [PATCH] mt76: pass LED define via ccflags-y + +Replace the deprecated EXTRA_CFLAGS with ccflags-y so that +the -DCONFIG_MT76_LEDS define is applied correctly by the kernel +build system. EXTRA_CFLAGS is no longer honored by recent +kbuilds[1]; ccflags-y is the supported variable and works +on kernels 6.12 and 6.18. + +1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.20&id=f77bf01425b11947eeb3b5b54685212c302741b8 + +Signed-off-by: Mieczyslaw Nalewaj +--- + Makefile | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/Makefile ++++ b/Makefile +@@ -1,5 +1,5 @@ + # SPDX-License-Identifier: BSD-3-Clause-Clear +-EXTRA_CFLAGS += -Werror -DCONFIG_MT76_LEDS ++ccflags-y += -Werror -DCONFIG_MT76_LEDS + obj-m := mt76.o + obj-$(CONFIG_MT76_USB) += mt76-usb.o + obj-$(CONFIG_MT76_SDIO) += mt76-sdio.o From 45a7dd55474217318c0cc2c0ce2b86e3845d4338 Mon Sep 17 00:00:00 2001 From: Hal Martin Date: Fri, 3 Apr 2026 12:30:27 +0200 Subject: [PATCH 12/78] realtek: fixup Datto L8 device tree ports should be ethernet-ports, otherwise initialising ethernet ports fails on 6.18 testing kernel. Signed-off-by: Hal Martin Link: https://github.com/openwrt/openwrt/pull/22764 Signed-off-by: Robert Marko --- target/linux/realtek/dts/rtl8380_datto_l8.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/linux/realtek/dts/rtl8380_datto_l8.dts b/target/linux/realtek/dts/rtl8380_datto_l8.dts index 174b7b0492..91ce558bf7 100644 --- a/target/linux/realtek/dts/rtl8380_datto_l8.dts +++ b/target/linux/realtek/dts/rtl8380_datto_l8.dts @@ -129,7 +129,7 @@ }; &switch0 { - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; From 63d0b5c24388e2603ab1cd482d6e469029cde421 Mon Sep 17 00:00:00 2001 From: Clemens Hopfer Date: Fri, 30 May 2025 14:03:40 +0200 Subject: [PATCH 13/78] base-files: MAJOR/MINOR not sequential, use DISKSEQ instead Export the unique, monotonic DISKSEQ sequence drive number instead of its major/minor numbers to identify the boot disk and directly match the partition in export_partdevice with PARTN. The MINOR blockdevice numbers are not guaranteed sequential across disks, it can happen that disks enumerate before their partitions are probed, resulting in interleaved MINOR numbers breaking the partition offset calculation: major minor #blocks name 259 0 250059096 nvme0n1 259 2 8192 nvme0n1p1 259 3 491520 nvme0n1p2 259 4 239 nvme0n1p128 259 1 250059096 nvme1n1 259 5 250057728 nvme1n1p1 Signed-off-by: Clemens Hopfer Link: https://github.com/openwrt/openwrt/pull/18962 Signed-off-by: Robert Marko --- package/base-files/files/lib/upgrade/common.sh | 17 +++++++++-------- .../stm32/base-files/lib/upgrade/platform.sh | 3 +-- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/package/base-files/files/lib/upgrade/common.sh b/package/base-files/files/lib/upgrade/common.sh index af1182cb16..ba2e364775 100644 --- a/package/base-files/files/lib/upgrade/common.sh +++ b/package/base-files/files/lib/upgrade/common.sh @@ -167,7 +167,7 @@ part_magic_fat() { export_bootdevice() { local cmdline uuid blockdev uevent line class - local MAJOR MINOR DEVNAME DEVTYPE + local MAJOR MINOR DEVNAME DEVTYPE DISKSEQ PARTN local rootpart="$(cmdline_get_var root)" case "$rootpart" in @@ -216,8 +216,7 @@ export_bootdevice() { while read line; do export -n "$line" done < "$uevent" - export BOOTDEV_MAJOR=$MAJOR - export BOOTDEV_MINOR=$MINOR + export BOOTDEV_DISKSEQ=$DISKSEQ return 0 fi @@ -225,16 +224,18 @@ export_bootdevice() { } export_partdevice() { - local var="$1" offset="$2" - local uevent line MAJOR MINOR DEVNAME DEVTYPE + local var="$1" partn="$2" + local uevent line MAJOR MINOR DEVNAME DEVTYPE DISKSEQ PARTN for uevent in /sys/class/block/*/uevent; do while read line; do export -n "$line" done < "$uevent" - if [ "$BOOTDEV_MAJOR" = "$MAJOR" -a $(($BOOTDEV_MINOR + $offset)) = "$MINOR" -a -b "/dev/$DEVNAME" ]; then - export "$var=$DEVNAME" - return 0 + if [ "$BOOTDEV_DISKSEQ" = "$DISKSEQ" -a -b "/dev/$DEVNAME" ]; then + if [ "$PARTN" = "$partn" -a "$DEVTYPE" = "partition" ] || [ "$partn" = "0" -a "$DEVTYPE" = "disk" ]; then + export "$var=$DEVNAME" + return 0 + fi fi done diff --git a/target/linux/stm32/base-files/lib/upgrade/platform.sh b/target/linux/stm32/base-files/lib/upgrade/platform.sh index 4cd88ab6bd..92e5bb5d2b 100644 --- a/target/linux/stm32/base-files/lib/upgrade/platform.sh +++ b/target/linux/stm32/base-files/lib/upgrade/platform.sh @@ -31,8 +31,7 @@ export_bootdevice() { while read line; do export -n "$line" done < "$uevent" - export BOOTDEV_MAJOR=$MAJOR - export BOOTDEV_MINOR=$MINOR + export BOOTDEV_DISKSEQ=$DISKSEQ return 0 fi From b4a5e57bde64199f15ce69fd21b8608bade11ba4 Mon Sep 17 00:00:00 2001 From: Fil Dunsky Date: Mon, 9 Feb 2026 12:03:58 +0300 Subject: [PATCH 14/78] ramips: mt76x8: add support for Cudy LT300 v3 Hardware: - SoC: MediaTek MT7628AN (MIPS 580MHz) - Flash: 16 MiB NOR - RAM: 64 MiB DDR2 - WLAN: 2.4 GHz (MT7628) - Ethernet: 1x 10/100 Mbps WAN/LAN, 1x 10/100 LAN (MT7628) - Build-in LTE Modem: MeigLink SLM770A 4G Cat. 4 (150/50 Mbps) - Buttons: 1x Reset, 1x wps - LEDs: Front: 1x Red, 1x White, Back: 3x White 4G signal strengh - Serial console: unpopulated header, 115200 8n1 - Power: USB-C MAC addresses: +---------+-------------------+-----------+ | | MAC | Algorithm | +---------+-------------------+-----------+ | WAN | 80:af:ca:xx:xx:x1 | label+1 | | LAN | 80:af:ca:xx:xx:x0 | label | | WLAN 2g | 80:af:ca:xx:xx:x2 | label+2 | +---------+-------------------+-----------+ Migration to OpenWrt: - Download the RSA signed intermediate firmware from the Cudy website: `openwrt-ramips-mt76x8-cudy_lt300-v3-squashfs-flash.bin` - Connect computer to LAN and flash the intermediate firmware via OEM web interface - OpenWrt is now accessible via 192.168.1.1 Revert back to OEM firmware: - Set up a TFTP server on IP 192.168.1.88 and connect to the WAN port (upper port) - Provide the Cudy firmware as recovery.bin in the TFTP server - Press the reset button while powering on the device - Recovery process is started now - When recovery process is done, OEM firmware is accessible via 192.168.10.1 again General information: - No possibility to load a initramfs image via U-Boot because there is no option to interrupt U-Boot Signed-off-by: Fil Dunsky Link: https://github.com/openwrt/openwrt/pull/21982 Signed-off-by: Hauke Mehrtens --- .../ramips/dts/mt7628an_cudy_lt300-v3.dts | 188 ++++++++++++++++++ target/linux/ramips/image/mt76x8.mk | 11 + .../mt76x8/base-files/etc/board.d/01_leds | 3 + .../mt76x8/base-files/etc/board.d/02_network | 19 +- 4 files changed, 215 insertions(+), 6 deletions(-) create mode 100644 target/linux/ramips/dts/mt7628an_cudy_lt300-v3.dts diff --git a/target/linux/ramips/dts/mt7628an_cudy_lt300-v3.dts b/target/linux/ramips/dts/mt7628an_cudy_lt300-v3.dts new file mode 100644 index 0000000000..18bf54b29d --- /dev/null +++ b/target/linux/ramips/dts/mt7628an_cudy_lt300-v3.dts @@ -0,0 +1,188 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7628an.dtsi" + +#include +#include +#include + +/ { + compatible = "cudy,lt300-v3", "mediatek,mt7628an-soc"; + model = "Cudy LT300 v3"; + + aliases { + led-boot = &white_status; + led-running = &white_status; + led-failsafe = &red_status; + led-upgrade = &red_status; + label-mac-device = ðernet; + }; + + chosen { + bootargs = "console=ttyS0,115200"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + linux,code = ; + gpios = <&gpio 38 GPIO_ACTIVE_LOW>; + }; + + wps { + label = "wps"; + gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + red_status: red_status { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&gpio 37 GPIO_ACTIVE_LOW>; + }; + + white_status: white_status { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&gpio 44 GPIO_ACTIVE_LOW>; + }; + + signal1 { + label = "white:signal1"; + color = ; + gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + }; + + signal2 { + label = "white:signal2"; + color = ; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + }; + + signal3 { + label = "white:signal3"; + color = ; + gpios = <&gpio 0 GPIO_ACTIVE_LOW>; + }; + }; + + gpio_export { + compatible = "gpio-export"; + + usb4g { + gpio-export,name = "4g"; + gpio-export,output = <0>; + gpios = <&gpio 3 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x30000>; + read-only; + }; + + partition@30000 { + label = "u-boot-env"; + reg = <0x30000 0x10000>; + read-only; + }; + + partition@40000 { + label = "factory"; + reg = <0x40000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom_factory_0: eeprom@0 { + reg = <0x0 0x400>; + }; + }; + }; + + partition@50000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x50000 0xf80000>; + }; + + partition@fd0000 { + label = "debug"; + reg = <0xfd0000 0x10000>; + read-only; + }; + + partition@fe0000 { + label = "backup"; + reg = <0xfe000 0x10000>; + read-only; + }; + + partition@ff0000 { + label = "bdinfo"; + reg = <0xff0000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_bdinfo_de00: macaddr@de00 { + compatible = "mac-base"; + reg = <0xde00 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + }; + }; +}; + +&state_default { + gpio { + groups = "i2s", "i2c", "gpio", "refclk", "wdt", "wled_an"; + function = "gpio"; + }; +}; + +&wmac { + status = "okay"; + + nvmem-cells = <&eeprom_factory_0>, <&macaddr_bdinfo_de00 2>; + nvmem-cell-names = "eeprom", "mac-address"; +}; + +ðernet { + nvmem-cells = <&macaddr_bdinfo_de00 0>; + nvmem-cell-names = "mac-address"; +}; + +&esw { + mediatek,portmap = <0x3e>; + mediatek,portdisable = <0x3c>; +}; diff --git a/target/linux/ramips/image/mt76x8.mk b/target/linux/ramips/image/mt76x8.mk index d65e3e5a6f..a24a95815d 100644 --- a/target/linux/ramips/image/mt76x8.mk +++ b/target/linux/ramips/image/mt76x8.mk @@ -199,6 +199,17 @@ define Device/creality_wb-01 endef TARGET_DEVICES += creality_wb-01 +define Device/cudy_lt300-v3 + IMAGE_SIZE := 15872k + DEVICE_VENDOR := Cudy + DEVICE_MODEL := LT300 + DEVICE_VARIANT := v3 + DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-net-rndis \ + kmod-usb-serial-option + SUPPORTED_DEVICES += R100 +endef +TARGET_DEVICES += cudy_lt300-v3 + define Device/cudy_lt400e-v1 IMAGE_SIZE := 7808k DEVICE_VENDOR := Cudy diff --git a/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds b/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds index f46b53d6f3..0a4b417fbe 100644 --- a/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds +++ b/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds @@ -27,6 +27,9 @@ yuncore,m300) creality,wb-01) ucidef_set_led_switch "lan" "lan" "blue:lan" "switch0" "0x1" ;; +cudy,lt300-v3) + ucidef_set_led_netdev "internet" "internet" "white:status" "usb0" + ;; cudy,lt400e-v1) ucidef_set_led_switch "lan1" "lan1" "blue:lan-1" "switch0" "0x08" ucidef_set_led_switch "lan2" "lan2" "blue:lan-2" "switch0" "0x04" diff --git a/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network b/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network index 9e8b6b2f18..f292120b32 100644 --- a/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network +++ b/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network @@ -100,6 +100,12 @@ ramips_setup_interfaces() ucidef_add_switch "switch0" \ "4:lan" "6@eth0" ;; + cudy,lt300-v3) + ucidef_add_switch "switch0" "0:wan" "1:lan" "6@eth0" + ucidef_set_interface "wwan" device "usb0" protocol "dhcp" + uci add_list firewall.@zone[1].network='wwan' + uci add_list firewall.@zone[1].network='wwan6' + ;; cudy,lt400e-v1) ucidef_add_switch "switch0" \ "3:lan:1" "2:lan:2" "1:lan:3" "0:lan:4" "6@eth0" @@ -284,6 +290,13 @@ ramips_setup_macs() lan_mac=$(mtd_get_mac_binary factory 0xe000) wan_mac=$(macaddr_add "$lan_mac" 1) ;; + cudy,lt300-v3|\ + hiwifi,hc5611|\ + hiwifi,hc5661a|\ + hiwifi,hc5761a|\ + hiwifi,hc5861b) + wan_mac=$(macaddr_add "$(cat /sys/class/net/eth0/address)" 1) + ;; cudy,wr1000|\ hilink,hlk-7628n|\ hilink,hlk-7688a|\ @@ -304,12 +317,6 @@ ramips_setup_macs() wrtnode,wrtnode2r) wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0x4)" 1) ;; - hiwifi,hc5611|\ - hiwifi,hc5661a|\ - hiwifi,hc5761a|\ - hiwifi,hc5861b) - wan_mac=$(macaddr_add "$(cat /sys/class/net/eth0/address)" 1) - ;; iptime,a3|\ iptime,a604m|\ totolink,a3) From dc597eeb79b5c6bb20cb2d36734abfc5a79d8288 Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Fri, 16 Jan 2026 20:18:00 +0800 Subject: [PATCH 15/78] ramips: dts: add 'broken-cd' for VoCore2 MMC This model doesn't have cd pin on its MicroSD card slot. Fixes: https://github.com/openwrt/openwrt/issues/20288 Fixes: https://github.com/openwrt/openwrt/issues/22603 Signed-off-by: Shiji Yang Link: https://github.com/openwrt/openwrt/pull/21568 Signed-off-by: Hauke Mehrtens --- target/linux/ramips/dts/mt7628an_vocore_vocore2.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/target/linux/ramips/dts/mt7628an_vocore_vocore2.dtsi b/target/linux/ramips/dts/mt7628an_vocore_vocore2.dtsi index da2026ec7d..34149c7673 100644 --- a/target/linux/ramips/dts/mt7628an_vocore_vocore2.dtsi +++ b/target/linux/ramips/dts/mt7628an_vocore_vocore2.dtsi @@ -94,6 +94,7 @@ &sdhci { status = "okay"; + broken-cd; pinctrl-0 = <&sdxc_iot_mode>; pinctrl-1 = <&sdxc_iot_mode>; }; From b178e05d9b241fe3dc2c48cc5011e1ffa86c9e4b Mon Sep 17 00:00:00 2001 From: Joshua Klinesmith Date: Sun, 29 Mar 2026 16:19:40 -0400 Subject: [PATCH 16/78] wifi-scripts: fix ucode erp_domain and fils_cache_id values The ucode path generates different erp_domain and fils_cache_id values than the legacy shell path due to three mismatches: 1. erp_domain md5 input missing trailing newline (echo adds \n) 2. erp_domain output truncated to 4 chars instead of 8 (shell uses head -c 8) 3. fils_cache_id md5 input missing trailing newline 4. erp_domain missing fallback to mobility_domain Same bug pattern as mobility_domain fixed in commit b1dc2736db. Fixes: #21768 Co-Authored-By: Claude Opus 4.6 (1M context) Signed-off-by: Joshua Klinesmith Link: https://github.com/openwrt/openwrt/pull/22677 Signed-off-by: Hauke Mehrtens --- .../wifi-scripts/files-ucode/usr/share/ucode/wifi/ap.uc | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/package/network/config/wifi-scripts/files-ucode/usr/share/ucode/wifi/ap.uc b/package/network/config/wifi-scripts/files-ucode/usr/share/ucode/wifi/ap.uc index d95cbdb4d8..032a434281 100644 --- a/package/network/config/wifi-scripts/files-ucode/usr/share/ucode/wifi/ap.uc +++ b/package/network/config/wifi-scripts/files-ucode/usr/share/ucode/wifi/ap.uc @@ -159,10 +159,11 @@ function iface_auth_type(config) { config.vlan_possible = 1; if (config.fils) { - set_default(config, 'erp_domain', substr(md5(config.ssid), 0, 4)); + set_default(config, 'erp_domain', config.mobility_domain); + set_default(config, 'erp_domain', substr(md5(config.ssid + '\n'), 0, 8)); set_default(config, 'fils_realm', config.erp_domain); set_default(config, 'erp_send_reauth_start', 1); - set_default(config, 'fils_cache_id', substr(md5(config.fils_realm), 0, 4)); + set_default(config, 'fils_cache_id', substr(md5(config.fils_realm + '\n'), 0, 4)); } if (!config.eap_server) { From d9eb01ad67749d5e8311a187307c570625a79f1b Mon Sep 17 00:00:00 2001 From: xingchi Date: Tue, 13 Jan 2026 16:01:20 +0800 Subject: [PATCH 17/78] ramips: add support for Z-ROUTER ZR-2662 This commit adds support for Z-ROUTER ZR-2662 (also known as Routerich AX1800 V2) wireless WiFi 6 router. Hardware specification --------------------- - SoC : MediaTek MT7621AT, MIPS, 880 MHz - RAM : 256 MiB - Flash : NAND 128 MiB (AMD/Spansion S34ML01G2) - WLAN : - 2.4 GHz : MediaTek MT7905D/MT7975 (14c3:7916), b/g/n/ax, MIMO 2x2 - 5 GHz : MediaTek MT7915E (14c3:7915), a/n/ac/ax, MIMO 2x2 - Ethernet : 10/100/1000 Mbps x4 (1x WAN, 3x LAN) - USB : 1x 2.0 - UART : 3.3V, 115200n8, pins are silkscreened on the pcb - Buttons : 1x Reset - LEDs : 1x WiFi 2.4 GHz (green) 1x WiFi 5 GHz (green) 1x LAN (green) 1x WAN (green) 1x WAN no-internet (red) - Power : 12 VDC, 1 A Installation ------------ 1. Run tftp server on your PC (IP: 192.168.2.2) and put OpenWrt initramfs image (initramfs.bin) to the tftp root dir 2. Open the following link in the browser to enable telnet: http://192.168.2.1/cgi-bin/telnet_ssh 3. Connect to the router (default IP: 192.168.2.1) using telnet shell (credentials - user:admin) 4. Run the following commands in the telnet shell (this will install OpenWrt initramfs image on nand flash): cd /tmp tftp -g -r initramfs.bin 192.168.2.2 mtd write initramfs.bin firmware mtd erase firmware_backup reboot 5. Copy OpenWrt sysupgrade image (sysupgrade.bin) to the /tmp dir of the router 6. Connect to the router (IP: 192.168.1.1) using ssh shell and run sysupgrade command: sysupgrade -n /tmp/sysupgrade.bin Return to stock --------------- 1. Copy stock firmware (stock.bin) to the /tmp dir of the router using scp 2. Run following command in the router shell: cd /tmp mtd write stock.bin firmware reboot Recovery -------- Connect uart (pins are silkscreened on the pcb), interrupt boot process by pressing any key, use u-boot menu to flash stock firmware image or OpenWrt initramfs image. MAC addresses ------------- +---------+-------------------+-----------+ | | MAC | Algorithm | +---------+-------------------+-----------+ | LAN | 24:0f:5e:xx:xx:4c | label | | WAN | 24:0f:5e:xx:xx:4d | label+1 | | WLAN 2g | 24:0f:5e:xx:xx:4e | label+2 | | WLAN 5g | 24:0f:5e:xx:xx:4f | label+3 | +---------+-------------------+-----------+ The WLAN 2.4 MAC was found in 'factory', 0x4 The LAN MAC was found in 'factory', 0xfff4 The WAN MAC was found in 'factory', 0xfffa Note: This device is similar to Z-ROUTER ZR-2660, but with minor hardware revisions. The firmware and configuration are compatible. Signed-off-by: xingchi Link: https://github.com/openwrt/openwrt/pull/21524 Signed-off-by: Hauke Mehrtens --- .../ramips/dts/mt7621_z-router_zr-2662.dts | 223 ++++++++++++++++++ target/linux/ramips/image/mt7621.mk | 13 + .../mt7621/base-files/etc/board.d/01_leds | 4 + .../mt7621/base-files/etc/board.d/02_network | 1 + .../mt7621/base-files/lib/upgrade/platform.sh | 1 + 5 files changed, 242 insertions(+) create mode 100644 target/linux/ramips/dts/mt7621_z-router_zr-2662.dts diff --git a/target/linux/ramips/dts/mt7621_z-router_zr-2662.dts b/target/linux/ramips/dts/mt7621_z-router_zr-2662.dts new file mode 100644 index 0000000000..8b5e7871d9 --- /dev/null +++ b/target/linux/ramips/dts/mt7621_z-router_zr-2662.dts @@ -0,0 +1,223 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7621.dtsi" + +#include +#include +#include + +/ { + compatible = "z-router,zr-2662", "mediatek,mt7621-soc"; + model = "Z-ROUTER ZR-2662"; + + aliases { + label-mac-device = &gmac0; + + led-boot = &led_power_green; + led-failsafe = &led_power_green; + led-running = &led_power_green; + led-upgrade = &led_power_green; + }; + + chosen { + bootargs = "console=ttyS0,115200"; + }; + + keys { + compatible = "gpio-keys"; + + key-0 { + label = "reset"; + gpios = <&gpio 16 GPIO_ACTIVE_HIGH>; + linux,code = ; + debounce-interval = <60>; + }; + + key-1 { + label = "wps"; + gpios = <&gpio 18 GPIO_ACTIVE_HIGH>; + linux,code = ; + debounce-interval = <60>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + color = ; + function = LED_FUNCTION_WAN; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + }; + + led-1 { + color = ; + function = LED_FUNCTION_WLAN; + function-enumerator = <50>; + gpios = <&gpio 7 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + + led-2 { + color = ; + function = LED_FUNCTION_WAN; + gpios = <&gpio 4 GPIO_ACTIVE_HIGH>; + }; + + led-3 { + color = ; + function = LED_FUNCTION_WPS; + gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + }; + + led_power_green: led-4 { + color = ; + function = LED_FUNCTION_POWER; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&gmac0 { + nvmem-cells = <&macaddr_factory_3fff4>; + nvmem-cell-names = "mac-address"; +}; + +&gmac1 { + status = "okay"; + label = "wan"; + phy-handle = <ðphy4>; + + nvmem-cells = <&macaddr_factory_3fffa>; + nvmem-cell-names = "mac-address"; +}; + +ðphy4 { + /delete-property/ interrupts; +}; + +&nand { + status = "okay"; + + mediatek,nmbm; + mediatek,bmt-max-ratio = <1>; + mediatek,bmt-max-reserved-blocks = <64>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@80000 { + label = "Config"; + reg = <0x80000 0x80000>; + read-only; + }; + + partition@100000 { + label = "factory"; + reg = <0x100000 0x80000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom_factory_0: eeprom@0 { + reg = <0x0 0xe00>; + }; + + macaddr_factory_4: macaddr@4 { + compatible = "mac-base"; + reg = <0x4 0x6>; + #nvmem-cell-cells = <1>; + }; + + macaddr_factory_3fff4: macaddr@3fff4 { + reg = <0x3fff4 0x6>; + }; + + macaddr_factory_3fffa: macaddr@3fffa { + reg = <0x3fffa 0x6>; + }; + }; + }; + + partition@180000 { + label = "firmware"; + reg = <0x180000 0x7680000>; + + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "kernel"; + reg = <0x0 0x400000>; + }; + + partition@400000 { + label = "ubi"; + reg = <0x400000 0x7280000>; + }; + }; + }; +}; + +&pcie { + status = "okay"; +}; + +&pcie1 { + wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + + mediatek,disable-radar-background; + + nvmem-cells = <&eeprom_factory_0>; + nvmem-cell-names = "eeprom"; + + #address-cells = <1>; + #size-cells = <0>; + + band@1 { + reg = <1>; + nvmem-cells = <&macaddr_factory_4 1>; + nvmem-cell-names = "mac-address"; + }; + }; +}; + +&state_default { + gpio { + groups = "i2c", "uart3", "jtag", "wdt"; + function = "gpio"; + }; +}; + +&switch0 { + ports { + port@1 { + status = "okay"; + label = "lan1"; + }; + + port@2 { + status = "okay"; + label = "lan2"; + }; + + port@3 { + status = "okay"; + label = "lan3"; + }; + }; +}; diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk index 50c53a6d8e..3f3a917db6 100644 --- a/target/linux/ramips/image/mt7621.mk +++ b/target/linux/ramips/image/mt7621.mk @@ -3606,6 +3606,19 @@ define Device/z-router_zr-2660 endef TARGET_DEVICES += z-router_zr-2660 +define Device/z-router_zr-2662 + $(Device/dsa-migration) + $(Device/nand) + DEVICE_VENDOR := Z-ROUTER + DEVICE_MODEL := ZR-2662 + IMAGE_SIZE := 121344k + KERNEL_LOADADDR := 0x82000000 + KERNEL := kernel-bin | relocate-kernel $(loadaddr-y) | lzma | \ + fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb + DEVICE_PACKAGES += kmod-mt7915-firmware kmod-usb3 -uboot-envtools +endef +TARGET_DEVICES += z-router_zr-2662 + define Device/zbtlink_zbt-we1326 $(Device/dsa-migration) $(Device/uimage-lzma-loader) diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds b/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds index dbefbccc17..65b9aed81e 100644 --- a/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds +++ b/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds @@ -277,6 +277,10 @@ z-router,zr-2660) ucidef_set_led_netdev "wan" "wan" "green:wan" "wan" "link tx rx" ucidef_set_led_netdev "wan-off" "wan-off" "red:wan" "wan" "link" ;; +z-router,zr-2662) + ucidef_set_led_netdev "wan" "wan" "green:wan" "wan" "link tx rx" + ucidef_set_led_netdev "wan-off" "wan-off" "red:wan" "wan" "link" + ;; zyxel,lte3301-plus) ucidef_set_led_netdev "internet" "internet" "white:internet" "wwan0" ;; diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network index 25a8beecfe..426f879dba 100644 --- a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network +++ b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network @@ -33,6 +33,7 @@ ramips_setup_interfaces() xiaomi,mi-router-cr6609|\ xiaomi,redmi-router-ac2100|\ z-router,zr-2660|\ + z-router,zr-2662|\ zyxel,wsm20) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan" ;; diff --git a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh index 981cfacd54..49ab14a3dd 100644 --- a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh +++ b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh @@ -156,6 +156,7 @@ platform_do_upgrade() { xiaomi,mi-router-cr6609|\ xiaomi,redmi-router-ac2100|\ z-router,zr-2660|\ + z-router,zr-2662|\ zyxel,nwa50ax|\ zyxel,nwa55axe) nand_do_upgrade "$1" From acf9796d7dd2856e4edfe067a106f5863abed905 Mon Sep 17 00:00:00 2001 From: Nick Hainke Date: Thu, 2 Apr 2026 18:10:04 +0200 Subject: [PATCH 18/78] hostapd: update to 2026-04-02 Patches automatically refreshed. Link: https://github.com/openwrt/openwrt/pull/22745 Signed-off-by: Nick Hainke --- package/network/services/hostapd/Makefile | 6 +- ...hannels-to-be-selected-if-dfs-is-ena.patch | 24 +++--- ...erministic-channel-on-channel-switch.patch | 2 +- ...ix-sta-add-after-previous-connection.patch | 4 +- .../patches/050-Fix-OpenWrt-13156.patch | 6 +- ...-extra-ies-only-if-allowed-by-driver.patch | 6 +- ...edtls-TLS-crypto-option-initial-port.patch | 38 ++++----- .../patches/120-mbedtls-fips186_2_prf.patch | 4 +- ...efile-make-run-tests-with-CONFIG_TLS.patch | 26 +++--- .../patches/180-fix_owe_ssid_update.patch | 4 +- ...ort-for-specifying-the-link-id-in-th.patch | 2 +- .../hostapd/patches/200-multicall.patch | 30 +++---- .../patches/201-lto-jobserver-support.patch | 6 +- ..._AP-functions-dependant-on-CONFIG_AP.patch | 4 +- .../patches/252-disable_ctrl_iface_mib.patch | 22 ++--- .../hostapd/patches/301-mesh-noscan.patch | 10 +-- .../patches/310-rescan_immediately.patch | 2 +- .../patches/370-preserve_radio_mask.patch | 16 ++-- ...dd-new-config-params-to-be-used-with.patch | 6 +- .../patches/463-add-mcast_rate-to-11s.patch | 4 +- .../patches/464-fix-mesh-obss-check.patch | 2 +- .../patches/590-rrm-wnm-statistics.patch | 4 +- .../hostapd/patches/600-ubus_support.patch | 42 +++++----- .../hostapd/patches/601-ucode_support.patch | 80 +++++++++---------- .../patches/701-reload_config_inline.patch | 2 +- .../patches/720-iface_max_num_sta.patch | 2 +- .../hostapd/patches/740-snoop_iface.patch | 6 +- .../hostapd/patches/763-radius-wispr.patch | 6 +- ...ment-APuP-Access-Point-Micro-Peering.patch | 14 ++-- .../803-hostapd-fix-80211be-build.patch | 4 +- 30 files changed, 192 insertions(+), 192 deletions(-) diff --git a/package/network/services/hostapd/Makefile b/package/network/services/hostapd/Makefile index 5bdee109ef..aa969b250a 100644 --- a/package/network/services/hostapd/Makefile +++ b/package/network/services/hostapd/Makefile @@ -9,9 +9,9 @@ PKG_RELEASE:=1 PKG_SOURCE_URL:=https://w1.fi/hostap.git PKG_SOURCE_PROTO:=git -PKG_SOURCE_DATE:=2026-03-23 -PKG_SOURCE_VERSION:=3f9b7ae0780973446d3feea27b4caf6dbf43f0c6 -PKG_MIRROR_HASH:=5421a6bfe145559d27930010f1aba7781a483898e6de5462024871388f114661 +PKG_SOURCE_DATE:=2026-04-02 +PKG_SOURCE_VERSION:=b004de0bf1b54d669d358b7f33d6f474bd9719a6 +PKG_MIRROR_HASH:=0b0184e600c994a1f0415f52e8af26b39f13e376a30cdf0b4f3ca1a206e52fc8 PKG_MAINTAINER:=Felix Fietkau PKG_LICENSE:=BSD-3-Clause diff --git a/package/network/services/hostapd/patches/010-mesh-Allow-DFS-channels-to-be-selected-if-dfs-is-ena.patch b/package/network/services/hostapd/patches/010-mesh-Allow-DFS-channels-to-be-selected-if-dfs-is-ena.patch index 2cf9c1d30c..74f64f37df 100644 --- a/package/network/services/hostapd/patches/010-mesh-Allow-DFS-channels-to-be-selected-if-dfs-is-ena.patch +++ b/package/network/services/hostapd/patches/010-mesh-Allow-DFS-channels-to-be-selected-if-dfs-is-ena.patch @@ -14,7 +14,7 @@ Signed-off-by: Peter Oh --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -3047,7 +3047,7 @@ static int drv_supports_vht(struct wpa_s +@@ -3048,7 +3048,7 @@ static int drv_supports_vht(struct wpa_s } @@ -23,7 +23,7 @@ Signed-off-by: Peter Oh { int i; -@@ -3056,7 +3056,10 @@ static bool ibss_mesh_is_80mhz_avail(int +@@ -3057,7 +3057,10 @@ static bool ibss_mesh_is_80mhz_avail(int chan = hw_get_channel_chan(mode, i, NULL); if (!chan || @@ -35,7 +35,7 @@ Signed-off-by: Peter Oh return false; } -@@ -3183,7 +3186,7 @@ static void ibss_mesh_select_40mhz(struc +@@ -3184,7 +3187,7 @@ static void ibss_mesh_select_40mhz(struc const struct wpa_ssid *ssid, struct hostapd_hw_modes *mode, struct hostapd_freq_params *freq, @@ -44,7 +44,7 @@ Signed-off-by: Peter Oh { int chan_idx; struct hostapd_channel_data *pri_chan = NULL, *sec_chan = NULL; -@@ -3214,8 +3217,11 @@ static void ibss_mesh_select_40mhz(struc +@@ -3215,8 +3218,11 @@ static void ibss_mesh_select_40mhz(struc return; /* Check primary channel flags */ @@ -58,7 +58,7 @@ Signed-off-by: Peter Oh #ifdef CONFIG_HT_OVERRIDES if (ssid->disable_ht40) -@@ -3250,8 +3256,11 @@ static void ibss_mesh_select_40mhz(struc +@@ -3251,8 +3257,11 @@ static void ibss_mesh_select_40mhz(struc return; /* Check secondary channel flags */ @@ -72,7 +72,7 @@ Signed-off-by: Peter Oh if (freq->ht_enabled) { if (ht40 == -1) { -@@ -3329,7 +3338,7 @@ static bool ibss_mesh_select_80_160mhz(s +@@ -3330,7 +3339,7 @@ static bool ibss_mesh_select_80_160mhz(s const struct wpa_ssid *ssid, struct hostapd_hw_modes *mode, struct hostapd_freq_params *freq, @@ -81,7 +81,7 @@ Signed-off-by: Peter Oh static const int bw80[] = { 5180, 5260, 5500, 5580, 5660, 5745, 5825, 5955, 6035, 6115, 6195, 6275, 6355, 6435, -@@ -3382,7 +3391,7 @@ static bool ibss_mesh_select_80_160mhz(s +@@ -3383,7 +3392,7 @@ static bool ibss_mesh_select_80_160mhz(s goto skip_80mhz; /* Use 40 MHz if channel not usable */ @@ -90,7 +90,7 @@ Signed-off-by: Peter Oh goto skip_80mhz; chwidth = CONF_OPER_CHWIDTH_80MHZ; -@@ -3424,7 +3433,7 @@ static bool ibss_mesh_select_80_160mhz(s +@@ -3425,7 +3434,7 @@ static bool ibss_mesh_select_80_160mhz(s HE_PHYCAP_CHANNEL_WIDTH_SET_160MHZ_IN_5G) && (ssid->max_oper_chwidth == CONF_OPER_CHWIDTH_160MHZ || ssid->max_oper_chwidth == CONF_OPER_CHWIDTH_320MHZ) && @@ -99,7 +99,7 @@ Signed-off-by: Peter Oh for (j = 0; j < ARRAY_SIZE(bw160); j++) { u8 start_chan; -@@ -3447,11 +3456,11 @@ static bool ibss_mesh_select_80_160mhz(s +@@ -3448,11 +3457,11 @@ static bool ibss_mesh_select_80_160mhz(s EHT_PHYCAP_320MHZ_IN_6GHZ_SUPPORT_MASK) && is_6ghz && ssid->max_oper_chwidth == CONF_OPER_CHWIDTH_320MHZ && ibss_mesh_is_80mhz_avail(channel + 16 - @@ -114,7 +114,7 @@ Signed-off-by: Peter Oh for (j = 0; j < ARRAY_SIZE(bw320); j += 2) { if (freq->freq >= bw320[j] && freq->freq <= bw320[j + 1]) { -@@ -3480,10 +3489,12 @@ static bool ibss_mesh_select_80_160mhz(s +@@ -3481,10 +3490,12 @@ static bool ibss_mesh_select_80_160mhz(s if (!chan) continue; @@ -131,7 +131,7 @@ Signed-off-by: Peter Oh /* Found a suitable second segment for 80+80 */ chwidth = CONF_OPER_CHWIDTH_80P80MHZ; -@@ -3538,6 +3549,7 @@ void ibss_mesh_setup_freq(struct wpa_sup +@@ -3539,6 +3550,7 @@ void ibss_mesh_setup_freq(struct wpa_sup int obss_scan = 1; u8 channel; bool is_6ghz, is_24ghz; @@ -139,7 +139,7 @@ Signed-off-by: Peter Oh freq->freq = ssid->frequency; -@@ -3581,9 +3593,9 @@ void ibss_mesh_setup_freq(struct wpa_sup +@@ -3582,9 +3594,9 @@ void ibss_mesh_setup_freq(struct wpa_sup /* Setup higher BW only for 5 and 6 GHz */ if (mode->mode == HOSTAPD_MODE_IEEE80211A) { ibss_mesh_select_40mhz(wpa_s, ssid, mode, freq, obss_scan, diff --git a/package/network/services/hostapd/patches/011-mesh-use-deterministic-channel-on-channel-switch.patch b/package/network/services/hostapd/patches/011-mesh-use-deterministic-channel-on-channel-switch.patch index 8c1ba694c5..c81a8474c2 100644 --- a/package/network/services/hostapd/patches/011-mesh-use-deterministic-channel-on-channel-switch.patch +++ b/package/network/services/hostapd/patches/011-mesh-use-deterministic-channel-on-channel-switch.patch @@ -68,7 +68,7 @@ Signed-off-by: Markus Theil chan_idx, num_available_chandefs); --- a/src/drivers/driver_nl80211.c +++ b/src/drivers/driver_nl80211.c -@@ -12010,6 +12010,10 @@ static int nl80211_switch_channel(void * +@@ -12012,6 +12012,10 @@ static int nl80211_switch_channel(void * if (ret) goto error; diff --git a/package/network/services/hostapd/patches/021-fix-sta-add-after-previous-connection.patch b/package/network/services/hostapd/patches/021-fix-sta-add-after-previous-connection.patch index 91cea41fce..70a1cb5d3b 100644 --- a/package/network/services/hostapd/patches/021-fix-sta-add-after-previous-connection.patch +++ b/package/network/services/hostapd/patches/021-fix-sta-add-after-previous-connection.patch @@ -4,7 +4,7 @@ Subject: [PATCH] fix adding back stations after a missed deauth/disassoc --- a/src/ap/ieee802_11.c +++ b/src/ap/ieee802_11.c -@@ -5566,6 +5566,13 @@ static int add_associated_sta(struct hos +@@ -6370,6 +6370,13 @@ static int add_associated_sta(struct hos * drivers to accept the STA parameter configuration. Since this is * after a new FT-over-DS exchange, a new TK has been derived, so key * reinstallation is not a concern for this case. @@ -18,7 +18,7 @@ Subject: [PATCH] fix adding back stations after a missed deauth/disassoc */ wpa_printf(MSG_DEBUG, "Add associated STA " MACSTR " (added_unassoc=%d auth_alg=%u ft_over_ds=%u reassoc=%d authorized=%d ft_tk=%d fils_tk=%d)", -@@ -5579,7 +5586,8 @@ static int add_associated_sta(struct hos +@@ -6383,7 +6390,8 @@ static int add_associated_sta(struct hos (!(sta->flags & WLAN_STA_AUTHORIZED) || (reassoc && sta->ft_over_ds && sta->auth_alg == WLAN_AUTH_FT) || (!wpa_auth_sta_ft_tk_already_set(sta->wpa_sm) && diff --git a/package/network/services/hostapd/patches/050-Fix-OpenWrt-13156.patch b/package/network/services/hostapd/patches/050-Fix-OpenWrt-13156.patch index 6927afccf9..9b6f96191a 100644 --- a/package/network/services/hostapd/patches/050-Fix-OpenWrt-13156.patch +++ b/package/network/services/hostapd/patches/050-Fix-OpenWrt-13156.patch @@ -20,7 +20,7 @@ Signed-off-by: Stijn Tintel --- a/src/ap/hostapd.c +++ b/src/ap/hostapd.c -@@ -4123,6 +4123,8 @@ int hostapd_remove_iface(struct hapd_int +@@ -4126,6 +4126,8 @@ int hostapd_remove_iface(struct hapd_int void hostapd_new_assoc_sta(struct hostapd_data *hapd, struct sta_info *sta, int reassoc) { @@ -29,7 +29,7 @@ Signed-off-by: Stijn Tintel if (hapd->tkip_countermeasures) { hostapd_drv_sta_deauth(hapd, sta->addr, WLAN_REASON_MICHAEL_MIC_FAILURE); -@@ -4130,10 +4132,16 @@ void hostapd_new_assoc_sta(struct hostap +@@ -4133,10 +4135,16 @@ void hostapd_new_assoc_sta(struct hostap } #ifdef CONFIG_IEEE80211BE @@ -51,7 +51,7 @@ Signed-off-by: Stijn Tintel ap_sta_clear_assoc_timeout(hapd, sta); --- a/src/ap/sta_info.c +++ b/src/ap/sta_info.c -@@ -1736,9 +1736,6 @@ bool ap_sta_set_authorized_flag(struct h +@@ -1742,9 +1742,6 @@ bool ap_sta_set_authorized_flag(struct h mld_assoc_link_id = -2; } #endif /* CONFIG_IEEE80211BE */ diff --git a/package/network/services/hostapd/patches/051-nl80211-add-extra-ies-only-if-allowed-by-driver.patch b/package/network/services/hostapd/patches/051-nl80211-add-extra-ies-only-if-allowed-by-driver.patch index 3231273f5a..34823de67b 100644 --- a/package/network/services/hostapd/patches/051-nl80211-add-extra-ies-only-if-allowed-by-driver.patch +++ b/package/network/services/hostapd/patches/051-nl80211-add-extra-ies-only-if-allowed-by-driver.patch @@ -26,7 +26,7 @@ Signed-off-by: David Bauer --- a/src/drivers/driver.h +++ b/src/drivers/driver.h -@@ -2467,6 +2467,9 @@ struct wpa_driver_capa { +@@ -2469,6 +2469,9 @@ struct wpa_driver_capa { /** Maximum number of iterations in a single scan plan */ u32 max_sched_scan_plan_iterations; @@ -38,7 +38,7 @@ Signed-off-by: David Bauer --- a/src/drivers/driver_nl80211_capa.c +++ b/src/drivers/driver_nl80211_capa.c -@@ -1000,6 +1000,10 @@ static int wiphy_info_handler(struct nl_ +@@ -1004,6 +1004,10 @@ static int wiphy_info_handler(struct nl_ nla_get_u32(tb[NL80211_ATTR_MAX_SCAN_PLAN_ITERATIONS]); } @@ -51,7 +51,7 @@ Signed-off-by: David Bauer nla_get_u8(tb[NL80211_ATTR_MAX_MATCH_SETS]); --- a/src/drivers/driver_nl80211_scan.c +++ b/src/drivers/driver_nl80211_scan.c -@@ -235,7 +235,7 @@ nl80211_scan_common(struct i802_bss *bss +@@ -236,7 +236,7 @@ nl80211_scan_common(struct i802_bss *bss wpa_printf(MSG_DEBUG, "nl80211: Passive scan requested"); } diff --git a/package/network/services/hostapd/patches/110-mbedtls-TLS-crypto-option-initial-port.patch b/package/network/services/hostapd/patches/110-mbedtls-TLS-crypto-option-initial-port.patch index 4b366414c5..e728fa7270 100644 --- a/package/network/services/hostapd/patches/110-mbedtls-TLS-crypto-option-initial-port.patch +++ b/package/network/services/hostapd/patches/110-mbedtls-TLS-crypto-option-initial-port.patch @@ -21,7 +21,7 @@ Signed-off-by: Glenn Strauss --- a/hostapd/Makefile +++ b/hostapd/Makefile -@@ -769,6 +769,40 @@ endif +@@ -774,6 +774,40 @@ endif CFLAGS += -DTLS_DEFAULT_CIPHERS=\"$(CONFIG_TLS_DEFAULT_CIPHERS)\" endif @@ -62,7 +62,7 @@ Signed-off-by: Glenn Strauss ifeq ($(CONFIG_TLS), gnutls) ifndef CONFIG_CRYPTO # default to libgcrypt -@@ -948,9 +982,11 @@ endif +@@ -953,9 +987,11 @@ endif ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), wolfssl) @@ -74,7 +74,7 @@ Signed-off-by: Glenn Strauss ifdef NEED_AES_EAX AESOBJS += ../src/crypto/aes-eax.o NEED_AES_CTR=y -@@ -960,38 +996,48 @@ AESOBJS += ../src/crypto/aes-siv.o +@@ -965,38 +1001,48 @@ AESOBJS += ../src/crypto/aes-siv.o NEED_AES_CTR=y endif ifdef NEED_AES_CTR @@ -123,7 +123,7 @@ Signed-off-by: Glenn Strauss ifdef NEED_AES_DEC ifdef CONFIG_INTERNAL_AES AESOBJS += ../src/crypto/aes-internal-dec.o -@@ -1006,12 +1052,16 @@ ifneq ($(CONFIG_TLS), openssl) +@@ -1011,12 +1057,16 @@ ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), linux) ifneq ($(CONFIG_TLS), gnutls) ifneq ($(CONFIG_TLS), wolfssl) @@ -140,7 +140,7 @@ Signed-off-by: Glenn Strauss ifdef CONFIG_INTERNAL_SHA1 SHA1OBJS += ../src/crypto/sha1-internal.o ifdef NEED_FIPS186_2_PRF -@@ -1020,16 +1070,22 @@ endif +@@ -1025,16 +1075,22 @@ endif endif ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), wolfssl) @@ -163,7 +163,7 @@ Signed-off-by: Glenn Strauss ifdef NEED_SHA1 OBJS += $(SHA1OBJS) -@@ -1039,11 +1095,13 @@ ifneq ($(CONFIG_TLS), openssl) +@@ -1044,11 +1100,13 @@ ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), linux) ifneq ($(CONFIG_TLS), gnutls) ifneq ($(CONFIG_TLS), wolfssl) @@ -177,7 +177,7 @@ Signed-off-by: Glenn Strauss ifdef NEED_MD5 ifdef CONFIG_INTERNAL_MD5 -@@ -1096,56 +1154,81 @@ ifneq ($(CONFIG_TLS), openssl) +@@ -1101,56 +1159,81 @@ ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), linux) ifneq ($(CONFIG_TLS), gnutls) ifneq ($(CONFIG_TLS), wolfssl) @@ -259,7 +259,7 @@ Signed-off-by: Glenn Strauss ifdef CONFIG_INTERNAL_SHA384 CFLAGS += -DCONFIG_INTERNAL_SHA384 -@@ -1190,11 +1273,13 @@ HOBJS += $(SHA1OBJS) +@@ -1195,11 +1278,13 @@ HOBJS += $(SHA1OBJS) ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), linux) ifneq ($(CONFIG_TLS), wolfssl) @@ -273,7 +273,7 @@ Signed-off-by: Glenn Strauss ifdef CONFIG_RADIUS_SERVER CFLAGS += -DRADIUS_SERVER -@@ -1374,7 +1459,9 @@ NOBJS += ../src/utils/trace.o +@@ -1379,7 +1464,9 @@ NOBJS += ../src/utils/trace.o endif HOBJS += hlr_auc_gw.o ../src/utils/common.o ../src/utils/wpa_debug.o ../src/utils/os_$(CONFIG_OS).o ../src/utils/wpabuf.o ../src/crypto/milenage.o @@ -283,7 +283,7 @@ Signed-off-by: Glenn Strauss ifdef CONFIG_INTERNAL_AES HOBJS += ../src/crypto/aes-internal.o HOBJS += ../src/crypto/aes-internal-enc.o -@@ -1397,18 +1484,24 @@ SOBJS += ../src/common/sae.o +@@ -1402,18 +1489,24 @@ SOBJS += ../src/common/sae.o SOBJS += ../src/common/sae_pk.o SOBJS += ../src/common/dragonfly.o SOBJS += $(AESOBJS) @@ -7770,7 +7770,7 @@ Signed-off-by: Glenn Strauss CONFIG_SIM_SIMULATOR=y --- a/wpa_supplicant/Makefile +++ b/wpa_supplicant/Makefile -@@ -1266,6 +1266,29 @@ endif +@@ -1271,6 +1271,29 @@ endif CFLAGS += -DTLS_DEFAULT_CIPHERS=\"$(CONFIG_TLS_DEFAULT_CIPHERS)\" endif @@ -7800,7 +7800,7 @@ Signed-off-by: Glenn Strauss ifeq ($(CONFIG_TLS), gnutls) ifndef CONFIG_CRYPTO # default to libgcrypt -@@ -1458,9 +1481,11 @@ endif +@@ -1463,9 +1486,11 @@ endif ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), wolfssl) @@ -7812,7 +7812,7 @@ Signed-off-by: Glenn Strauss ifdef CONFIG_OPENSSL_INTERNAL_AES_WRAP # Seems to be needed at least with BoringSSL NEED_INTERNAL_AES_WRAP=y -@@ -1474,9 +1499,11 @@ endif +@@ -1479,9 +1504,11 @@ endif ifdef NEED_INTERNAL_AES_WRAP ifneq ($(CONFIG_TLS), linux) @@ -7824,7 +7824,7 @@ Signed-off-by: Glenn Strauss ifdef NEED_AES_EAX AESOBJS += ../src/crypto/aes-eax.o NEED_AES_CTR=y -@@ -1486,35 +1513,45 @@ AESOBJS += ../src/crypto/aes-siv.o +@@ -1491,35 +1518,45 @@ AESOBJS += ../src/crypto/aes-siv.o NEED_AES_CTR=y endif ifdef NEED_AES_CTR @@ -7870,7 +7870,7 @@ Signed-off-by: Glenn Strauss ifdef NEED_AES_ENC ifdef CONFIG_INTERNAL_AES AESOBJS += ../src/crypto/aes-internal-enc.o -@@ -1529,12 +1566,16 @@ ifneq ($(CONFIG_TLS), openssl) +@@ -1534,12 +1571,16 @@ ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), linux) ifneq ($(CONFIG_TLS), gnutls) ifneq ($(CONFIG_TLS), wolfssl) @@ -7887,7 +7887,7 @@ Signed-off-by: Glenn Strauss ifdef CONFIG_INTERNAL_SHA1 SHA1OBJS += ../src/crypto/sha1-internal.o ifdef NEED_FIPS186_2_PRF -@@ -1546,29 +1587,37 @@ CFLAGS += -DCONFIG_NO_PBKDF2 +@@ -1551,29 +1592,37 @@ CFLAGS += -DCONFIG_NO_PBKDF2 else ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), wolfssl) @@ -7925,7 +7925,7 @@ Signed-off-by: Glenn Strauss ifdef NEED_MD5 ifdef CONFIG_INTERNAL_MD5 MD5OBJS += ../src/crypto/md5-internal.o -@@ -1623,12 +1672,17 @@ ifneq ($(CONFIG_TLS), openssl) +@@ -1628,12 +1677,17 @@ ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), linux) ifneq ($(CONFIG_TLS), gnutls) ifneq ($(CONFIG_TLS), wolfssl) @@ -7943,7 +7943,7 @@ Signed-off-by: Glenn Strauss ifdef CONFIG_INTERNAL_SHA256 SHA256OBJS += ../src/crypto/sha256-internal.o endif -@@ -1641,50 +1695,68 @@ CFLAGS += -DCONFIG_INTERNAL_SHA512 +@@ -1646,50 +1700,68 @@ CFLAGS += -DCONFIG_INTERNAL_SHA512 SHA256OBJS += ../src/crypto/sha512-internal.o endif ifdef NEED_TLS_PRF_SHA256 @@ -8012,7 +8012,7 @@ Signed-off-by: Glenn Strauss ifdef NEED_ASN1 OBJS += ../src/tls/asn1.o -@@ -1859,10 +1931,12 @@ ifdef CONFIG_FIPS +@@ -1864,10 +1936,12 @@ ifdef CONFIG_FIPS CFLAGS += -DCONFIG_FIPS ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), wolfssl) diff --git a/package/network/services/hostapd/patches/120-mbedtls-fips186_2_prf.patch b/package/network/services/hostapd/patches/120-mbedtls-fips186_2_prf.patch index 8e4e7d2601..faeec75a8e 100644 --- a/package/network/services/hostapd/patches/120-mbedtls-fips186_2_prf.patch +++ b/package/network/services/hostapd/patches/120-mbedtls-fips186_2_prf.patch @@ -12,7 +12,7 @@ Signed-off-by: Glenn Strauss --- a/hostapd/Makefile +++ b/hostapd/Makefile -@@ -783,10 +783,6 @@ endif +@@ -788,10 +788,6 @@ endif OBJS += ../src/crypto/crypto_$(CONFIG_CRYPTO).o HOBJS += ../src/crypto/crypto_$(CONFIG_CRYPTO).o SOBJS += ../src/crypto/crypto_$(CONFIG_CRYPTO).o @@ -101,7 +101,7 @@ Signed-off-by: Glenn Strauss --- a/wpa_supplicant/Makefile +++ b/wpa_supplicant/Makefile -@@ -1277,10 +1277,6 @@ endif +@@ -1282,10 +1282,6 @@ endif OBJS += ../src/crypto/crypto_$(CONFIG_CRYPTO).o OBJS_p += ../src/crypto/crypto_$(CONFIG_CRYPTO).o OBJS_priv += ../src/crypto/crypto_$(CONFIG_CRYPTO).o diff --git a/package/network/services/hostapd/patches/140-tests-Makefile-make-run-tests-with-CONFIG_TLS.patch b/package/network/services/hostapd/patches/140-tests-Makefile-make-run-tests-with-CONFIG_TLS.patch index bac54cf6ff..23e5af97b6 100644 --- a/package/network/services/hostapd/patches/140-tests-Makefile-make-run-tests-with-CONFIG_TLS.patch +++ b/package/network/services/hostapd/patches/140-tests-Makefile-make-run-tests-with-CONFIG_TLS.patch @@ -61,7 +61,7 @@ Signed-off-by: Glenn Strauss --- a/hostapd/Makefile +++ b/hostapd/Makefile -@@ -719,6 +719,7 @@ CFLAGS += -DCONFIG_TLSV12 +@@ -724,6 +724,7 @@ CFLAGS += -DCONFIG_TLSV12 endif ifeq ($(CONFIG_TLS), wolfssl) @@ -69,7 +69,7 @@ Signed-off-by: Glenn Strauss CFLAGS += -DCRYPTO_RSA_OAEP_SHA256 CONFIG_CRYPTO=wolfssl ifdef TLS_FUNCS -@@ -740,6 +741,7 @@ endif +@@ -745,6 +746,7 @@ endif endif ifeq ($(CONFIG_TLS), openssl) @@ -77,7 +77,7 @@ Signed-off-by: Glenn Strauss CFLAGS += -DCRYPTO_RSA_OAEP_SHA256 CONFIG_CRYPTO=openssl ifdef TLS_FUNCS -@@ -770,6 +772,7 @@ CFLAGS += -DTLS_DEFAULT_CIPHERS=\"$(CONF +@@ -775,6 +777,7 @@ CFLAGS += -DTLS_DEFAULT_CIPHERS=\"$(CONF endif ifeq ($(CONFIG_TLS), mbedtls) @@ -85,7 +85,7 @@ Signed-off-by: Glenn Strauss ifndef CONFIG_CRYPTO CONFIG_CRYPTO=mbedtls endif -@@ -800,6 +803,7 @@ endif +@@ -805,6 +808,7 @@ endif endif ifeq ($(CONFIG_TLS), gnutls) @@ -93,7 +93,7 @@ Signed-off-by: Glenn Strauss ifndef CONFIG_CRYPTO # default to libgcrypt CONFIG_CRYPTO=gnutls -@@ -830,6 +834,7 @@ endif +@@ -835,6 +839,7 @@ endif endif ifeq ($(CONFIG_TLS), internal) @@ -101,7 +101,7 @@ Signed-off-by: Glenn Strauss ifndef CONFIG_CRYPTO CONFIG_CRYPTO=internal endif -@@ -908,6 +913,7 @@ endif +@@ -913,6 +918,7 @@ endif endif ifeq ($(CONFIG_TLS), linux) @@ -935,7 +935,7 @@ Signed-off-by: Glenn Strauss --- a/tests/hwsim/test_ap_ft.py +++ b/tests/hwsim/test_ap_ft.py -@@ -2543,11 +2543,11 @@ def test_ap_ft_ap_oom5(dev, apdev): +@@ -2575,11 +2575,11 @@ def test_ap_ft_ap_oom5(dev, apdev): # This will fail to roam dev[0].roam(bssid1, check_bssid=False) @@ -1289,7 +1289,7 @@ Signed-off-by: Glenn Strauss if (need_more_data) { --- a/wpa_supplicant/Makefile +++ b/wpa_supplicant/Makefile -@@ -1224,6 +1224,7 @@ TLS_FUNCS=y +@@ -1229,6 +1229,7 @@ TLS_FUNCS=y endif ifeq ($(CONFIG_TLS), wolfssl) @@ -1297,7 +1297,7 @@ Signed-off-by: Glenn Strauss CFLAGS += -DCRYPTO_RSA_OAEP_SHA256 ifdef TLS_FUNCS CFLAGS += -DWOLFSSL_DER_LOAD -@@ -1240,6 +1241,7 @@ LIBS_p += -lwolfssl -lm +@@ -1245,6 +1246,7 @@ LIBS_p += -lwolfssl -lm endif ifeq ($(CONFIG_TLS), openssl) @@ -1305,7 +1305,7 @@ Signed-off-by: Glenn Strauss CFLAGS += -DCRYPTO_RSA_OAEP_SHA256 ifdef TLS_FUNCS CFLAGS += -DEAP_TLS_OPENSSL -@@ -1267,6 +1269,7 @@ CFLAGS += -DTLS_DEFAULT_CIPHERS=\"$(CONF +@@ -1272,6 +1274,7 @@ CFLAGS += -DTLS_DEFAULT_CIPHERS=\"$(CONF endif ifeq ($(CONFIG_TLS), mbedtls) @@ -1313,7 +1313,7 @@ Signed-off-by: Glenn Strauss ifndef CONFIG_CRYPTO CONFIG_CRYPTO=mbedtls endif -@@ -1286,6 +1289,7 @@ endif +@@ -1291,6 +1294,7 @@ endif endif ifeq ($(CONFIG_TLS), gnutls) @@ -1321,7 +1321,7 @@ Signed-off-by: Glenn Strauss ifndef CONFIG_CRYPTO # default to libgcrypt CONFIG_CRYPTO=gnutls -@@ -1316,6 +1320,7 @@ endif +@@ -1321,6 +1325,7 @@ endif endif ifeq ($(CONFIG_TLS), internal) @@ -1329,7 +1329,7 @@ Signed-off-by: Glenn Strauss ifndef CONFIG_CRYPTO CONFIG_CRYPTO=internal endif -@@ -1396,6 +1401,7 @@ endif +@@ -1401,6 +1406,7 @@ endif endif ifeq ($(CONFIG_TLS), linux) diff --git a/package/network/services/hostapd/patches/180-fix_owe_ssid_update.patch b/package/network/services/hostapd/patches/180-fix_owe_ssid_update.patch index 3d6ccb732b..333b1587d9 100644 --- a/package/network/services/hostapd/patches/180-fix_owe_ssid_update.patch +++ b/package/network/services/hostapd/patches/180-fix_owe_ssid_update.patch @@ -1,6 +1,6 @@ --- a/src/ap/hostapd.c +++ b/src/ap/hostapd.c -@@ -2473,7 +2473,11 @@ static int hostapd_owe_iface_iter(struct +@@ -2476,7 +2476,11 @@ static int hostapd_owe_iface_iter(struct if (!bss->conf->ssid.ssid_set || !bss->conf->ssid.ssid_len || is_zero_ether_addr(bss->own_addr)) continue; @@ -13,7 +13,7 @@ os_memcpy(hapd->conf->owe_transition_bssid, bss->own_addr, ETH_ALEN); os_memcpy(hapd->conf->owe_transition_ssid, -@@ -2490,10 +2494,6 @@ static int hostapd_owe_iface_iter(struct +@@ -2493,10 +2497,6 @@ static int hostapd_owe_iface_iter(struct int hostapd_owe_trans_get_info(struct hostapd_data *hapd) { diff --git a/package/network/services/hostapd/patches/191-hostapd-add-support-for-specifying-the-link-id-in-th.patch b/package/network/services/hostapd/patches/191-hostapd-add-support-for-specifying-the-link-id-in-th.patch index 9aad7aba8d..eeb5c1e3f6 100644 --- a/package/network/services/hostapd/patches/191-hostapd-add-support-for-specifying-the-link-id-in-th.patch +++ b/package/network/services/hostapd/patches/191-hostapd-add-support-for-specifying-the-link-id-in-th.patch @@ -43,7 +43,7 @@ Signed-off-by: Felix Fietkau * If set indicate the AP as disabled in the RNR element included in the --- a/src/ap/hostapd.c +++ b/src/ap/hostapd.c -@@ -3116,7 +3116,10 @@ struct hostapd_iface * hostapd_alloc_ifa +@@ -3119,7 +3119,10 @@ struct hostapd_iface * hostapd_alloc_ifa #ifdef CONFIG_IEEE80211BE static void hostapd_bss_alloc_link_id(struct hostapd_data *hapd) { diff --git a/package/network/services/hostapd/patches/200-multicall.patch b/package/network/services/hostapd/patches/200-multicall.patch index 27f777a61e..c77bfe9347 100644 --- a/package/network/services/hostapd/patches/200-multicall.patch +++ b/package/network/services/hostapd/patches/200-multicall.patch @@ -43,7 +43,7 @@ This allows building both hostapd and wpa_supplicant as a single binary LIBS += $(DRV_AP_LIBS) ifdef CONFIG_L2_PACKET -@@ -1425,6 +1431,12 @@ install: $(addprefix $(DESTDIR)$(BINDIR) +@@ -1430,6 +1436,12 @@ install: $(addprefix $(DESTDIR)$(BINDIR) _OBJS_VAR := OBJS include ../src/objs.mk @@ -56,7 +56,7 @@ This allows building both hostapd and wpa_supplicant as a single binary hostapd: $(OBJS) $(Q)$(CC) $(LDFLAGS) -o hostapd $(OBJS) $(LIBS) @$(E) " LD " $@ -@@ -1513,6 +1525,12 @@ include ../src/objs.mk +@@ -1518,6 +1530,12 @@ include ../src/objs.mk _OBJS_VAR := SOBJS include ../src/objs.mk @@ -116,7 +116,7 @@ This allows building both hostapd and wpa_supplicant as a single binary struct hapd_interfaces *interfaces = ctx; --- a/src/drivers/driver.h +++ b/src/drivers/driver.h -@@ -7309,8 +7309,8 @@ union wpa_event_data { +@@ -7313,8 +7313,8 @@ union wpa_event_data { * Driver wrapper code should call this function whenever an event is received * from the driver. */ @@ -127,7 +127,7 @@ This allows building both hostapd and wpa_supplicant as a single binary /** * wpa_supplicant_event_global - Report a driver event for wpa_supplicant -@@ -7322,7 +7322,7 @@ void wpa_supplicant_event(void *ctx, enu +@@ -7326,7 +7326,7 @@ void wpa_supplicant_event(void *ctx, enu * Same as wpa_supplicant_event(), but we search for the interface in * wpa_global. */ @@ -169,7 +169,7 @@ This allows building both hostapd and wpa_supplicant as a single binary OBJS += ibss_rsn.o endif -@@ -1015,6 +1018,10 @@ ifdef CONFIG_DYNAMIC_EAP_METHODS +@@ -1020,6 +1023,10 @@ ifdef CONFIG_DYNAMIC_EAP_METHODS CFLAGS += -DCONFIG_DYNAMIC_EAP_METHODS LIBS += -ldl -rdynamic endif @@ -180,7 +180,7 @@ This allows building both hostapd and wpa_supplicant as a single binary endif ifdef CONFIG_AP -@@ -1022,9 +1029,11 @@ NEED_EAP_COMMON=y +@@ -1027,9 +1034,11 @@ NEED_EAP_COMMON=y NEED_RSN_AUTHENTICATOR=y CFLAGS += -DCONFIG_AP OBJS += ap.o @@ -192,7 +192,7 @@ This allows building both hostapd and wpa_supplicant as a single binary OBJS += ../src/ap/hostapd.o OBJS += ../src/ap/wpa_auth_glue.o OBJS += ../src/ap/utils.o -@@ -1116,6 +1125,12 @@ endif +@@ -1121,6 +1130,12 @@ endif ifdef CONFIG_HS20 OBJS += ../src/ap/hs20.o endif @@ -205,7 +205,7 @@ This allows building both hostapd and wpa_supplicant as a single binary endif ifdef CONFIG_MBO -@@ -1125,7 +1140,9 @@ NEED_GAS=y +@@ -1130,7 +1145,9 @@ NEED_GAS=y endif ifdef NEED_RSN_AUTHENTICATOR @@ -215,7 +215,7 @@ This allows building both hostapd and wpa_supplicant as a single binary NEED_AES_WRAP=y OBJS += ../src/ap/wpa_auth.o OBJS += ../src/ap/wpa_auth_ie.o -@@ -2125,6 +2142,12 @@ wpa_priv: $(BCHECK) $(OBJS_priv) +@@ -2130,6 +2147,12 @@ wpa_priv: $(BCHECK) $(OBJS_priv) _OBJS_VAR := OBJS include ../src/objs.mk @@ -228,7 +228,7 @@ This allows building both hostapd and wpa_supplicant as a single binary wpa_supplicant: $(BCHECK) $(OBJS) $(EXTRA_progs) $(Q)$(LDO) $(LDFLAGS) -o wpa_supplicant $(OBJS) $(LIBS) $(EXTRALIBS) @$(E) " LD " $@ -@@ -2257,6 +2280,12 @@ eap_gpsk.so: $(SRC_EAP_GPSK) +@@ -2262,6 +2285,12 @@ eap_gpsk.so: $(SRC_EAP_GPSK) $(Q)sed -e 's|\@BINDIR\@|$(BINDIR)|g' $< >$@ @$(E) " sed" $< @@ -278,7 +278,7 @@ This allows building both hostapd and wpa_supplicant as a single binary os_memset(&eapol_test, 0, sizeof(eapol_test)); --- a/wpa_supplicant/events.c +++ b/wpa_supplicant/events.c -@@ -6618,8 +6618,8 @@ static int wpas_pasn_auth(struct wpa_sup +@@ -6627,8 +6627,8 @@ static int wpas_pasn_auth(struct wpa_sup #endif /* CONFIG_PASN */ @@ -289,7 +289,7 @@ This allows building both hostapd and wpa_supplicant as a single binary { struct wpa_supplicant *wpa_s = ctx; int resched; -@@ -7613,7 +7613,7 @@ void wpa_supplicant_event(void *ctx, enu +@@ -7622,7 +7622,7 @@ void wpa_supplicant_event(void *ctx, enu } @@ -331,7 +331,7 @@ This allows building both hostapd and wpa_supplicant as a single binary os_memset(&global, 0, sizeof(global)); --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -8253,7 +8253,6 @@ struct wpa_interface * wpa_supplicant_ma +@@ -8259,7 +8259,6 @@ struct wpa_interface * wpa_supplicant_ma return NULL; } @@ -339,7 +339,7 @@ This allows building both hostapd and wpa_supplicant as a single binary /** * wpa_supplicant_match_existing - Match existing interfaces * @global: Pointer to global data from wpa_supplicant_init() -@@ -8288,6 +8287,11 @@ static int wpa_supplicant_match_existing +@@ -8294,6 +8293,11 @@ static int wpa_supplicant_match_existing #endif /* CONFIG_MATCH_IFACE */ @@ -351,7 +351,7 @@ This allows building both hostapd and wpa_supplicant as a single binary /** * wpa_supplicant_add_iface - Add a new network interface -@@ -8544,6 +8548,8 @@ struct wpa_global * wpa_supplicant_init( +@@ -8550,6 +8554,8 @@ struct wpa_global * wpa_supplicant_init( #ifndef CONFIG_NO_WPA_MSG wpa_msg_register_ifname_cb(wpa_supplicant_msg_ifname_cb); #endif /* CONFIG_NO_WPA_MSG */ diff --git a/package/network/services/hostapd/patches/201-lto-jobserver-support.patch b/package/network/services/hostapd/patches/201-lto-jobserver-support.patch index 5fdedf9ca8..2211d0eeda 100644 --- a/package/network/services/hostapd/patches/201-lto-jobserver-support.patch +++ b/package/network/services/hostapd/patches/201-lto-jobserver-support.patch @@ -5,7 +5,7 @@ Subject: [PATCH] hostapd: build with LTO enabled (using jobserver for parallel --- a/hostapd/Makefile +++ b/hostapd/Makefile -@@ -1438,7 +1438,7 @@ hostapd_multi.a: $(BCHECK) $(OBJS) +@@ -1443,7 +1443,7 @@ hostapd_multi.a: $(BCHECK) $(OBJS) @$(AR) cr $@ hostapd_multi.o $(OBJS) hostapd: $(OBJS) @@ -14,7 +14,7 @@ Subject: [PATCH] hostapd: build with LTO enabled (using jobserver for parallel @$(E) " LD " $@ ifdef CONFIG_WPA_TRACE -@@ -1449,7 +1449,7 @@ _OBJS_VAR := OBJS_c +@@ -1454,7 +1454,7 @@ _OBJS_VAR := OBJS_c include ../src/objs.mk hostapd_cli: $(OBJS_c) @@ -25,7 +25,7 @@ Subject: [PATCH] hostapd: build with LTO enabled (using jobserver for parallel NOBJS = nt_password_hash.o ../src/crypto/ms_funcs.o $(SHA1OBJS) --- a/wpa_supplicant/Makefile +++ b/wpa_supplicant/Makefile -@@ -2149,31 +2149,31 @@ wpa_supplicant_multi.a: .config $(BCHECK +@@ -2154,31 +2154,31 @@ wpa_supplicant_multi.a: .config $(BCHECK @$(AR) cr $@ wpa_supplicant_multi.o $(OBJS) wpa_supplicant: $(BCHECK) $(OBJS) $(EXTRA_progs) diff --git a/package/network/services/hostapd/patches/211-ctrl-make-WNM_AP-functions-dependant-on-CONFIG_AP.patch b/package/network/services/hostapd/patches/211-ctrl-make-WNM_AP-functions-dependant-on-CONFIG_AP.patch index 5dcd22160c..b3718adf05 100644 --- a/package/network/services/hostapd/patches/211-ctrl-make-WNM_AP-functions-dependant-on-CONFIG_AP.patch +++ b/package/network/services/hostapd/patches/211-ctrl-make-WNM_AP-functions-dependant-on-CONFIG_AP.patch @@ -13,7 +13,7 @@ Signed-off-by: David Bauer --- a/wpa_supplicant/ctrl_iface.c +++ b/wpa_supplicant/ctrl_iface.c -@@ -13989,7 +13989,7 @@ char * wpa_supplicant_ctrl_iface_process +@@ -14007,7 +14007,7 @@ char * wpa_supplicant_ctrl_iface_process if (wpas_ctrl_iface_coloc_intf_report(wpa_s, buf + 18)) reply_len = -1; #endif /* CONFIG_WNM */ @@ -22,7 +22,7 @@ Signed-off-by: David Bauer } else if (os_strncmp(buf, "DISASSOC_IMMINENT ", 18) == 0) { if (ap_ctrl_iface_disassoc_imminent(wpa_s, buf + 18)) reply_len = -1; -@@ -13999,7 +13999,7 @@ char * wpa_supplicant_ctrl_iface_process +@@ -14017,7 +14017,7 @@ char * wpa_supplicant_ctrl_iface_process } else if (os_strncmp(buf, "BSS_TM_REQ ", 11) == 0) { if (ap_ctrl_iface_bss_tm_req(wpa_s, buf + 11)) reply_len = -1; diff --git a/package/network/services/hostapd/patches/252-disable_ctrl_iface_mib.patch b/package/network/services/hostapd/patches/252-disable_ctrl_iface_mib.patch index d5a7cebd5e..ff5f1c86d4 100644 --- a/package/network/services/hostapd/patches/252-disable_ctrl_iface_mib.patch +++ b/package/network/services/hostapd/patches/252-disable_ctrl_iface_mib.patch @@ -113,7 +113,7 @@ Subject: [PATCH] Remove some unnecessary control interface functionality if (os_snprintf_error(buflen - len, ret)) --- a/src/ap/ieee802_1x.c +++ b/src/ap/ieee802_1x.c -@@ -2836,6 +2836,7 @@ static const char * bool_txt(bool val) +@@ -2863,6 +2863,7 @@ static const char * bool_txt(bool val) return val ? "TRUE" : "FALSE"; } @@ -121,7 +121,7 @@ Subject: [PATCH] Remove some unnecessary control interface functionality int ieee802_1x_get_mib(struct hostapd_data *hapd, char *buf, size_t buflen) { -@@ -3022,6 +3023,7 @@ int ieee802_1x_get_mib_sta(struct hostap +@@ -3049,6 +3050,7 @@ int ieee802_1x_get_mib_sta(struct hostap return len; } @@ -131,7 +131,7 @@ Subject: [PATCH] Remove some unnecessary control interface functionality static void ieee802_1x_wnm_notif_send(void *eloop_ctx, void *timeout_ctx) --- a/src/ap/wpa_auth.c +++ b/src/ap/wpa_auth.c -@@ -6526,6 +6526,7 @@ static const char * wpa_bool_txt(int val +@@ -6544,6 +6544,7 @@ static const char * wpa_bool_txt(int val return val ? "TRUE" : "FALSE"; } @@ -139,7 +139,7 @@ Subject: [PATCH] Remove some unnecessary control interface functionality #define RSN_SUITE "%02x-%02x-%02x-%d" #define RSN_SUITE_ARG(s) \ -@@ -6678,7 +6679,7 @@ int wpa_get_mib_sta(struct wpa_state_mac +@@ -6696,7 +6697,7 @@ int wpa_get_mib_sta(struct wpa_state_mac return len; } @@ -150,7 +150,7 @@ Subject: [PATCH] Remove some unnecessary control interface functionality { --- a/src/rsn_supp/wpa.c +++ b/src/rsn_supp/wpa.c -@@ -4253,6 +4253,8 @@ static u32 wpa_key_mgmt_suite(struct wpa +@@ -4272,6 +4272,8 @@ static u32 wpa_key_mgmt_suite(struct wpa } @@ -159,7 +159,7 @@ Subject: [PATCH] Remove some unnecessary control interface functionality #define RSN_SUITE "%02x-%02x-%02x-%d" #define RSN_SUITE_ARG(s) \ ((s) >> 24) & 0xff, ((s) >> 16) & 0xff, ((s) >> 8) & 0xff, (s) & 0xff -@@ -4334,6 +4336,7 @@ int wpa_sm_get_mib(struct wpa_sm *sm, ch +@@ -4353,6 +4355,7 @@ int wpa_sm_get_mib(struct wpa_sm *sm, ch return (int) len; } @@ -169,7 +169,7 @@ Subject: [PATCH] Remove some unnecessary control interface functionality --- a/wpa_supplicant/Makefile +++ b/wpa_supplicant/Makefile -@@ -1073,6 +1073,9 @@ ifdef CONFIG_FILS +@@ -1078,6 +1078,9 @@ ifdef CONFIG_FILS OBJS += ../src/ap/fils_hlp.o endif ifdef CONFIG_CTRL_IFACE @@ -201,7 +201,7 @@ Subject: [PATCH] Remove some unnecessary control interface functionality if (wpa_s->ap_iface) { pos += ap_ctrl_iface_wpa_get_status(wpa_s, pos, end - pos, -@@ -13318,6 +13318,7 @@ char * wpa_supplicant_ctrl_iface_process +@@ -13336,6 +13336,7 @@ char * wpa_supplicant_ctrl_iface_process } else if (os_strncmp(buf, "NOTE ", 5) == 0) { wpa_printf(MSG_INFO, "NOTE: %s", buf + 5); wpa_trace_set_context(buf + 5); @@ -209,7 +209,7 @@ Subject: [PATCH] Remove some unnecessary control interface functionality } else if (os_strcmp(buf, "MIB") == 0) { reply_len = wpa_sm_get_mib(wpa_s->wpa, reply, reply_size); if (reply_len >= 0) { -@@ -13330,6 +13331,7 @@ char * wpa_supplicant_ctrl_iface_process +@@ -13348,6 +13349,7 @@ char * wpa_supplicant_ctrl_iface_process reply_size - reply_len); #endif /* CONFIG_MACSEC */ } @@ -217,7 +217,7 @@ Subject: [PATCH] Remove some unnecessary control interface functionality } else if (os_strncmp(buf, "STATUS", 6) == 0) { reply_len = wpa_supplicant_ctrl_iface_status( wpa_s, buf + 6, reply, reply_size); -@@ -13817,6 +13819,7 @@ char * wpa_supplicant_ctrl_iface_process +@@ -13835,6 +13837,7 @@ char * wpa_supplicant_ctrl_iface_process reply_len = wpa_supplicant_ctrl_iface_bss( wpa_s, buf + 4, reply, reply_size); #ifdef CONFIG_AP @@ -225,7 +225,7 @@ Subject: [PATCH] Remove some unnecessary control interface functionality } else if (os_strcmp(buf, "STA-FIRST") == 0) { reply_len = ap_ctrl_iface_sta_first(wpa_s, reply, reply_size); } else if (os_strncmp(buf, "STA ", 4) == 0) { -@@ -13825,12 +13828,15 @@ char * wpa_supplicant_ctrl_iface_process +@@ -13843,12 +13846,15 @@ char * wpa_supplicant_ctrl_iface_process } else if (os_strncmp(buf, "STA-NEXT ", 9) == 0) { reply_len = ap_ctrl_iface_sta_next(wpa_s, buf + 9, reply, reply_size); diff --git a/package/network/services/hostapd/patches/301-mesh-noscan.patch b/package/network/services/hostapd/patches/301-mesh-noscan.patch index 3d5fc89f6d..cb73782645 100644 --- a/package/network/services/hostapd/patches/301-mesh-noscan.patch +++ b/package/network/services/hostapd/patches/301-mesh-noscan.patch @@ -5,7 +5,7 @@ Subject: [PATCH] Allow HT40 also on 2.4GHz if noscan option is set, which also --- a/wpa_supplicant/config.c +++ b/wpa_supplicant/config.c -@@ -2718,6 +2718,7 @@ static const struct parse_data ssid_fiel +@@ -2795,6 +2795,7 @@ static const struct parse_data ssid_fiel #else /* CONFIG_MESH */ { INT_RANGE(mode, 0, 4) }, #endif /* CONFIG_MESH */ @@ -47,7 +47,7 @@ Subject: [PATCH] Allow HT40 also on 2.4GHz if noscan option is set, which also /* --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -3119,7 +3119,7 @@ static bool ibss_mesh_can_use_vht(struct +@@ -3120,7 +3120,7 @@ static bool ibss_mesh_can_use_vht(struct const struct wpa_ssid *ssid, struct hostapd_hw_modes *mode) { @@ -56,7 +56,7 @@ Subject: [PATCH] Allow HT40 also on 2.4GHz if noscan option is set, which also return false; if (!drv_supports_vht(wpa_s, ssid)) -@@ -3193,7 +3193,7 @@ static void ibss_mesh_select_40mhz(struc +@@ -3194,7 +3194,7 @@ static void ibss_mesh_select_40mhz(struc int i, res; unsigned int j; static const int ht40plus_5ghz[] = { @@ -65,7 +65,7 @@ Subject: [PATCH] Allow HT40 also on 2.4GHz if noscan option is set, which also 149, 157, 165, 173, 184, 192 }; static const int ht40plus_6ghz[] = { -@@ -3546,7 +3546,7 @@ void ibss_mesh_setup_freq(struct wpa_sup +@@ -3547,7 +3547,7 @@ void ibss_mesh_setup_freq(struct wpa_sup int ieee80211_mode = wpas_mode_to_ieee80211_mode(ssid->mode); enum hostapd_hw_mode hw_mode; struct hostapd_hw_modes *mode = NULL; @@ -74,7 +74,7 @@ Subject: [PATCH] Allow HT40 also on 2.4GHz if noscan option is set, which also u8 channel; bool is_6ghz, is_24ghz; bool dfs_enabled = wpa_s->conf->country[0] && (wpa_s->drv_flags & WPA_DRIVER_FLAGS_RADAR); -@@ -3590,6 +3590,8 @@ void ibss_mesh_setup_freq(struct wpa_sup +@@ -3591,6 +3591,8 @@ void ibss_mesh_setup_freq(struct wpa_sup freq->he_enabled = ibss_mesh_can_use_he(wpa_s, ssid, mode, ieee80211_mode); freq->channel = channel; diff --git a/package/network/services/hostapd/patches/310-rescan_immediately.patch b/package/network/services/hostapd/patches/310-rescan_immediately.patch index 275db9dd6b..14bf064def 100644 --- a/package/network/services/hostapd/patches/310-rescan_immediately.patch +++ b/package/network/services/hostapd/patches/310-rescan_immediately.patch @@ -5,7 +5,7 @@ Subject: [PATCH] rescan_immediately.patch --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -6480,7 +6480,7 @@ wpa_supplicant_alloc(struct wpa_supplica +@@ -6481,7 +6481,7 @@ wpa_supplicant_alloc(struct wpa_supplica if (wpa_s == NULL) return NULL; wpa_s->scan_req = INITIAL_SCAN_REQ; diff --git a/package/network/services/hostapd/patches/370-preserve_radio_mask.patch b/package/network/services/hostapd/patches/370-preserve_radio_mask.patch index 7582fe1abe..c933208ba2 100644 --- a/package/network/services/hostapd/patches/370-preserve_radio_mask.patch +++ b/package/network/services/hostapd/patches/370-preserve_radio_mask.patch @@ -67,7 +67,7 @@ if (drv->capa.flags2 & WPA_DRIVER_FLAGS2_CONTROL_PORT_TX_STATUS) { drv->control_port_ap = 1; goto skip_wifi_status; -@@ -6529,7 +6549,7 @@ const char * nl80211_iftype_str(enum nl8 +@@ -6531,7 +6551,7 @@ const char * nl80211_iftype_str(enum nl8 static int nl80211_create_iface_once(struct wpa_driver_nl80211_data *drv, const char *ifname, enum nl80211_iftype iftype, @@ -76,7 +76,7 @@ int (*handler)(struct nl_msg *, void *), void *arg) { -@@ -6549,6 +6569,10 @@ static int nl80211_create_iface_once(str +@@ -6551,6 +6571,10 @@ static int nl80211_create_iface_once(str if (wds && nla_put_u8(msg, NL80211_ATTR_4ADDR, wds)) goto fail; @@ -87,7 +87,7 @@ /* * Tell cfg80211 that the interface belongs to the socket that created * it, and the interface should be deleted when the socket is closed. -@@ -6641,14 +6665,14 @@ static int nl80211_create_iface_once(str +@@ -6643,14 +6667,14 @@ static int nl80211_create_iface_once(str int nl80211_create_iface(struct wpa_driver_nl80211_data *drv, const char *ifname, enum nl80211_iftype iftype, @@ -105,7 +105,7 @@ /* if error occurred and interface exists already */ if (ret < 0 && if_nametoindex(ifname)) { -@@ -6674,7 +6698,7 @@ int nl80211_create_iface(struct wpa_driv +@@ -6676,7 +6700,7 @@ int nl80211_create_iface(struct wpa_driv /* Try to create the interface again */ ret = nl80211_create_iface_once(drv, ifname, iftype, addr, @@ -114,7 +114,7 @@ } if (ret >= 0 && is_p2p_net_interface(iftype)) { -@@ -9010,8 +9034,8 @@ static int i802_set_wds_sta(void *priv, +@@ -9012,8 +9036,8 @@ static int i802_set_wds_sta(void *priv, if (!if_nametoindex(name)) { if (nl80211_create_iface(drv, name, NL80211_IFTYPE_AP_VLAN, @@ -125,7 +125,7 @@ return -1; if (bridge_ifname) -@@ -9384,7 +9408,8 @@ static int wpa_driver_nl80211_if_add(voi +@@ -9386,7 +9410,8 @@ static int wpa_driver_nl80211_if_add(voi os_memset(&nonnetdev_info, 0, sizeof(nonnetdev_info)); ifidx = nl80211_create_iface(drv, ifname, nlmode, addr, @@ -135,7 +135,7 @@ &nonnetdev_info, use_existing); if (!nonnetdev_info.wdev_id_set || ifidx != 0) { wpa_printf(MSG_ERROR, -@@ -9403,7 +9428,8 @@ static int wpa_driver_nl80211_if_add(voi +@@ -9405,7 +9430,8 @@ static int wpa_driver_nl80211_if_add(voi (long long unsigned int) nonnetdev_info.wdev_id); } else { ifidx = nl80211_create_iface(drv, ifname, nlmode, addr, @@ -145,7 +145,7 @@ if (use_existing && ifidx == -ENFILE) { added = 0; ifidx = if_nametoindex(ifname); -@@ -9473,6 +9499,8 @@ static int wpa_driver_nl80211_if_add(voi +@@ -9475,6 +9501,8 @@ static int wpa_driver_nl80211_if_add(voi new_bss->ctx = bss_ctx; new_bss->added_if = added; diff --git a/package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch b/package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch index 3da64b0e91..949b0ef4b5 100644 --- a/package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch +++ b/package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch @@ -34,7 +34,7 @@ Signed-hostap: Antonio Quartulli #include "config.h" -@@ -2498,6 +2499,97 @@ static char * wpa_config_write_mac_value +@@ -2561,6 +2562,97 @@ static char * wpa_config_write_mac_value #endif /* NO_CONFIG_WRITE */ @@ -132,7 +132,7 @@ Signed-hostap: Antonio Quartulli /* Helper macros for network block parser */ #ifdef OFFSET -@@ -2794,6 +2886,8 @@ static const struct parse_data ssid_fiel +@@ -2871,6 +2963,8 @@ static const struct parse_data ssid_fiel { INT(ap_max_inactivity) }, { INT(dtim_period) }, { INT(beacon_int) }, @@ -155,7 +155,7 @@ Signed-hostap: Antonio Quartulli * macsec_policy - Determines the policy for MACsec secure session --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -4758,6 +4758,12 @@ static void wpas_start_assoc_cb(struct w +@@ -4759,6 +4759,12 @@ static void wpas_start_assoc_cb(struct w params.beacon_int = ssid->beacon_int; else params.beacon_int = wpa_s->conf->beacon_int; diff --git a/package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch b/package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch index 110429774d..69ceec1c0d 100644 --- a/package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch +++ b/package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch @@ -29,7 +29,7 @@ Tested-by: Simon Wunderlich struct wpa_driver_set_key_params { --- a/src/drivers/driver_nl80211.c +++ b/src/drivers/driver_nl80211.c -@@ -12716,6 +12716,18 @@ static int nl80211_put_mesh_id(struct nl +@@ -12718,6 +12718,18 @@ static int nl80211_put_mesh_id(struct nl } @@ -48,7 +48,7 @@ Tested-by: Simon Wunderlich static int nl80211_put_mesh_config(struct nl_msg *msg, struct wpa_driver_mesh_bss_params *params) { -@@ -12777,6 +12789,7 @@ static int nl80211_join_mesh(struct i802 +@@ -12779,6 +12791,7 @@ static int nl80211_join_mesh(struct i802 nl80211_put_basic_rates(msg, params->basic_rates) || nl80211_put_mesh_id(msg, params->meshid, params->meshid_len) || nl80211_put_beacon_int(msg, params->beacon_int) || diff --git a/package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch b/package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch index df361233a3..7f9c6fdeb8 100644 --- a/package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch +++ b/package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch @@ -5,7 +5,7 @@ Subject: [PATCH] Fix issues with disabling obss scan when using fixed_freq on --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -3553,6 +3553,10 @@ void ibss_mesh_setup_freq(struct wpa_sup +@@ -3554,6 +3554,10 @@ void ibss_mesh_setup_freq(struct wpa_sup freq->freq = ssid->frequency; diff --git a/package/network/services/hostapd/patches/590-rrm-wnm-statistics.patch b/package/network/services/hostapd/patches/590-rrm-wnm-statistics.patch index 6c078bd938..71f9f5772c 100644 --- a/package/network/services/hostapd/patches/590-rrm-wnm-statistics.patch +++ b/package/network/services/hostapd/patches/590-rrm-wnm-statistics.patch @@ -10,7 +10,7 @@ method. --- a/src/ap/hostapd.h +++ b/src/ap/hostapd.h -@@ -189,6 +189,21 @@ struct mld_link_info { +@@ -190,6 +190,21 @@ struct mld_link_info { }; /** @@ -32,7 +32,7 @@ method. * struct hostapd_data - hostapd per-BSS data structure */ struct hostapd_data { -@@ -202,6 +217,9 @@ struct hostapd_data { +@@ -203,6 +218,9 @@ struct hostapd_data { u8 own_addr[ETH_ALEN]; diff --git a/package/network/services/hostapd/patches/600-ubus_support.patch b/package/network/services/hostapd/patches/600-ubus_support.patch index b6dd03ce99..675993b433 100644 --- a/package/network/services/hostapd/patches/600-ubus_support.patch +++ b/package/network/services/hostapd/patches/600-ubus_support.patch @@ -143,7 +143,7 @@ probe/assoc/auth requests via object subscribe. return 0; } -@@ -2578,6 +2581,7 @@ static int hostapd_setup_interface_compl +@@ -2581,6 +2584,7 @@ static int hostapd_setup_interface_compl if (err) goto fail; @@ -151,7 +151,7 @@ probe/assoc/auth requests via object subscribe. wpa_printf(MSG_DEBUG, "Completing interface initialization"); if (iface->freq) { #ifdef NEED_AP_MLME -@@ -2792,6 +2796,7 @@ dfs_offload: +@@ -2795,6 +2799,7 @@ dfs_offload: fail: wpa_printf(MSG_ERROR, "Interface initialization failed"); @@ -159,7 +159,7 @@ probe/assoc/auth requests via object subscribe. if (iface->is_no_ir) { hostapd_set_state(iface, HAPD_IFACE_NO_IR); -@@ -3541,6 +3546,7 @@ void hostapd_interface_deinit_free(struc +@@ -3544,6 +3549,7 @@ void hostapd_interface_deinit_free(struc (unsigned int) iface->conf->num_bss); driver = iface->bss[0]->driver; drv_priv = iface->bss[0]->drv_priv; @@ -177,7 +177,7 @@ probe/assoc/auth requests via object subscribe. #define OCE_STA_CFON_ENABLED(hapd) \ ((hapd->conf->oce & OCE_STA_CFON) && \ -@@ -210,6 +211,7 @@ struct hostapd_data { +@@ -211,6 +212,7 @@ struct hostapd_data { struct hostapd_iface *iface; struct hostapd_config *iconf; struct hostapd_bss_config *conf; @@ -185,7 +185,7 @@ probe/assoc/auth requests via object subscribe. int interface_added; /* virtual interface added for this BSS */ unsigned int started:1; unsigned int disabled:1; -@@ -785,6 +787,7 @@ hostapd_alloc_bss_data(struct hostapd_if +@@ -793,6 +795,7 @@ hostapd_alloc_bss_data(struct hostapd_if struct hostapd_bss_config *bss); int hostapd_setup_interface(struct hostapd_iface *iface); int hostapd_setup_interface_complete(struct hostapd_iface *iface, int err); @@ -195,7 +195,7 @@ probe/assoc/auth requests via object subscribe. struct hostapd_iface * hostapd_alloc_iface(void); --- a/src/ap/ieee802_11.c +++ b/src/ap/ieee802_11.c -@@ -3376,7 +3376,7 @@ static void handle_auth(struct hostapd_d +@@ -4077,7 +4077,7 @@ static void handle_auth(struct hostapd_d u16 auth_alg, auth_transaction, status_code; u16 resp = WLAN_STATUS_SUCCESS; struct sta_info *sta = NULL; @@ -204,7 +204,7 @@ probe/assoc/auth requests via object subscribe. u16 fc; const u8 *challenge = NULL; u8 resp_ies[2 + WLAN_AUTH_CHALLENGE_LEN]; -@@ -3415,6 +3415,11 @@ static void handle_auth(struct hostapd_d +@@ -4116,6 +4116,11 @@ static void handle_auth(struct hostapd_d else sa = mgmt->sa; #endif /* CONFIG_IEEE80211BE */ @@ -216,7 +216,7 @@ probe/assoc/auth requests via object subscribe. auth_alg = le_to_host16(mgmt->u.auth.auth_alg); auth_transaction = le_to_host16(mgmt->u.auth.auth_transaction); -@@ -3584,6 +3589,13 @@ static void handle_auth(struct hostapd_d +@@ -4306,6 +4311,13 @@ static void handle_auth(struct hostapd_d resp = WLAN_STATUS_UNSPECIFIED_FAILURE; goto fail; } @@ -230,7 +230,7 @@ probe/assoc/auth requests via object subscribe. if (res == HOSTAPD_ACL_PENDING) return; -@@ -6189,7 +6201,7 @@ static void handle_assoc(struct hostapd_ +@@ -6999,7 +7011,7 @@ static void handle_assoc(struct hostapd_ int resp = WLAN_STATUS_SUCCESS; u16 reply_res = WLAN_STATUS_UNSPECIFIED_FAILURE; const u8 *pos; @@ -239,7 +239,7 @@ probe/assoc/auth requests via object subscribe. struct sta_info *sta; u8 *tmp = NULL; #ifdef CONFIG_FILS -@@ -6445,6 +6457,11 @@ static void handle_assoc(struct hostapd_ +@@ -7255,6 +7267,11 @@ static void handle_assoc(struct hostapd_ left = res; } #endif /* CONFIG_FILS */ @@ -251,7 +251,7 @@ probe/assoc/auth requests via object subscribe. /* followed by SSID and Supported rates; and HT capabilities if 802.11n * is used */ -@@ -6537,6 +6554,7 @@ static void handle_assoc(struct hostapd_ +@@ -7347,6 +7364,7 @@ static void handle_assoc(struct hostapd_ #ifdef CONFIG_TAXONOMY taxonomy_sta_info_assoc_req(hapd, sta, pos, left); @@ -259,7 +259,7 @@ probe/assoc/auth requests via object subscribe. #endif /* CONFIG_TAXONOMY */ sta->pending_wds_enable = 0; -@@ -6550,6 +6568,13 @@ static void handle_assoc(struct hostapd_ +@@ -7360,6 +7378,13 @@ static void handle_assoc(struct hostapd_ } #endif /* CONFIG_FILS */ @@ -273,7 +273,7 @@ probe/assoc/auth requests via object subscribe. fail: /* -@@ -6788,6 +6813,7 @@ static void handle_disassoc(struct hosta +@@ -7598,6 +7623,7 @@ static void handle_disassoc(struct hosta (unsigned long) len); return; } @@ -281,7 +281,7 @@ probe/assoc/auth requests via object subscribe. sta = ap_get_sta(hapd, mgmt->sa); if (!sta) { -@@ -6819,6 +6845,8 @@ static void handle_deauth(struct hostapd +@@ -7629,6 +7655,8 @@ static void handle_deauth(struct hostapd /* Clear the PTKSA cache entries for PASN */ ptksa_cache_flush(hapd->ptksa, mgmt->sa, WPA_CIPHER_NONE); @@ -313,7 +313,7 @@ probe/assoc/auth requests via object subscribe. wpa_printf(MSG_DEBUG, "RRM action %u is not supported", --- a/src/ap/sta_info.c +++ b/src/ap/sta_info.c -@@ -603,6 +603,7 @@ void ap_handle_timer(void *eloop_ctx, vo +@@ -609,6 +609,7 @@ void ap_handle_timer(void *eloop_ctx, vo hostapd_logger(hapd, sta->addr, HOSTAPD_MODULE_IEEE80211, HOSTAPD_LEVEL_INFO, "deauthenticated due to " "local deauth request"); @@ -321,7 +321,7 @@ probe/assoc/auth requests via object subscribe. ap_free_sta(hapd, sta); return; } -@@ -771,6 +772,7 @@ skip_poll: +@@ -777,6 +778,7 @@ skip_poll: mlme_deauthenticate_indication( hapd, sta, WLAN_REASON_PREV_AUTH_NOT_VALID); @@ -329,7 +329,7 @@ probe/assoc/auth requests via object subscribe. ap_free_sta(hapd, sta); break; } -@@ -1772,17 +1774,30 @@ void ap_sta_set_authorized_event(struct +@@ -1778,17 +1780,30 @@ void ap_sta_set_authorized_event(struct os_snprintf(buf, sizeof(buf), MACSTR, MAC2STR(sta->addr)); if (authorized) { @@ -360,7 +360,7 @@ probe/assoc/auth requests via object subscribe. #ifdef CONFIG_P2P if (wpa_auth_get_ip_addr(sta->wpa_sm, ip_addr_buf) == 0) { -@@ -1794,6 +1809,13 @@ void ap_sta_set_authorized_event(struct +@@ -1800,6 +1815,13 @@ void ap_sta_set_authorized_event(struct } #endif /* CONFIG_P2P */ @@ -374,7 +374,7 @@ probe/assoc/auth requests via object subscribe. keyid = ap_sta_wpa_get_keyid(hapd, sta); if (keyid) { os_snprintf(keyid_buf, sizeof(keyid_buf), -@@ -1818,17 +1840,19 @@ void ap_sta_set_authorized_event(struct +@@ -1824,17 +1846,19 @@ void ap_sta_set_authorized_event(struct " vlanid=%u", sta->vlan_id); #endif /* CONFIG_NO_VLAN */ @@ -400,7 +400,7 @@ probe/assoc/auth requests via object subscribe. hapd->msg_ctx_parent != hapd->msg_ctx) --- a/src/ap/sta_info.h +++ b/src/ap/sta_info.h -@@ -265,6 +265,7 @@ struct sta_info { +@@ -284,6 +284,7 @@ struct sta_info { #ifdef CONFIG_TAXONOMY struct wpabuf *probe_ie_taxonomy; struct wpabuf *assoc_ie_taxonomy; @@ -408,7 +408,7 @@ probe/assoc/auth requests via object subscribe. #endif /* CONFIG_TAXONOMY */ #ifdef CONFIG_FILS -@@ -312,6 +313,7 @@ struct sta_info { +@@ -331,6 +332,7 @@ struct sta_info { #endif /* CONFIG_TESTING_OPTIONS */ #ifdef CONFIG_AIRTIME_POLICY unsigned int airtime_weight; diff --git a/package/network/services/hostapd/patches/601-ucode_support.patch b/package/network/services/hostapd/patches/601-ucode_support.patch index f03100f905..7a8c7b898b 100644 --- a/package/network/services/hostapd/patches/601-ucode_support.patch +++ b/package/network/services/hostapd/patches/601-ucode_support.patch @@ -8,7 +8,7 @@ as adding/removing interfaces. --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -1266,6 +1266,7 @@ void wpa_supplicant_set_state(struct wpa +@@ -1267,6 +1267,7 @@ void wpa_supplicant_set_state(struct wpa sme_sched_obss_scan(wpa_s, 0); } wpa_s->wpa_state = state; @@ -16,7 +16,7 @@ as adding/removing interfaces. #ifndef CONFIG_NO_ROBUST_AV if (state == WPA_COMPLETED && dl_list_len(&wpa_s->active_scs_ids) && -@@ -8386,6 +8387,8 @@ struct wpa_supplicant * wpa_supplicant_a +@@ -8392,6 +8393,8 @@ struct wpa_supplicant * wpa_supplicant_a } #endif /* CONFIG_P2P */ @@ -25,7 +25,7 @@ as adding/removing interfaces. return wpa_s; } -@@ -8412,6 +8415,8 @@ int wpa_supplicant_remove_iface(struct w +@@ -8418,6 +8421,8 @@ int wpa_supplicant_remove_iface(struct w struct wpa_supplicant *parent = wpa_s->parent; #endif /* CONFIG_MESH */ @@ -34,7 +34,7 @@ as adding/removing interfaces. /* Remove interface from the global list of interfaces */ prev = global->ifaces; if (prev == wpa_s) { -@@ -8731,6 +8736,7 @@ struct wpa_global * wpa_supplicant_init( +@@ -8737,6 +8742,7 @@ struct wpa_global * wpa_supplicant_init( eloop_register_timeout(WPA_SUPPLICANT_CLEANUP_INTERVAL, 0, wpas_periodic, global, NULL); @@ -42,7 +42,7 @@ as adding/removing interfaces. return global; } -@@ -8803,6 +8809,8 @@ void wpa_supplicant_deinit(struct wpa_gl +@@ -8809,6 +8815,8 @@ void wpa_supplicant_deinit(struct wpa_gl wpas_notify_supplicant_deinitialized(global); @@ -68,7 +68,7 @@ as adding/removing interfaces. extern const char *const wpa_supplicant_version; extern const char *const wpa_supplicant_license; -@@ -718,6 +720,7 @@ struct wpa_supplicant { +@@ -756,6 +758,7 @@ struct wpa_supplicant { unsigned char own_addr[ETH_ALEN]; unsigned char perm_addr[ETH_ALEN]; char ifname[100]; @@ -76,7 +76,7 @@ as adding/removing interfaces. u8 hw_dfs_domain; #ifdef CONFIG_MATCH_IFACE int matched; -@@ -1595,6 +1598,8 @@ struct wpa_supplicant { +@@ -1633,6 +1636,8 @@ struct wpa_supplicant { unsigned int enabled_4addr_mode:1; unsigned int multi_bss_support:1; unsigned int drv_authorized_port:1; @@ -332,7 +332,7 @@ as adding/removing interfaces. if (conf->wmm_enabled < 0) conf->wmm_enabled = hapd->iconf->ieee80211n | hapd->iconf->ieee80211ax; -@@ -1867,7 +1879,7 @@ int hostapd_set_acl(struct hostapd_data +@@ -1870,7 +1882,7 @@ int hostapd_set_acl(struct hostapd_data } @@ -341,7 +341,7 @@ as adding/removing interfaces. { #ifdef CONFIG_IEEE80211BE int ret; -@@ -2540,7 +2552,7 @@ static int hostapd_owe_iface_iter2(struc +@@ -2543,7 +2555,7 @@ static int hostapd_owe_iface_iter2(struc #endif /* CONFIG_OWE */ @@ -350,7 +350,7 @@ as adding/removing interfaces. { #ifdef CONFIG_OWE /* Check whether the enabled BSS can complete OWE transition mode -@@ -2997,7 +3009,7 @@ hostapd_alloc_bss_data(struct hostapd_if +@@ -3000,7 +3012,7 @@ hostapd_alloc_bss_data(struct hostapd_if } @@ -359,7 +359,7 @@ as adding/removing interfaces. { if (!hapd) return; -@@ -3205,7 +3217,7 @@ fail: +@@ -3208,7 +3220,7 @@ fail: } @@ -368,7 +368,7 @@ as adding/removing interfaces. { #ifdef CONFIG_IEEE80211BE struct hostapd_mld *mld, **all_mld; -@@ -4086,7 +4098,8 @@ int hostapd_remove_iface(struct hapd_int +@@ -4089,7 +4101,8 @@ int hostapd_remove_iface(struct hapd_int hapd_iface = interfaces->iface[i]; if (hapd_iface == NULL) return -1; @@ -388,7 +388,7 @@ as adding/removing interfaces. #define OCE_STA_CFON_ENABLED(hapd) \ ((hapd->conf->oce & OCE_STA_CFON) && \ -@@ -52,6 +53,10 @@ struct hapd_interfaces { +@@ -53,6 +54,10 @@ struct hapd_interfaces { struct hostapd_config * (*config_read_cb)(const char *config_fname); int (*ctrl_iface_init)(struct hostapd_data *hapd); void (*ctrl_iface_deinit)(struct hostapd_data *hapd); @@ -399,7 +399,7 @@ as adding/removing interfaces. int (*for_each_interface)(struct hapd_interfaces *interfaces, int (*cb)(struct hostapd_iface *iface, void *ctx), void *ctx); -@@ -212,6 +217,7 @@ struct hostapd_data { +@@ -213,6 +218,7 @@ struct hostapd_data { struct hostapd_config *iconf; struct hostapd_bss_config *conf; struct hostapd_ubus_bss ubus; @@ -407,7 +407,7 @@ as adding/removing interfaces. int interface_added; /* virtual interface added for this BSS */ unsigned int started:1; unsigned int disabled:1; -@@ -587,6 +593,7 @@ struct hostapd_mld { +@@ -595,6 +601,7 @@ struct hostapd_mld { */ struct hostapd_iface { struct hapd_interfaces *interfaces; @@ -415,7 +415,7 @@ as adding/removing interfaces. void *owner; char *config_fname; struct hostapd_config *conf; -@@ -796,11 +803,16 @@ struct hostapd_iface * hostapd_init(stru +@@ -804,11 +811,16 @@ struct hostapd_iface * hostapd_init(stru struct hostapd_iface * hostapd_interface_init_bss(struct hapd_interfaces *interfaces, const char *phy, const char *config_fname, int debug); @@ -432,7 +432,7 @@ as adding/removing interfaces. int hostapd_enable_iface(struct hostapd_iface *hapd_iface); int hostapd_reload_iface(struct hostapd_iface *hapd_iface); int hostapd_reload_bss_only(struct hostapd_data *bss); -@@ -826,6 +838,7 @@ hostapd_switch_channel_fallback(struct h +@@ -834,6 +846,7 @@ hostapd_switch_channel_fallback(struct h void hostapd_cleanup_cs_params(struct hostapd_data *hapd); void hostapd_periodic_iface(struct hostapd_iface *iface); int hostapd_owe_trans_get_info(struct hostapd_data *hapd); @@ -442,7 +442,7 @@ as adding/removing interfaces. void hostapd_switch_color(struct hostapd_data *hapd, u64 bitmap); --- a/src/ap/ieee802_11.c +++ b/src/ap/ieee802_11.c -@@ -668,12 +668,17 @@ const char * sae_get_password(struct hos +@@ -763,12 +763,17 @@ const char * sae_get_password(struct hos struct sae_pt **s_pt, const struct sae_pk **s_pk) { @@ -461,7 +461,7 @@ as adding/removing interfaces. /* With sae_track_password functionality enabled, try to first find the * next viable wildcard-address password if a password identifier was * not used. Select an wildcard-addr entry if the STA is known to have -@@ -735,12 +740,30 @@ const char * sae_get_password(struct hos +@@ -830,12 +835,30 @@ const char * sae_get_password(struct hos pt = hapd->conf->ssid.pt; } @@ -494,7 +494,7 @@ as adding/removing interfaces. } } -@@ -3744,6 +3767,12 @@ static void handle_auth(struct hostapd_d +@@ -4466,6 +4489,12 @@ static void handle_auth(struct hostapd_d goto fail; } @@ -509,9 +509,9 @@ as adding/removing interfaces. --- a/src/ap/sta_info.c +++ b/src/ap/sta_info.c -@@ -535,6 +535,11 @@ void ap_free_sta(struct hostapd_data *ha - - wpabuf_free(sta->sae_pw_id); +@@ -541,6 +541,11 @@ void ap_free_sta(struct hostapd_data *ha + os_free(sta->eap_auth_data.rsnxe); + #endif /* CONFIG_IEEE8021X_AUTH */ +#ifdef CONFIG_SAE + if (sta->sae_pt) @@ -521,7 +521,7 @@ as adding/removing interfaces. os_free(sta); } -@@ -1758,6 +1763,8 @@ void ap_sta_set_authorized_event(struct +@@ -1764,6 +1769,8 @@ void ap_sta_set_authorized_event(struct #endif /* CONFIG_P2P */ const u8 *ip_ptr = NULL; @@ -532,7 +532,7 @@ as adding/removing interfaces. if (sta->p2p_ie != NULL && --- a/src/ap/sta_info.h +++ b/src/ap/sta_info.h -@@ -190,6 +190,9 @@ struct sta_info { +@@ -209,6 +209,9 @@ struct sta_info { int vlan_id_bound; /* updated by ap_sta_bind_vlan() */ /* PSKs from RADIUS authentication server */ struct hostapd_sta_wpa_psk_short *psk; @@ -588,7 +588,7 @@ as adding/removing interfaces. } --- a/src/drivers/driver.h +++ b/src/drivers/driver.h -@@ -4174,6 +4174,25 @@ struct wpa_driver_ops { +@@ -4176,6 +4176,25 @@ struct wpa_driver_ops { const char *ifname); /** @@ -614,7 +614,7 @@ as adding/removing interfaces. * set_sta_vlan - Bind a station into a specific interface (AP only) * @priv: Private driver interface data * @ifname: Interface (main or virtual BSS or VLAN) -@@ -7023,6 +7042,7 @@ union wpa_event_data { +@@ -7027,6 +7046,7 @@ union wpa_event_data { /** * struct ch_switch @@ -622,7 +622,7 @@ as adding/removing interfaces. * @freq: Frequency of new channel in MHz * @ht_enabled: Whether this is an HT channel * @ch_offset: Secondary channel offset -@@ -7033,6 +7053,7 @@ union wpa_event_data { +@@ -7037,6 +7057,7 @@ union wpa_event_data { * @punct_bitmap: Puncturing bitmap */ struct ch_switch { @@ -702,7 +702,7 @@ as adding/removing interfaces. nl_cb_set(bss->nl_cb, NL_CB_SEQ_CHECK, NL_CB_CUSTOM, no_seq_check, NULL); nl_cb_set(bss->nl_cb, NL_CB_VALID, NL_CB_CUSTOM, -@@ -9178,6 +9199,7 @@ static void *i802_init(struct hostapd_da +@@ -9180,6 +9201,7 @@ static void *i802_init(struct hostapd_da char master_ifname[IFNAMSIZ]; int ifindex, br_ifindex = 0; int br_added = 0; @@ -710,7 +710,7 @@ as adding/removing interfaces. bss = wpa_driver_nl80211_drv_init(hapd, params->ifname, params->global_priv, 1, -@@ -9238,21 +9260,17 @@ static void *i802_init(struct hostapd_da +@@ -9240,21 +9262,17 @@ static void *i802_init(struct hostapd_da (params->num_bridge == 0 || !params->bridge[0])) add_ifidx(drv, br_ifindex, drv->ifindex); @@ -742,7 +742,7 @@ as adding/removing interfaces. } if (drv->capa.flags2 & WPA_DRIVER_FLAGS2_CONTROL_PORT_RX) { -@@ -9639,6 +9657,50 @@ static int wpa_driver_nl80211_if_remove( +@@ -9641,6 +9659,50 @@ static int wpa_driver_nl80211_if_remove( return 0; } @@ -793,7 +793,7 @@ as adding/removing interfaces. static int cookie_handler(struct nl_msg *msg, void *arg) { -@@ -11538,6 +11600,37 @@ static bool nl80211_is_drv_shared(void * +@@ -11540,6 +11602,37 @@ static bool nl80211_is_drv_shared(void * #endif /* CONFIG_IEEE80211BE */ @@ -831,7 +831,7 @@ as adding/removing interfaces. static int driver_nl80211_send_mlme(void *priv, const u8 *data, size_t data_len, int noack, unsigned int freq, -@@ -15544,6 +15637,8 @@ const struct wpa_driver_ops wpa_driver_n +@@ -15546,6 +15639,8 @@ const struct wpa_driver_ops wpa_driver_n .set_acl = wpa_driver_nl80211_set_acl, .if_add = wpa_driver_nl80211_if_add, .if_remove = driver_nl80211_if_remove, @@ -842,7 +842,7 @@ as adding/removing interfaces. .sta_add = wpa_driver_nl80211_sta_add, --- a/src/drivers/driver_nl80211_event.c +++ b/src/drivers/driver_nl80211_event.c -@@ -1261,6 +1261,7 @@ static void mlme_event_ch_switch(struct +@@ -1263,6 +1263,7 @@ static void mlme_event_ch_switch(struct struct nlattr *bw, struct nlattr *cf1, struct nlattr *cf2, struct nlattr *punct_bitmap, @@ -850,7 +850,7 @@ as adding/removing interfaces. int finished) { struct i802_bss *bss; -@@ -1326,6 +1327,8 @@ static void mlme_event_ch_switch(struct +@@ -1328,6 +1329,8 @@ static void mlme_event_ch_switch(struct data.ch_switch.cf1 = nla_get_u32(cf1); if (cf2) data.ch_switch.cf2 = nla_get_u32(cf2); @@ -859,7 +859,7 @@ as adding/removing interfaces. if (link) { data.ch_switch.link_id = nla_get_u8(link); -@@ -4421,6 +4424,7 @@ static void do_process_drv_event(struct +@@ -4423,6 +4426,7 @@ static void do_process_drv_event(struct tb[NL80211_ATTR_CENTER_FREQ1], tb[NL80211_ATTR_CENTER_FREQ2], tb[NL80211_ATTR_PUNCT_BITMAP], @@ -867,7 +867,7 @@ as adding/removing interfaces. 0); break; case NL80211_CMD_CH_SWITCH_NOTIFY: -@@ -4433,6 +4437,7 @@ static void do_process_drv_event(struct +@@ -4435,6 +4439,7 @@ static void do_process_drv_event(struct tb[NL80211_ATTR_CENTER_FREQ1], tb[NL80211_ATTR_CENTER_FREQ2], tb[NL80211_ATTR_PUNCT_BITMAP], @@ -941,7 +941,7 @@ as adding/removing interfaces. ifdef CONFIG_CODE_COVERAGE CFLAGS += -O0 -fprofile-arcs -ftest-coverage -U_FORTIFY_SOURCE LIBS += -lgcov -@@ -1077,6 +1085,9 @@ ifdef CONFIG_CTRL_IFACE_MIB +@@ -1082,6 +1090,9 @@ ifdef CONFIG_CTRL_IFACE_MIB CFLAGS += -DCONFIG_CTRL_IFACE_MIB endif OBJS += ../src/ap/ctrl_iface_ap.o @@ -1001,7 +1001,7 @@ as adding/removing interfaces. MULTI_AP_FRONTHAUL_BSS); wpa_s->multi_ap_ie = 1; } -@@ -5848,6 +5855,13 @@ static void wpas_event_rx_mgmt_action(st +@@ -5857,6 +5864,13 @@ static void wpas_event_rx_mgmt_action(st } #endif /* CONFIG_WNM */ @@ -1015,7 +1015,7 @@ as adding/removing interfaces. #ifdef CONFIG_GAS if ((mgmt->u.action.category == WLAN_ACTION_PUBLIC || mgmt->u.action.category == WLAN_ACTION_PROTECTED_DUAL) && -@@ -6654,6 +6668,7 @@ void supplicant_event(void *ctx, enum wp +@@ -6663,6 +6677,7 @@ void supplicant_event(void *ctx, enum wp event_to_string(event), event); #endif /* CONFIG_NO_STDOUT_DEBUG */ diff --git a/package/network/services/hostapd/patches/701-reload_config_inline.patch b/package/network/services/hostapd/patches/701-reload_config_inline.patch index 0efd3e2db0..86ee0e4952 100644 --- a/package/network/services/hostapd/patches/701-reload_config_inline.patch +++ b/package/network/services/hostapd/patches/701-reload_config_inline.patch @@ -58,7 +58,7 @@ as adding/removing interfaces. return NULL; --- a/src/ap/hostapd.c +++ b/src/ap/hostapd.c -@@ -3410,8 +3410,13 @@ hostapd_interface_init_bss(struct hapd_i +@@ -3413,8 +3413,13 @@ hostapd_interface_init_bss(struct hapd_i } } diff --git a/package/network/services/hostapd/patches/720-iface_max_num_sta.patch b/package/network/services/hostapd/patches/720-iface_max_num_sta.patch index b09115ed59..2817c2a114 100644 --- a/package/network/services/hostapd/patches/720-iface_max_num_sta.patch +++ b/package/network/services/hostapd/patches/720-iface_max_num_sta.patch @@ -79,7 +79,7 @@ full device, e.g. in order to deal with hardware/driver limitations { --- a/src/ap/hostapd.h +++ b/src/ap/hostapd.h -@@ -840,6 +840,7 @@ void hostapd_periodic_iface(struct hosta +@@ -848,6 +848,7 @@ void hostapd_periodic_iface(struct hosta int hostapd_owe_trans_get_info(struct hostapd_data *hapd); void hostapd_owe_update_trans(struct hostapd_iface *iface);; void hostapd_ocv_check_csa_sa_query(void *eloop_ctx, void *timeout_ctx); diff --git a/package/network/services/hostapd/patches/740-snoop_iface.patch b/package/network/services/hostapd/patches/740-snoop_iface.patch index eecdbe9f85..3a372e63d7 100644 --- a/package/network/services/hostapd/patches/740-snoop_iface.patch +++ b/package/network/services/hostapd/patches/740-snoop_iface.patch @@ -112,7 +112,7 @@ untagged DHCP packets hapd->x_snoop_initialized = false; --- a/src/drivers/driver.h +++ b/src/drivers/driver.h -@@ -4588,7 +4588,7 @@ struct wpa_driver_ops { +@@ -4590,7 +4590,7 @@ struct wpa_driver_ops { * Returns: 0 on success, negative (<0) on failure */ int (*br_set_net_param)(void *priv, enum drv_br_net_param param, @@ -123,7 +123,7 @@ untagged DHCP packets * get_wowlan - Get wake-on-wireless status --- a/src/drivers/driver_nl80211.c +++ b/src/drivers/driver_nl80211.c -@@ -13236,7 +13236,7 @@ static const char * drv_br_net_param_str +@@ -13238,7 +13238,7 @@ static const char * drv_br_net_param_str static int wpa_driver_br_set_net_param(void *priv, enum drv_br_net_param param, @@ -132,7 +132,7 @@ untagged DHCP packets { struct i802_bss *bss = priv; char path[128]; -@@ -13262,8 +13262,11 @@ static int wpa_driver_br_set_net_param(v +@@ -13264,8 +13264,11 @@ static int wpa_driver_br_set_net_param(v return -EINVAL; } diff --git a/package/network/services/hostapd/patches/763-radius-wispr.patch b/package/network/services/hostapd/patches/763-radius-wispr.patch index b2fe10d6c8..8de45ae1cc 100644 --- a/package/network/services/hostapd/patches/763-radius-wispr.patch +++ b/package/network/services/hostapd/patches/763-radius-wispr.patch @@ -1,6 +1,6 @@ --- a/src/ap/ieee802_1x.c +++ b/src/ap/ieee802_1x.c -@@ -2005,6 +2005,25 @@ static int ieee802_1x_update_vlan(struct +@@ -2021,6 +2021,25 @@ static int ieee802_1x_update_vlan(struct } #endif /* CONFIG_NO_VLAN */ @@ -26,7 +26,7 @@ /** * ieee802_1x_receive_auth - Process RADIUS frames from Authentication Server -@@ -2121,6 +2140,7 @@ ieee802_1x_receive_auth(struct radius_ms +@@ -2137,6 +2156,7 @@ ieee802_1x_receive_auth(struct radius_ms ieee802_1x_check_hs20(hapd, sta, msg, session_timeout_set ? (int) session_timeout : -1); @@ -36,7 +36,7 @@ sm->eap_if->aaaFail = true; --- a/src/ap/sta_info.h +++ b/src/ap/sta_info.h -@@ -95,6 +95,7 @@ struct sta_info { +@@ -114,6 +114,7 @@ struct sta_info { u8 supported_rates[WLAN_SUPP_RATES_MAX]; int supported_rates_len; u8 qosinfo; /* Valid when WLAN_STA_WMM is set */ diff --git a/package/network/services/hostapd/patches/780-Implement-APuP-Access-Point-Micro-Peering.patch b/package/network/services/hostapd/patches/780-Implement-APuP-Access-Point-Micro-Peering.patch index 542a1162a8..ae548c54e8 100644 --- a/package/network/services/hostapd/patches/780-Implement-APuP-Access-Point-Micro-Peering.patch +++ b/package/network/services/hostapd/patches/780-Implement-APuP-Access-Point-Micro-Peering.patch @@ -39,7 +39,7 @@ Hotfix-by: Sebastian Gottschall https://github.com/mirror/dd-wrt/commit/0c3001a6 --- a/hostapd/Makefile +++ b/hostapd/Makefile -@@ -1449,6 +1449,11 @@ CFLAGS += -DCONFIG_PROCESS_COORDINATION +@@ -1454,6 +1454,11 @@ CFLAGS += -DCONFIG_PROCESS_COORDINATION OBJS += ../src/common/proc_coord.o endif @@ -373,7 +373,7 @@ Hotfix-by: Sebastian Gottschall https://github.com/mirror/dd-wrt/commit/0c3001a6 #ifdef CONFIG_FILS static struct wpabuf * -@@ -4138,8 +4141,8 @@ static u16 check_multi_ap(struct hostapd +@@ -4868,8 +4871,8 @@ static u16 check_multi_ap(struct hostapd } @@ -384,7 +384,7 @@ Hotfix-by: Sebastian Gottschall https://github.com/mirror/dd-wrt/commit/0c3001a6 { /* Supported rates not used in IEEE 802.11ad/DMG */ if (hapd->iface->current_mode && -@@ -4604,7 +4607,7 @@ static int __check_assoc_ies(struct host +@@ -5337,7 +5340,7 @@ static int __check_assoc_ies(struct host elems->ext_capab_len); if (resp != WLAN_STATUS_SUCCESS) goto out; @@ -393,7 +393,7 @@ Hotfix-by: Sebastian Gottschall https://github.com/mirror/dd-wrt/commit/0c3001a6 if (resp != WLAN_STATUS_SUCCESS) goto out; -@@ -6909,6 +6912,11 @@ static void handle_beacon(struct hostapd +@@ -7719,6 +7722,11 @@ static void handle_beacon(struct hostapd 0); ap_list_process_beacon(hapd->iface, mgmt, &elems, fi); @@ -407,7 +407,7 @@ Hotfix-by: Sebastian Gottschall https://github.com/mirror/dd-wrt/commit/0c3001a6 --- a/src/ap/ieee802_11.h +++ b/src/ap/ieee802_11.h -@@ -145,6 +145,8 @@ int hostapd_process_ml_assoc_req_addr(st +@@ -146,6 +146,8 @@ int hostapd_process_ml_assoc_req_addr(st const u8 *basic_mle, size_t basic_mle_len, u8 *mld_addr); int hostapd_get_aid(struct hostapd_data *hapd, struct sta_info *sta); @@ -418,7 +418,7 @@ Hotfix-by: Sebastian Gottschall https://github.com/mirror/dd-wrt/commit/0c3001a6 u16 copy_sta_vendor_vht(struct hostapd_data *hapd, struct sta_info *sta, --- a/src/drivers/driver.h +++ b/src/drivers/driver.h -@@ -4282,7 +4282,7 @@ struct wpa_driver_ops { +@@ -4284,7 +4284,7 @@ struct wpa_driver_ops { * Returns: 0 on success, -1 on failure */ int (*set_wds_sta)(void *priv, const u8 *addr, int aid, int val, @@ -429,7 +429,7 @@ Hotfix-by: Sebastian Gottschall https://github.com/mirror/dd-wrt/commit/0c3001a6 * send_action - Transmit an Action frame --- a/src/drivers/driver_nl80211.c +++ b/src/drivers/driver_nl80211.c -@@ -9030,25 +9030,15 @@ int nl80211_has_ifidx(struct wpa_driver_ +@@ -9032,25 +9032,15 @@ int nl80211_has_ifidx(struct wpa_driver_ static int i802_set_wds_sta(void *priv, const u8 *addr, int aid, int val, diff --git a/package/network/services/hostapd/patches/803-hostapd-fix-80211be-build.patch b/package/network/services/hostapd/patches/803-hostapd-fix-80211be-build.patch index 82f1cef29f..e3ad5ee40c 100644 --- a/package/network/services/hostapd/patches/803-hostapd-fix-80211be-build.patch +++ b/package/network/services/hostapd/patches/803-hostapd-fix-80211be-build.patch @@ -1,6 +1,6 @@ --- a/src/ap/sta_info.c +++ b/src/ap/sta_info.c -@@ -2166,3 +2166,22 @@ void ap_sta_free_sta_profile(struct mld_ +@@ -2172,3 +2172,22 @@ void ap_sta_free_sta_profile(struct mld_ } } #endif /* CONFIG_IEEE80211BE */ @@ -25,7 +25,7 @@ + --- a/src/ap/sta_info.h +++ b/src/ap/sta_info.h -@@ -430,23 +430,8 @@ int ap_sta_re_add(struct hostapd_data *h +@@ -453,23 +453,8 @@ int ap_sta_re_add(struct hostapd_data *h void ap_free_sta_pasn(struct hostapd_data *hapd, struct sta_info *sta); From a3442aa95c88ac1cecfaaad6e9a67f758a30c95e Mon Sep 17 00:00:00 2001 From: Markus Stockhausen Date: Fri, 3 Apr 2026 09:10:59 +0200 Subject: [PATCH 19/78] realtek: dsa: remove ops structures from family check dsa_switch_ops and phylink_mac_ops do not need to be assigned by a family check. Instead they can be directly linked in the configuration structure. Signed-off-by: Markus Stockhausen Link: https://github.com/openwrt/openwrt/pull/22749 Signed-off-by: Hauke Mehrtens --- .../files-6.18/drivers/net/dsa/rtl83xx/common.c | 17 ++++++----------- .../drivers/net/dsa/rtl83xx/rtl838x.c | 2 ++ .../drivers/net/dsa/rtl83xx/rtl838x.h | 2 ++ .../drivers/net/dsa/rtl83xx/rtl839x.c | 2 ++ .../drivers/net/dsa/rtl83xx/rtl930x.c | 2 ++ .../drivers/net/dsa/rtl83xx/rtl931x.c | 2 ++ 6 files changed, 16 insertions(+), 11 deletions(-) diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/common.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/common.c index 42790a1423..b56c29eaab 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/common.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/common.c @@ -1584,14 +1584,18 @@ static int rtl83xx_sw_probe(struct platform_device *pdev) if (!priv) return -ENOMEM; - priv->ds = devm_kzalloc(dev, sizeof(*priv->ds), GFP_KERNEL); + priv->r = device_get_match_data(&pdev->dev); + priv->ds = devm_kzalloc(dev, sizeof(*priv->ds), GFP_KERNEL); if (!priv->ds) return -ENOMEM; + priv->ds->dev = dev; priv->ds->priv = priv; - priv->ds->ops = &rtldsa_83xx_switch_ops; priv->ds->needs_standalone_vlan_filtering = true; + priv->ds->ops = priv->r->switch_ops; + priv->ds->phylink_mac_ops = priv->r->phylink_mac_ops; + priv->dev = dev; dev_set_drvdata(dev, priv); @@ -1603,35 +1607,26 @@ static int rtl83xx_sw_probe(struct platform_device *pdev) if (err) return err; - priv->r = device_get_match_data(&pdev->dev); priv->family_id = soc_info.family; priv->id = soc_info.id; switch (soc_info.family) { case RTL8380_FAMILY_ID: - priv->ds->ops = &rtldsa_83xx_switch_ops; - priv->ds->phylink_mac_ops = &rtldsa_83xx_phylink_mac_ops; priv->ds->num_lag_ids = 8; priv->l2_bucket_size = 4; priv->n_mst = 64; break; case RTL8390_FAMILY_ID: - priv->ds->ops = &rtldsa_83xx_switch_ops; - priv->ds->phylink_mac_ops = &rtldsa_83xx_phylink_mac_ops; priv->ds->num_lag_ids = 16; priv->l2_bucket_size = 4; priv->n_mst = 256; break; case RTL9300_FAMILY_ID: - priv->ds->ops = &rtldsa_93xx_switch_ops; - priv->ds->phylink_mac_ops = &rtldsa_93xx_phylink_mac_ops; priv->ds->num_lag_ids = 16; sw_w32(0, RTL930X_ST_CTRL); priv->l2_bucket_size = 8; priv->n_mst = 64; break; case RTL9310_FAMILY_ID: - priv->ds->ops = &rtldsa_93xx_switch_ops; - priv->ds->phylink_mac_ops = &rtldsa_93xx_phylink_mac_ops; priv->ds->num_lag_ids = 16; sw_w32(0, RTL931x_ST_CTRL); priv->l2_bucket_size = 8; diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c index a951b046f7..d054eed5e2 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c @@ -1807,6 +1807,8 @@ int rtldsa_83xx_lag_setup_algomask(struct rtl838x_switch_priv *priv, int group, struct netdev_lag_upper_info *info); const struct rtldsa_config rtldsa_838x_cfg = { + .switch_ops = &rtldsa_83xx_switch_ops, + .phylink_mac_ops = &rtldsa_83xx_phylink_mac_ops, .cpu_port = RTL838X_CPU_PORT, .fib_entries = 8192, .mask_port_reg_be = rtl838x_mask_port_reg, diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h index 381141bb0c..dbe4903fdf 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h @@ -1368,6 +1368,8 @@ struct rtldsa_mirror_config { }; struct rtldsa_config { + const struct dsa_switch_ops *switch_ops; + const struct phylink_mac_ops *phylink_mac_ops; void (*mask_port_reg_be)(u64 clear, u64 set, int reg); void (*set_port_reg_be)(u64 set, int reg); u64 (*get_port_reg_be)(int reg); diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c index f1c683d43c..e373a8b0ae 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c @@ -1722,6 +1722,8 @@ int rtldsa_83xx_lag_setup_algomask(struct rtl838x_switch_priv *priv, int group, struct netdev_lag_upper_info *info); const struct rtldsa_config rtldsa_839x_cfg = { + .switch_ops = &rtldsa_83xx_switch_ops, + .phylink_mac_ops = &rtldsa_83xx_phylink_mac_ops, .cpu_port = RTL839X_CPU_PORT, .fib_entries = 16384, .mask_port_reg_be = rtl839x_mask_port_reg_be, diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c index e2fe58b99c..657d7988c8 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c @@ -2793,6 +2793,8 @@ static void rtldsa_930x_qos_init(struct rtl838x_switch_priv *priv) } const struct rtldsa_config rtldsa_930x_cfg = { + .switch_ops = &rtldsa_93xx_switch_ops, + .phylink_mac_ops = &rtldsa_93xx_phylink_mac_ops, .cpu_port = RTL930X_CPU_PORT, .fib_entries = 16384, .mask_port_reg_be = rtl838x_mask_port_reg, diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c index 09f4885bb5..fb81658046 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c @@ -1934,6 +1934,8 @@ static void rtldsa_931x_qos_init(struct rtl838x_switch_priv *priv) } const struct rtldsa_config rtldsa_931x_cfg = { + .switch_ops = &rtldsa_93xx_switch_ops, + .phylink_mac_ops = &rtldsa_93xx_phylink_mac_ops, .cpu_port = RTL931X_CPU_PORT, .fib_entries = 16384, /* TODO: has 32K but code cannot handle that */ .mask_port_reg_be = rtl839x_mask_port_reg_be, From e7738904d8d49a8d42a8a5e1c6d6e6e10e2c0cc6 Mon Sep 17 00:00:00 2001 From: Markus Stockhausen Date: Fri, 3 Apr 2026 09:18:49 +0200 Subject: [PATCH 20/78] realtek: dsa: remove num_lag_ids from family check num_lag_ids is a device specific constant and must therefore live in the configuration structure. Avoid dynamic assignment. Signed-off-by: Markus Stockhausen Link: https://github.com/openwrt/openwrt/pull/22749 Signed-off-by: Hauke Mehrtens --- .../realtek/files-6.18/drivers/net/dsa/rtl83xx/common.c | 5 +---- .../realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c | 1 + .../realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h | 1 + .../realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c | 1 + .../realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c | 1 + .../realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c | 1 + 6 files changed, 6 insertions(+), 4 deletions(-) diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/common.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/common.c index b56c29eaab..c0f0edc441 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/common.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/common.c @@ -1595,6 +1595,7 @@ static int rtl83xx_sw_probe(struct platform_device *pdev) priv->ds->needs_standalone_vlan_filtering = true; priv->ds->ops = priv->r->switch_ops; priv->ds->phylink_mac_ops = priv->r->phylink_mac_ops; + priv->ds->num_lag_ids = priv->r->num_lag_ids; priv->dev = dev; dev_set_drvdata(dev, priv); @@ -1611,23 +1612,19 @@ static int rtl83xx_sw_probe(struct platform_device *pdev) priv->id = soc_info.id; switch (soc_info.family) { case RTL8380_FAMILY_ID: - priv->ds->num_lag_ids = 8; priv->l2_bucket_size = 4; priv->n_mst = 64; break; case RTL8390_FAMILY_ID: - priv->ds->num_lag_ids = 16; priv->l2_bucket_size = 4; priv->n_mst = 256; break; case RTL9300_FAMILY_ID: - priv->ds->num_lag_ids = 16; sw_w32(0, RTL930X_ST_CTRL); priv->l2_bucket_size = 8; priv->n_mst = 64; break; case RTL9310_FAMILY_ID: - priv->ds->num_lag_ids = 16; sw_w32(0, RTL931x_ST_CTRL); priv->l2_bucket_size = 8; priv->n_mst = 128; diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c index d054eed5e2..785ab52bf4 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c @@ -1809,6 +1809,7 @@ int rtldsa_83xx_lag_setup_algomask(struct rtl838x_switch_priv *priv, int group, const struct rtldsa_config rtldsa_838x_cfg = { .switch_ops = &rtldsa_83xx_switch_ops, .phylink_mac_ops = &rtldsa_83xx_phylink_mac_ops, + .num_lag_ids = 8, .cpu_port = RTL838X_CPU_PORT, .fib_entries = 8192, .mask_port_reg_be = rtl838x_mask_port_reg, diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h index dbe4903fdf..aa05ea920e 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h @@ -1414,6 +1414,7 @@ struct rtldsa_config { int imr_glb; int n_counters; int n_pie_blocks; + u8 num_lag_ids; u8 cpu_port; u8 port_ignore; u32 fib_entries; diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c index e373a8b0ae..f88578790a 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c @@ -1724,6 +1724,7 @@ int rtldsa_83xx_lag_setup_algomask(struct rtl838x_switch_priv *priv, int group, const struct rtldsa_config rtldsa_839x_cfg = { .switch_ops = &rtldsa_83xx_switch_ops, .phylink_mac_ops = &rtldsa_83xx_phylink_mac_ops, + .num_lag_ids = 16, .cpu_port = RTL839X_CPU_PORT, .fib_entries = 16384, .mask_port_reg_be = rtl839x_mask_port_reg_be, diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c index 657d7988c8..5b840bf144 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c @@ -2795,6 +2795,7 @@ static void rtldsa_930x_qos_init(struct rtl838x_switch_priv *priv) const struct rtldsa_config rtldsa_930x_cfg = { .switch_ops = &rtldsa_93xx_switch_ops, .phylink_mac_ops = &rtldsa_93xx_phylink_mac_ops, + .num_lag_ids = 16, .cpu_port = RTL930X_CPU_PORT, .fib_entries = 16384, .mask_port_reg_be = rtl838x_mask_port_reg, diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c index fb81658046..e3433556bd 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c @@ -1936,6 +1936,7 @@ static void rtldsa_931x_qos_init(struct rtl838x_switch_priv *priv) const struct rtldsa_config rtldsa_931x_cfg = { .switch_ops = &rtldsa_93xx_switch_ops, .phylink_mac_ops = &rtldsa_93xx_phylink_mac_ops, + .num_lag_ids = 16, .cpu_port = RTL931X_CPU_PORT, .fib_entries = 16384, /* TODO: has 32K but code cannot handle that */ .mask_port_reg_be = rtl839x_mask_port_reg_be, From e745ee3f13431ee1e6a662fb6003e9f97833a009 Mon Sep 17 00:00:00 2001 From: Markus Stockhausen Date: Fri, 3 Apr 2026 09:32:07 +0200 Subject: [PATCH 21/78] realtek: dsa: move n_mst/l2_bucket_size out of family check Another two variables that are not part of the runtime but the configuration structure. Move them around. Signed-off-by: Markus Stockhausen Link: https://github.com/openwrt/openwrt/pull/22749 Signed-off-by: Hauke Mehrtens --- .../files-6.18/drivers/net/dsa/rtl83xx/common.c | 16 ++-------------- .../files-6.18/drivers/net/dsa/rtl83xx/dsa.c | 16 ++++++++-------- .../files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c | 2 ++ .../files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h | 4 ++-- .../files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c | 2 ++ .../files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c | 2 ++ .../files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c | 2 ++ 7 files changed, 20 insertions(+), 24 deletions(-) diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/common.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/common.c index c0f0edc441..2c4fa727d4 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/common.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/common.c @@ -726,7 +726,7 @@ static int rtl83xx_l2_nexthop_add(struct rtl838x_switch_priv *priv, struct rtl83 e.port = nh->port; /* Loop over all entries in the hash-bucket and over the second block on 93xx SoCs */ - for (int i = 0; i < priv->l2_bucket_size; i++) { + for (int i = 0; i < priv->r->l2_bucket_size; i++) { entry = priv->r->read_l2_entry_using_hash(key, i, &e); if (!e.valid || ((entry & 0x0fffffffffffffffULL) == seed)) { @@ -1611,23 +1611,11 @@ static int rtl83xx_sw_probe(struct platform_device *pdev) priv->family_id = soc_info.family; priv->id = soc_info.id; switch (soc_info.family) { - case RTL8380_FAMILY_ID: - priv->l2_bucket_size = 4; - priv->n_mst = 64; - break; - case RTL8390_FAMILY_ID: - priv->l2_bucket_size = 4; - priv->n_mst = 256; - break; case RTL9300_FAMILY_ID: sw_w32(0, RTL930X_ST_CTRL); - priv->l2_bucket_size = 8; - priv->n_mst = 64; break; case RTL9310_FAMILY_ID: sw_w32(0, RTL931x_ST_CTRL); - priv->l2_bucket_size = 8; - priv->n_mst = 128; break; } priv->ds->num_ports = priv->r->cpu_port + 1; @@ -1642,7 +1630,7 @@ static int rtl83xx_sw_probe(struct platform_device *pdev) } priv->msts = devm_kcalloc(priv->dev, - priv->n_mst - 1, sizeof(struct rtldsa_mst), + priv->r->n_mst - 1, sizeof(struct rtldsa_mst), GFP_KERNEL); if (!priv->msts) return -ENOMEM; diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/dsa.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/dsa.c index 968fbd202e..f65cd7a4e8 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/dsa.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/dsa.c @@ -1191,7 +1191,7 @@ static int rtldsa_mst_find(struct rtl838x_switch_priv *priv, u16 msti) return -EINVAL; /* search for existing entry */ - for (i = 0; i < priv->n_mst - 1; i++) { + for (i = 0; i < priv->r->n_mst - 1; i++) { if (priv->msts[i].msti != msti) continue; @@ -1233,7 +1233,7 @@ static int rtldsa_mst_get(struct rtl838x_switch_priv *priv, u16 msti) return ret; /* search for free slot */ - for (i = 0; i < priv->n_mst - 1; i++) { + for (i = 0; i < priv->r->n_mst - 1; i++) { if (priv->msts[i].msti != 0) continue; @@ -1279,7 +1279,7 @@ static int rtldsa_mst_recycle_slot(struct rtl838x_switch_priv *priv, u16 msti, u if (msti > 4095) return -EINVAL; - if (old_mst_slot >= priv->n_mst) + if (old_mst_slot >= priv->r->n_mst) return -EINVAL; index = old_mst_slot - 1; @@ -1320,7 +1320,7 @@ static bool rtldsa_mst_put_slot(struct rtl838x_switch_priv *priv, u16 mst_slot) if (mst_slot == 0) return 0; - if (mst_slot >= priv->n_mst) + if (mst_slot >= priv->r->n_mst) return 0; index = mst_slot - 1; @@ -1419,7 +1419,7 @@ static int rtldsa_port_bridge_join(struct dsa_switch *ds, int port, struct dsa_b priv->r->set_static_move_action(port, false); /* Set to disabled in all MSTs, common code will take care of CIST */ - for (i = 1; i < priv->n_mst; i++) + for (i = 1; i < priv->r->n_mst; i++) rtldsa_port_xstp_state_set(priv, port, BR_STATE_DISABLED, i); mutex_unlock(&priv->reg_mutex); @@ -1442,7 +1442,7 @@ static void rtldsa_port_bridge_leave(struct dsa_switch *ds, int port, struct dsa priv->r->set_static_move_action(port, true); /* Set to forwarding in all MSTs, common code will take care of CIST */ - for (i = 1; i < priv->n_mst; i++) + for (i = 1; i < priv->r->n_mst; i++) rtldsa_port_xstp_state_set(priv, port, BR_STATE_FORWARDING, i); mutex_unlock(&priv->reg_mutex); @@ -1513,7 +1513,7 @@ void rtldsa_port_stp_state_set(struct dsa_switch *ds, int port, u8 state) goto unlock; /* for unbridged ports, also force the same state to the MSTIs */ - for (i = 1; i < priv->n_mst; i++) + for (i = 1; i < priv->r->n_mst; i++) rtldsa_port_xstp_state_set(priv, port, state, i); unlock: @@ -1828,7 +1828,7 @@ static int rtldsa_find_l2_hash_entry(struct rtl838x_switch_priv *priv, u64 seed, pr_debug("%s: using key %x, for seed %016llx\n", __func__, key, seed); /* Loop over all entries in the hash-bucket and over the second block on 93xx SoCs */ - for (int i = 0; i < priv->l2_bucket_size; i++) { + for (int i = 0; i < priv->r->l2_bucket_size; i++) { entry = priv->r->read_l2_entry_using_hash(key, i, e); pr_debug("valid %d, mac %016llx\n", e->valid, ether_addr_to_u64(&e->mac[0])); if (must_exist && !e->valid) diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c index 785ab52bf4..5b0cffb7da 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c @@ -1809,6 +1809,8 @@ int rtldsa_83xx_lag_setup_algomask(struct rtl838x_switch_priv *priv, int group, const struct rtldsa_config rtldsa_838x_cfg = { .switch_ops = &rtldsa_83xx_switch_ops, .phylink_mac_ops = &rtldsa_83xx_phylink_mac_ops, + .l2_bucket_size = 4, + .n_mst = 64, .num_lag_ids = 8, .cpu_port = RTL838X_CPU_PORT, .fib_entries = 8192, diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h index aa05ea920e..d08143543e 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h @@ -1417,6 +1417,8 @@ struct rtldsa_config { u8 num_lag_ids; u8 cpu_port; u8 port_ignore; + u8 l2_bucket_size; + u16 n_mst; u32 fib_entries; int trk_ctrl; int trk_hash_ctrl; @@ -1521,8 +1523,6 @@ struct rtl838x_switch_priv { struct mii_bus *parent_bus; const struct rtldsa_config *r; u64 irq_mask; - int l2_bucket_size; - u16 n_mst; struct dentry *dbgfs_dir; /** @lags_port_members: Port (bit) is part of a specific LAG */ diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c index f88578790a..76aa739f66 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c @@ -1724,6 +1724,8 @@ int rtldsa_83xx_lag_setup_algomask(struct rtl838x_switch_priv *priv, int group, const struct rtldsa_config rtldsa_839x_cfg = { .switch_ops = &rtldsa_83xx_switch_ops, .phylink_mac_ops = &rtldsa_83xx_phylink_mac_ops, + .l2_bucket_size = 4, + .n_mst = 256, .num_lag_ids = 16, .cpu_port = RTL839X_CPU_PORT, .fib_entries = 16384, diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c index 5b840bf144..4cfc8192a5 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c @@ -2795,6 +2795,8 @@ static void rtldsa_930x_qos_init(struct rtl838x_switch_priv *priv) const struct rtldsa_config rtldsa_930x_cfg = { .switch_ops = &rtldsa_93xx_switch_ops, .phylink_mac_ops = &rtldsa_93xx_phylink_mac_ops, + .l2_bucket_size = 8, + .n_mst = 64, .num_lag_ids = 16, .cpu_port = RTL930X_CPU_PORT, .fib_entries = 16384, diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c index e3433556bd..a0ece78eb7 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c @@ -1936,6 +1936,8 @@ static void rtldsa_931x_qos_init(struct rtl838x_switch_priv *priv) const struct rtldsa_config rtldsa_931x_cfg = { .switch_ops = &rtldsa_93xx_switch_ops, .phylink_mac_ops = &rtldsa_93xx_phylink_mac_ops, + .l2_bucket_size = 8, + .n_mst = 128, .num_lag_ids = 16, .cpu_port = RTL931X_CPU_PORT, .fib_entries = 16384, /* TODO: has 32K but code cannot handle that */ From 8ea46952d626fdda7565a52affdc7bd547396cab Mon Sep 17 00:00:00 2001 From: Markus Stockhausen Date: Fri, 3 Apr 2026 09:45:11 +0200 Subject: [PATCH 22/78] realtek: dsa: common MSTI initialization The dsa probing currently disable multiple spanning tree for RTL93xx and keeps the bootloader setup for RTL83xx untouched. Additionally it does this by checking for the family id. Refactor this to a common "disable msti" setup. To make it clear: From now on RTL83xx will also run in MSTI disabled state. Tested on Linksys LGS310C. Signed-off-by: Markus Stockhausen Link: https://github.com/openwrt/openwrt/pull/22749 Signed-off-by: Hauke Mehrtens --- .../files-6.18/drivers/net/dsa/rtl83xx/common.c | 11 ++--------- .../files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c | 1 + .../files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h | 5 ++++- .../files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c | 1 + .../files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c | 1 + .../files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c | 1 + 6 files changed, 10 insertions(+), 10 deletions(-) diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/common.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/common.c index 2c4fa727d4..0544eb1bf6 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/common.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/common.c @@ -1596,6 +1596,7 @@ static int rtl83xx_sw_probe(struct platform_device *pdev) priv->ds->ops = priv->r->switch_ops; priv->ds->phylink_mac_ops = priv->r->phylink_mac_ops; priv->ds->num_lag_ids = priv->r->num_lag_ids; + priv->ds->num_ports = priv->r->cpu_port + 1; priv->dev = dev; dev_set_drvdata(dev, priv); @@ -1610,15 +1611,7 @@ static int rtl83xx_sw_probe(struct platform_device *pdev) priv->family_id = soc_info.family; priv->id = soc_info.id; - switch (soc_info.family) { - case RTL9300_FAMILY_ID: - sw_w32(0, RTL930X_ST_CTRL); - break; - case RTL9310_FAMILY_ID: - sw_w32(0, RTL931x_ST_CTRL); - break; - } - priv->ds->num_ports = priv->r->cpu_port + 1; + sw_w32(0, priv->r->spanning_tree_ctrl); priv->irq_mask = GENMASK_ULL(priv->r->cpu_port - 1, 0); err = rtl83xx_mdio_probe(priv); diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c index 5b0cffb7da..46832a06bb 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c @@ -1809,6 +1809,7 @@ int rtldsa_83xx_lag_setup_algomask(struct rtl838x_switch_priv *priv, int group, const struct rtldsa_config rtldsa_838x_cfg = { .switch_ops = &rtldsa_83xx_switch_ops, .phylink_mac_ops = &rtldsa_83xx_phylink_mac_ops, + .spanning_tree_ctrl = RTL838X_VLAN_STP_CTRL, .l2_bucket_size = 4, .n_mst = 64, .num_lag_ids = 8, diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h index d08143543e..528c67a3b6 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h @@ -292,8 +292,10 @@ #define MV_ACT_TRAP2CPU 2 #define MV_ACT_COPY2CPU 3 +#define RTL838X_VLAN_STP_CTRL (0x3b20) +#define RTL839X_ST_CTRL (0x27e4) #define RTL930X_ST_CTRL (0x8798) -#define RTL931x_ST_CTRL (0x8000) +#define RTL931X_ST_CTRL (0x8000) #define RTL930X_L2_PORT_SABLK_CTRL (0x905c) #define RTL930X_L2_PORT_DABLK_CTRL (0x9060) @@ -1422,6 +1424,7 @@ struct rtldsa_config { u32 fib_entries; int trk_ctrl; int trk_hash_ctrl; + int spanning_tree_ctrl; void (*vlan_tables_read)(u32 vlan, struct rtl838x_vlan_info *info); void (*vlan_set_tagged)(u32 vlan, struct rtl838x_vlan_info *info); void (*vlan_set_untagged)(u32 vlan, u64 portmask); diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c index 76aa739f66..99d3a56ab3 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c @@ -1724,6 +1724,7 @@ int rtldsa_83xx_lag_setup_algomask(struct rtl838x_switch_priv *priv, int group, const struct rtldsa_config rtldsa_839x_cfg = { .switch_ops = &rtldsa_83xx_switch_ops, .phylink_mac_ops = &rtldsa_83xx_phylink_mac_ops, + .spanning_tree_ctrl = RTL839X_ST_CTRL, .l2_bucket_size = 4, .n_mst = 256, .num_lag_ids = 16, diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c index 4cfc8192a5..5dda31f329 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c @@ -2795,6 +2795,7 @@ static void rtldsa_930x_qos_init(struct rtl838x_switch_priv *priv) const struct rtldsa_config rtldsa_930x_cfg = { .switch_ops = &rtldsa_93xx_switch_ops, .phylink_mac_ops = &rtldsa_93xx_phylink_mac_ops, + .spanning_tree_ctrl = RTL930X_ST_CTRL, .l2_bucket_size = 8, .n_mst = 64, .num_lag_ids = 16, diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c index a0ece78eb7..95e92fa1e4 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c @@ -1936,6 +1936,7 @@ static void rtldsa_931x_qos_init(struct rtl838x_switch_priv *priv) const struct rtldsa_config rtldsa_931x_cfg = { .switch_ops = &rtldsa_93xx_switch_ops, .phylink_mac_ops = &rtldsa_93xx_phylink_mac_ops, + .spanning_tree_ctrl = RTL931X_ST_CTRL, .l2_bucket_size = 8, .n_mst = 128, .num_lag_ids = 16, From d3a905e0cdb9102d62ecfc0608bd61e61e5c1ffb Mon Sep 17 00:00:00 2001 From: Roman Pyatikonov Date: Mon, 30 Mar 2026 23:11:59 +0300 Subject: [PATCH 23/78] rockchip: add reset button support for NanoPi R5S LTS Backport upstream commit 954f07012794 ("arm64: dts: rockchip: Add reset button to NanoPi R5S"). The NanoPi R5S LTS variant has a reset button wired to GPIO4_A0, but the current OpenWrt rockchip 6.12 patch set lacks the corresponding gpio-keys definition in rk3568-nanopi-r5s.dts. As a result, pressing the button generates no reset event. rockchip already includes kmod-gpio-button-hotplug by default, so backporting the upstream DTS change restores the expected behavior. Rename the patch to 011-v6.17-arm64-dts-rockchip-Add-reset-button-to-NanoPi-R5S.patch to match the upstream source. The non-LTS NanoPi R5S leaves this pin unconnected, matching the upstream rationale for using the shared rk3568-nanopi-r5s.dts. Link: https://lore.kernel.org/r/20250711142138.197445-1-didi.debian@cknow.org Signed-off-by: Roman Pyatikonov Link: https://github.com/openwrt/openwrt/pull/22700 Signed-off-by: Hauke Mehrtens --- ...kchip-Add-reset-button-to-NanoPi-R5S.patch | 52 +++++++++++++++++++ ...ip-Update-LED-properties-for-NanoPi-.patch | 2 +- 2 files changed, 53 insertions(+), 1 deletion(-) create mode 100644 target/linux/rockchip/patches-6.12/011-v6.17-arm64-dts-rockchip-Add-reset-button-to-NanoPi-R5S.patch diff --git a/target/linux/rockchip/patches-6.12/011-v6.17-arm64-dts-rockchip-Add-reset-button-to-NanoPi-R5S.patch b/target/linux/rockchip/patches-6.12/011-v6.17-arm64-dts-rockchip-Add-reset-button-to-NanoPi-R5S.patch new file mode 100644 index 0000000000..30c77377d7 --- /dev/null +++ b/target/linux/rockchip/patches-6.12/011-v6.17-arm64-dts-rockchip-Add-reset-button-to-NanoPi-R5S.patch @@ -0,0 +1,52 @@ +From 954f07012794a3aa7ae89e56f070eaa1643af50b Mon Sep 17 00:00:00 2001 +From: Diederik de Haas +Date: Fri, 11 Jul 2025 16:20:37 +0200 +Subject: [PATCH] arm64: dts: rockchip: Add reset button to NanoPi R5S + +The NanoPi R5S LTS version has a reset button, which is connected via +GPIO. Note that the non-LTS version does not have the reset button and +therefore on page 19 of the schematic version 2204 it is marked 'NC', +but it is connected on the LTS version. + +Link: https://lore.kernel.org/r/20250711142138.197445-1-didi.debian@cknow.org +Signed-off-by: Diederik de Haas +Signed-off-by: Heiko Stuebner +--- + arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts | 19 +++++++++++++++++++ + 1 file changed, 19 insertions(+) + +--- a/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts +@@ -17,6 +17,19 @@ + ethernet0 = &gmac0; + }; + ++ gpio-keys { ++ compatible = "gpio-keys"; ++ pinctrl-0 = <&gpio4_a0_k1_pin>; ++ pinctrl-names = "default"; ++ ++ button-reset { ++ debounce-interval = <50>; ++ gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>; ++ label = "RESET"; ++ linux,code = ; ++ }; ++ }; ++ + gpio-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; +@@ -116,6 +129,12 @@ + }; + }; + ++ gpio-keys { ++ gpio4_a0_k1_pin: gpio4-a0-k1-pin { ++ rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ + gpio-leds { + lan1_led_pin: lan1-led-pin { + rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/target/linux/rockchip/patches-6.12/110-arm64-dts-rockchip-Update-LED-properties-for-NanoPi-.patch b/target/linux/rockchip/patches-6.12/110-arm64-dts-rockchip-Update-LED-properties-for-NanoPi-.patch index c22fdd52b8..e10d4b1702 100644 --- a/target/linux/rockchip/patches-6.12/110-arm64-dts-rockchip-Update-LED-properties-for-NanoPi-.patch +++ b/target/linux/rockchip/patches-6.12/110-arm64-dts-rockchip-Update-LED-properties-for-NanoPi-.patch @@ -21,7 +21,7 @@ Signed-off-by: Tianling Shen --- a/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts -@@ -39,7 +39,6 @@ +@@ -52,7 +52,6 @@ power_led: led-power { color = ; function = LED_FUNCTION_POWER; From beb57dbc6d273165d082831d24d5b32a4fc31bd0 Mon Sep 17 00:00:00 2001 From: Jonas Jelonek Date: Fri, 27 Mar 2026 13:01:06 +0100 Subject: [PATCH 24/78] realtek: pcs: rename port_media to sds_media The term 'port media' was chosen due to how the code taken from the SDK was organized. However, the SDK does a pretty good job at intermixing a lot of things which cause confusion in the end. This also applies to the media settings. To be correct, we do not really have port awareness in the PCS driver (and probably shouldn't have) so we do not really deal with a port's media. Instead, we set settings depending on what is attached to the SerDes itself. To fix this confusion, rename the enum, its fields and all usage from 'port_media' to 'sds_media'. Signed-off-by: Jonas Jelonek Link: https://github.com/openwrt/openwrt/pull/22786 Signed-off-by: Robert Marko --- .../files-6.18/drivers/net/pcs/pcs-rtl-otto.c | 57 +++++++++---------- 1 file changed, 28 insertions(+), 29 deletions(-) diff --git a/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c b/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c index abfd76b841..ee84b99ed0 100644 --- a/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c +++ b/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c @@ -134,16 +134,16 @@ enum rtpcs_sds_mode { RTPCS_SDS_MODE_USXGMII_2_5GSXGMII, }; -enum rtpcs_port_media { - RTPCS_PORT_MEDIA_NONE, - RTPCS_PORT_MEDIA_FIBER_100M, - RTPCS_PORT_MEDIA_FIBER_1G, - RTPCS_PORT_MEDIA_FIBER_2_5G, - RTPCS_PORT_MEDIA_FIBER_10G, - RTPCS_PORT_MEDIA_DAC_50CM, - RTPCS_PORT_MEDIA_DAC_100CM, - RTPCS_PORT_MEDIA_DAC_300CM, - RTPCS_PORT_MEDIA_DAC_500CM, +enum rtpcs_sds_media { + RTPCS_SDS_MEDIA_NONE, + RTPCS_SDS_MEDIA_FIBER_100M, + RTPCS_SDS_MEDIA_FIBER_1G, + RTPCS_SDS_MEDIA_FIBER_2_5G, + RTPCS_SDS_MEDIA_FIBER_10G, + RTPCS_SDS_MEDIA_DAC_50CM, + RTPCS_SDS_MEDIA_DAC_100CM, + RTPCS_SDS_MEDIA_DAC_300CM, + RTPCS_SDS_MEDIA_DAC_500CM, }; enum rtpcs_sds_pll_type { @@ -3503,8 +3503,7 @@ static int rtpcs_931x_sds_set_polarity(struct rtpcs_serdes *sds, return rtpcs_sds_write_bits(sds, 0x80, 0x0, 9, 8, val); } -static int rtpcs_931x_sds_set_port_media(struct rtpcs_serdes *sds, - enum rtpcs_port_media port_media) +static int rtpcs_931x_sds_set_media(struct rtpcs_serdes *sds, enum rtpcs_sds_media sds_media) { struct rtpcs_serdes *even_sds = rtpcs_sds_get_even(sds); bool is_dac, is_10g; @@ -3527,7 +3526,7 @@ static int rtpcs_931x_sds_set_port_media(struct rtpcs_serdes *sds, /* TODO: can we drop this in favor of turning off SerDes ealier? */ rtpcs_931x_sds_set_mode(sds, RTPCS_SDS_MODE_OFF); - if (port_media == RTPCS_PORT_MEDIA_NONE) + if (sds_media == RTPCS_SDS_MEDIA_NONE) return 0; rtpcs_sds_write(sds, 0x21, 0x19, 0xf0f0); /* from XS1930-10 SDK */ @@ -3538,34 +3537,34 @@ static int rtpcs_931x_sds_set_port_media(struct rtpcs_serdes *sds, rtpcs_931x_sds_rx_reset(sds); rtpcs_931x_sds_reset_leq_dfe(sds); - is_dac = (port_media == RTPCS_PORT_MEDIA_DAC_50CM || - port_media == RTPCS_PORT_MEDIA_DAC_100CM || - port_media == RTPCS_PORT_MEDIA_DAC_300CM || - port_media == RTPCS_PORT_MEDIA_DAC_500CM); - is_10g = is_dac || port_media == RTPCS_PORT_MEDIA_FIBER_10G; + is_dac = (sds_media == RTPCS_SDS_MEDIA_DAC_50CM || + sds_media == RTPCS_SDS_MEDIA_DAC_100CM || + sds_media == RTPCS_SDS_MEDIA_DAC_300CM || + sds_media == RTPCS_SDS_MEDIA_DAC_500CM); + is_10g = is_dac || sds_media == RTPCS_SDS_MEDIA_FIBER_10G; - if (port_media != RTPCS_PORT_MEDIA_FIBER_100M) { + if (sds_media != RTPCS_SDS_MEDIA_FIBER_100M) { rtpcs_sds_write_bits(sds, 0x20, 0x0, 11, 10, 0x0); rtpcs_sds_write_bits(sds, 0x2a, 0x7, 15, 15, is_dac ? 0x1 : 0x0); rtpcs_sds_write_bits(sds, 0x20, 0x0, 11, 10, 0x3); } - switch (port_media) { - case RTPCS_PORT_MEDIA_DAC_50CM: - case RTPCS_PORT_MEDIA_DAC_100CM: + switch (sds_media) { + case RTPCS_SDS_MEDIA_DAC_50CM: + case RTPCS_SDS_MEDIA_DAC_100CM: rtpcs_sds_write_bits(sds, 0x2e, 0x1, 15, 0, 0x1340); rtpcs_sds_write(sds, 0x21, 0x19, 0xf0a5); /* from XS1930-10 SDK */ rtpcs_sds_write(even_sds, 0x2e, 0x8, 0x02a0); /* [10:7] impedance */ break; - case RTPCS_PORT_MEDIA_DAC_300CM: - case RTPCS_PORT_MEDIA_DAC_500CM: + case RTPCS_SDS_MEDIA_DAC_300CM: + case RTPCS_SDS_MEDIA_DAC_500CM: rtpcs_sds_write_bits(sds, 0x2e, 0x1, 15, 0, 0x5200); rtpcs_sds_write(sds, 0x21, 0x19, 0xf0a5); /* from XS1930-10 SDK */ rtpcs_sds_write(even_sds, 0x2e, 0x8, 0x02a0); /* [10:7] impedance */ break; - case RTPCS_PORT_MEDIA_FIBER_10G: + case RTPCS_SDS_MEDIA_FIBER_10G: /* * TODO: this would need to be saved during early init, before * actually changing any SerDes settings. Then restored here. @@ -3739,17 +3738,17 @@ static int rtpcs_931x_setup_serdes(struct rtpcs_serdes *sds, switch (hw_mode) { case RTPCS_SDS_MODE_OFF: - ret = rtpcs_931x_sds_set_port_media(sds, RTPCS_PORT_MEDIA_NONE); + ret = rtpcs_931x_sds_set_media(sds, RTPCS_SDS_MEDIA_NONE); break; case RTPCS_SDS_MODE_2500BASEX: - ret = rtpcs_931x_sds_set_port_media(sds, RTPCS_PORT_MEDIA_FIBER_2_5G); + ret = rtpcs_931x_sds_set_media(sds, RTPCS_SDS_MEDIA_FIBER_2_5G); break; case RTPCS_SDS_MODE_10GBASER: - ret = rtpcs_931x_sds_set_port_media(sds, RTPCS_PORT_MEDIA_FIBER_10G); + ret = rtpcs_931x_sds_set_media(sds, RTPCS_SDS_MEDIA_FIBER_10G); break; case RTPCS_SDS_MODE_SGMII: case RTPCS_SDS_MODE_1000BASEX: - ret = rtpcs_931x_sds_set_port_media(sds, RTPCS_PORT_MEDIA_FIBER_1G); + ret = rtpcs_931x_sds_set_media(sds, RTPCS_SDS_MEDIA_FIBER_1G); break; default: break; From 7c7058b66b79867115d992eef87e194fcc49d9ff Mon Sep 17 00:00:00 2001 From: Jonas Jelonek Date: Fri, 27 Mar 2026 23:32:34 +0100 Subject: [PATCH 25/78] realtek: pcs: collapse DAC media types So far we had separate media types for different DAC cable lengths, equal to how the SDK defines them. However, this seems overengineered. The types '_50CM' and '_100CM' are always treated equally, same for '_300CM' and '_500CM'. Not only in the RTL931x code, but also the RTL930x code usually just makes a distinction between short and long. Thus, make that a bit cleaner by reducing the DAC type set to '_SHORT' and '_LONG' with DAC cables < 3m being considered short and those with >= 3m being considered as long. Signed-off-by: Jonas Jelonek Link: https://github.com/openwrt/openwrt/pull/22786 Signed-off-by: Robert Marko --- .../files-6.18/drivers/net/pcs/pcs-rtl-otto.c | 18 ++++++------------ 1 file changed, 6 insertions(+), 12 deletions(-) diff --git a/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c b/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c index ee84b99ed0..d1c43709be 100644 --- a/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c +++ b/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c @@ -140,10 +140,8 @@ enum rtpcs_sds_media { RTPCS_SDS_MEDIA_FIBER_1G, RTPCS_SDS_MEDIA_FIBER_2_5G, RTPCS_SDS_MEDIA_FIBER_10G, - RTPCS_SDS_MEDIA_DAC_50CM, - RTPCS_SDS_MEDIA_DAC_100CM, - RTPCS_SDS_MEDIA_DAC_300CM, - RTPCS_SDS_MEDIA_DAC_500CM, + RTPCS_SDS_MEDIA_DAC_SHORT, /* < 3m */ + RTPCS_SDS_MEDIA_DAC_LONG, /* >= 3m */ }; enum rtpcs_sds_pll_type { @@ -3537,10 +3535,8 @@ static int rtpcs_931x_sds_set_media(struct rtpcs_serdes *sds, enum rtpcs_sds_med rtpcs_931x_sds_rx_reset(sds); rtpcs_931x_sds_reset_leq_dfe(sds); - is_dac = (sds_media == RTPCS_SDS_MEDIA_DAC_50CM || - sds_media == RTPCS_SDS_MEDIA_DAC_100CM || - sds_media == RTPCS_SDS_MEDIA_DAC_300CM || - sds_media == RTPCS_SDS_MEDIA_DAC_500CM); + is_dac = (sds_media == RTPCS_SDS_MEDIA_DAC_SHORT || + sds_media == RTPCS_SDS_MEDIA_DAC_LONG); is_10g = is_dac || sds_media == RTPCS_SDS_MEDIA_FIBER_10G; if (sds_media != RTPCS_SDS_MEDIA_FIBER_100M) { @@ -3550,15 +3546,13 @@ static int rtpcs_931x_sds_set_media(struct rtpcs_serdes *sds, enum rtpcs_sds_med } switch (sds_media) { - case RTPCS_SDS_MEDIA_DAC_50CM: - case RTPCS_SDS_MEDIA_DAC_100CM: + case RTPCS_SDS_MEDIA_DAC_SHORT: rtpcs_sds_write_bits(sds, 0x2e, 0x1, 15, 0, 0x1340); rtpcs_sds_write(sds, 0x21, 0x19, 0xf0a5); /* from XS1930-10 SDK */ rtpcs_sds_write(even_sds, 0x2e, 0x8, 0x02a0); /* [10:7] impedance */ break; - case RTPCS_SDS_MEDIA_DAC_300CM: - case RTPCS_SDS_MEDIA_DAC_500CM: + case RTPCS_SDS_MEDIA_DAC_LONG: rtpcs_sds_write_bits(sds, 0x2e, 0x1, 15, 0, 0x5200); rtpcs_sds_write(sds, 0x21, 0x19, 0xf0a5); /* from XS1930-10 SDK */ rtpcs_sds_write(even_sds, 0x2e, 0x8, 0x02a0); /* [10:7] impedance */ From be10ea16ac42988f1e8b34c1e5c8345a533a8cb4 Mon Sep 17 00:00:00 2001 From: Jonas Jelonek Date: Sat, 28 Mar 2026 18:24:15 +0100 Subject: [PATCH 26/78] realtek: pcs: condense fiber media types Right now we operate with distinct media types for fiber using different speeds. This is more of a leftover from the SDK then it really makes sense design-wise. The set_media function from the SDK did a lot more than just setting some media-specific parameters. As part of deconstructing this, also reduce the fiber types to a single media type and handle the speed-agnostic parts based on the hw_mode for now. This also drops the check for 100M speed around a block of writes. This check has it's origin in SDK code where a switch statement just didn't handle this case. However, the rest of the SDK doesn't handle this case either. While the explicit 100M support isn't verified yet, there's no need to keep that check. Signed-off-by: Jonas Jelonek Link: https://github.com/openwrt/openwrt/pull/22786 Signed-off-by: Robert Marko --- .../files-6.18/drivers/net/pcs/pcs-rtl-otto.c | 39 +++++++++---------- 1 file changed, 19 insertions(+), 20 deletions(-) diff --git a/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c b/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c index d1c43709be..a676f4bf36 100644 --- a/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c +++ b/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c @@ -136,10 +136,7 @@ enum rtpcs_sds_mode { enum rtpcs_sds_media { RTPCS_SDS_MEDIA_NONE, - RTPCS_SDS_MEDIA_FIBER_100M, - RTPCS_SDS_MEDIA_FIBER_1G, - RTPCS_SDS_MEDIA_FIBER_2_5G, - RTPCS_SDS_MEDIA_FIBER_10G, + RTPCS_SDS_MEDIA_FIBER, RTPCS_SDS_MEDIA_DAC_SHORT, /* < 3m */ RTPCS_SDS_MEDIA_DAC_LONG, /* >= 3m */ }; @@ -3501,7 +3498,8 @@ static int rtpcs_931x_sds_set_polarity(struct rtpcs_serdes *sds, return rtpcs_sds_write_bits(sds, 0x80, 0x0, 9, 8, val); } -static int rtpcs_931x_sds_set_media(struct rtpcs_serdes *sds, enum rtpcs_sds_media sds_media) +static int rtpcs_931x_sds_set_media(struct rtpcs_serdes *sds, enum rtpcs_sds_media sds_media, + enum rtpcs_sds_mode hw_mode) { struct rtpcs_serdes *even_sds = rtpcs_sds_get_even(sds); bool is_dac, is_10g; @@ -3537,13 +3535,17 @@ static int rtpcs_931x_sds_set_media(struct rtpcs_serdes *sds, enum rtpcs_sds_med is_dac = (sds_media == RTPCS_SDS_MEDIA_DAC_SHORT || sds_media == RTPCS_SDS_MEDIA_DAC_LONG); - is_10g = is_dac || sds_media == RTPCS_SDS_MEDIA_FIBER_10G; + is_10g = (hw_mode == RTPCS_SDS_MODE_10GBASER); - if (sds_media != RTPCS_SDS_MEDIA_FIBER_100M) { - rtpcs_sds_write_bits(sds, 0x20, 0x0, 11, 10, 0x0); - rtpcs_sds_write_bits(sds, 0x2a, 0x7, 15, 15, is_dac ? 0x1 : 0x0); - rtpcs_sds_write_bits(sds, 0x20, 0x0, 11, 10, 0x3); - } + rtpcs_sds_write_bits(sds, 0x20, 0x0, 11, 10, 0x0); + rtpcs_sds_write_bits(sds, 0x2a, 0x7, 15, 15, is_dac ? 0x1 : 0x0); + rtpcs_sds_write_bits(sds, 0x20, 0x0, 11, 10, 0x3); + + /* Skip the TX settings for non-10G for now because we do not know + * if they have an effect for non-10G. + */ + if (!is_10g) + goto skip_tx; switch (sds_media) { case RTPCS_SDS_MEDIA_DAC_SHORT: @@ -3558,7 +3560,7 @@ static int rtpcs_931x_sds_set_media(struct rtpcs_serdes *sds, enum rtpcs_sds_med rtpcs_sds_write(even_sds, 0x2e, 0x8, 0x02a0); /* [10:7] impedance */ break; - case RTPCS_SDS_MEDIA_FIBER_10G: + case RTPCS_SDS_MEDIA_FIBER: /* * TODO: this would need to be saved during early init, before * actually changing any SerDes settings. Then restored here. @@ -3571,6 +3573,7 @@ static int rtpcs_931x_sds_set_media(struct rtpcs_serdes *sds, enum rtpcs_sds_med break; } +skip_tx: /* CFG_LINKDW_SEL? (same semantics as 930x) */ rtpcs_sds_write_bits(sds, 0x6, 0xd, 6, 6, is_dac ? 0x0 : 0x1); @@ -3732,17 +3735,13 @@ static int rtpcs_931x_setup_serdes(struct rtpcs_serdes *sds, switch (hw_mode) { case RTPCS_SDS_MODE_OFF: - ret = rtpcs_931x_sds_set_media(sds, RTPCS_SDS_MEDIA_NONE); - break; - case RTPCS_SDS_MODE_2500BASEX: - ret = rtpcs_931x_sds_set_media(sds, RTPCS_SDS_MEDIA_FIBER_2_5G); - break; - case RTPCS_SDS_MODE_10GBASER: - ret = rtpcs_931x_sds_set_media(sds, RTPCS_SDS_MEDIA_FIBER_10G); + ret = rtpcs_931x_sds_set_media(sds, RTPCS_SDS_MEDIA_NONE, hw_mode); break; case RTPCS_SDS_MODE_SGMII: case RTPCS_SDS_MODE_1000BASEX: - ret = rtpcs_931x_sds_set_media(sds, RTPCS_SDS_MEDIA_FIBER_1G); + case RTPCS_SDS_MODE_2500BASEX: + case RTPCS_SDS_MODE_10GBASER: + ret = rtpcs_931x_sds_set_media(sds, RTPCS_SDS_MEDIA_FIBER, hw_mode); break; default: break; From 0f5015fc5ed5ef62a163a36570a1023e5e1167b8 Mon Sep 17 00:00:00 2001 From: Jonas Jelonek Date: Wed, 4 Feb 2026 22:02:00 +0000 Subject: [PATCH 27/78] realtek: pcs: rtl931x: set SerDes to off early Set the SerDes mode to OFF early in the setup process to have a clear starting point. This was part of the media handling before as a leftover from the SDK code import. In the SDK, this function didn't only care about applying some media settings but was also some kind of mode setting for fiber modes. Signed-off-by: Jonas Jelonek Link: https://github.com/openwrt/openwrt/pull/22786 Signed-off-by: Robert Marko --- target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c b/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c index a676f4bf36..eac6d71543 100644 --- a/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c +++ b/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c @@ -3519,8 +3519,6 @@ static int rtpcs_931x_sds_set_media(struct rtpcs_serdes *sds, enum rtpcs_sds_med rtpcs_sds_write_bits(sds, 0x2e, 0xf, 5, 0, 0x4); rtpcs_sds_write_bits(sds, 0x2a, 0x12, 7, 6, 0x1); - /* TODO: can we drop this in favor of turning off SerDes ealier? */ - rtpcs_931x_sds_set_mode(sds, RTPCS_SDS_MODE_OFF); if (sds_media == RTPCS_SDS_MEDIA_NONE) return 0; @@ -3724,6 +3722,7 @@ static int rtpcs_931x_setup_serdes(struct rtpcs_serdes *sds, pr_info("%s: 2.5gbit %08X", __func__, rtpcs_sds_read(sds, 0x41, 0x14)); rtpcs_931x_sds_power(sds, false); + rtpcs_931x_sds_set_mode(sds, RTPCS_SDS_MODE_OFF); ret = rtpcs_931x_sds_config_hw_mode(sds, hw_mode); if (ret < 0) From bff6b3f2d06e9ebdaf6c609686a4a0a75c7c41e6 Mon Sep 17 00:00:00 2001 From: Markus Stockhausen Date: Tue, 31 Mar 2026 21:17:51 +0200 Subject: [PATCH 28/78] realtek: dts: convert D-Link DGS-1250-28X to PHY_C22() Use the new PHY_C22() macro for this RTL9301 device. Signed-off-by: Markus Stockhausen Link: https://github.com/openwrt/openwrt/pull/22721 Signed-off-by: Robert Marko --- .../dts/rtl9301_d-link_dgs-1250-28x.dts | 120 ++++-------------- 1 file changed, 24 insertions(+), 96 deletions(-) diff --git a/target/linux/realtek/dts/rtl9301_d-link_dgs-1250-28x.dts b/target/linux/realtek/dts/rtl9301_d-link_dgs-1250-28x.dts index 193c8de079..f6b8e0b76b 100644 --- a/target/linux/realtek/dts/rtl9301_d-link_dgs-1250-28x.dts +++ b/target/linux/realtek/dts/rtl9301_d-link_dgs-1250-28x.dts @@ -224,108 +224,36 @@ }; &mdio_bus0 { - phy0: ethernet-phy@0 { - reg = <0>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; - phy1: ethernet-phy@1 { - reg = <1>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; - phy2: ethernet-phy@2 { - reg = <2>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; - phy3: ethernet-phy@3 { - reg = <3>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; - phy4: ethernet-phy@4 { - reg = <4>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; - phy5: ethernet-phy@5 { - reg = <5>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; - phy6: ethernet-phy@6 { - reg = <6>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; - phy7: ethernet-phy@7 { - reg = <7>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; + PHY_C22(0, 0) + PHY_C22(1, 1) + PHY_C22(2, 2) + PHY_C22(3, 3) + PHY_C22(4, 4) + PHY_C22(5, 5) + PHY_C22(6, 6) + PHY_C22(7, 7) }; &mdio_bus1 { - phy8: ethernet-phy@8 { - reg = <8>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; - phy9: ethernet-phy@9 { - reg = <9>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; - phy10: ethernet-phy@10 { - reg = <10>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; - phy11: ethernet-phy@11 { - reg = <11>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; - phy12: ethernet-phy@12 { - reg = <12>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; - phy13: ethernet-phy@13 { - reg = <13>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; - phy14: ethernet-phy@14 { - reg = <14>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; - phy15: ethernet-phy@15 { - reg = <15>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; + PHY_C22(8, 8) + PHY_C22(9, 9) + PHY_C22(10, 10) + PHY_C22(11, 11) + PHY_C22(12, 12) + PHY_C22(13, 13) + PHY_C22(14, 14) + PHY_C22(15, 15) }; &mdio_bus2 { - phy16: ethernet-phy@16 { - reg = <16>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; - phy17: ethernet-phy@17 { - reg = <17>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; - phy18: ethernet-phy@18 { - reg = <18>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; - phy19: ethernet-phy@19 { - reg = <19>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; - phy20: ethernet-phy@20 { - reg = <20>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; - phy21: ethernet-phy@21 { - reg = <21>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; - phy22: ethernet-phy@22 { - reg = <22>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; - phy23: ethernet-phy@23 { - reg = <23>; - compatible = "ethernet-phy-ieee802.3-c22"; - }; + PHY_C22(16, 16) + PHY_C22(17, 17) + PHY_C22(18, 18) + PHY_C22(19, 19) + PHY_C22(20, 20) + PHY_C22(21, 21) + PHY_C22(22, 22) + PHY_C22(23, 23) }; &switch0 { From 361c1107cbfdc8d9f9398bbaa595aa9bc19142ef Mon Sep 17 00:00:00 2001 From: Markus Stockhausen Date: Tue, 31 Mar 2026 18:10:30 +0200 Subject: [PATCH 29/78] realtek: eth: merge decode_tag() for RTL93xx rteth_930x_decode_tag() and rteth_931x_decode_tag() are basically the same. The only difference is the port bitmask. Luckily on the RTL930x devices the unused fifth bit is always zero and the mask can be aligned with RTL931x. Take over the RTL931x reason debugging for both targets. Signed-off-by: Markus Stockhausen Link: https://github.com/openwrt/openwrt/pull/22717 Signed-off-by: Robert Marko --- .../drivers/net/ethernet/rtl838x_eth.c | 31 ++++--------------- 1 file changed, 6 insertions(+), 25 deletions(-) diff --git a/target/linux/realtek/files-6.18/drivers/net/ethernet/rtl838x_eth.c b/target/linux/realtek/files-6.18/drivers/net/ethernet/rtl838x_eth.c index fc0e5ddc22..03b9725e6e 100644 --- a/target/linux/realtek/files-6.18/drivers/net/ethernet/rtl838x_eth.c +++ b/target/linux/realtek/files-6.18/drivers/net/ethernet/rtl838x_eth.c @@ -287,35 +287,16 @@ static bool rteth_839x_decode_tag(struct rteth_packet *h, struct dsa_tag *t) return t->l2_offloaded; } -static bool rteth_930x_decode_tag(struct rteth_packet *h, struct dsa_tag *t) +static bool rteth_93xx_decode_tag(struct rteth_packet *h, struct dsa_tag *t) { - t->reason = h->cpu_tag[7] & 0x3f; - t->queue = (h->cpu_tag[2] >> 11) & 0x1f; - t->port = (h->cpu_tag[0] >> 8) & 0x1f; - t->crc_error = h->cpu_tag[1] & BIT(6); - - pr_debug("Reason %d, port %d, queue %d\n", t->reason, t->port, t->queue); - if (t->reason >= 19 && t->reason <= 27) - t->l2_offloaded = 0; - else - t->l2_offloaded = 1; - - return t->l2_offloaded; -} - -static bool rteth_931x_decode_tag(struct rteth_packet *h, struct dsa_tag *t) -{ - t->reason = h->cpu_tag[7] & 0x3f; - t->queue = (h->cpu_tag[2] >> 11) & 0x1f; t->port = (h->cpu_tag[0] >> 8) & 0x3f; + t->queue = (h->cpu_tag[2] >> 11) & 0x1f; + t->reason = h->cpu_tag[7] & 0x3f; t->crc_error = h->cpu_tag[1] & BIT(6); + t->l2_offloaded = (t->reason >= 19 && t->reason <= 27) ? 0 : 1; if (t->reason != 63) pr_debug("%s: Reason %d, port %d, queue %d\n", __func__, t->reason, t->port, t->queue); - if (t->reason >= 19 && t->reason <= 27) /* NIC_RX_REASON_RMA */ - t->l2_offloaded = 0; - else - t->l2_offloaded = 1; return t->l2_offloaded; } @@ -1410,7 +1391,7 @@ static const struct rteth_config rteth_930x_cfg = { .l2_tbl_flush_ctrl = RTL930X_L2_TBL_FLUSH_CTRL, .update_counter = rteth_93xx_update_counter, .create_tx_header = rteth_93xx_create_tx_header, - .decode_tag = rteth_930x_decode_tag, + .decode_tag = rteth_93xx_decode_tag, .hw_en_rxtx = rteth_930x_hw_en_rxtx, .hw_init = &rteth_930x_hw_init, .hw_stop = &rteth_930x_hw_stop, @@ -1455,7 +1436,7 @@ static const struct rteth_config rteth_931x_cfg = { .l2_tbl_flush_ctrl = RTL931X_L2_TBL_FLUSH_CTRL, .update_counter = rteth_93xx_update_counter, .create_tx_header = rteth_93xx_create_tx_header, - .decode_tag = rteth_931x_decode_tag, + .decode_tag = rteth_93xx_decode_tag, .hw_en_rxtx = rteth_931x_hw_en_rxtx, .hw_init = &rteth_931x_hw_init, .hw_stop = &rteth_931x_hw_stop, From 14145abcb2d9a1399877d8751f3cbe4e04efbc9d Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Fri, 27 Mar 2026 19:38:02 +0000 Subject: [PATCH 30/78] wpa_supplicant: add ifname to recieved ctrl-event notifications Simplifies subscribing to multiple objects. Signed-off-by: Felix Fietkau --- package/network/services/hostapd/files/wpa_supplicant.uc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/network/services/hostapd/files/wpa_supplicant.uc b/package/network/services/hostapd/files/wpa_supplicant.uc index a0ecdde5cd..f3beba8186 100644 --- a/package/network/services/hostapd/files/wpa_supplicant.uc +++ b/package/network/services/hostapd/files/wpa_supplicant.uc @@ -943,7 +943,7 @@ function iface_ubus_notify(ifname, event) if (!obj) return; - obj.notify('ctrl-event', { event }, null, null, null, -1); + obj.notify('ctrl-event', { ifname, event }, null, null, null, -1); } function iface_ubus_add(ifname) From 53931f03dddc32d8aa398d57c855387baca9d3b6 Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Fri, 27 Mar 2026 19:44:02 +0000 Subject: [PATCH 31/78] wpa_supplicant: include ctrl-event on the DPP channel Simplifies managing state Signed-off-by: Felix Fietkau --- .../services/hostapd/files/wpa_supplicant.uc | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/package/network/services/hostapd/files/wpa_supplicant.uc b/package/network/services/hostapd/files/wpa_supplicant.uc index f3beba8186..8cb9df24ab 100644 --- a/package/network/services/hostapd/files/wpa_supplicant.uc +++ b/package/network/services/hostapd/files/wpa_supplicant.uc @@ -499,16 +499,24 @@ function dpp_channel_handle_disconnect(channel) } } -function dpp_rx_via_channel(ifname, method, data) +function dpp_rx_via_channel(ifname, method, data, no_reply) { let hook = wpas.data.dpp_hooks[ifname]; if (!hook) return null; - let response = hook.channel.request({ + let req = { method: method, data: data, - }); + }; + + if (no_reply) { + req.return = "ignore"; + hook.channel.request(req); + return null; + } + + let response = hook.channel.request(req); if (hook.channel.error(true) == libubus.STATUS_TIMEOUT) { hook.timeout_count++; if (hook.timeout_count >= 3) { @@ -939,11 +947,14 @@ function iface_ubus_remove(ifname) function iface_ubus_notify(ifname, event) { + event = { ifname, event }; + + dpp_rx_via_channel(ifname, "ctrl-event", event, true); let obj = wpas.data.iface_ubus[ifname]; if (!obj) return; - obj.notify('ctrl-event', { ifname, event }, null, null, null, -1); + obj.notify('ctrl-event', event, null, null, null, -1); } function iface_ubus_add(ifname) From 14d09b78b50773d09f29218665a409157e09e8bb Mon Sep 17 00:00:00 2001 From: air jinkela Date: Mon, 15 Dec 2025 22:24:08 +0800 Subject: [PATCH 32/78] mediatek: rax3000m: add Airoha AN8855 switch support This commit adds support for Airoha AN8855 switch to RAX000Me Fixes: https://github.com/openwrt/openwrt/issues/21230 Signed-off-by: air jinkela Link: https://github.com/openwrt/openwrt/pull/21171 Signed-off-by: Hauke Mehrtens --- .../mediatek/dts/mt7981b-cmcc-rax3000m.dts | 147 ++++++++++++++++++ 1 file changed, 147 insertions(+) diff --git a/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m.dts b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m.dts index 36e77eb2c8..aa023b0e55 100644 --- a/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m.dts +++ b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m.dts @@ -105,6 +105,11 @@ interrupt-parent = <&pio>; interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; }; + + mfd: mfd@1 { + compatible = "airoha,an8855-mfd"; + reg = <1>; + }; }; &switch { @@ -141,6 +146,148 @@ }; }; +&mfd { + efuse { + compatible = "airoha,an8855-efuse"; + #nvmem-cell-cells = <0>; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + shift_sel_port0_tx_a: shift-sel-port0-tx-a@c { + reg = <0xc 0x4>; + }; + + shift_sel_port0_tx_b: shift-sel-port0-tx-b@10 { + reg = <0x10 0x4>; + }; + + shift_sel_port0_tx_c: shift-sel-port0-tx-c@14 { + reg = <0x14 0x4>; + }; + + shift_sel_port0_tx_d: shift-sel-port0-tx-d@18 { + reg = <0x18 0x4>; + }; + + shift_sel_port1_tx_a: shift-sel-port1-tx-a@1c { + reg = <0x1c 0x4>; + }; + + shift_sel_port1_tx_b: shift-sel-port1-tx-b@20 { + reg = <0x20 0x4>; + }; + + shift_sel_port1_tx_c: shift-sel-port1-tx-c@24 { + reg = <0x24 0x4>; + }; + + shift_sel_port1_tx_d: shift-sel-port1-tx-d@28 { + reg = <0x28 0x4>; + }; + + shift_sel_port2_tx_a: shift-sel-port2-tx-a@2c { + reg = <0x2c 0x4>; + }; + + shift_sel_port2_tx_b: shift-sel-port2-tx-b@30 { + reg = <0x30 0x4>; + }; + + shift_sel_port2_tx_c: shift-sel-port2-tx-c@34 { + reg = <0x34 0x4>; + }; + + shift_sel_port2_tx_d: shift-sel-port2-tx-d@38 { + reg = <0x38 0x4>; + }; + }; + }; + + ethernet-switch { + compatible = "airoha,an8855-switch"; + reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; + airoha,ext-surge; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&internal_phy1>; + }; + + port@1 { + reg = <1>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&internal_phy2>; + }; + + port@2 { + reg = <2>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&internal_phy3>; + }; + + port@5 { + reg = <5>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + }; + }; + + mdio { + compatible = "airoha,an8855-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + internal_phy1: phy@1 { + reg = <1>; + + nvmem-cells = <&shift_sel_port0_tx_a>, + <&shift_sel_port0_tx_b>, + <&shift_sel_port0_tx_c>, + <&shift_sel_port0_tx_d>; + nvmem-cell-names = "tx_a", "tx_b", "tx_c", "tx_d"; + }; + + internal_phy2: phy@2 { + reg = <2>; + + nvmem-cells = <&shift_sel_port1_tx_a>, + <&shift_sel_port1_tx_b>, + <&shift_sel_port1_tx_c>, + <&shift_sel_port1_tx_d>; + nvmem-cell-names = "tx_a", "tx_b", "tx_c", "tx_d"; + }; + + internal_phy3: phy@3 { + reg = <3>; + + nvmem-cells = <&shift_sel_port2_tx_a>, + <&shift_sel_port2_tx_b>, + <&shift_sel_port2_tx_c>, + <&shift_sel_port2_tx_d>; + nvmem-cell-names = "tx_a", "tx_b", "tx_c", "tx_d"; + }; + }; +}; + &uart0 { status = "okay"; }; From 3166710fc96c6926a71eea1d72ac1d15cc00172e Mon Sep 17 00:00:00 2001 From: Rany Hany Date: Mon, 30 Mar 2026 13:37:03 +0000 Subject: [PATCH 33/78] ramips: mt7621: fix reset hang and re-enable LIST_HARDENED This reverts commit a2fa1db79726dab47d994df530bc8f02d14de68b. These patches stop secondary CPUs before restart and wait for them to go offline, fixing the mt7621 reboot deadlock without needing to disable CONFIG_LIST_HARDENED. Signed-off-by: Rany Hany Link: https://github.com/openwrt/openwrt/pull/22724 Signed-off-by: Hauke Mehrtens --- target/linux/ramips/mt7621/config-6.12 | 1 - ...ary-CPUs-before-platform-restart-hal.patch | 67 +++++++++++ ...r-secondary-CPUs-to-stop-in-smp_send.patch | 36 ++++++ ...erly-stop-secondary-CPUs-for-restart.patch | 104 ++++++++++++++++++ 4 files changed, 207 insertions(+), 1 deletion(-) create mode 100644 target/linux/ramips/patches-6.12/932-MIPS-Stop-secondary-CPUs-before-platform-restart-hal.patch create mode 100644 target/linux/ramips/patches-6.12/933-MIPS-SMP-Wait-for-secondary-CPUs-to-stop-in-smp_send.patch create mode 100644 target/linux/ramips/patches-6.12/934-MIPS-SMP-Properly-stop-secondary-CPUs-for-restart.patch diff --git a/target/linux/ramips/mt7621/config-6.12 b/target/linux/ramips/mt7621/config-6.12 index 4a8352241e..dac61e6ba1 100644 --- a/target/linux/ramips/mt7621/config-6.12 +++ b/target/linux/ramips/mt7621/config-6.12 @@ -114,7 +114,6 @@ CONFIG_IRQ_MIPS_CPU=y CONFIG_IRQ_WORK=y CONFIG_LED_TRIGGER_PHY=y CONFIG_LIBFDT=y -# CONFIG_LIST_HARDENED is not set CONFIG_LOCK_DEBUGGING_SUPPORT=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y diff --git a/target/linux/ramips/patches-6.12/932-MIPS-Stop-secondary-CPUs-before-platform-restart-hal.patch b/target/linux/ramips/patches-6.12/932-MIPS-Stop-secondary-CPUs-before-platform-restart-hal.patch new file mode 100644 index 0000000000..144c95bd25 --- /dev/null +++ b/target/linux/ramips/patches-6.12/932-MIPS-Stop-secondary-CPUs-before-platform-restart-hal.patch @@ -0,0 +1,67 @@ +From 641e36faf86bcd9b6dc2cd4a6d6e3fc604ee6397 Mon Sep 17 00:00:00 2001 +From: Rany Hany +Date: Tue, 31 Mar 2026 17:46:35 +0300 +Subject: [PATCH 1/3] MIPS: Stop secondary CPUs before platform + restart/halt/poweroff + +smp_send_stop() was placed after the platform restart, halt, and +power-off callbacks. These callbacks never return, so smp_send_stop() +was dead code and secondary CPUs were never stopped before the system +reset. Move smp_send_stop() before the callbacks. + +Signed-off-by: Rany Hany +--- + arch/mips/kernel/reset.c | 19 +++++++++++-------- + 1 file changed, 11 insertions(+), 8 deletions(-) + +--- a/arch/mips/kernel/reset.c ++++ b/arch/mips/kernel/reset.c +@@ -87,13 +87,14 @@ static void machine_hang(void) + + void machine_restart(char *command) + { +- if (_machine_restart) +- _machine_restart(command); +- + #ifdef CONFIG_SMP + preempt_disable(); + smp_send_stop(); + #endif ++ ++ if (_machine_restart) ++ _machine_restart(command); ++ + do_kernel_restart(command); + mdelay(1000); + pr_emerg("Reboot failed -- System halted\n"); +@@ -102,23 +103,25 @@ void machine_restart(char *command) + + void machine_halt(void) + { +- if (_machine_halt) +- _machine_halt(); +- + #ifdef CONFIG_SMP + preempt_disable(); + smp_send_stop(); + #endif ++ ++ if (_machine_halt) ++ _machine_halt(); ++ + machine_hang(); + } + + void machine_power_off(void) + { +- do_kernel_power_off(); +- + #ifdef CONFIG_SMP + preempt_disable(); + smp_send_stop(); + #endif ++ ++ do_kernel_power_off(); ++ + machine_hang(); + } diff --git a/target/linux/ramips/patches-6.12/933-MIPS-SMP-Wait-for-secondary-CPUs-to-stop-in-smp_send.patch b/target/linux/ramips/patches-6.12/933-MIPS-SMP-Wait-for-secondary-CPUs-to-stop-in-smp_send.patch new file mode 100644 index 0000000000..74adbbefe9 --- /dev/null +++ b/target/linux/ramips/patches-6.12/933-MIPS-SMP-Wait-for-secondary-CPUs-to-stop-in-smp_send.patch @@ -0,0 +1,36 @@ +From 251cd7607a3dcc578b249d2a685db99d7da73975 Mon Sep 17 00:00:00 2001 +From: Rany Hany +Date: Tue, 31 Mar 2026 18:07:36 +0300 +Subject: [PATCH 2/3] MIPS: SMP: Wait for secondary CPUs to stop in + smp_send_stop() + +smp_send_stop() returns immediately without waiting. + +Wait up to one second for secondary CPUs to mark themselves offline +before returning, similar to what ARM and ARM64 already do. + +Signed-off-by: Rany Hany +--- + arch/mips/kernel/smp.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +--- a/arch/mips/kernel/smp.c ++++ b/arch/mips/kernel/smp.c +@@ -416,7 +416,17 @@ static void stop_this_cpu(void *dummy) + + void smp_send_stop(void) + { ++ unsigned long timeout; ++ + smp_call_function(stop_this_cpu, NULL, 0); ++ ++ /* Wait up to 1s for other CPUs to stop */ ++ timeout = USEC_PER_SEC; ++ while (num_online_cpus() > 1 && timeout--) ++ udelay(1); ++ ++ if (num_online_cpus() > 1) ++ pr_warn("SMP: failed to stop secondary CPUs\n"); + } + + void __init smp_cpus_done(unsigned int max_cpus) diff --git a/target/linux/ramips/patches-6.12/934-MIPS-SMP-Properly-stop-secondary-CPUs-for-restart.patch b/target/linux/ramips/patches-6.12/934-MIPS-SMP-Properly-stop-secondary-CPUs-for-restart.patch new file mode 100644 index 0000000000..2587592139 --- /dev/null +++ b/target/linux/ramips/patches-6.12/934-MIPS-SMP-Properly-stop-secondary-CPUs-for-restart.patch @@ -0,0 +1,104 @@ +From de332bdaf33c09be03c05c0681beae1276ccbcc2 Mon Sep 17 00:00:00 2001 +From: Rany Hany +Date: Tue, 31 Mar 2026 20:29:53 +0300 +Subject: [PATCH 3/3] MIPS: SMP: Properly stop secondary CPUs for restart + +MT7621 deadlocks in the platform restart callback unless the other +CPUs are stopped by taking other cores out of coherence and clocking +them off, while halting sibling TCs on the restarting core. + +This fixes restart deadlocks on MT7621, although the exact reason +why this is required is still unclear. + +Signed-off-by: Rany Hany +--- + arch/mips/kernel/smp.c | 54 +++++++++++++++++++++++++++++++++++++++++- + 1 file changed, 53 insertions(+), 1 deletion(-) + +--- a/arch/mips/kernel/smp.c ++++ b/arch/mips/kernel/smp.c +@@ -32,6 +32,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -402,6 +403,8 @@ asmlinkage void start_secondary(void) + cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); + } + ++static atomic_t core_stop_count[NR_CPUS]; ++ + static void stop_this_cpu(void *dummy) + { + /* +@@ -411,13 +414,66 @@ static void stop_this_cpu(void *dummy) + set_cpu_online(smp_processor_id(), false); + calculate_cpu_foreign_map(); + local_irq_disable(); +- while (1); ++ ++ if (mips_cm_present() && r4k_blast_dcache) { ++ unsigned int core = cpu_core(¤t_cpu_data); ++ ++ if (atomic_dec_and_test(&core_stop_count[core])) { ++ /* Flush data cache */ ++ r4k_blast_dcache(); ++ __sync(); ++ ++ if (mips_cm_revision() < CM_REV_CM3) { ++ /* Restrict coherence to own core first */ ++ write_gcr_cl_coherence(1 << core); ++ read_gcr_cl_coherence(); ++ __sync(); ++ } ++ ++ /* Disable coherence */ ++ write_gcr_cl_coherence(0); ++ read_gcr_cl_coherence(); ++ ++ /* Gate the core clock */ ++ if (mips_cpc_present()) ++ write_cpc_cl_cmd(CPC_Cx_CMD_CLOCKOFF); ++ } ++ } ++ ++ if (cpu_has_mipsmt) { ++ /* The last active VPE on the core will gate the core clock ++ * and all other remaining VPEs will halt this TC instead. ++ * ++ * Note that on systems without CPC, this will be the ++ * only way to shutdown the CPU. ++ */ ++ write_c0_tchalt(TCHALT_H); ++ instruction_hazard(); ++ } ++ ++ while (1) ++ cpu_relax(); + } + + void smp_send_stop(void) + { ++ static unsigned long stop_in_progress; + unsigned long timeout; + ++ if (test_and_set_bit(0, &stop_in_progress)) ++ return; ++ ++ if (mips_cm_present()) { ++ unsigned int cpu; ++ ++ for_each_online_cpu(cpu) { ++ unsigned int core; ++ ++ core = cpu_core(&cpu_data[cpu]); ++ atomic_inc(&core_stop_count[core]); ++ } ++ } ++ + smp_call_function(stop_this_cpu, NULL, 0); + + /* Wait up to 1s for other CPUs to stop */ From 0d769903dd1326b7071d6d1a8df5228039e3b793 Mon Sep 17 00:00:00 2001 From: Sander Vanheule Date: Sun, 5 Apr 2026 20:58:54 +0200 Subject: [PATCH 34/78] realtek: Indicate that RTL8231 LED ops can sleep The RTL8231 LED driver is using the .brightness_set op, which according to the documentation should not sleep. Since the RTL8231 is controlled via an MDIO bus, this is not the case. When using a non-offloaded LED driver such as netdev, this may currently trigger kernel warnings: WARNING: CPU: 0 PID: 14 at kernel/time/timer.c:1754 call_timer_fn.isra.0+0x84/0x8c timer: led_timer_function+0x0/0x1d8 preempt leak: 00000100 -> 00000000 Switch to the .brightness_set_blocking op to indicate the operation might sleep. Fixes: 6ef6014887c3 ("realtek: Add pinctrl support for RTL8231") Signed-off-by: Sander Vanheule --- ...804-leds-Add-support-for-RTL8231-LED-scan-matrix.patch | 8 ++++---- ...804-leds-Add-support-for-RTL8231-LED-scan-matrix.patch | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/target/linux/realtek/patches-6.12/804-leds-Add-support-for-RTL8231-LED-scan-matrix.patch b/target/linux/realtek/patches-6.12/804-leds-Add-support-for-RTL8231-LED-scan-matrix.patch index c6527d04b1..ca2e63d939 100644 --- a/target/linux/realtek/patches-6.12/804-leds-Add-support-for-RTL8231-LED-scan-matrix.patch +++ b/target/linux/realtek/patches-6.12/804-leds-Add-support-for-RTL8231-LED-scan-matrix.patch @@ -129,15 +129,15 @@ Signed-off-by: Sander Vanheule + .toggle_rates = rtl8231_toggle_rates, +}; + -+static void rtl8231_led_brightness_set(struct led_classdev *led_cdev, ++static int rtl8231_led_brightness_set(struct led_classdev *led_cdev, + enum led_brightness brightness) +{ + struct rtl8231_led *pled = to_rtl8231_led(led_cdev); + + if (brightness) -+ regmap_field_write(pled->reg_field, pled->modes->on); ++ return regmap_field_write(pled->reg_field, pled->modes->on); + else -+ regmap_field_write(pled->reg_field, pled->modes->off); ++ return regmap_field_write(pled->reg_field, pled->modes->off); +} + +static enum led_brightness rtl8231_led_brightness_get(struct led_classdev *led_cdev) @@ -276,7 +276,7 @@ Signed-off-by: Sander Vanheule + + pled->led.max_brightness = 1; + pled->led.brightness_get = rtl8231_led_brightness_get; -+ pled->led.brightness_set = rtl8231_led_brightness_set; ++ pled->led.brightness_set_blocking = rtl8231_led_brightness_set; + pled->led.blink_set = rtl8231_led_blink_set; + + init_data.fwnode = fwnode; diff --git a/target/linux/realtek/patches-6.18/804-leds-Add-support-for-RTL8231-LED-scan-matrix.patch b/target/linux/realtek/patches-6.18/804-leds-Add-support-for-RTL8231-LED-scan-matrix.patch index 946b64942e..48099890e4 100644 --- a/target/linux/realtek/patches-6.18/804-leds-Add-support-for-RTL8231-LED-scan-matrix.patch +++ b/target/linux/realtek/patches-6.18/804-leds-Add-support-for-RTL8231-LED-scan-matrix.patch @@ -129,15 +129,15 @@ Signed-off-by: Sander Vanheule + .toggle_rates = rtl8231_toggle_rates, +}; + -+static void rtl8231_led_brightness_set(struct led_classdev *led_cdev, ++static int rtl8231_led_brightness_set(struct led_classdev *led_cdev, + enum led_brightness brightness) +{ + struct rtl8231_led *pled = to_rtl8231_led(led_cdev); + + if (brightness) -+ regmap_field_write(pled->reg_field, pled->modes->on); ++ return regmap_field_write(pled->reg_field, pled->modes->on); + else -+ regmap_field_write(pled->reg_field, pled->modes->off); ++ return regmap_field_write(pled->reg_field, pled->modes->off); +} + +static enum led_brightness rtl8231_led_brightness_get(struct led_classdev *led_cdev) @@ -276,7 +276,7 @@ Signed-off-by: Sander Vanheule + + pled->led.max_brightness = 1; + pled->led.brightness_get = rtl8231_led_brightness_get; -+ pled->led.brightness_set = rtl8231_led_brightness_set; ++ pled->led.brightness_set_blocking = rtl8231_led_brightness_set; + pled->led.blink_set = rtl8231_led_blink_set; + + init_data.fwnode = fwnode; From 86bb0d7d27e14bfa5ab5ddb9a1af489aac5fc268 Mon Sep 17 00:00:00 2001 From: seuros Date: Tue, 10 Mar 2026 23:32:04 +0000 Subject: [PATCH 35/78] tools/e2fsprogs: fix build with system libblkid probe API When building on a host with e2fsprogs >= 1.47.0 installed, configure detects the system libblkid probe API (blkid_probe_get_partitions etc.) and sets ac_cv_lib_blkid_blkid_get_cache=yes. This causes plausible.c to be compiled with HAVE_BLKID_PROBE_GET_PARTITIONS defined, but the host build links against the internal blkid stub, resulting in: plausible.c: error: unknown type name 'blkid_probe' Override the configure cache variables to prevent detection of the system libblkid probe API, ensuring the internal stub is used consistently. Signed-off-by: seuros Link: https://github.com/openwrt/openwrt/pull/22368 Signed-off-by: Hauke Mehrtens --- tools/e2fsprogs/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tools/e2fsprogs/Makefile b/tools/e2fsprogs/Makefile index 6b105ed9a8..f760710c5b 100644 --- a/tools/e2fsprogs/Makefile +++ b/tools/e2fsprogs/Makefile @@ -31,7 +31,8 @@ HOST_CONFIGURE_ARGS += \ --disable-nls \ --enable-threads=pth \ --disable-fuse2fs \ - --with-crond-dir=no + --with-crond-dir=no \ + --enable-libblkid # The following uses pkg-config the wrong way around. Just override it. HOST_CONFIGURE_VARS += \ From 1ffe67b00f0e07bbed2cbc4cf48c806d4c1000c0 Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Mon, 19 May 2025 19:03:43 +0800 Subject: [PATCH 36/78] lantiq: dts: rename spi pins node name to spi-pins The dtc will treat "spi" node as an SPI controller. This resulted in lots of false warning reports. Workaround it by renaming the pinctrl node name to "spi-pins". This patch fixes the following dtc warnings: vr9.dtsi:326.18-336.6: Warning (spi_bus_bridge): /fpi@10000000/pinmux@e100b10/spi: incorrect #address-cells for SPI bus vr9.dtsi:326.18-336.6: Warning (spi_bus_bridge): /fpi@10000000/pinmux@e100b10/spi: incorrect #size-cells for SPI bus ar9.dtsi:286.18-296.6: Warning (spi_bus_bridge): /fpi@10000000/pinmux@e100b10/spi: incorrect #address-cells for SPI bus ar9.dtsi:286.18-296.6: Warning (spi_bus_bridge): /fpi@10000000/pinmux@e100b10/spi: incorrect #size-cells for SPI bus amazonse.dtsi:166.18-176.6: Warning (spi_bus_bridge): /fpi@10000000/pinmux@e100b10/spi: incorrect #address-cells for SPI bus amazonse.dtsi:166.18-176.6: Warning (spi_bus_bridge): /fpi@10000000/pinmux@e100b10/spi: incorrect #size-cells for SPI bus Signed-off-by: Shiji Yang Link: https://github.com/openwrt/openwrt/pull/18843 Signed-off-by: Hauke Mehrtens --- .../linux/lantiq/files/arch/mips/boot/dts/lantiq/amazonse.dtsi | 2 +- target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9.dtsi | 2 +- target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9.dtsi | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/amazonse.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/amazonse.dtsi index e396ed2496..95ddf00cc7 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/amazonse.dtsi +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/amazonse.dtsi @@ -163,7 +163,7 @@ }; }; - spi_pins: spi { + spi_pins: spi-pins { mux-0 { lantiq,groups = "spi_di"; lantiq,function = "spi"; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9.dtsi index 541c58a26e..4e72210226 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9.dtsi +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9.dtsi @@ -283,7 +283,7 @@ }; }; - spi_pins: spi { + spi_pins: spi-pins { mux-0 { lantiq,groups = "spi_di"; lantiq,function = "spi"; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9.dtsi index 1a2e51032d..d821d29a13 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9.dtsi +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9.dtsi @@ -323,7 +323,7 @@ }; }; - spi_pins: spi { + spi_pins: spi-pins { mux-0 { lantiq,groups = "spi_di"; lantiq,function = "spi"; From 5fd4abf74da0a4ce39796c9cc1544e5de6aa14ca Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Mon, 19 May 2025 19:07:17 +0800 Subject: [PATCH 37/78] lantiq: dts: correct the size of PCIe reg property Correct PCIe node #address-cells and #size-cells properties to fix the following dtc warnings: vr9_avm_fritz3390.dts:297.4-22: Warning (reg_format): /fpi@10000000/pcie@d900000/pcie@0/wifi@0,0:reg: property has invalid length (20 bytes) (#address-cells == 2, #size-cells == 1) vr9_avm_fritz3390.dts:288.9-300.4: Warning (pci_bridge): /fpi@10000000/pcie@d900000/pcie@0: incorrect #address-cells for PCI bridge vr9_avm_fritz3390.dts:288.9-300.4: Warning (pci_bridge): /fpi@10000000/pcie@d900000/pcie@0: incorrect #size-cells for PCI bridge vr9_avm_fritz736x.dtsi:168.4-22: Warning (reg_format): /fpi@10000000/pcie@d900000/pcie@0/wifi@0,0:reg: property has invalid length (20 bytes) (#address-cells == 2, #size-cells == 1) vr9_avm_fritz736x.dtsi:160.9-170.4: Warning (pci_bridge): /fpi@10000000/pcie@d900000/pcie@0: incorrect #address-cells for PCI bridge vr9_avm_fritz736x.dtsi:160.9-170.4: Warning (pci_bridge): /fpi@10000000/pcie@d900000/pcie@0: incorrect #size-cells for PCI bridge Signed-off-by: Shiji Yang Link: https://github.com/openwrt/openwrt/pull/18843 Signed-off-by: Hauke Mehrtens --- .../files/arch/mips/boot/dts/lantiq/vr9_avm_fritz3390.dts | 4 ++-- .../files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7362sl.dts | 5 ----- .../files/arch/mips/boot/dts/lantiq/vr9_avm_fritz736x.dtsi | 4 ++-- 3 files changed, 4 insertions(+), 9 deletions(-) diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz3390.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz3390.dts index dc81f81ca4..657c765a9d 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz3390.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz3390.dts @@ -288,8 +288,8 @@ pcie@0 { reg = <0 0 0 0 0>; #interrupt-cells = <1>; - #size-cells = <1>; - #address-cells = <2>; + #address-cells = <3>; + #size-cells = <2>; device_type = "pci"; wifi@0,0 { diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7362sl.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7362sl.dts index 118f155290..1f7546c709 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7362sl.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7362sl.dts @@ -106,11 +106,6 @@ &pcie0 { gpio-reset = <&gpio 21 GPIO_ACTIVE_LOW>; - - pcie@0 { - #size-cells = <1>; - #address-cells = <2>; - }; }; ð0 { diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz736x.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz736x.dtsi index 795585bc07..3e9ce70bb9 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz736x.dtsi +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz736x.dtsi @@ -161,8 +161,8 @@ pcie@0 { reg = <0 0 0 0 0>; #interrupt-cells = <1>; - #size-cells = <1>; - #address-cells = <2>; + #address-cells = <3>; + #size-cells = <2>; device_type = "pci"; wifi: wifi@0,0 { From 3d1e703ea3a39d480c25c7d2b27e9613b77c93cf Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Mon, 19 May 2025 19:26:47 +0800 Subject: [PATCH 38/78] lantiq: dts: fix PCIe peripheral node name dtc warnings Remove unit name leading 0s to fix the following dtc warnings: danube_arcadyan_arv752dpw22.dts:263.11-273.4: Warning (pci_device_reg): /fpi@10000000/pci@e105400/usb@0f,0: PCI unit address format error, expected "f,0" danube_arcadyan_arv752dpw22.dts:275.11-285.4: Warning (pci_device_reg): /fpi@10000000/pci@e105400/usb@0f,2: PCI unit address format error, expected "f,2" Signed-off-by: Shiji Yang Link: https://github.com/openwrt/openwrt/pull/18843 Signed-off-by: Hauke Mehrtens --- .../arch/mips/boot/dts/lantiq/danube_arcadyan_arv752dpw22.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv752dpw22.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv752dpw22.dts index 115410a538..e8fbf4c109 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv752dpw22.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv752dpw22.dts @@ -262,7 +262,7 @@ nvmem-cell-names = "eeprom", "mac-address"; }; - usb@0f,0 { + usb@f,0 { #address-cells = <1>; #size-cells = <0>; compatible = "pci1106,3038"; @@ -274,7 +274,7 @@ }; }; - usb@0f,2 { + usb@f,2 { #address-cells = <1>; #size-cells = <0>; compatible = "pci1106,3038"; From cb5e197696c98b4baed5df2dab251d211402a95e Mon Sep 17 00:00:00 2001 From: Rosen Penev Date: Thu, 22 May 2025 18:42:21 -0700 Subject: [PATCH 39/78] mac80211: ath9k: remove entropy patch This was replaced upstream with a proper rng device that feeds into /dev/random. No need for this anymore. Signed-off-by: Rosen Penev Link: https://github.com/openwrt/openwrt/pull/22766 Signed-off-by: Hauke Mehrtens --- .../ath9k/543-ath9k_entropy_from_adc.patch | 186 ------------------ 1 file changed, 186 deletions(-) delete mode 100644 package/kernel/mac80211/patches/ath9k/543-ath9k_entropy_from_adc.patch diff --git a/package/kernel/mac80211/patches/ath9k/543-ath9k_entropy_from_adc.patch b/package/kernel/mac80211/patches/ath9k/543-ath9k_entropy_from_adc.patch deleted file mode 100644 index 8966cca2b6..0000000000 --- a/package/kernel/mac80211/patches/ath9k/543-ath9k_entropy_from_adc.patch +++ /dev/null @@ -1,186 +0,0 @@ ---- a/drivers/net/wireless/ath/ath9k/hw.h -+++ b/drivers/net/wireless/ath/ath9k/hw.h -@@ -723,6 +723,7 @@ struct ath_spec_scan { - * @config_pci_powersave: - * @calibrate: periodic calibration for NF, ANI, IQ, ADC gain, ADC-DC - * -+ * @get_adc_entropy: get entropy from the raw ADC I/Q output - * @spectral_scan_config: set parameters for spectral scan and enable/disable it - * @spectral_scan_trigger: trigger a spectral scan run - * @spectral_scan_wait: wait for a spectral scan run to finish -@@ -745,6 +746,7 @@ struct ath_hw_ops { - struct ath_hw_antcomb_conf *antconf); - void (*antdiv_comb_conf_set)(struct ath_hw *ah, - struct ath_hw_antcomb_conf *antconf); -+ void (*get_adc_entropy)(struct ath_hw *ah, u8 *buf, size_t len); - void (*spectral_scan_config)(struct ath_hw *ah, - struct ath_spec_scan *param); - void (*spectral_scan_trigger)(struct ath_hw *ah); ---- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c -+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c -@@ -1915,6 +1915,26 @@ void ar9003_hw_init_rate_txpower(struct - } - } - -+static void ar9003_hw_get_adc_entropy(struct ath_hw *ah, u8 *buf, size_t len) -+{ -+ int i, j; -+ -+ REG_RMW_FIELD(ah, AR_PHY_TEST(ah), AR_PHY_TEST_BBB_OBS_SEL, 1); -+ REG_CLR_BIT(ah, AR_PHY_TEST(ah), AR_PHY_TEST_RX_OBS_SEL_BIT5); -+ REG_RMW_FIELD(ah, AR_PHY_TEST_CTL_STATUS(ah), AR_PHY_TEST_CTL_RX_OBS_SEL, 0); -+ -+ memset(buf, 0, len); -+ for (i = 0; i < len; i++) { -+ for (j = 0; j < 4; j++) { -+ u32 regval = REG_READ(ah, AR_PHY_TST_ADC); -+ -+ buf[i] <<= 2; -+ buf[i] |= (regval & 1) | ((regval & BIT(10)) >> 9); -+ udelay(1); -+ } -+ } -+} -+ - void ar9003_hw_attach_phy_ops(struct ath_hw *ah) - { - struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); -@@ -1951,6 +1971,7 @@ void ar9003_hw_attach_phy_ops(struct ath - priv_ops->set_radar_params = ar9003_hw_set_radar_params; - priv_ops->fast_chan_change = ar9003_hw_fast_chan_change; - -+ ops->get_adc_entropy = ar9003_hw_get_adc_entropy; - ops->antdiv_comb_conf_get = ar9003_hw_antdiv_comb_conf_get; - ops->antdiv_comb_conf_set = ar9003_hw_antdiv_comb_conf_set; - ops->spectral_scan_config = ar9003_hw_spectral_scan_config; ---- a/drivers/net/wireless/ath/ath9k/init.c -+++ b/drivers/net/wireless/ath/ath9k/init.c -@@ -825,7 +825,8 @@ static void ath9k_init_txpower_limits(st - if (ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) - ath9k_init_band_txpower(sc, NL80211_BAND_5GHZ); - -- ah->curchan = curchan; -+ if (curchan) -+ ah->curchan = curchan; - } - - static const struct ieee80211_iface_limit if_limits[] = { -@@ -1003,6 +1004,18 @@ static void ath9k_set_hw_capab(struct at - wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0); - } - -+static void ath_get_initial_entropy(struct ath_softc *sc) -+{ -+ struct ath_hw *ah = sc->sc_ah; -+ char buf[256]; -+ -+ /* reuse last channel initialized by the tx power test */ -+ ath9k_hw_reset(ah, ah->curchan, NULL, false); -+ -+ ath9k_hw_get_adc_entropy(ah, buf, sizeof(buf)); -+ add_device_randomness(buf, sizeof(buf)); -+} -+ - int ath9k_init_device(u16 devid, struct ath_softc *sc, - const struct ath_bus_ops *bus_ops) - { -@@ -1050,6 +1063,8 @@ int ath9k_init_device(u16 devid, struct - - wiphy_read_of_freq_limits(hw->wiphy); - -+ ath_get_initial_entropy(sc); -+ - /* Register with mac80211 */ - error = ieee80211_register_hw(hw); - if (error) ---- a/drivers/net/wireless/ath/ath9k/hw-ops.h -+++ b/drivers/net/wireless/ath/ath9k/hw-ops.h -@@ -100,6 +100,12 @@ static inline void ath9k_hw_tx99_set_txp - ath9k_hw_ops(ah)->tx99_set_txpower(ah, power); - } - -+static inline void ath9k_hw_get_adc_entropy(struct ath_hw *ah, -+ u8 *buf, size_t len) -+{ -+ ath9k_hw_ops(ah)->get_adc_entropy(ah, buf, len); -+} -+ - #ifdef CPTCFG_ATH9K_BTCOEX_SUPPORT - - static inline void ath9k_hw_set_bt_ant_diversity(struct ath_hw *ah, bool enable) ---- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c -+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c -@@ -1340,9 +1340,30 @@ void ar5008_hw_init_rate_txpower(struct - } - } - -+static void ar5008_hw_get_adc_entropy(struct ath_hw *ah, u8 *buf, size_t len) -+{ -+ int i, j; -+ -+ REG_RMW_FIELD(ah, AR_PHY_TEST, AR_PHY_TEST_BBB_OBS_SEL, 1); -+ REG_CLR_BIT(ah, AR_PHY_TEST, AR_PHY_TEST_RX_OBS_SEL_BIT5); -+ REG_RMW_FIELD(ah, AR_PHY_TEST2, AR_PHY_TEST2_RX_OBS_SEL, 0); -+ -+ memset(buf, 0, len); -+ for (i = 0; i < len; i++) { -+ for (j = 0; j < 4; j++) { -+ u32 regval = REG_READ(ah, AR_PHY_TST_ADC); -+ -+ buf[i] <<= 2; -+ buf[i] |= (regval & 1) | ((regval & BIT(9)) >> 8); -+ udelay(1); -+ } -+ } -+} -+ - int ar5008_hw_attach_phy_ops(struct ath_hw *ah) - { - struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); -+ struct ath_hw_ops *ops = ath9k_hw_ops(ah); - static const u32 ar5416_cca_regs[6] = { - AR_PHY_CCA, - AR_PHY_CH1_CCA, -@@ -1357,6 +1378,8 @@ int ar5008_hw_attach_phy_ops(struct ath_ - if (ret) - return ret; - -+ ops->get_adc_entropy = ar5008_hw_get_adc_entropy; -+ - priv_ops->rf_set_freq = ar5008_hw_set_channel; - priv_ops->spur_mitigate_freq = ar5008_hw_spur_mitigate; - ---- a/drivers/net/wireless/ath/ath9k/ar9002_phy.h -+++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.h -@@ -20,6 +20,12 @@ - #define PHY_AGC_CLR 0x10000000 - #define RFSILENT_BB 0x00002000 - -+#define AR_PHY_TEST_BBB_OBS_SEL 0x780000 -+#define AR_PHY_TEST_BBB_OBS_SEL_S 19 -+ -+#define AR_PHY_TEST_RX_OBS_SEL_BIT5_S 23 -+#define AR_PHY_TEST_RX_OBS_SEL_BIT5 (1 << AR_PHY_TEST_RX_OBS_SEL_BIT5_S) -+ - #define AR_PHY_TURBO 0x9804 - #define AR_PHY_FC_TURBO_MODE 0x00000001 - #define AR_PHY_FC_TURBO_SHORT 0x00000002 -@@ -36,6 +42,9 @@ - - #define AR_PHY_TEST2 0x9808 - -+#define AR_PHY_TEST2_RX_OBS_SEL 0x3C00 -+#define AR_PHY_TEST2_RX_OBS_SEL_S 10 -+ - #define AR_PHY_TIMING2 0x9810 - #define AR_PHY_TIMING3 0x9814 - #define AR_PHY_TIMING3_DSC_MAN 0xFFFE0000 -@@ -393,6 +402,8 @@ - #define AR_PHY_RFBUS_GRANT 0x9C20 - #define AR_PHY_RFBUS_GRANT_EN 0x00000001 - -+#define AR_PHY_TST_ADC 0x9C24 -+ - #define AR_PHY_CHAN_INFO_GAIN_DIFF 0x9CF4 - #define AR_PHY_CHAN_INFO_GAIN_DIFF_UPPER_LIMIT 320 - From 45c818ff10897c0f70bc82989dc490d8edbf5e6a Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Thu, 19 Feb 2026 19:56:55 +0800 Subject: [PATCH 40/78] ramips: mt7621: build MediaTek T-PHY driver MT7621 USB phys are compatible with the MediaTek T-PHY controller. The vendor SDK also enabled this driver for MT7621. Signed-off-by: Shiji Yang Link: https://github.com/openwrt/openwrt/pull/22094 Signed-off-by: Hauke Mehrtens --- target/linux/ramips/mt7621/config-6.12 | 1 + ...ow-building-T-PHY-driver-for-MT7621-.patch | 24 +++++++++++++++++++ 2 files changed, 25 insertions(+) create mode 100644 target/linux/ramips/patches-6.12/130-phy-mediatek-allow-building-T-PHY-driver-for-MT7621-.patch diff --git a/target/linux/ramips/mt7621/config-6.12 b/target/linux/ramips/mt7621/config-6.12 index dac61e6ba1..b59d25420d 100644 --- a/target/linux/ramips/mt7621/config-6.12 +++ b/target/linux/ramips/mt7621/config-6.12 @@ -229,6 +229,7 @@ CONFIG_PHYLIB=y CONFIG_PHYLIB_LEDS=y CONFIG_PHYLINK=y CONFIG_PHY_MT7621_PCI=y +# CONFIG_PHY_MTK_TPHY is not set # CONFIG_PHY_RALINK_USB is not set CONFIG_PINCTRL=y CONFIG_PINCTRL_AW9523=y diff --git a/target/linux/ramips/patches-6.12/130-phy-mediatek-allow-building-T-PHY-driver-for-MT7621-.patch b/target/linux/ramips/patches-6.12/130-phy-mediatek-allow-building-T-PHY-driver-for-MT7621-.patch new file mode 100644 index 0000000000..8dc5a39545 --- /dev/null +++ b/target/linux/ramips/patches-6.12/130-phy-mediatek-allow-building-T-PHY-driver-for-MT7621-.patch @@ -0,0 +1,24 @@ +From 939c662ec8a221aedde213583e07e8c0cac810af Mon Sep 17 00:00:00 2001 +From: Shiji Yang +Date: Thu, 19 Feb 2026 14:23:56 +0800 +Subject: [PATCH] phy: mediatek: allow building T-PHY driver for MT7621 MIPS + SoC + +MT7621 also has compatible T-PHY which attached to the XHCI interface. + +Signed-off-by: Shiji Yang +--- + drivers/phy/mediatek/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/phy/mediatek/Kconfig ++++ b/drivers/phy/mediatek/Kconfig +@@ -26,7 +26,7 @@ config PHY_MTK_XFI_TPHY + + config PHY_MTK_TPHY + tristate "MediaTek T-PHY Driver" +- depends on ARCH_MEDIATEK || COMPILE_TEST ++ depends on ARCH_MEDIATEK || SOC_MT7621 || COMPILE_TEST + depends on OF && OF_ADDRESS + depends on HAS_IOMEM + select GENERIC_PHY From fcbaaddf088a00f038fcb57c63cc3cdc2c2371a6 Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Thu, 19 Feb 2026 19:57:18 +0800 Subject: [PATCH 41/78] ramips: dts: mt7621: add USB t-phy node The USB t-phy driver includes some magic register init values. This should be beneficial for the USB stability and performance. Signed-off-by: Shiji Yang Link: https://github.com/openwrt/openwrt/pull/22094 Signed-off-by: Hauke Mehrtens --- target/linux/ramips/dts/mt7621.dtsi | 28 +++++++++++++++++++ .../dts/mt7621_ampedwireless_ally-00x19k.dts | 4 +++ .../ramips/dts/mt7621_arcadyan_we410443.dts | 4 +++ .../dts/mt7621_arcadyan_we420223-99.dts | 4 +++ .../linux/ramips/dts/mt7621_asus_rp-ac56.dts | 4 +++ .../linux/ramips/dts/mt7621_asus_rp-ac87.dts | 4 +++ .../ramips/dts/mt7621_buffalo_wsr-1166dhp.dts | 4 +++ .../dts/mt7621_buffalo_wsr-2533dhpl.dts | 4 +++ .../dts/mt7621_buffalo_wsr-2533dhplx.dtsi | 4 +++ .../ramips/dts/mt7621_buffalo_wsr-600dhp.dts | 4 +++ .../linux/ramips/dts/mt7621_edimax_re23s.dts | 4 +++ .../linux/ramips/dts/mt7621_edimax_rx21s.dtsi | 4 +++ .../dts/mt7621_elecom_wrc-1167ghbk2-s.dts | 4 +++ .../dts/mt7621_elecom_wrc-2533ghbk.dtsi | 4 +++ .../ramips/dts/mt7621_elecom_wrc-gs.dtsi | 4 +++ .../dts/mt7621_elecom_wxc-x1800gsx.dtsi | 4 +++ .../linux/ramips/dts/mt7621_h3c_tx180x.dtsi | 4 +++ .../ramips/dts/mt7621_haier-sim_wr1800k.dtsi | 4 +++ .../ramips/dts/mt7621_iodata_wn-ax1167gr.dts | 4 +++ .../dts/mt7621_iodata_wn-deax1800gr.dts | 4 +++ .../ramips/dts/mt7621_iodata_wn-dx1200gr.dts | 4 +++ .../ramips/dts/mt7621_iodata_wn-gx300gr.dts | 4 +++ .../ramips/dts/mt7621_iodata_wn-xx-xr.dtsi | 4 +++ .../ramips/dts/mt7621_iodata_wnpr2600g.dts | 4 +++ .../linux/ramips/dts/mt7621_iptime_t5004.dts | 4 +++ .../ramips/dts/mt7621_jdcloud_re-cp-02.dts | 4 +++ .../ramips/dts/mt7621_keenetic_kn-3010.dts | 4 +++ .../ramips/dts/mt7621_keenetic_kn-3510.dts | 4 +++ .../linux/ramips/dts/mt7621_linksys_e5600.dts | 4 +++ .../ramips/dts/mt7621_linksys_re6500.dts | 4 +++ .../linux/ramips/dts/mt7621_netgear_eax12.dts | 4 +++ .../ramips/dts/mt7621_netgear_wac104.dts | 4 +++ .../ramips/dts/mt7621_netgear_wax202.dts | 4 +++ .../ramips/dts/mt7621_netgear_wax214v2.dts | 4 +++ .../dts/mt7621_plasmacloud_pax1800-lite.dts | 4 --- .../dts/mt7621_renkforce_ws-wn530hp3-a.dts | 4 +++ .../ramips/dts/mt7621_ubnt_edgerouter-x.dtsi | 4 +++ .../linux/ramips/dts/mt7621_ubnt_usw-flex.dts | 4 +++ .../ramips/dts/mt7621_winstars_ws-wn583a6.dts | 4 +++ .../ramips/dts/mt7621_wodesys_wd-r1802u.dts | 4 +++ .../linux/ramips/dts/mt7621_zyxel_wap6805.dts | 4 +++ 41 files changed, 184 insertions(+), 4 deletions(-) diff --git a/target/linux/ramips/dts/mt7621.dtsi b/target/linux/ramips/dts/mt7621.dtsi index 450e8b0afc..dd21f13a32 100644 --- a/target/linux/ramips/dts/mt7621.dtsi +++ b/target/linux/ramips/dts/mt7621.dtsi @@ -3,6 +3,7 @@ #include #include #include +#include #include / { @@ -405,6 +406,10 @@ interrupt-parent = <&gic>; interrupts = ; + phys = <&u2port0 PHY_TYPE_USB2>, + <&u3port0 PHY_TYPE_USB3>, + <&u2port1 PHY_TYPE_USB2>; + vbus-supply = <®_vbus>; vusb33-supply = <®_vusb33>; @@ -428,6 +433,29 @@ }; }; + usb_phy: t-phy@1e1d0000 { + compatible = "mediatek,generic-tphy-v1"; + reg = <0x1e1d0000 0x0700>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + u2port0: usb-phy@1e1d0800 { + reg = <0x1e1d0800 0x0100>; + #phy-cells = <1>; + }; + + u3port0: usb-phy@1e1d0900 { + reg = <0x1e1d0900 0x0700>; + #phy-cells = <1>; + }; + + u2port1: usb-phy@1e1d1000 { + reg = <0x1e1d1000 0x0100>; + #phy-cells = <1>; + }; + }; + gic: interrupt-controller@1fbc0000 { compatible = "mti,gic"; reg = <0x1fbc0000 0x20000>; diff --git a/target/linux/ramips/dts/mt7621_ampedwireless_ally-00x19k.dts b/target/linux/ramips/dts/mt7621_ampedwireless_ally-00x19k.dts index 51d41c7fb4..e25444d7f0 100644 --- a/target/linux/ramips/dts/mt7621_ampedwireless_ally-00x19k.dts +++ b/target/linux/ramips/dts/mt7621_ampedwireless_ally-00x19k.dts @@ -16,6 +16,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_arcadyan_we410443.dts b/target/linux/ramips/dts/mt7621_arcadyan_we410443.dts index 734a9ff490..ad261d77ef 100644 --- a/target/linux/ramips/dts/mt7621_arcadyan_we410443.dts +++ b/target/linux/ramips/dts/mt7621_arcadyan_we410443.dts @@ -192,6 +192,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_arcadyan_we420223-99.dts b/target/linux/ramips/dts/mt7621_arcadyan_we420223-99.dts index 0b314cc38d..04a5396b52 100644 --- a/target/linux/ramips/dts/mt7621_arcadyan_we420223-99.dts +++ b/target/linux/ramips/dts/mt7621_arcadyan_we420223-99.dts @@ -184,6 +184,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_asus_rp-ac56.dts b/target/linux/ramips/dts/mt7621_asus_rp-ac56.dts index 617624f4c2..3aaac5a0c8 100644 --- a/target/linux/ramips/dts/mt7621_asus_rp-ac56.dts +++ b/target/linux/ramips/dts/mt7621_asus_rp-ac56.dts @@ -232,6 +232,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_asus_rp-ac87.dts b/target/linux/ramips/dts/mt7621_asus_rp-ac87.dts index 02c19bd1c6..033e6a8b2d 100644 --- a/target/linux/ramips/dts/mt7621_asus_rp-ac87.dts +++ b/target/linux/ramips/dts/mt7621_asus_rp-ac87.dts @@ -182,6 +182,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_buffalo_wsr-1166dhp.dts b/target/linux/ramips/dts/mt7621_buffalo_wsr-1166dhp.dts index 859d95b6a4..b239bfe969 100644 --- a/target/linux/ramips/dts/mt7621_buffalo_wsr-1166dhp.dts +++ b/target/linux/ramips/dts/mt7621_buffalo_wsr-1166dhp.dts @@ -232,6 +232,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_buffalo_wsr-2533dhpl.dts b/target/linux/ramips/dts/mt7621_buffalo_wsr-2533dhpl.dts index fe6fc6aab5..54dfcf0236 100644 --- a/target/linux/ramips/dts/mt7621_buffalo_wsr-2533dhpl.dts +++ b/target/linux/ramips/dts/mt7621_buffalo_wsr-2533dhpl.dts @@ -258,6 +258,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_buffalo_wsr-2533dhplx.dtsi b/target/linux/ramips/dts/mt7621_buffalo_wsr-2533dhplx.dtsi index d3ca47f170..1a26c21287 100644 --- a/target/linux/ramips/dts/mt7621_buffalo_wsr-2533dhplx.dtsi +++ b/target/linux/ramips/dts/mt7621_buffalo_wsr-2533dhplx.dtsi @@ -172,6 +172,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_buffalo_wsr-600dhp.dts b/target/linux/ramips/dts/mt7621_buffalo_wsr-600dhp.dts index 9b95525020..7540e92688 100644 --- a/target/linux/ramips/dts/mt7621_buffalo_wsr-600dhp.dts +++ b/target/linux/ramips/dts/mt7621_buffalo_wsr-600dhp.dts @@ -238,6 +238,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_edimax_re23s.dts b/target/linux/ramips/dts/mt7621_edimax_re23s.dts index 00a746f579..295947f4b5 100644 --- a/target/linux/ramips/dts/mt7621_edimax_re23s.dts +++ b/target/linux/ramips/dts/mt7621_edimax_re23s.dts @@ -179,6 +179,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_edimax_rx21s.dtsi b/target/linux/ramips/dts/mt7621_edimax_rx21s.dtsi index 3a235070bf..273b977be8 100644 --- a/target/linux/ramips/dts/mt7621_edimax_rx21s.dtsi +++ b/target/linux/ramips/dts/mt7621_edimax_rx21s.dtsi @@ -205,6 +205,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_elecom_wrc-1167ghbk2-s.dts b/target/linux/ramips/dts/mt7621_elecom_wrc-1167ghbk2-s.dts index 503ec40b50..127e2ee749 100644 --- a/target/linux/ramips/dts/mt7621_elecom_wrc-1167ghbk2-s.dts +++ b/target/linux/ramips/dts/mt7621_elecom_wrc-1167ghbk2-s.dts @@ -205,6 +205,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_elecom_wrc-2533ghbk.dtsi b/target/linux/ramips/dts/mt7621_elecom_wrc-2533ghbk.dtsi index 545a2031b8..8df7335d61 100644 --- a/target/linux/ramips/dts/mt7621_elecom_wrc-2533ghbk.dtsi +++ b/target/linux/ramips/dts/mt7621_elecom_wrc-2533ghbk.dtsi @@ -198,6 +198,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_elecom_wrc-gs.dtsi b/target/linux/ramips/dts/mt7621_elecom_wrc-gs.dtsi index 4b61b9faf2..9b2f313e9f 100644 --- a/target/linux/ramips/dts/mt7621_elecom_wrc-gs.dtsi +++ b/target/linux/ramips/dts/mt7621_elecom_wrc-gs.dtsi @@ -174,6 +174,10 @@ status = "okay"; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_elecom_wxc-x1800gsx.dtsi b/target/linux/ramips/dts/mt7621_elecom_wxc-x1800gsx.dtsi index 91cc3f9952..8d5077b008 100644 --- a/target/linux/ramips/dts/mt7621_elecom_wxc-x1800gsx.dtsi +++ b/target/linux/ramips/dts/mt7621_elecom_wxc-x1800gsx.dtsi @@ -225,6 +225,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_h3c_tx180x.dtsi b/target/linux/ramips/dts/mt7621_h3c_tx180x.dtsi index 31347723cf..13100cc12f 100644 --- a/target/linux/ramips/dts/mt7621_h3c_tx180x.dtsi +++ b/target/linux/ramips/dts/mt7621_h3c_tx180x.dtsi @@ -189,6 +189,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_haier-sim_wr1800k.dtsi b/target/linux/ramips/dts/mt7621_haier-sim_wr1800k.dtsi index cb050c90d4..33dc9cbf1c 100644 --- a/target/linux/ramips/dts/mt7621_haier-sim_wr1800k.dtsi +++ b/target/linux/ramips/dts/mt7621_haier-sim_wr1800k.dtsi @@ -173,6 +173,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_iodata_wn-ax1167gr.dts b/target/linux/ramips/dts/mt7621_iodata_wn-ax1167gr.dts index ffafb031b5..b2c772c0d4 100644 --- a/target/linux/ramips/dts/mt7621_iodata_wn-ax1167gr.dts +++ b/target/linux/ramips/dts/mt7621_iodata_wn-ax1167gr.dts @@ -232,6 +232,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_iodata_wn-deax1800gr.dts b/target/linux/ramips/dts/mt7621_iodata_wn-deax1800gr.dts index 86d8a93da6..f9313c620c 100644 --- a/target/linux/ramips/dts/mt7621_iodata_wn-deax1800gr.dts +++ b/target/linux/ramips/dts/mt7621_iodata_wn-deax1800gr.dts @@ -229,6 +229,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_iodata_wn-dx1200gr.dts b/target/linux/ramips/dts/mt7621_iodata_wn-dx1200gr.dts index bcb7e57678..2e21808ee9 100644 --- a/target/linux/ramips/dts/mt7621_iodata_wn-dx1200gr.dts +++ b/target/linux/ramips/dts/mt7621_iodata_wn-dx1200gr.dts @@ -231,6 +231,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_iodata_wn-gx300gr.dts b/target/linux/ramips/dts/mt7621_iodata_wn-gx300gr.dts index d6c3fcf42a..dac78cebb3 100644 --- a/target/linux/ramips/dts/mt7621_iodata_wn-gx300gr.dts +++ b/target/linux/ramips/dts/mt7621_iodata_wn-gx300gr.dts @@ -208,6 +208,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_iodata_wn-xx-xr.dtsi b/target/linux/ramips/dts/mt7621_iodata_wn-xx-xr.dtsi index 07187d8bfe..2df00a1745 100644 --- a/target/linux/ramips/dts/mt7621_iodata_wn-xx-xr.dtsi +++ b/target/linux/ramips/dts/mt7621_iodata_wn-xx-xr.dtsi @@ -200,6 +200,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_iodata_wnpr2600g.dts b/target/linux/ramips/dts/mt7621_iodata_wnpr2600g.dts index e322e4efdb..d0eb0d51fc 100644 --- a/target/linux/ramips/dts/mt7621_iodata_wnpr2600g.dts +++ b/target/linux/ramips/dts/mt7621_iodata_wnpr2600g.dts @@ -212,6 +212,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_iptime_t5004.dts b/target/linux/ramips/dts/mt7621_iptime_t5004.dts index 19c72884b4..f5b7967ac6 100644 --- a/target/linux/ramips/dts/mt7621_iptime_t5004.dts +++ b/target/linux/ramips/dts/mt7621_iptime_t5004.dts @@ -136,6 +136,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_jdcloud_re-cp-02.dts b/target/linux/ramips/dts/mt7621_jdcloud_re-cp-02.dts index cd429cbf4d..9524472ff1 100644 --- a/target/linux/ramips/dts/mt7621_jdcloud_re-cp-02.dts +++ b/target/linux/ramips/dts/mt7621_jdcloud_re-cp-02.dts @@ -184,6 +184,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_keenetic_kn-3010.dts b/target/linux/ramips/dts/mt7621_keenetic_kn-3010.dts index 6ee20c29c5..c83f160c4f 100644 --- a/target/linux/ramips/dts/mt7621_keenetic_kn-3010.dts +++ b/target/linux/ramips/dts/mt7621_keenetic_kn-3010.dts @@ -95,6 +95,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_keenetic_kn-3510.dts b/target/linux/ramips/dts/mt7621_keenetic_kn-3510.dts index 5a647d75e8..f4aa2dd61b 100644 --- a/target/linux/ramips/dts/mt7621_keenetic_kn-3510.dts +++ b/target/linux/ramips/dts/mt7621_keenetic_kn-3510.dts @@ -242,6 +242,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_linksys_e5600.dts b/target/linux/ramips/dts/mt7621_linksys_e5600.dts index d44565c60c..823da45c16 100644 --- a/target/linux/ramips/dts/mt7621_linksys_e5600.dts +++ b/target/linux/ramips/dts/mt7621_linksys_e5600.dts @@ -222,6 +222,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_linksys_re6500.dts b/target/linux/ramips/dts/mt7621_linksys_re6500.dts index 3eb5f1dc68..606c0419c0 100644 --- a/target/linux/ramips/dts/mt7621_linksys_re6500.dts +++ b/target/linux/ramips/dts/mt7621_linksys_re6500.dts @@ -173,6 +173,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_netgear_eax12.dts b/target/linux/ramips/dts/mt7621_netgear_eax12.dts index e467783ad1..ea87b9ca8d 100644 --- a/target/linux/ramips/dts/mt7621_netgear_eax12.dts +++ b/target/linux/ramips/dts/mt7621_netgear_eax12.dts @@ -203,6 +203,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_netgear_wac104.dts b/target/linux/ramips/dts/mt7621_netgear_wac104.dts index f8fe3fe921..96d9739441 100644 --- a/target/linux/ramips/dts/mt7621_netgear_wac104.dts +++ b/target/linux/ramips/dts/mt7621_netgear_wac104.dts @@ -193,6 +193,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_netgear_wax202.dts b/target/linux/ramips/dts/mt7621_netgear_wax202.dts index 226c461543..084c602b4a 100644 --- a/target/linux/ramips/dts/mt7621_netgear_wax202.dts +++ b/target/linux/ramips/dts/mt7621_netgear_wax202.dts @@ -269,6 +269,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_netgear_wax214v2.dts b/target/linux/ramips/dts/mt7621_netgear_wax214v2.dts index a9597119fa..94539352df 100644 --- a/target/linux/ramips/dts/mt7621_netgear_wax214v2.dts +++ b/target/linux/ramips/dts/mt7621_netgear_wax214v2.dts @@ -223,6 +223,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_plasmacloud_pax1800-lite.dts b/target/linux/ramips/dts/mt7621_plasmacloud_pax1800-lite.dts index 6805a2938a..01f0ca8e32 100644 --- a/target/linux/ramips/dts/mt7621_plasmacloud_pax1800-lite.dts +++ b/target/linux/ramips/dts/mt7621_plasmacloud_pax1800-lite.dts @@ -2193,10 +2193,6 @@ }; }; -&xhci { - status = "okay"; -}; - ðernet { pinctrl-0 = <&mdio_pins>; }; diff --git a/target/linux/ramips/dts/mt7621_renkforce_ws-wn530hp3-a.dts b/target/linux/ramips/dts/mt7621_renkforce_ws-wn530hp3-a.dts index b567b14f8e..2ec1955138 100644 --- a/target/linux/ramips/dts/mt7621_renkforce_ws-wn530hp3-a.dts +++ b/target/linux/ramips/dts/mt7621_renkforce_ws-wn530hp3-a.dts @@ -165,6 +165,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_ubnt_edgerouter-x.dtsi b/target/linux/ramips/dts/mt7621_ubnt_edgerouter-x.dtsi index 40433c1c43..f0937dbe2a 100644 --- a/target/linux/ramips/dts/mt7621_ubnt_edgerouter-x.dtsi +++ b/target/linux/ramips/dts/mt7621_ubnt_edgerouter-x.dtsi @@ -151,6 +151,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_ubnt_usw-flex.dts b/target/linux/ramips/dts/mt7621_ubnt_usw-flex.dts index f548f1f9b7..9d71732058 100644 --- a/target/linux/ramips/dts/mt7621_ubnt_usw-flex.dts +++ b/target/linux/ramips/dts/mt7621_ubnt_usw-flex.dts @@ -167,6 +167,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_winstars_ws-wn583a6.dts b/target/linux/ramips/dts/mt7621_winstars_ws-wn583a6.dts index d40f56e1e9..593823fa48 100644 --- a/target/linux/ramips/dts/mt7621_winstars_ws-wn583a6.dts +++ b/target/linux/ramips/dts/mt7621_winstars_ws-wn583a6.dts @@ -178,6 +178,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_wodesys_wd-r1802u.dts b/target/linux/ramips/dts/mt7621_wodesys_wd-r1802u.dts index f16d27e8d7..e067f523b3 100644 --- a/target/linux/ramips/dts/mt7621_wodesys_wd-r1802u.dts +++ b/target/linux/ramips/dts/mt7621_wodesys_wd-r1802u.dts @@ -148,6 +148,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; diff --git a/target/linux/ramips/dts/mt7621_zyxel_wap6805.dts b/target/linux/ramips/dts/mt7621_zyxel_wap6805.dts index 40cdf7c6a9..9de7615db1 100644 --- a/target/linux/ramips/dts/mt7621_zyxel_wap6805.dts +++ b/target/linux/ramips/dts/mt7621_zyxel_wap6805.dts @@ -181,6 +181,10 @@ }; }; +&usb_phy { + status = "disabled"; +}; + &xhci { status = "disabled"; }; From 109844e32f369a9bc1574385bf8ebde6cf3a1eaf Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Thu, 19 Feb 2026 19:57:56 +0800 Subject: [PATCH 42/78] ramips: dts: mt7621: use "mediatek,mtk-xhci" compatible Compared to the "mediatek,mt8173-xhci", this is a more generic and reasonable compatible string. On the driver side, they are identical. Signed-off-by: Shiji Yang Link: https://github.com/openwrt/openwrt/pull/22094 Signed-off-by: Hauke Mehrtens --- target/linux/ramips/dts/mt7621.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/linux/ramips/dts/mt7621.dtsi b/target/linux/ramips/dts/mt7621.dtsi index dd21f13a32..0fa5426dfd 100644 --- a/target/linux/ramips/dts/mt7621.dtsi +++ b/target/linux/ramips/dts/mt7621.dtsi @@ -393,10 +393,9 @@ }; xhci: xhci@1e1c0000 { + compatible = "mediatek,mtk-xhci"; #address-cells = <1>; #size-cells = <0>; - - compatible = "mediatek,mt8173-xhci"; reg = <0x1e1c0000 0x1000>, <0x1e1d0700 0x0100>; reg-names = "mac", "ippc"; From aae80160a6b4be5b7098ec5d100746c7a4498600 Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Thu, 19 Feb 2026 20:06:08 +0800 Subject: [PATCH 43/78] kernel: modules: add new driver package phy-mtk-tphy MediaTek T-PHY controller supports multiple usb2.0, usb3.0 ports, PCIe and SATA. ARM mediatek and ramips/mt7621 targets require this package to make the XHCI work properly. Signed-off-by: Shiji Yang Link: https://github.com/openwrt/openwrt/pull/22094 Signed-off-by: Hauke Mehrtens --- package/kernel/linux/modules/usb.mk | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/package/kernel/linux/modules/usb.mk b/package/kernel/linux/modules/usb.mk index 10f2c8cc90..f206e5cf68 100644 --- a/package/kernel/linux/modules/usb.mk +++ b/package/kernel/linux/modules/usb.mk @@ -1935,9 +1935,25 @@ endef $(eval $(call KernelPackage,usb-xhci-hcd)) +define KernelPackage/phy-mtk-tphy + TITLE:=MediaTek T-PHY controller support + HIDDEN:=1 + KCONFIG:= \ + CONFIG_GENERIC_PHY=y \ + CONFIG_PHY_MTK_TPHY + DEPENDS:=@(TARGET_mediatek||TARGET_ramips_mt7621) + FILES:=$(LINUX_DIR)/drivers/phy/mediatek/phy-mtk-tphy.ko + AUTOLOAD:=$(call AutoProbe,phy-mtk-tphy,1) +endef + +$(eval $(call KernelPackage,phy-mtk-tphy)) + + define KernelPackage/usb-xhci-mtk TITLE:=xHCI support for MediaTek SoCs - DEPENDS:=+kmod-usb-xhci-hcd + DEPENDS:= \ + +kmod-usb-xhci-hcd \ + +(TARGET_mediatek||TARGET_ramips_mt7621):kmod-phy-mtk-tphy KCONFIG:=CONFIG_USB_XHCI_MTK HIDDEN:=1 FILES:= \ From 9e8f96dc79dd0ee3d6b4e03e6fdbbe5621570d75 Mon Sep 17 00:00:00 2001 From: William Latter Date: Fri, 13 Mar 2026 19:09:30 +1100 Subject: [PATCH 44/78] ramips: add support for wavlink halo base pro This adds support for the Wavlink "Halo Base Pro". SOC: MT7621DAT RAM: 128MiB Flash: 16MiB NOR WiFi: MT7603EN + MT7613BEN Buttons: - The touch sensor was originally for WPS, but this has been moved to the pair button which is no longer used to prevent accidental touches LEDs: - On original firmware, the status LEDs light up as follows: - Purple = booting, Blue = working, Red = error Partitions: - factory contains unique WiFi EEPROM and default MAC addresses - vendor partition has an unknown purpose Stock MAC address allocation: - LAN1: xx:xx:xx:xx:xx:80 - LAN2/WAN: xx:xx:xx:xx:xx:81 - WiFi 2.4G: xx:xx:xx:xx:xx:82 - WiFi 5G: xx:xx:xx:xx:xx:83 LAN Ports: - lan1 is the normal white LAN port - lan2 is labelled "LAN/Backhaul", which can either be LAN or WAN. - Since this device is intended to be part of a mesh, this will usually be a LAN port, hence why it's assigned to lan2 here Notes: - I've chosen "Halo Base Pro" as the device model, despite the website URL showing WL-WN535M3, as the label only states "Halo Base Pro". - Only the 5GHz WiFi address is labelled on the device Signed-off-by: William Latter Link: https://github.com/openwrt/openwrt/pull/22400 Signed-off-by: Hauke Mehrtens --- .../dts/mt7621_wavlink_halo-base-pro.dts | 188 ++++++++++++++++++ target/linux/ramips/image/mt7621.mk | 10 + .../mt7621/base-files/etc/board.d/02_network | 3 +- 3 files changed, 200 insertions(+), 1 deletion(-) create mode 100644 target/linux/ramips/dts/mt7621_wavlink_halo-base-pro.dts diff --git a/target/linux/ramips/dts/mt7621_wavlink_halo-base-pro.dts b/target/linux/ramips/dts/mt7621_wavlink_halo-base-pro.dts new file mode 100644 index 0000000000..161966c309 --- /dev/null +++ b/target/linux/ramips/dts/mt7621_wavlink_halo-base-pro.dts @@ -0,0 +1,188 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7621.dtsi" +#include +#include +#include + +/ { + compatible = "wavlink,halo-base-pro", "mediatek,mt7621-soc"; + model = "Wavlink Halo Base Pro"; + + chosen { + bootargs = "console=ttyS0,57600n8"; + }; + + aliases { + led-boot = &status_blue; + led-failsafe = &status_red; + led-running = &status_blue; + led-upgrade = &status_red; + label-mac-device = &wifi; + }; + + keys { + compatible = "gpio-keys"; + + pair { + label = "pair"; + gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + touch { + label = "touch"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + reset { + label = "reset"; + gpios = <&gpio 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + status_blue: status_blue { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&gpio 16 GPIO_ACTIVE_HIGH>; + }; + + status_red: status_red { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x30000>; + read-only; + }; + + partition@30000 { + label = "u-boot-env"; + reg = <0x30000 0x10000>; + compatible = "u-boot,env"; + read-only; + }; + + partition@40000 { + label = "factory"; + reg = <0x40000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom_factory_0: eeprom@0 { + reg = <0x0 0x400>; + }; + + eeprom_factory_8000: eeprom@8000 { + reg = <0x8000 0x4da8>; + }; + + macaddr_factory_8004: macaddr@8004 { + reg = <0x8004 0x6>; + }; + + macaddr_factory_e000: macaddr@e000 { + reg = <0xe000 0x6>; + }; + + macaddr_factory_e006: macaddr@e006 { + reg = <0xe006 0x6>; + }; + }; + }; + + partition@50000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x50000 0xf30000>; + }; + + partition@f80000 { + label = "vendor"; + reg = <0xf80000 0x80000>; + read-only; + }; + }; + }; +}; + +&gmac0 { + nvmem-cells = <&macaddr_factory_e000>; + nvmem-cell-names = "mac-address"; +}; + +&pcie { + status = "okay"; +}; + +&pcie0 { + wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + nvmem-cells = <&eeprom_factory_0>; + nvmem-cell-names = "eeprom"; + ieee80211-freq-limit = <2400000 2500000>; + }; +}; + +&pcie1 { + wifi: wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + nvmem-cells = <&eeprom_factory_8000>, <&macaddr_factory_8004>; + nvmem-cell-names = "eeprom", "mac-address"; + ieee80211-freq-limit = <5000000 6000000>; + }; +}; + +&switch0 { + ports { + port@0 { + status = "okay"; + label = "lan1"; + nvmem-cells = <&macaddr_factory_e000>; + nvmem-cell-names = "mac-address"; + }; + + port@4 { + status = "okay"; + label = "lan2"; + nvmem-cells = <&macaddr_factory_e006>; + nvmem-cell-names = "mac-address"; + }; + }; +}; + +&state_default { + gpio { + groups = "jtag", "wdt"; + function = "gpio"; + }; +}; diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk index 3f3a917db6..4331a532d9 100644 --- a/target/linux/ramips/image/mt7621.mk +++ b/target/linux/ramips/image/mt7621.mk @@ -3262,6 +3262,16 @@ define Device/unielec_u7621-06-64m endef TARGET_DEVICES += unielec_u7621-06-64m +define Device/wavlink_halo-base-pro + $(Device/dsa-migration) + IMAGE_SIZE := 15552k + DEVICE_VENDOR := Wavlink + DEVICE_MODEL := Halo Base Pro + KERNEL := kernel-bin | append-dtb | lzma | uImage lzma | pad-to 64k + DEVICE_PACKAGES := kmod-mt7603 kmod-mt7615-firmware kmod-mt7663-firmware-ap +endef +TARGET_DEVICES += wavlink_halo-base-pro + define Device/wavlink_wl-wn531a6 $(Device/dsa-migration) DEVICE_VENDOR := Wavlink diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network index 426f879dba..1f918d50fb 100644 --- a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network +++ b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network @@ -138,7 +138,8 @@ ramips_setup_interfaces() zyxel,lte3301-plus) ucidef_set_interface_lan "lan1 lan2 lan3 lan4" ;; - elecom,wsc-x1800gs) + elecom,wsc-x1800gs|\ + wavlink,halo-base-pro) ucidef_set_interface_lan "lan1 lan2" ;; gnubee,gb-pc1) From cce5a153f750fea701fe49103ad2699603ab904a Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Tue, 31 Mar 2026 20:28:35 +0800 Subject: [PATCH 45/78] kernel: modules: fix kmod-crypto-misc build error cryptd has been decoupled from crypto-misc in the 6.18 kernel. Fix: ERROR: module '/home/runner/work/Actions_/Actions_/openwrt/build_dir/target-i386_pentium4_musl/linux-x86_generic/linux-6.18.20/crypto/cryptd.ko' is missing. make[3]: *** [modules/crypto.mk:873: /home/runner/work/Actions_/Actions_/openwrt/bin/targets/x86/generic/packages/kmod-crypto-misc-6.18.20-r1.apk] Error 1 Signed-off-by: Shiji Yang Link: https://github.com/openwrt/openwrt/pull/22730 Signed-off-by: Hauke Mehrtens --- package/kernel/linux/modules/crypto.mk | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/package/kernel/linux/modules/crypto.mk b/package/kernel/linux/modules/crypto.mk index 45d39de357..3fb94ea139 100644 --- a/package/kernel/linux/modules/crypto.mk +++ b/package/kernel/linux/modules/crypto.mk @@ -836,9 +836,9 @@ ifndef CONFIG_TARGET_x86_64 FILES+= \ $(LINUX_DIR)/arch/x86/crypto/twofish-i586.ko \ $(LINUX_DIR)/arch/x86/crypto/serpent-sse2-i586.ko \ - $(LINUX_DIR)/crypto/cryptd.ko \ - $(LINUX_DIR)/crypto/crypto_simd.ko - AUTOLOAD+= $(call AutoLoad,10,cryptd \ + $(LINUX_DIR)/crypto/cryptd.ko@lt6.18 \ + $(LINUX_DIR)/crypto/crypto_simd.ko@lt6.18 + AUTOLOAD+= $(call AutoLoad,10,LINUX_6_12:cryptd \ serpent-sse2-i586 twofish-i586 blowfish_generic) endef endif From 5bbf58c4a6cf8992e219777795ed3cbfe1db799d Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Tue, 31 Mar 2026 22:33:44 +0800 Subject: [PATCH 46/78] kernel: modules: fix kmod-iavf dependencies Add missing dependency kmod-ptp to fix the build error. We also add symbol CONFIG_PTP_1588_CLOCK_OPTIONAL explicitly for kmod-ptp because it is selected by CONFIG_PTP_1588_CLOCK. Fix: Package kmod-iavf is missing dependencies for the following libraries: ptp.ko Signed-off-by: Shiji Yang Link: https://github.com/openwrt/openwrt/pull/22730 Signed-off-by: Hauke Mehrtens --- package/kernel/linux/modules/netdevices.mk | 2 +- package/kernel/linux/modules/other.mk | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/package/kernel/linux/modules/netdevices.mk b/package/kernel/linux/modules/netdevices.mk index 1d1d6ae5d6..4fe4decdbc 100644 --- a/package/kernel/linux/modules/netdevices.mk +++ b/package/kernel/linux/modules/netdevices.mk @@ -1543,7 +1543,7 @@ $(eval $(call KernelPackage,ice)) define KernelPackage/iavf SUBMENU:=$(NETWORK_DEVICES_MENU) TITLE:=Intel(R) Ethernet Adaptive Virtual Function support - DEPENDS:=@PCI_SUPPORT +kmod-libie +!LINUX_6_12:kmod-libie-adminq + DEPENDS:=@PCI_SUPPORT +kmod-libie +!LINUX_6_12:kmod-libie-adminq +!LINUX_6_12:kmod-ptp KCONFIG:= \ CONFIG_I40EVF \ CONFIG_IAVF diff --git a/package/kernel/linux/modules/other.mk b/package/kernel/linux/modules/other.mk index e56cc8e64d..35d7c76aef 100644 --- a/package/kernel/linux/modules/other.mk +++ b/package/kernel/linux/modules/other.mk @@ -843,6 +843,7 @@ define KernelPackage/ptp DEPENDS:=+kmod-pps KCONFIG:= \ CONFIG_PTP_1588_CLOCK \ + CONFIG_PTP_1588_CLOCK_OPTIONAL \ CONFIG_NET_PTP_CLASSIFY=y FILES:=$(LINUX_DIR)/drivers/ptp/ptp.ko AUTOLOAD:=$(call AutoLoad,18,ptp,1) From 14e082f16abe46d838507c97be18b38240b39c99 Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Wed, 1 Apr 2026 07:28:58 +0800 Subject: [PATCH 47/78] kernel: reorganize config files Automatically refreshed by `./scripts/kconfig-reorder.sh`. Signed-off-by: Shiji Yang Link: https://github.com/openwrt/openwrt/pull/22730 Signed-off-by: Hauke Mehrtens --- target/linux/airoha/an7581/config-6.12 | 2 +- target/linux/generic/config-6.12 | 2 +- target/linux/generic/config-6.18 | 3 +-- target/linux/imx/cortexa53/config-default | 12 ++++++------ target/linux/mediatek/filogic/config-6.12 | 2 +- target/linux/mediatek/mt7622/config-6.12 | 2 +- target/linux/mediatek/mt7629/config-6.12 | 2 +- 7 files changed, 12 insertions(+), 13 deletions(-) diff --git a/target/linux/airoha/an7581/config-6.12 b/target/linux/airoha/an7581/config-6.12 index aaf1f14bbd..65344ed907 100644 --- a/target/linux/airoha/an7581/config-6.12 +++ b/target/linux/airoha/an7581/config-6.12 @@ -395,8 +395,8 @@ CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y CONFIG_TREE_RCU=y CONFIG_TREE_SRCU=y CONFIG_UBIFS_FS=y -# CONFIG_UNMAP_KERNEL_AT_EL0 is not set CONFIG_UIMAGE_FIT_BLK=y +# CONFIG_UNMAP_KERNEL_AT_EL0 is not set CONFIG_USB_SUPPORT=y CONFIG_USER_STACKTRACE_SUPPORT=y CONFIG_VDSO_GETRANDOM=y diff --git a/target/linux/generic/config-6.12 b/target/linux/generic/config-6.12 index 9aa4604ac9..8de05c3f4f 100644 --- a/target/linux/generic/config-6.12 +++ b/target/linux/generic/config-6.12 @@ -2248,8 +2248,8 @@ CONFIG_GPIOLIB_FASTPATH_LIMIT=512 # CONFIG_GPIO_ICH is not set # CONFIG_GPIO_IT87 is not set # CONFIG_GPIO_LATCH is not set -# CONFIG_GPIO_LOGICVC is not set # CONFIG_GPIO_LINE_MUX is not set +# CONFIG_GPIO_LOGICVC is not set # CONFIG_GPIO_MAX3191X is not set # CONFIG_GPIO_MAX7300 is not set # CONFIG_GPIO_MAX7301 is not set diff --git a/target/linux/generic/config-6.18 b/target/linux/generic/config-6.18 index 44329c8f76..0fdcaf32db 100644 --- a/target/linux/generic/config-6.18 +++ b/target/linux/generic/config-6.18 @@ -212,15 +212,14 @@ CONFIG_ALLOW_DEV_COREDUMP=y # CONFIG_AMD_MEM_ENCRYPT is not set # CONFIG_AMD_NODE is not set # CONFIG_AMD_PHY is not set -# CONFIG_AMD_SBRMI_I2C is not set # CONFIG_AMD_QDMA is not set # CONFIG_AMD_SBRMI_I2C is not set # CONFIG_AMD_XGBE is not set # CONFIG_AMD_XGBE_HAVE_ECC is not set # CONFIG_AMIGA_PARTITION is not set # CONFIG_AMILO_RFKILL is not set -# CONFIG_AMPERE_ERRATUM_AC04_CPU_23 is not set # CONFIG_AMPERE_ERRATUM_AC03_CPU_38 is not set +# CONFIG_AMPERE_ERRATUM_AC04_CPU_23 is not set # CONFIG_AMT is not set # CONFIG_ANDROID_BINDER_IPC is not set # CONFIG_ANON_VMA_NAME is not set diff --git a/target/linux/imx/cortexa53/config-default b/target/linux/imx/cortexa53/config-default index 3a946c7647..eb4a73df18 100644 --- a/target/linux/imx/cortexa53/config-default +++ b/target/linux/imx/cortexa53/config-default @@ -41,9 +41,15 @@ CONFIG_CLK_IMX8MN=y CONFIG_CLK_IMX8MP=y CONFIG_CLK_IMX8MQ=y CONFIG_CMA=y +CONFIG_CMA_ALIGNMENT=8 CONFIG_CMA_AREAS=7 # CONFIG_CMA_DEBUG is not set # CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_SIZE_MBYTES=32 +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set # CONFIG_CMA_SYSFS is not set # CONFIG_COMMON_CLK_BD718XX is not set CONFIG_CONSOLE_TRANSLATIONS=y @@ -66,12 +72,6 @@ CONFIG_CRYPTO_SHA512_ARM64_CE=y CONFIG_DEVFREQ_GOV_USERSPACE=y # CONFIG_DEVFREQ_THERMAL is not set CONFIG_DMA_CMA=y -CONFIG_CMA_SIZE_MBYTES=32 -CONFIG_CMA_SIZE_SEL_MBYTES=y -# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set -# CONFIG_CMA_SIZE_SEL_MIN is not set -# CONFIG_CMA_SIZE_SEL_MAX is not set -CONFIG_CMA_ALIGNMENT=8 CONFIG_DMA_DIRECT_REMAP=y # CONFIG_DRM_IMX_DCSS is not set CONFIG_DUMMY_CONSOLE=y diff --git a/target/linux/mediatek/filogic/config-6.12 b/target/linux/mediatek/filogic/config-6.12 index 2947bcb614..436459b386 100644 --- a/target/linux/mediatek/filogic/config-6.12 +++ b/target/linux/mediatek/filogic/config-6.12 @@ -429,9 +429,9 @@ CONFIG_PWM_MEDIATEK=y # CONFIG_PWM_MTK_DISP is not set CONFIG_QUEUED_RWLOCKS=y CONFIG_QUEUED_SPINLOCKS=y -CONFIG_RANDSTRUCT_NONE=y CONFIG_RANDOMIZE_BASE=y CONFIG_RANDOMIZE_MODULE_REGION_FULL=y +CONFIG_RANDSTRUCT_NONE=y CONFIG_RAS=y CONFIG_RATIONAL=y # CONFIG_RAVE_SP_CORE is not set diff --git a/target/linux/mediatek/mt7622/config-6.12 b/target/linux/mediatek/mt7622/config-6.12 index 67d61bec44..5620f25a62 100644 --- a/target/linux/mediatek/mt7622/config-6.12 +++ b/target/linux/mediatek/mt7622/config-6.12 @@ -415,9 +415,9 @@ CONFIG_PWM_MEDIATEK=y # CONFIG_PWM_MTK_DISP is not set CONFIG_QUEUED_RWLOCKS=y CONFIG_QUEUED_SPINLOCKS=y -CONFIG_RANDSTRUCT_NONE=y CONFIG_RANDOMIZE_BASE=y CONFIG_RANDOMIZE_MODULE_REGION_FULL=y +CONFIG_RANDSTRUCT_NONE=y CONFIG_RAS=y CONFIG_RATIONAL=y # CONFIG_RAVE_SP_CORE is not set diff --git a/target/linux/mediatek/mt7629/config-6.12 b/target/linux/mediatek/mt7629/config-6.12 index bf657caf5b..e26a539a9b 100644 --- a/target/linux/mediatek/mt7629/config-6.12 +++ b/target/linux/mediatek/mt7629/config-6.12 @@ -244,8 +244,8 @@ CONFIG_NO_HZ_IDLE=y CONFIG_NR_CPUS=2 CONFIG_NVMEM=y CONFIG_NVMEM_LAYOUTS=y -CONFIG_NVMEM_LAYOUT_ASCII_ENV=y # CONFIG_NVMEM_LAYOUT_ADTRAN is not set +CONFIG_NVMEM_LAYOUT_ASCII_ENV=y # CONFIG_NVMEM_MTK_EFUSE is not set CONFIG_NVMEM_SYSFS=y CONFIG_OF=y From d899e499ac5a8fdeb6cfe6690ea72e4278e53f67 Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Wed, 1 Apr 2026 19:24:03 +0800 Subject: [PATCH 48/78] kernel: 6.18: disable CONFIG_GENERIC_BUILTIN_DTB This symbol is selected by CONFIG_BUILTIN_DTB. However, we didn't enable it in generic config-6.18. Signed-off-by: Shiji Yang Link: https://github.com/openwrt/openwrt/pull/22730 Signed-off-by: Hauke Mehrtens --- target/linux/generic/config-6.18 | 3 +-- target/linux/malta/config-6.18 | 2 ++ 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/target/linux/generic/config-6.18 b/target/linux/generic/config-6.18 index 0fdcaf32db..8ffb985c6a 100644 --- a/target/linux/generic/config-6.18 +++ b/target/linux/generic/config-6.18 @@ -850,7 +850,6 @@ CONFIG_BUG=y # CONFIG_BUG_ON_DATA_CORRUPTION is not set CONFIG_BUILDTIME_TABLE_SORT=y CONFIG_BUILD_SALT="" -CONFIG_BUILTIN_DTB_NAME="" # CONFIG_C2PORT is not set # CONFIG_CACHESTAT_SYSCALL is not set CONFIG_CACHE_L2X0_PMU=y @@ -2261,7 +2260,7 @@ CONFIG_GCC_NO_STRINGOP_OVERFLOW=y # CONFIG_GEMINI_ETHERNET is not set # CONFIG_GENERIC_ADC_BATTERY is not set # CONFIG_GENERIC_ADC_THERMAL is not set -CONFIG_GENERIC_BUILTIN_DTB=y +# CONFIG_GENERIC_BUILTIN_DTB is not set CONFIG_GENERIC_CALIBRATE_DELAY=y # CONFIG_GENERIC_CPU_DEVICES is not set CONFIG_GENERIC_HWEIGHT=y diff --git a/target/linux/malta/config-6.18 b/target/linux/malta/config-6.18 index 4598512cd5..1b0252cd43 100644 --- a/target/linux/malta/config-6.18 +++ b/target/linux/malta/config-6.18 @@ -21,6 +21,7 @@ CONFIG_BOARD_SCACHE=y CONFIG_BOOT_ELF32=y CONFIG_BUFFER_HEAD=y CONFIG_BUILTIN_DTB=y +CONFIG_BUILTIN_DTB_NAME="" CONFIG_CEVT_R4K=y CONFIG_CLKBLD_I8253=y CONFIG_CLKEVT_I8253=y @@ -82,6 +83,7 @@ CONFIG_FUNCTION_ALIGNMENT=0 CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_FW_LOADER_SYSFS=y CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_BUILTIN_DTB=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_GENERIC_CPU_AUTOPROBE=y From ac0cb87a453698efc6c812e4f27cadbeb208f14e Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Wed, 1 Apr 2026 19:28:54 +0800 Subject: [PATCH 49/78] kernel: 6.18: move CONFIG_PAGE_BLOCK_MAX_ORDER to subtargets This symbol depends on the specific CPU type, so we should not set it globally. Signed-off-by: Shiji Yang Link: https://github.com/openwrt/openwrt/pull/22730 Signed-off-by: Hauke Mehrtens --- target/linux/generic/config-6.18 | 1 - target/linux/microchipsw/lan969x/config-6.18 | 1 + target/linux/mxs/config-6.18 | 1 + target/linux/realtek/rtl838x/config-6.18 | 1 + target/linux/realtek/rtl839x/config-6.18 | 1 + target/linux/realtek/rtl930x_nand/config-6.18 | 1 + target/linux/realtek/rtl931x/config-6.18 | 1 + target/linux/realtek/rtl931x_nand/config-6.18 | 1 + target/linux/x86/config-6.18 | 1 + 9 files changed, 8 insertions(+), 1 deletion(-) diff --git a/target/linux/generic/config-6.18 b/target/linux/generic/config-6.18 index 8ffb985c6a..3a05b7ff03 100644 --- a/target/linux/generic/config-6.18 +++ b/target/linux/generic/config-6.18 @@ -4689,7 +4689,6 @@ CONFIG_OVERLAY_FS_XINO_AUTO=y CONFIG_PACKET=y # CONFIG_PACKET_DIAG is not set # CONFIG_PACKING is not set -CONFIG_PAGE_BLOCK_MAX_ORDER=10 # CONFIG_PAGE_EXTENSION is not set CONFIG_PAGE_MAPCOUNT=y # CONFIG_PAGE_OWNER is not set diff --git a/target/linux/microchipsw/lan969x/config-6.18 b/target/linux/microchipsw/lan969x/config-6.18 index 7f8baeeaef..0b2846f1ce 100644 --- a/target/linux/microchipsw/lan969x/config-6.18 +++ b/target/linux/microchipsw/lan969x/config-6.18 @@ -196,6 +196,7 @@ CONFIG_OF_IRQ=y CONFIG_OF_KOBJ=y CONFIG_OF_MDIO=y CONFIG_PADATA=y +CONFIG_PAGE_BLOCK_MAX_ORDER=10 CONFIG_PAGE_POOL=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y diff --git a/target/linux/mxs/config-6.18 b/target/linux/mxs/config-6.18 index f178dd3ce8..5c6951c5cd 100644 --- a/target/linux/mxs/config-6.18 +++ b/target/linux/mxs/config-6.18 @@ -190,6 +190,7 @@ CONFIG_OF_KOBJ=y CONFIG_OF_MDIO=y CONFIG_OLD_SIGACTION=y CONFIG_OLD_SIGSUSPEND3=y +CONFIG_PAGE_BLOCK_MAX_ORDER=10 CONFIG_PAGE_OFFSET=0xC0000000 CONFIG_PAGE_POOL=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y diff --git a/target/linux/realtek/rtl838x/config-6.18 b/target/linux/realtek/rtl838x/config-6.18 index 1683a494f6..54b1071cf2 100644 --- a/target/linux/realtek/rtl838x/config-6.18 +++ b/target/linux/realtek/rtl838x/config-6.18 @@ -191,6 +191,7 @@ CONFIG_OF_GPIO=y CONFIG_OF_IRQ=y CONFIG_OF_KOBJ=y CONFIG_OF_MDIO=y +CONFIG_PAGE_BLOCK_MAX_ORDER=10 CONFIG_PAGE_POOL=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y diff --git a/target/linux/realtek/rtl839x/config-6.18 b/target/linux/realtek/rtl839x/config-6.18 index 42019d25e3..c701c8edcb 100644 --- a/target/linux/realtek/rtl839x/config-6.18 +++ b/target/linux/realtek/rtl839x/config-6.18 @@ -200,6 +200,7 @@ CONFIG_OF_IRQ=y CONFIG_OF_KOBJ=y CONFIG_OF_MDIO=y CONFIG_PADATA=y +CONFIG_PAGE_BLOCK_MAX_ORDER=10 CONFIG_PAGE_POOL=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y diff --git a/target/linux/realtek/rtl930x_nand/config-6.18 b/target/linux/realtek/rtl930x_nand/config-6.18 index 3f8332e230..c9bb82018f 100644 --- a/target/linux/realtek/rtl930x_nand/config-6.18 +++ b/target/linux/realtek/rtl930x_nand/config-6.18 @@ -201,6 +201,7 @@ CONFIG_OF_IRQ=y CONFIG_OF_KOBJ=y CONFIG_OF_MDIO=y CONFIG_PADATA=y +CONFIG_PAGE_BLOCK_MAX_ORDER=10 CONFIG_PAGE_POOL=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y diff --git a/target/linux/realtek/rtl931x/config-6.18 b/target/linux/realtek/rtl931x/config-6.18 index a78414398c..2855198072 100644 --- a/target/linux/realtek/rtl931x/config-6.18 +++ b/target/linux/realtek/rtl931x/config-6.18 @@ -194,6 +194,7 @@ CONFIG_OF_IRQ=y CONFIG_OF_KOBJ=y CONFIG_OF_MDIO=y CONFIG_PADATA=y +CONFIG_PAGE_BLOCK_MAX_ORDER=10 CONFIG_PAGE_POOL=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y diff --git a/target/linux/realtek/rtl931x_nand/config-6.18 b/target/linux/realtek/rtl931x_nand/config-6.18 index a7b1961e82..e101f16161 100644 --- a/target/linux/realtek/rtl931x_nand/config-6.18 +++ b/target/linux/realtek/rtl931x_nand/config-6.18 @@ -209,6 +209,7 @@ CONFIG_OF_IRQ=y CONFIG_OF_KOBJ=y CONFIG_OF_MDIO=y CONFIG_PADATA=y +CONFIG_PAGE_BLOCK_MAX_ORDER=10 CONFIG_PAGE_POOL=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y diff --git a/target/linux/x86/config-6.18 b/target/linux/x86/config-6.18 index 0486c5749a..cf4d194a9f 100644 --- a/target/linux/x86/config-6.18 +++ b/target/linux/x86/config-6.18 @@ -335,6 +335,7 @@ CONFIG_OLD_SIGACTION=y CONFIG_OLD_SIGSUSPEND3=y # CONFIG_OLPC is not set CONFIG_OUTPUT_FORMAT="elf32-i386" +CONFIG_PAGE_BLOCK_MAX_ORDER=10 CONFIG_PAGE_OFFSET=0xC0000000 CONFIG_PAGE_POOL=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y From 499886de058682aefc991d9d3d53ea701da048ec Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Fri, 3 Apr 2026 21:46:44 +0800 Subject: [PATCH 50/78] kernel: enable CRYPTO_RNG2 and CRYPTO_SIG2 by default These two symbols are selected by CONFIG_CRYPTO_MANAGER2[1-2], which was already enabled on generic config-{6.12,6.18}. [1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-6.6.y&id=fb28fabfad332a731423ffdd2be122b73ea90f1e [2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-6.6.y&id=6cb8815f41a966b217c0d9826c592254d72dcc31 Signed-off-by: Shiji Yang Link: https://github.com/openwrt/openwrt/pull/22730 Signed-off-by: Hauke Mehrtens --- target/linux/airoha/an7581/config-6.12 | 1 - target/linux/airoha/an7583/config-6.12 | 1 - target/linux/apm821xx/config-6.12 | 1 - target/linux/armsr/config-6.12 | 1 - target/linux/at91/sama5/config-6.12 | 1 - target/linux/at91/sama7/config-6.12 | 1 - target/linux/bcm27xx/bcm2709/config-6.12 | 1 - target/linux/bcm27xx/bcm2710/config-6.12 | 1 - target/linux/bcm27xx/bcm2711/config-6.12 | 1 - target/linux/bcm27xx/bcm2712/config-6.12 | 1 - target/linux/d1/config-6.12 | 2 -- target/linux/gemini/config-6.12 | 2 -- target/linux/generic/config-6.12 | 2 ++ target/linux/generic/config-6.18 | 4 ++-- target/linux/imx/config-6.12 | 1 - target/linux/ipq40xx/config-6.12 | 1 - target/linux/ipq806x/config-6.12 | 1 - target/linux/layerscape/armv8_64b/config-6.12 | 1 - target/linux/loongarch64/config-6.12 | 1 - target/linux/mediatek/filogic/config-6.12 | 1 - target/linux/mediatek/mt7622/config-6.12 | 1 - target/linux/mediatek/mt7623/config-6.12 | 1 - target/linux/microchipsw/lan969x/config-6.18 | 2 -- target/linux/mpc85xx/config-6.12 | 1 - target/linux/omap/config-6.12 | 2 -- target/linux/pistachio/config-6.12 | 1 - target/linux/qoriq/config-6.12 | 1 - target/linux/qualcommax/config-6.12 | 1 - target/linux/qualcommbe/config-6.12 | 1 - target/linux/realtek/rtl838x/config-6.18 | 2 -- target/linux/realtek/rtl839x/config-6.18 | 2 -- target/linux/realtek/rtl930x/config-6.18 | 2 -- target/linux/realtek/rtl930x_nand/config-6.18 | 2 -- target/linux/realtek/rtl931x/config-6.18 | 2 -- target/linux/realtek/rtl931x_nand/config-6.18 | 2 -- target/linux/sifiveu/config-6.12 | 1 - target/linux/starfive/config-6.12 | 1 - target/linux/sunxi/config-6.12 | 2 -- target/linux/tegra/config-6.12 | 1 - 39 files changed, 4 insertions(+), 50 deletions(-) diff --git a/target/linux/airoha/an7581/config-6.12 b/target/linux/airoha/an7581/config-6.12 index 65344ed907..f48626ece4 100644 --- a/target/linux/airoha/an7581/config-6.12 +++ b/target/linux/airoha/an7581/config-6.12 @@ -102,7 +102,6 @@ CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_SEQIV=y CONFIG_CRYPTO_SHA256=y diff --git a/target/linux/airoha/an7583/config-6.12 b/target/linux/airoha/an7583/config-6.12 index 3ba7c7ddbd..4669831849 100644 --- a/target/linux/airoha/an7583/config-6.12 +++ b/target/linux/airoha/an7583/config-6.12 @@ -101,7 +101,6 @@ CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA3=y diff --git a/target/linux/apm821xx/config-6.12 b/target/linux/apm821xx/config-6.12 index 16aeab2aa3..34149fa3e3 100644 --- a/target/linux/apm821xx/config-6.12 +++ b/target/linux/apm821xx/config-6.12 @@ -55,7 +55,6 @@ CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y # CONFIG_CRYPTO_MD5_PPC is not set CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y # CONFIG_CRYPTO_SHA1_PPC is not set CONFIG_CRYPTO_SHA3=y CONFIG_DATA_SHIFT=12 diff --git a/target/linux/armsr/config-6.12 b/target/linux/armsr/config-6.12 index 81a9d52d78..a63bd7b0cd 100644 --- a/target/linux/armsr/config-6.12 +++ b/target/linux/armsr/config-6.12 @@ -95,7 +95,6 @@ CONFIG_CRC16=y CONFIG_CRYPTO_CRC32=y CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y -CONFIG_CRYPTO_RNG2=y CONFIG_DCACHE_WORD_ACCESS=y CONFIG_DEBUG_BUGVERBOSE=y CONFIG_DMADEVICES=y diff --git a/target/linux/at91/sama5/config-6.12 b/target/linux/at91/sama5/config-6.12 index 581335739e..a68e341d23 100644 --- a/target/linux/at91/sama5/config-6.12 +++ b/target/linux/at91/sama5/config-6.12 @@ -118,7 +118,6 @@ CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_SEQIV=y CONFIG_CRYPTO_SHA256=y diff --git a/target/linux/at91/sama7/config-6.12 b/target/linux/at91/sama7/config-6.12 index 42fdb04809..8c0ebeba99 100644 --- a/target/linux/at91/sama7/config-6.12 +++ b/target/linux/at91/sama7/config-6.12 @@ -118,7 +118,6 @@ CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA3=y diff --git a/target/linux/bcm27xx/bcm2709/config-6.12 b/target/linux/bcm27xx/bcm2709/config-6.12 index 13b41960fe..55a6e9e07b 100644 --- a/target/linux/bcm27xx/bcm2709/config-6.12 +++ b/target/linux/bcm27xx/bcm2709/config-6.12 @@ -151,7 +151,6 @@ CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_SEQIV=y CONFIG_CRYPTO_SHA256=y diff --git a/target/linux/bcm27xx/bcm2710/config-6.12 b/target/linux/bcm27xx/bcm2710/config-6.12 index b74e1795f6..6e931d8ae8 100644 --- a/target/linux/bcm27xx/bcm2710/config-6.12 +++ b/target/linux/bcm27xx/bcm2710/config-6.12 @@ -159,7 +159,6 @@ CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_SEQIV=y CONFIG_CRYPTO_SHA256=y diff --git a/target/linux/bcm27xx/bcm2711/config-6.12 b/target/linux/bcm27xx/bcm2711/config-6.12 index afd7988863..6855bbf919 100644 --- a/target/linux/bcm27xx/bcm2711/config-6.12 +++ b/target/linux/bcm27xx/bcm2711/config-6.12 @@ -158,7 +158,6 @@ CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_SEQIV=y CONFIG_CRYPTO_SHA256=y diff --git a/target/linux/bcm27xx/bcm2712/config-6.12 b/target/linux/bcm27xx/bcm2712/config-6.12 index 4364b9a87b..b4211dbebb 100644 --- a/target/linux/bcm27xx/bcm2712/config-6.12 +++ b/target/linux/bcm27xx/bcm2712/config-6.12 @@ -190,7 +190,6 @@ CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_SEQIV=y CONFIG_CRYPTO_SHA1=y diff --git a/target/linux/d1/config-6.12 b/target/linux/d1/config-6.12 index db08983bf5..2837776d6c 100644 --- a/target/linux/d1/config-6.12 +++ b/target/linux/d1/config-6.12 @@ -72,11 +72,9 @@ CONFIG_CRYPTO_LIB_UTILS=y # CONFIG_CRYPTO_MANAGER_EXTRA_TESTS is not set CONFIG_CRYPTO_MD5=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_SHA1=y CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA512=y -CONFIG_CRYPTO_SIG2=y CONFIG_DEBUG_INFO=y CONFIG_DMADEVICES=y CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC=y diff --git a/target/linux/gemini/config-6.12 b/target/linux/gemini/config-6.12 index 4a3331526b..f5d0787941 100644 --- a/target/linux/gemini/config-6.12 +++ b/target/linux/gemini/config-6.12 @@ -105,13 +105,11 @@ CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_MD4=y CONFIG_CRYPTO_MD5=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_SEQIV=y CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA3=y CONFIG_CRYPTO_SHA512=y -CONFIG_CRYPTO_SIG2=y CONFIG_CRYPTO_USER=y CONFIG_DEBUG_BUGVERBOSE=y CONFIG_DEBUG_INFO=y diff --git a/target/linux/generic/config-6.12 b/target/linux/generic/config-6.12 index 8de05c3f4f..886ce02f3f 100644 --- a/target/linux/generic/config-6.12 +++ b/target/linux/generic/config-6.12 @@ -1221,6 +1221,7 @@ CONFIG_CRYPTO_PCRYPT=y # CONFIG_CRYPTO_POLYVAL_ARM64_CE is not set # CONFIG_CRYPTO_RMD160 is not set # CONFIG_CRYPTO_RNG is not set +CONFIG_CRYPTO_RNG2=y # CONFIG_CRYPTO_RSA is not set # CONFIG_CRYPTO_SEED is not set # CONFIG_CRYPTO_SEQIV is not set @@ -1243,6 +1244,7 @@ CONFIG_CRYPTO_PCRYPT=y # CONFIG_CRYPTO_SHA512_ARM64 is not set # CONFIG_CRYPTO_SHA512_ARM64_CE is not set # CONFIG_CRYPTO_SHA512_RISCV64 is not set +CONFIG_CRYPTO_SIG2=y # CONFIG_CRYPTO_SIMD is not set CONFIG_CRYPTO_SKCIPHER=y CONFIG_CRYPTO_SKCIPHER2=y diff --git a/target/linux/generic/config-6.18 b/target/linux/generic/config-6.18 index 3a05b7ff03..60c58962b0 100644 --- a/target/linux/generic/config-6.18 +++ b/target/linux/generic/config-6.18 @@ -1265,7 +1265,7 @@ CONFIG_CRYPTO_PCRYPT=y # CONFIG_CRYPTO_POLYVAL_ARM64_CE is not set # CONFIG_CRYPTO_RMD160 is not set # CONFIG_CRYPTO_RNG is not set -# CONFIG_CRYPTO_RNG2 is not set +CONFIG_CRYPTO_RNG2=y # CONFIG_CRYPTO_RSA is not set # CONFIG_CRYPTO_SEED is not set # CONFIG_CRYPTO_SELFTESTS is not set @@ -1289,7 +1289,7 @@ CONFIG_CRYPTO_PCRYPT=y # CONFIG_CRYPTO_SHA512_ARM64 is not set # CONFIG_CRYPTO_SHA512_ARM64_CE is not set # CONFIG_CRYPTO_SHA512_RISCV64 is not set -# CONFIG_CRYPTO_SIG2 is not set +CONFIG_CRYPTO_SIG2=y # CONFIG_CRYPTO_SIMD is not set CONFIG_CRYPTO_SKCIPHER=y CONFIG_CRYPTO_SKCIPHER2=y diff --git a/target/linux/imx/config-6.12 b/target/linux/imx/config-6.12 index ff1007e419..9da34f43eb 100644 --- a/target/linux/imx/config-6.12 +++ b/target/linux/imx/config-6.12 @@ -139,7 +139,6 @@ CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_RSA=y CONFIG_CRYPTO_SEQIV=y diff --git a/target/linux/ipq40xx/config-6.12 b/target/linux/ipq40xx/config-6.12 index 362e99de5b..e4162f81bd 100644 --- a/target/linux/ipq40xx/config-6.12 +++ b/target/linux/ipq40xx/config-6.12 @@ -127,7 +127,6 @@ CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_SEQIV=y CONFIG_CRYPTO_SHA1=y diff --git a/target/linux/ipq806x/config-6.12 b/target/linux/ipq806x/config-6.12 index 08c2bf7b29..91b34a1ad4 100644 --- a/target/linux/ipq806x/config-6.12 +++ b/target/linux/ipq806x/config-6.12 @@ -118,7 +118,6 @@ CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA3=y CONFIG_CRYPTO_SHA512=y diff --git a/target/linux/layerscape/armv8_64b/config-6.12 b/target/linux/layerscape/armv8_64b/config-6.12 index d2b0907534..04bdd01730 100644 --- a/target/linux/layerscape/armv8_64b/config-6.12 +++ b/target/linux/layerscape/armv8_64b/config-6.12 @@ -213,7 +213,6 @@ CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RSA=y CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA256_ARM64=y diff --git a/target/linux/loongarch64/config-6.12 b/target/linux/loongarch64/config-6.12 index a68c91e3a8..90a04768c3 100644 --- a/target/linux/loongarch64/config-6.12 +++ b/target/linux/loongarch64/config-6.12 @@ -167,7 +167,6 @@ CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_MD5=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RSA=y CONFIG_CRYPTO_SHA1=y CONFIG_CRYPTO_SHA256=y diff --git a/target/linux/mediatek/filogic/config-6.12 b/target/linux/mediatek/filogic/config-6.12 index 436459b386..bebb783952 100644 --- a/target/linux/mediatek/filogic/config-6.12 +++ b/target/linux/mediatek/filogic/config-6.12 @@ -133,7 +133,6 @@ CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA256_ARM64=y diff --git a/target/linux/mediatek/mt7622/config-6.12 b/target/linux/mediatek/mt7622/config-6.12 index 5620f25a62..7b9993416d 100644 --- a/target/linux/mediatek/mt7622/config-6.12 +++ b/target/linux/mediatek/mt7622/config-6.12 @@ -142,7 +142,6 @@ CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA256_ARM64=y diff --git a/target/linux/mediatek/mt7623/config-6.12 b/target/linux/mediatek/mt7623/config-6.12 index b899f916b8..b803887f2d 100644 --- a/target/linux/mediatek/mt7623/config-6.12 +++ b/target/linux/mediatek/mt7623/config-6.12 @@ -114,7 +114,6 @@ CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_SEQIV=y CONFIG_CRYPTO_SHA1=y diff --git a/target/linux/microchipsw/lan969x/config-6.18 b/target/linux/microchipsw/lan969x/config-6.18 index 0b2846f1ce..bdfa9ab09a 100644 --- a/target/linux/microchipsw/lan969x/config-6.18 +++ b/target/linux/microchipsw/lan969x/config-6.18 @@ -70,8 +70,6 @@ CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_SHA256_ARCH=y CONFIG_CRYPTO_LIB_UTILS=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_SIG2=y CONFIG_DCACHE_WORD_ACCESS=y CONFIG_DEBUG_INFO=y CONFIG_DMADEVICES=y diff --git a/target/linux/mpc85xx/config-6.12 b/target/linux/mpc85xx/config-6.12 index c91a4137ea..db3f479d0c 100644 --- a/target/linux/mpc85xx/config-6.12 +++ b/target/linux/mpc85xx/config-6.12 @@ -52,7 +52,6 @@ CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y # CONFIG_CRYPTO_MD5_PPC is not set CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RSA=y # CONFIG_CRYPTO_SHA1_PPC is not set # CONFIG_CRYPTO_SHA1_PPC_SPE is not set diff --git a/target/linux/omap/config-6.12 b/target/linux/omap/config-6.12 index 37f7d67074..897b7a4fc9 100644 --- a/target/linux/omap/config-6.12 +++ b/target/linux/omap/config-6.12 @@ -176,7 +176,6 @@ CONFIG_CRYPTO_LZO=y # CONFIG_CRYPTO_MANAGER_EXTRA_TESTS is not set CONFIG_CRYPTO_MD5=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_SEQIV=y CONFIG_CRYPTO_SHA1=y @@ -187,7 +186,6 @@ CONFIG_CRYPTO_SHA256_ARM=y CONFIG_CRYPTO_SHA3=y CONFIG_CRYPTO_SHA512=y CONFIG_CRYPTO_SHA512_ARM=y -CONFIG_CRYPTO_SIG2=y CONFIG_CRYPTO_SIMD=y CONFIG_CRYPTO_ZSTD=y CONFIG_CURRENT_POINTER_IN_TPIDRURO=y diff --git a/target/linux/pistachio/config-6.12 b/target/linux/pistachio/config-6.12 index c779bded16..f239d1b964 100644 --- a/target/linux/pistachio/config-6.12 +++ b/target/linux/pistachio/config-6.12 @@ -73,7 +73,6 @@ CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_MD5=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_SHA1=y CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_ZSTD=y diff --git a/target/linux/qoriq/config-6.12 b/target/linux/qoriq/config-6.12 index 3a1840aeb3..c90305992e 100644 --- a/target/linux/qoriq/config-6.12 +++ b/target/linux/qoriq/config-6.12 @@ -92,7 +92,6 @@ CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y # CONFIG_CRYPTO_MD5_PPC is not set CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RSA=y # CONFIG_CRYPTO_SHA1_PPC is not set CONFIG_CRYPTO_XTS=y diff --git a/target/linux/qualcommax/config-6.12 b/target/linux/qualcommax/config-6.12 index 4b04bf0a88..a7b7d3733b 100644 --- a/target/linux/qualcommax/config-6.12 +++ b/target/linux/qualcommax/config-6.12 @@ -128,7 +128,6 @@ CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_SHA1=y CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_XTS=y diff --git a/target/linux/qualcommbe/config-6.12 b/target/linux/qualcommbe/config-6.12 index 9ffcb3c5d5..b84631c2b4 100644 --- a/target/linux/qualcommbe/config-6.12 +++ b/target/linux/qualcommbe/config-6.12 @@ -128,7 +128,6 @@ CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_SHA1=y CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_XTS=y diff --git a/target/linux/realtek/rtl838x/config-6.18 b/target/linux/realtek/rtl838x/config-6.18 index 54b1071cf2..afd7b04299 100644 --- a/target/linux/realtek/rtl838x/config-6.18 +++ b/target/linux/realtek/rtl838x/config-6.18 @@ -50,8 +50,6 @@ CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_SIG2=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_SECTION_MISMATCH=y CONFIG_DMA_NEED_SYNC=y diff --git a/target/linux/realtek/rtl839x/config-6.18 b/target/linux/realtek/rtl839x/config-6.18 index c701c8edcb..518a9254b1 100644 --- a/target/linux/realtek/rtl839x/config-6.18 +++ b/target/linux/realtek/rtl839x/config-6.18 @@ -53,8 +53,6 @@ CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_SIG2=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_SECTION_MISMATCH=y CONFIG_DMA_NEED_SYNC=y diff --git a/target/linux/realtek/rtl930x/config-6.18 b/target/linux/realtek/rtl930x/config-6.18 index add61a8b55..b237ec3c49 100644 --- a/target/linux/realtek/rtl930x/config-6.18 +++ b/target/linux/realtek/rtl930x/config-6.18 @@ -40,8 +40,6 @@ CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_SIG2=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_SECTION_MISMATCH=y CONFIG_DMA_NEED_SYNC=y diff --git a/target/linux/realtek/rtl930x_nand/config-6.18 b/target/linux/realtek/rtl930x_nand/config-6.18 index c9bb82018f..401cc44754 100644 --- a/target/linux/realtek/rtl930x_nand/config-6.18 +++ b/target/linux/realtek/rtl930x_nand/config-6.18 @@ -44,8 +44,6 @@ CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_SIG2=y CONFIG_CRYPTO_ZSTD=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_SECTION_MISMATCH=y diff --git a/target/linux/realtek/rtl931x/config-6.18 b/target/linux/realtek/rtl931x/config-6.18 index 2855198072..d22b51b766 100644 --- a/target/linux/realtek/rtl931x/config-6.18 +++ b/target/linux/realtek/rtl931x/config-6.18 @@ -43,8 +43,6 @@ CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_SIG2=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_SECTION_MISMATCH=y CONFIG_DMA_NEED_SYNC=y diff --git a/target/linux/realtek/rtl931x_nand/config-6.18 b/target/linux/realtek/rtl931x_nand/config-6.18 index e101f16161..527a8f82a7 100644 --- a/target/linux/realtek/rtl931x_nand/config-6.18 +++ b/target/linux/realtek/rtl931x_nand/config-6.18 @@ -47,8 +47,6 @@ CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_SIG2=y CONFIG_CRYPTO_ZSTD=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_SECTION_MISMATCH=y diff --git a/target/linux/sifiveu/config-6.12 b/target/linux/sifiveu/config-6.12 index 3f2475626c..a14996213e 100644 --- a/target/linux/sifiveu/config-6.12 +++ b/target/linux/sifiveu/config-6.12 @@ -75,7 +75,6 @@ CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_RSA=y CONFIG_CRYPTO_SHA256=y diff --git a/target/linux/starfive/config-6.12 b/target/linux/starfive/config-6.12 index dc2ebaad2d..c23ce824c0 100644 --- a/target/linux/starfive/config-6.12 +++ b/target/linux/starfive/config-6.12 @@ -106,7 +106,6 @@ CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_RSA=y CONFIG_CRYPTO_SHA256=y diff --git a/target/linux/sunxi/config-6.12 b/target/linux/sunxi/config-6.12 index 7ff8f198b9..722e5d741f 100644 --- a/target/linux/sunxi/config-6.12 +++ b/target/linux/sunxi/config-6.12 @@ -133,11 +133,9 @@ CONFIG_CRYPTO_LIB_UTILS=y # CONFIG_CRYPTO_MANAGER_EXTRA_TESTS is not set CONFIG_CRYPTO_MD5=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_SHA1=y CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA512=y -CONFIG_CRYPTO_SIG2=y CONFIG_DCACHE_WORD_ACCESS=y CONFIG_DEBUG_BUGVERBOSE=y CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" diff --git a/target/linux/tegra/config-6.12 b/target/linux/tegra/config-6.12 index 9327690d8e..efce8fc37c 100644 --- a/target/linux/tegra/config-6.12 +++ b/target/linux/tegra/config-6.12 @@ -137,7 +137,6 @@ CONFIG_CRYPTO_LZ4=y CONFIG_CRYPTO_LZ4HC=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_RSA=y CONFIG_CRYPTO_SEQIV=y From c3109a565c176a9fdeedd731a465d8775d92ce2f Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Fri, 3 Apr 2026 22:30:38 +0800 Subject: [PATCH 51/78] kernel: 6.12: move CONFIG_CRYPTO_LIB_SHA1 to generic This symbol is selected by CONFIG_BPF, which was already enabled on generic config-6.12. Signed-off-by: Shiji Yang Link: https://github.com/openwrt/openwrt/pull/22730 Signed-off-by: Hauke Mehrtens --- target/linux/airoha/an7581/config-6.12 | 1 - target/linux/airoha/an7583/config-6.12 | 1 - target/linux/airoha/en7523/config-6.12 | 1 - target/linux/apm821xx/config-6.12 | 1 - target/linux/armsr/armv7/config-6.12 | 1 - target/linux/at91/sam9x/config-6.12 | 1 - target/linux/at91/sama5/config-6.12 | 1 - target/linux/at91/sama7/config-6.12 | 1 - target/linux/ath79/config-6.12 | 1 - target/linux/bcm27xx/bcm2708/config-6.12 | 1 - target/linux/bcm27xx/bcm2709/config-6.12 | 1 - target/linux/bcm27xx/bcm2710/config-6.12 | 1 - target/linux/bcm27xx/bcm2711/config-6.12 | 1 - target/linux/bcm27xx/bcm2712/config-6.12 | 1 - target/linux/bcm47xx/config-6.12 | 1 - target/linux/bcm4908/config-6.12 | 1 - target/linux/bcm53xx/config-6.12 | 1 - target/linux/bmips/bcm6318/config-6.12 | 1 - target/linux/bmips/bcm63268/config-6.12 | 1 - target/linux/bmips/bcm6328/config-6.12 | 1 - target/linux/bmips/bcm6358/config-6.12 | 1 - target/linux/bmips/bcm6362/config-6.12 | 1 - target/linux/bmips/bcm6368/config-6.12 | 1 - target/linux/d1/config-6.12 | 1 - target/linux/econet/en751221/config-6.12 | 1 - target/linux/econet/en7528/config-6.12 | 1 - target/linux/gemini/config-6.12 | 1 - target/linux/generic/config-6.12 | 1 + target/linux/imx/config-6.12 | 1 - target/linux/ipq40xx/config-6.12 | 1 - target/linux/ipq806x/config-6.12 | 1 - target/linux/ixp4xx/config-6.12 | 1 - target/linux/kirkwood/config-6.12 | 1 - target/linux/lantiq/config-6.12 | 1 - target/linux/layerscape/armv7/config-6.12 | 1 - target/linux/layerscape/armv8_64b/config-6.12 | 1 - target/linux/loongarch64/config-6.12 | 1 - target/linux/malta/config-6.12 | 1 - target/linux/mediatek/filogic/config-6.12 | 1 - target/linux/mediatek/mt7622/config-6.12 | 1 - target/linux/mediatek/mt7629/config-6.12 | 1 - target/linux/microchipsw/lan969x/config-6.12 | 1 - target/linux/mpc85xx/config-6.12 | 1 - target/linux/mvebu/config-6.12 | 1 - target/linux/mxs/config-6.12 | 1 - target/linux/mxs/config-6.18 | 1 - target/linux/octeon/config-6.12 | 1 - target/linux/omap/config-6.12 | 1 - target/linux/pistachio/config-6.12 | 1 - target/linux/qoriq/config-6.12 | 1 - target/linux/qualcommax/config-6.12 | 1 - target/linux/qualcommbe/config-6.12 | 1 - target/linux/ramips/mt7620/config-6.12 | 1 - target/linux/ramips/mt7621/config-6.12 | 1 - target/linux/ramips/mt76x8/config-6.12 | 1 - target/linux/ramips/rt288x/config-6.12 | 1 - target/linux/ramips/rt305x/config-6.12 | 1 - target/linux/ramips/rt3883/config-6.12 | 1 - target/linux/realtek/rtl838x/config-6.12 | 1 - target/linux/realtek/rtl839x/config-6.12 | 1 - target/linux/realtek/rtl930x/config-6.12 | 1 - target/linux/realtek/rtl930x_nand/config-6.12 | 1 - target/linux/realtek/rtl931x/config-6.12 | 1 - target/linux/realtek/rtl931x_nand/config-6.12 | 1 - target/linux/rockchip/armv8/config-6.12 | 1 - target/linux/sifiveu/config-6.12 | 1 - target/linux/siflower/sf19a2890/config-6.12 | 1 - target/linux/siflower/sf21/config-6.12 | 1 - target/linux/starfive/config-6.12 | 1 - target/linux/stm32/stm32mp1/config-6.12 | 1 - target/linux/sunxi/config-6.12 | 1 - target/linux/tegra/config-6.12 | 1 - target/linux/uml/config-6.12 | 1 - target/linux/x86/config-6.12 | 1 - target/linux/zynq/config-6.12 | 1 - 75 files changed, 1 insertion(+), 74 deletions(-) diff --git a/target/linux/airoha/an7581/config-6.12 b/target/linux/airoha/an7581/config-6.12 index f48626ece4..d31980bf68 100644 --- a/target/linux/airoha/an7581/config-6.12 +++ b/target/linux/airoha/an7581/config-6.12 @@ -97,7 +97,6 @@ CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y diff --git a/target/linux/airoha/an7583/config-6.12 b/target/linux/airoha/an7583/config-6.12 index 4669831849..e48644415b 100644 --- a/target/linux/airoha/an7583/config-6.12 +++ b/target/linux/airoha/an7583/config-6.12 @@ -96,7 +96,6 @@ CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y diff --git a/target/linux/airoha/en7523/config-6.12 b/target/linux/airoha/en7523/config-6.12 index 971f359bbd..825b2cc536 100644 --- a/target/linux/airoha/en7523/config-6.12 +++ b/target/linux/airoha/en7523/config-6.12 @@ -81,7 +81,6 @@ CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_ZSTD=y diff --git a/target/linux/apm821xx/config-6.12 b/target/linux/apm821xx/config-6.12 index 34149fa3e3..311da4cd8c 100644 --- a/target/linux/apm821xx/config-6.12 +++ b/target/linux/apm821xx/config-6.12 @@ -50,7 +50,6 @@ CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y # CONFIG_CRYPTO_MD5_PPC is not set diff --git a/target/linux/armsr/armv7/config-6.12 b/target/linux/armsr/armv7/config-6.12 index df64f7db65..fe2fd486dc 100644 --- a/target/linux/armsr/armv7/config-6.12 +++ b/target/linux/armsr/armv7/config-6.12 @@ -49,7 +49,6 @@ CONFIG_CPU_TTBR0_PAN=y CONFIG_CPU_V7=y CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CURRENT_POINTER_IN_TPIDRURO=y CONFIG_DEBUG_INFO=y diff --git a/target/linux/at91/sam9x/config-6.12 b/target/linux/at91/sam9x/config-6.12 index d32702e4d9..2a911f011f 100644 --- a/target/linux/at91/sam9x/config-6.12 +++ b/target/linux/at91/sam9x/config-6.12 @@ -81,7 +81,6 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_ZSTD=y diff --git a/target/linux/at91/sama5/config-6.12 b/target/linux/at91/sama5/config-6.12 index a68e341d23..d479f5cc28 100644 --- a/target/linux/at91/sama5/config-6.12 +++ b/target/linux/at91/sama5/config-6.12 @@ -113,7 +113,6 @@ CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y diff --git a/target/linux/at91/sama7/config-6.12 b/target/linux/at91/sama7/config-6.12 index 8c0ebeba99..8ea14b883e 100644 --- a/target/linux/at91/sama7/config-6.12 +++ b/target/linux/at91/sama7/config-6.12 @@ -113,7 +113,6 @@ CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y diff --git a/target/linux/ath79/config-6.12 b/target/linux/ath79/config-6.12 index 7bf2204860..fc8dc3c973 100644 --- a/target/linux/ath79/config-6.12 +++ b/target/linux/ath79/config-6.12 @@ -41,7 +41,6 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CSRC_R4K=y CONFIG_DEBUG_INFO=y diff --git a/target/linux/bcm27xx/bcm2708/config-6.12 b/target/linux/bcm27xx/bcm2708/config-6.12 index 6042692208..dea7c92a26 100644 --- a/target/linux/bcm27xx/bcm2708/config-6.12 +++ b/target/linux/bcm27xx/bcm2708/config-6.12 @@ -116,7 +116,6 @@ CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CURRENT_POINTER_IN_TPIDRURO=y CONFIG_DCACHE_WORD_ACCESS=y diff --git a/target/linux/bcm27xx/bcm2709/config-6.12 b/target/linux/bcm27xx/bcm2709/config-6.12 index 55a6e9e07b..6c96e22d1d 100644 --- a/target/linux/bcm27xx/bcm2709/config-6.12 +++ b/target/linux/bcm27xx/bcm2709/config-6.12 @@ -147,7 +147,6 @@ CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_RNG=y diff --git a/target/linux/bcm27xx/bcm2710/config-6.12 b/target/linux/bcm27xx/bcm2710/config-6.12 index 6e931d8ae8..51c9669d9d 100644 --- a/target/linux/bcm27xx/bcm2710/config-6.12 +++ b/target/linux/bcm27xx/bcm2710/config-6.12 @@ -155,7 +155,6 @@ CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_RNG=y diff --git a/target/linux/bcm27xx/bcm2711/config-6.12 b/target/linux/bcm27xx/bcm2711/config-6.12 index 6855bbf919..d7742ae1cb 100644 --- a/target/linux/bcm27xx/bcm2711/config-6.12 +++ b/target/linux/bcm27xx/bcm2711/config-6.12 @@ -154,7 +154,6 @@ CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_RNG=y diff --git a/target/linux/bcm27xx/bcm2712/config-6.12 b/target/linux/bcm27xx/bcm2712/config-6.12 index b4211dbebb..eaf00f4bf6 100644 --- a/target/linux/bcm27xx/bcm2712/config-6.12 +++ b/target/linux/bcm27xx/bcm2712/config-6.12 @@ -186,7 +186,6 @@ CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_RNG=y diff --git a/target/linux/bcm47xx/config-6.12 b/target/linux/bcm47xx/config-6.12 index e6f6949cec..66f14961bd 100644 --- a/target/linux/bcm47xx/config-6.12 +++ b/target/linux/bcm47xx/config-6.12 @@ -54,7 +54,6 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CSRC_R4K=y CONFIG_DEBUG_INFO=y diff --git a/target/linux/bcm4908/config-6.12 b/target/linux/bcm4908/config-6.12 index 54c56bb388..9b3db0f900 100644 --- a/target/linux/bcm4908/config-6.12 +++ b/target/linux/bcm4908/config-6.12 @@ -76,7 +76,6 @@ CONFIG_CRYPTO_GHASH_ARM64_CE=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_ZSTD=y diff --git a/target/linux/bcm53xx/config-6.12 b/target/linux/bcm53xx/config-6.12 index f93977cad5..0a9e9bb593 100644 --- a/target/linux/bcm53xx/config-6.12 +++ b/target/linux/bcm53xx/config-6.12 @@ -108,7 +108,6 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_ZSTD=y diff --git a/target/linux/bmips/bcm6318/config-6.12 b/target/linux/bmips/bcm6318/config-6.12 index fbb2613130..a71dac3516 100644 --- a/target/linux/bmips/bcm6318/config-6.12 +++ b/target/linux/bmips/bcm6318/config-6.12 @@ -51,7 +51,6 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_ZSTD=y diff --git a/target/linux/bmips/bcm63268/config-6.12 b/target/linux/bmips/bcm63268/config-6.12 index 2b2a872793..9ecb47fcb0 100644 --- a/target/linux/bmips/bcm63268/config-6.12 +++ b/target/linux/bmips/bcm63268/config-6.12 @@ -52,7 +52,6 @@ CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_ZSTD=y diff --git a/target/linux/bmips/bcm6328/config-6.12 b/target/linux/bmips/bcm6328/config-6.12 index 6b8f833c3a..6be023ef97 100644 --- a/target/linux/bmips/bcm6328/config-6.12 +++ b/target/linux/bmips/bcm6328/config-6.12 @@ -52,7 +52,6 @@ CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_ZSTD=y diff --git a/target/linux/bmips/bcm6358/config-6.12 b/target/linux/bmips/bcm6358/config-6.12 index 0bbf1fd324..d839c21153 100644 --- a/target/linux/bmips/bcm6358/config-6.12 +++ b/target/linux/bmips/bcm6358/config-6.12 @@ -50,7 +50,6 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_ZSTD=y diff --git a/target/linux/bmips/bcm6362/config-6.12 b/target/linux/bmips/bcm6362/config-6.12 index 9a64e37ea3..1bd4957f03 100644 --- a/target/linux/bmips/bcm6362/config-6.12 +++ b/target/linux/bmips/bcm6362/config-6.12 @@ -52,7 +52,6 @@ CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_ZSTD=y diff --git a/target/linux/bmips/bcm6368/config-6.12 b/target/linux/bmips/bcm6368/config-6.12 index e3030dab30..233c3ca686 100644 --- a/target/linux/bmips/bcm6368/config-6.12 +++ b/target/linux/bmips/bcm6368/config-6.12 @@ -52,7 +52,6 @@ CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_ZSTD=y diff --git a/target/linux/d1/config-6.12 b/target/linux/d1/config-6.12 index 2837776d6c..bedc91f718 100644 --- a/target/linux/d1/config-6.12 +++ b/target/linux/d1/config-6.12 @@ -65,7 +65,6 @@ CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y # CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set diff --git a/target/linux/econet/en751221/config-6.12 b/target/linux/econet/en751221/config-6.12 index dd80756777..5357f6f988 100644 --- a/target/linux/econet/en751221/config-6.12 +++ b/target/linux/econet/en751221/config-6.12 @@ -34,7 +34,6 @@ CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_ZSTD=y diff --git a/target/linux/econet/en7528/config-6.12 b/target/linux/econet/en7528/config-6.12 index 49bcddb67c..81f75829a1 100644 --- a/target/linux/econet/en7528/config-6.12 +++ b/target/linux/econet/en7528/config-6.12 @@ -40,7 +40,6 @@ CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_ZSTD=y diff --git a/target/linux/gemini/config-6.12 b/target/linux/gemini/config-6.12 index f5d0787941..d98c0f19d9 100644 --- a/target/linux/gemini/config-6.12 +++ b/target/linux/gemini/config-6.12 @@ -97,7 +97,6 @@ CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y # CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set diff --git a/target/linux/generic/config-6.12 b/target/linux/generic/config-6.12 index 886ce02f3f..c45063d68e 100644 --- a/target/linux/generic/config-6.12 +++ b/target/linux/generic/config-6.12 @@ -1198,6 +1198,7 @@ CONFIG_CRYPTO_LIB_ARC4=y # CONFIG_CRYPTO_LIB_CURVE25519 is not set # CONFIG_CRYPTO_LIB_POLY1305 is not set CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 +CONFIG_CRYPTO_LIB_SHA1=y # CONFIG_CRYPTO_LRW is not set # CONFIG_CRYPTO_LZ4 is not set # CONFIG_CRYPTO_LZ4HC is not set diff --git a/target/linux/imx/config-6.12 b/target/linux/imx/config-6.12 index 9da34f43eb..1cff9bfada 100644 --- a/target/linux/imx/config-6.12 +++ b/target/linux/imx/config-6.12 @@ -134,7 +134,6 @@ CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_JITTERENTROPY=y CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y CONFIG_CRYPTO_LIB_DES=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y diff --git a/target/linux/ipq40xx/config-6.12 b/target/linux/ipq40xx/config-6.12 index e4162f81bd..cb098f2de0 100644 --- a/target/linux/ipq40xx/config-6.12 +++ b/target/linux/ipq40xx/config-6.12 @@ -122,7 +122,6 @@ CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y diff --git a/target/linux/ipq806x/config-6.12 b/target/linux/ipq806x/config-6.12 index 91b34a1ad4..1e3dd40df3 100644 --- a/target/linux/ipq806x/config-6.12 +++ b/target/linux/ipq806x/config-6.12 @@ -113,7 +113,6 @@ CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y diff --git a/target/linux/ixp4xx/config-6.12 b/target/linux/ixp4xx/config-6.12 index e3e593d5c1..499d9efc9f 100644 --- a/target/linux/ixp4xx/config-6.12 +++ b/target/linux/ixp4xx/config-6.12 @@ -62,7 +62,6 @@ CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_DES=m CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_DEBUG_BUGVERBOSE=y CONFIG_DEBUG_INFO=y diff --git a/target/linux/kirkwood/config-6.12 b/target/linux/kirkwood/config-6.12 index a3bca75874..1ad0a8cf23 100644 --- a/target/linux/kirkwood/config-6.12 +++ b/target/linux/kirkwood/config-6.12 @@ -73,7 +73,6 @@ CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_ZSTD=y diff --git a/target/linux/lantiq/config-6.12 b/target/linux/lantiq/config-6.12 index ed3ebbb070..3bb81fe46f 100644 --- a/target/linux/lantiq/config-6.12 +++ b/target/linux/lantiq/config-6.12 @@ -28,7 +28,6 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CSRC_R4K=y CONFIG_DEBUG_INFO=y diff --git a/target/linux/layerscape/armv7/config-6.12 b/target/linux/layerscape/armv7/config-6.12 index cf9d642980..c7c248458d 100644 --- a/target/linux/layerscape/armv7/config-6.12 +++ b/target/linux/layerscape/armv7/config-6.12 @@ -159,7 +159,6 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_ZSTD=y diff --git a/target/linux/layerscape/armv8_64b/config-6.12 b/target/linux/layerscape/armv8_64b/config-6.12 index 04bdd01730..7e2366aaa7 100644 --- a/target/linux/layerscape/armv8_64b/config-6.12 +++ b/target/linux/layerscape/armv8_64b/config-6.12 @@ -208,7 +208,6 @@ CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=y CONFIG_CRYPTO_LIB_CURVE25519_INTERNAL=y CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y diff --git a/target/linux/loongarch64/config-6.12 b/target/linux/loongarch64/config-6.12 index 90a04768c3..f0a36e65ef 100644 --- a/target/linux/loongarch64/config-6.12 +++ b/target/linux/loongarch64/config-6.12 @@ -161,7 +161,6 @@ CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y diff --git a/target/linux/malta/config-6.12 b/target/linux/malta/config-6.12 index da5671a5ed..31b33586d8 100644 --- a/target/linux/malta/config-6.12 +++ b/target/linux/malta/config-6.12 @@ -67,7 +67,6 @@ CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CSRC_R4K=y CONFIG_DMA_NONCOHERENT=y diff --git a/target/linux/mediatek/filogic/config-6.12 b/target/linux/mediatek/filogic/config-6.12 index bebb783952..d319785ce5 100644 --- a/target/linux/mediatek/filogic/config-6.12 +++ b/target/linux/mediatek/filogic/config-6.12 @@ -128,7 +128,6 @@ CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y diff --git a/target/linux/mediatek/mt7622/config-6.12 b/target/linux/mediatek/mt7622/config-6.12 index 7b9993416d..79b244e0f7 100644 --- a/target/linux/mediatek/mt7622/config-6.12 +++ b/target/linux/mediatek/mt7622/config-6.12 @@ -137,7 +137,6 @@ CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y diff --git a/target/linux/mediatek/mt7629/config-6.12 b/target/linux/mediatek/mt7629/config-6.12 index e26a539a9b..1f49214761 100644 --- a/target/linux/mediatek/mt7629/config-6.12 +++ b/target/linux/mediatek/mt7629/config-6.12 @@ -93,7 +93,6 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_ZSTD=y diff --git a/target/linux/microchipsw/lan969x/config-6.12 b/target/linux/microchipsw/lan969x/config-6.12 index 9c62973b39..8108574bb5 100644 --- a/target/linux/microchipsw/lan969x/config-6.12 +++ b/target/linux/microchipsw/lan969x/config-6.12 @@ -64,7 +64,6 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_DCACHE_WORD_ACCESS=y CONFIG_DEBUG_INFO=y diff --git a/target/linux/mpc85xx/config-6.12 b/target/linux/mpc85xx/config-6.12 index db3f479d0c..aaba6397fc 100644 --- a/target/linux/mpc85xx/config-6.12 +++ b/target/linux/mpc85xx/config-6.12 @@ -48,7 +48,6 @@ CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y # CONFIG_CRYPTO_MD5_PPC is not set CONFIG_CRYPTO_RNG=y diff --git a/target/linux/mvebu/config-6.12 b/target/linux/mvebu/config-6.12 index 6bb99af885..bb5fc5f048 100644 --- a/target/linux/mvebu/config-6.12 +++ b/target/linux/mvebu/config-6.12 @@ -119,7 +119,6 @@ CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_SHA1=y diff --git a/target/linux/mxs/config-6.12 b/target/linux/mxs/config-6.12 index f178dd3ce8..c7646a951e 100644 --- a/target/linux/mxs/config-6.12 +++ b/target/linux/mxs/config-6.12 @@ -68,7 +68,6 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_DEBUG_ALIGN_RODATA=y CONFIG_DEBUG_INFO=y diff --git a/target/linux/mxs/config-6.18 b/target/linux/mxs/config-6.18 index 5c6951c5cd..92d309f548 100644 --- a/target/linux/mxs/config-6.18 +++ b/target/linux/mxs/config-6.18 @@ -68,7 +68,6 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_DEBUG_ALIGN_RODATA=y CONFIG_DEBUG_INFO=y diff --git a/target/linux/octeon/config-6.12 b/target/linux/octeon/config-6.12 index 790206ef3b..6c58cb76a8 100644 --- a/target/linux/octeon/config-6.12 +++ b/target/linux/octeon/config-6.12 @@ -58,7 +58,6 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y # CONFIG_CRYPTO_MD5_OCTEON is not set # CONFIG_CRYPTO_SHA1_OCTEON is not set diff --git a/target/linux/omap/config-6.12 b/target/linux/omap/config-6.12 index 897b7a4fc9..20bee1cac7 100644 --- a/target/linux/omap/config-6.12 +++ b/target/linux/omap/config-6.12 @@ -168,7 +168,6 @@ CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y diff --git a/target/linux/pistachio/config-6.12 b/target/linux/pistachio/config-6.12 index f239d1b964..b8339998c8 100644 --- a/target/linux/pistachio/config-6.12 +++ b/target/linux/pistachio/config-6.12 @@ -67,7 +67,6 @@ CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y diff --git a/target/linux/qoriq/config-6.12 b/target/linux/qoriq/config-6.12 index c90305992e..bc1d32a40f 100644 --- a/target/linux/qoriq/config-6.12 +++ b/target/linux/qoriq/config-6.12 @@ -88,7 +88,6 @@ CONFIG_CRYPTO_LIB_CURVE25519_INTERNAL=y CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y # CONFIG_CRYPTO_MD5_PPC is not set CONFIG_CRYPTO_RNG=y diff --git a/target/linux/qualcommax/config-6.12 b/target/linux/qualcommax/config-6.12 index a7b7d3733b..43f4e25744 100644 --- a/target/linux/qualcommax/config-6.12 +++ b/target/linux/qualcommax/config-6.12 @@ -123,7 +123,6 @@ CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y diff --git a/target/linux/qualcommbe/config-6.12 b/target/linux/qualcommbe/config-6.12 index b84631c2b4..5178c3bf24 100644 --- a/target/linux/qualcommbe/config-6.12 +++ b/target/linux/qualcommbe/config-6.12 @@ -123,7 +123,6 @@ CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y diff --git a/target/linux/ramips/mt7620/config-6.12 b/target/linux/ramips/mt7620/config-6.12 index 62e49bc870..e1dbbf013c 100644 --- a/target/linux/ramips/mt7620/config-6.12 +++ b/target/linux/ramips/mt7620/config-6.12 @@ -37,7 +37,6 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CSRC_R4K=y CONFIG_DEBUG_INFO=y diff --git a/target/linux/ramips/mt7621/config-6.12 b/target/linux/ramips/mt7621/config-6.12 index b59d25420d..3d8fe345c2 100644 --- a/target/linux/ramips/mt7621/config-6.12 +++ b/target/linux/ramips/mt7621/config-6.12 @@ -46,7 +46,6 @@ CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_ZSTD=y diff --git a/target/linux/ramips/mt76x8/config-6.12 b/target/linux/ramips/mt76x8/config-6.12 index e564e1accb..68854319b9 100644 --- a/target/linux/ramips/mt76x8/config-6.12 +++ b/target/linux/ramips/mt76x8/config-6.12 @@ -34,7 +34,6 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CSRC_R4K=y CONFIG_DEBUG_INFO=y diff --git a/target/linux/ramips/rt288x/config-6.12 b/target/linux/ramips/rt288x/config-6.12 index 9cb50aac4f..505edfc337 100644 --- a/target/linux/ramips/rt288x/config-6.12 +++ b/target/linux/ramips/rt288x/config-6.12 @@ -33,7 +33,6 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CSRC_R4K=y CONFIG_DEBUG_INFO=y diff --git a/target/linux/ramips/rt305x/config-6.12 b/target/linux/ramips/rt305x/config-6.12 index 809328c5da..4a8d2cd829 100644 --- a/target/linux/ramips/rt305x/config-6.12 +++ b/target/linux/ramips/rt305x/config-6.12 @@ -34,7 +34,6 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CSRC_R4K=y CONFIG_DEBUG_INFO=y diff --git a/target/linux/ramips/rt3883/config-6.12 b/target/linux/ramips/rt3883/config-6.12 index 6930dc6218..67eea9ab8c 100644 --- a/target/linux/ramips/rt3883/config-6.12 +++ b/target/linux/ramips/rt3883/config-6.12 @@ -34,7 +34,6 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CSRC_R4K=y CONFIG_DEBUG_INFO=y diff --git a/target/linux/realtek/rtl838x/config-6.12 b/target/linux/realtek/rtl838x/config-6.12 index 4f098a75d9..0442791d73 100644 --- a/target/linux/realtek/rtl838x/config-6.12 +++ b/target/linux/realtek/rtl838x/config-6.12 @@ -48,7 +48,6 @@ CONFIG_CPU_SUPPORTS_MSA=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_SECTION_MISMATCH=y diff --git a/target/linux/realtek/rtl839x/config-6.12 b/target/linux/realtek/rtl839x/config-6.12 index b5fb20f4c9..6505b86403 100644 --- a/target/linux/realtek/rtl839x/config-6.12 +++ b/target/linux/realtek/rtl839x/config-6.12 @@ -51,7 +51,6 @@ CONFIG_CPU_SUPPORTS_MSA=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_SECTION_MISMATCH=y diff --git a/target/linux/realtek/rtl930x/config-6.12 b/target/linux/realtek/rtl930x/config-6.12 index 2170e72ee0..e388741d99 100644 --- a/target/linux/realtek/rtl930x/config-6.12 +++ b/target/linux/realtek/rtl930x/config-6.12 @@ -37,7 +37,6 @@ CONFIG_CRC_CCITT=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_SECTION_MISMATCH=y diff --git a/target/linux/realtek/rtl930x_nand/config-6.12 b/target/linux/realtek/rtl930x_nand/config-6.12 index 473fa91b30..5869171311 100644 --- a/target/linux/realtek/rtl930x_nand/config-6.12 +++ b/target/linux/realtek/rtl930x_nand/config-6.12 @@ -37,7 +37,6 @@ CONFIG_CRC_CCITT=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_SECTION_MISMATCH=y diff --git a/target/linux/realtek/rtl931x/config-6.12 b/target/linux/realtek/rtl931x/config-6.12 index b5c2ba630d..6f8db1ce66 100644 --- a/target/linux/realtek/rtl931x/config-6.12 +++ b/target/linux/realtek/rtl931x/config-6.12 @@ -41,7 +41,6 @@ CONFIG_CPU_SUPPORTS_MSA=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_SECTION_MISMATCH=y diff --git a/target/linux/realtek/rtl931x_nand/config-6.12 b/target/linux/realtek/rtl931x_nand/config-6.12 index 1642286ca7..537411cb17 100644 --- a/target/linux/realtek/rtl931x_nand/config-6.12 +++ b/target/linux/realtek/rtl931x_nand/config-6.12 @@ -41,7 +41,6 @@ CONFIG_CPU_SUPPORTS_MSA=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_SECTION_MISMATCH=y diff --git a/target/linux/rockchip/armv8/config-6.12 b/target/linux/rockchip/armv8/config-6.12 index f9c875bae0..f4a151dafb 100644 --- a/target/linux/rockchip/armv8/config-6.12 +++ b/target/linux/rockchip/armv8/config-6.12 @@ -199,7 +199,6 @@ CONFIG_CRYPTO_GHASH_ARM64_CE=y CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_POLYVAL=y diff --git a/target/linux/sifiveu/config-6.12 b/target/linux/sifiveu/config-6.12 index a14996213e..9bf8b4f98a 100644 --- a/target/linux/sifiveu/config-6.12 +++ b/target/linux/sifiveu/config-6.12 @@ -71,7 +71,6 @@ CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_RNG=y diff --git a/target/linux/siflower/sf19a2890/config-6.12 b/target/linux/siflower/sf19a2890/config-6.12 index fdcf4230ed..59eefb6011 100644 --- a/target/linux/siflower/sf19a2890/config-6.12 +++ b/target/linux/siflower/sf19a2890/config-6.12 @@ -47,7 +47,6 @@ CONFIG_CRC_CCITT=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CSRC_R4K=y CONFIG_DEBUG_INFO=y diff --git a/target/linux/siflower/sf21/config-6.12 b/target/linux/siflower/sf21/config-6.12 index e92d565d4a..372a5888f3 100644 --- a/target/linux/siflower/sf21/config-6.12 +++ b/target/linux/siflower/sf21/config-6.12 @@ -52,7 +52,6 @@ CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y # CONFIG_CRYPTO_PCRYPT is not set CONFIG_CRYPTO_ZSTD=y diff --git a/target/linux/starfive/config-6.12 b/target/linux/starfive/config-6.12 index c23ce824c0..7bb86ecee7 100644 --- a/target/linux/starfive/config-6.12 +++ b/target/linux/starfive/config-6.12 @@ -102,7 +102,6 @@ CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_RNG=y diff --git a/target/linux/stm32/stm32mp1/config-6.12 b/target/linux/stm32/stm32mp1/config-6.12 index 34059c80a1..4467ac879a 100644 --- a/target/linux/stm32/stm32mp1/config-6.12 +++ b/target/linux/stm32/stm32mp1/config-6.12 @@ -145,7 +145,6 @@ CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_SHA1=y CONFIG_CURRENT_POINTER_IN_TPIDRURO=y diff --git a/target/linux/sunxi/config-6.12 b/target/linux/sunxi/config-6.12 index 722e5d741f..5362d3e080 100644 --- a/target/linux/sunxi/config-6.12 +++ b/target/linux/sunxi/config-6.12 @@ -126,7 +126,6 @@ CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y # CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set diff --git a/target/linux/tegra/config-6.12 b/target/linux/tegra/config-6.12 index efce8fc37c..4e14e8a455 100644 --- a/target/linux/tegra/config-6.12 +++ b/target/linux/tegra/config-6.12 @@ -130,7 +130,6 @@ CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZ4=y diff --git a/target/linux/uml/config-6.12 b/target/linux/uml/config-6.12 index 6667ad41b4..e8ed1fda42 100644 --- a/target/linux/uml/config-6.12 +++ b/target/linux/uml/config-6.12 @@ -26,7 +26,6 @@ CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_SHA1=y CONFIG_DCACHE_WORD_ACCESS=y diff --git a/target/linux/x86/config-6.12 b/target/linux/x86/config-6.12 index a5cf124928..e74a37cd61 100644 --- a/target/linux/x86/config-6.12 +++ b/target/linux/x86/config-6.12 @@ -83,7 +83,6 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1 -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y # CONFIG_CRYPTO_SERPENT_SSE2_586 is not set diff --git a/target/linux/zynq/config-6.12 b/target/linux/zynq/config-6.12 index dff5ec171b..b9453b663d 100644 --- a/target/linux/zynq/config-6.12 +++ b/target/linux/zynq/config-6.12 @@ -127,7 +127,6 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CURRENT_POINTER_IN_TPIDRURO=y CONFIG_DCACHE_WORD_ACCESS=y From 6c3c959b1b6769f7502567787274be857d4ec05f Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Fri, 3 Apr 2026 22:33:38 +0800 Subject: [PATCH 52/78] kernel: 6.18: move CONFIG_CRYPTO_LIB_SHA256 to generic This symbol is selected by CONFIG_BPF, which was already enabled on generic config-6.18. Signed-off-by: Shiji Yang Link: https://github.com/openwrt/openwrt/pull/22730 Signed-off-by: Hauke Mehrtens --- target/linux/generic/config-6.18 | 1 + target/linux/malta/config-6.18 | 1 - target/linux/microchipsw/lan969x/config-6.18 | 1 - target/linux/realtek/rtl838x/config-6.18 | 1 - target/linux/realtek/rtl839x/config-6.18 | 1 - target/linux/realtek/rtl930x/config-6.18 | 1 - target/linux/realtek/rtl930x_nand/config-6.18 | 1 - target/linux/realtek/rtl931x/config-6.18 | 1 - target/linux/realtek/rtl931x_nand/config-6.18 | 1 - target/linux/x86/config-6.18 | 1 - 10 files changed, 1 insertion(+), 9 deletions(-) diff --git a/target/linux/generic/config-6.18 b/target/linux/generic/config-6.18 index 60c58962b0..093d48af7f 100644 --- a/target/linux/generic/config-6.18 +++ b/target/linux/generic/config-6.18 @@ -1243,6 +1243,7 @@ CONFIG_CRYPTO_LIB_ARC4=y # CONFIG_CRYPTO_LIB_CURVE25519 is not set # CONFIG_CRYPTO_LIB_POLY1305 is not set CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 +CONFIG_CRYPTO_LIB_SHA256=y # CONFIG_CRYPTO_LRW is not set # CONFIG_CRYPTO_LZ4 is not set # CONFIG_CRYPTO_LZ4HC is not set diff --git a/target/linux/malta/config-6.18 b/target/linux/malta/config-6.18 index 1b0252cd43..e424cb813e 100644 --- a/target/linux/malta/config-6.18 +++ b/target/linux/malta/config-6.18 @@ -67,7 +67,6 @@ CONFIG_CRYPTO_CRC32=y CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CSRC_R4K=y CONFIG_DMA_NONCOHERENT=y diff --git a/target/linux/microchipsw/lan969x/config-6.18 b/target/linux/microchipsw/lan969x/config-6.18 index bdfa9ab09a..a0bbaf3fc7 100644 --- a/target/linux/microchipsw/lan969x/config-6.18 +++ b/target/linux/microchipsw/lan969x/config-6.18 @@ -67,7 +67,6 @@ CONFIG_CRYPTO_DEV_ATMEL_AES=y CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_LIB_GF128MUL=y -CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_SHA256_ARCH=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_DCACHE_WORD_ACCESS=y diff --git a/target/linux/realtek/rtl838x/config-6.18 b/target/linux/realtek/rtl838x/config-6.18 index afd7b04299..714417e555 100644 --- a/target/linux/realtek/rtl838x/config-6.18 +++ b/target/linux/realtek/rtl838x/config-6.18 @@ -48,7 +48,6 @@ CONFIG_CPU_SUPPORTS_MSA=y CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_SECTION_MISMATCH=y diff --git a/target/linux/realtek/rtl839x/config-6.18 b/target/linux/realtek/rtl839x/config-6.18 index 518a9254b1..c0912804c2 100644 --- a/target/linux/realtek/rtl839x/config-6.18 +++ b/target/linux/realtek/rtl839x/config-6.18 @@ -51,7 +51,6 @@ CONFIG_CPU_SUPPORTS_MSA=y CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_SECTION_MISMATCH=y diff --git a/target/linux/realtek/rtl930x/config-6.18 b/target/linux/realtek/rtl930x/config-6.18 index b237ec3c49..69ddd0e7e2 100644 --- a/target/linux/realtek/rtl930x/config-6.18 +++ b/target/linux/realtek/rtl930x/config-6.18 @@ -38,7 +38,6 @@ CONFIG_CRC_ITU_T=y CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_SECTION_MISMATCH=y diff --git a/target/linux/realtek/rtl930x_nand/config-6.18 b/target/linux/realtek/rtl930x_nand/config-6.18 index 401cc44754..765b500c23 100644 --- a/target/linux/realtek/rtl930x_nand/config-6.18 +++ b/target/linux/realtek/rtl930x_nand/config-6.18 @@ -41,7 +41,6 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_ZSTD=y diff --git a/target/linux/realtek/rtl931x/config-6.18 b/target/linux/realtek/rtl931x/config-6.18 index d22b51b766..5520ff3f35 100644 --- a/target/linux/realtek/rtl931x/config-6.18 +++ b/target/linux/realtek/rtl931x/config-6.18 @@ -41,7 +41,6 @@ CONFIG_CPU_SUPPORTS_MSA=y CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_SECTION_MISMATCH=y diff --git a/target/linux/realtek/rtl931x_nand/config-6.18 b/target/linux/realtek/rtl931x_nand/config-6.18 index 527a8f82a7..bc08c5f30e 100644 --- a/target/linux/realtek/rtl931x_nand/config-6.18 +++ b/target/linux/realtek/rtl931x_nand/config-6.18 @@ -44,7 +44,6 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_ZSTD=y diff --git a/target/linux/x86/config-6.18 b/target/linux/x86/config-6.18 index cf4d194a9f..8c9aed98c9 100644 --- a/target/linux/x86/config-6.18 +++ b/target/linux/x86/config-6.18 @@ -85,7 +85,6 @@ CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1 CONFIG_CRYPTO_LIB_SHA1=y -CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y # CONFIG_CRYPTO_SERPENT_SSE2_586 is not set # CONFIG_CX_ECAT is not set From 99a0cf9c4466eed6993419fb6d697805467b4443 Mon Sep 17 00:00:00 2001 From: Markus Stockhausen Date: Fri, 3 Apr 2026 12:04:38 +0200 Subject: [PATCH 53/78] realtek: eth: introduce regmap The ethernet driver currently uses the legacy sw() macros. Add a regmap to the driver that is derived from the parent mfd (like in the mdio drivers). As a first consumer make use of that in the IRQ functions. Signed-off-by: Markus Stockhausen Link: https://github.com/openwrt/openwrt/pull/22757 Signed-off-by: Robert Marko --- .../drivers/net/ethernet/rtl838x_eth.c | 33 +++++++++++-------- 1 file changed, 20 insertions(+), 13 deletions(-) diff --git a/target/linux/realtek/files-6.18/drivers/net/ethernet/rtl838x_eth.c b/target/linux/realtek/files-6.18/drivers/net/ethernet/rtl838x_eth.c index 03b9725e6e..c50871ace1 100644 --- a/target/linux/realtek/files-6.18/drivers/net/ethernet/rtl838x_eth.c +++ b/target/linux/realtek/files-6.18/drivers/net/ethernet/rtl838x_eth.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -18,6 +19,7 @@ #include #include #include +#include #include #include @@ -142,6 +144,7 @@ struct rtl838x_rx_q { }; struct rteth_ctrl { + struct regmap *map; struct net_device *netdev; struct platform_device *pdev; void *membase; @@ -168,10 +171,12 @@ static inline void rteth_reenable_irq(struct rteth_ctrl *ctrl, int ring) { u32 shift = ctrl->r->rx_rings % 32; u32 reg = ctrl->r->rx_rings / 32; + u32 bit = BIT(ring + shift); unsigned long flags; + /* locking needed for synchronization with rteth_confirm_and_disable_irqs() */ spin_lock_irqsave(&ctrl->lock, flags); - sw_w32_mask(0, BIT(ring + shift), ctrl->r->dma_if_intr_msk + reg * 4); + regmap_update_bits(ctrl->map, ctrl->r->dma_if_intr_msk + reg * 4, bit, bit); spin_unlock_irqrestore(&ctrl->lock, flags); } @@ -186,9 +191,10 @@ static inline void rteth_confirm_and_disable_irqs(struct rteth_ctrl *ctrl, /* get all irqs, disable only rx (on RTL839x this keeps L2), confirm all */ spin_lock_irqsave(&ctrl->lock, flags); - active = sw_r32(ctrl->r->dma_if_intr_sts + reg * 4); - sw_w32_mask(active & (mask << shift), 0, ctrl->r->dma_if_intr_msk + reg * 4); - sw_w32(active, ctrl->r->dma_if_intr_sts + reg * 4); + regmap_read(ctrl->map, ctrl->r->dma_if_intr_sts + reg * 4, &active); + regmap_update_bits(ctrl->map, ctrl->r->dma_if_intr_msk + reg * 4, + active & (mask << shift), 0); + regmap_write(ctrl->map, ctrl->r->dma_if_intr_sts + reg * 4, active); spin_unlock_irqrestore(&ctrl->lock, flags); /* ~mask filters out RTL93xx devices */ @@ -201,33 +207,31 @@ static void rteth_disable_all_irqs(struct rteth_ctrl *ctrl) int registers = ((ctrl->r->rx_rings * 2 + 7) / 32) + 1; for (int reg = 0; reg < registers; reg++) { - sw_w32(0, ctrl->r->dma_if_intr_msk + reg * 4); - sw_w32(GENMASK(31, 0), ctrl->r->dma_if_intr_sts + reg * 4); + regmap_write(ctrl->map, ctrl->r->dma_if_intr_msk + reg * 4, 0); + regmap_write(ctrl->map, ctrl->r->dma_if_intr_sts + reg * 4, GENMASK(31, 0)); } } static void rteth_enable_all_rx_irqs(struct rteth_ctrl *ctrl) { - int mask, shift, reg; + int mask, reg; /* * The hardware has several types of interrupts. Basically for rx/tx completion and * if hardware queues run out. For now the driver only needs notification about new * incoming packets. Leave everything else disabled. */ - mask = GENMASK(ctrl->r->rx_rings - 1, 0); - shift = ctrl->r->rx_rings % 32; + mask = GENMASK(ctrl->r->rx_rings - 1, 0) << (ctrl->r->rx_rings % 32); reg = ctrl->r->rx_rings / 32; - sw_w32_mask(0, mask << shift, ctrl->r->dma_if_intr_msk + reg * 4); + regmap_update_bits(ctrl->map, ctrl->r->dma_if_intr_msk + reg * 4, mask, mask); /* * RTL839x has additional L2 notification interrupts. Simply activate them. All other * devices that do not have the feature have adequate reserved bit space and ignore it. */ - mask = GENMASK(2, 0); - shift = (ctrl->r->rx_rings * 2 + 4) % 32; + mask = GENMASK(2, 0) << ((ctrl->r->rx_rings * 2 + 4) % 32); reg = (ctrl->r->rx_rings * 2 + 4) / 32; - sw_w32_mask(0, mask << shift, ctrl->r->dma_if_intr_msk + reg * 4); + regmap_update_bits(ctrl->map, ctrl->r->dma_if_intr_msk + reg * 4, mask, mask); } static void rteth_83xx_update_counter(struct rteth_ctrl *ctrl, int ring, int released) @@ -1478,6 +1482,9 @@ static int rteth_probe(struct platform_device *pdev) SET_NETDEV_DEV(dev, &pdev->dev); ctrl = netdev_priv(dev); ctrl->r = cfg; + ctrl->map = syscon_node_to_regmap(dn->parent); + if (IS_ERR(ctrl->map)) + return PTR_ERR(ctrl->map); /* Allocate buffer memory */ ctrl->membase = dmam_alloc_coherent(&pdev->dev, sizeof(struct notify_b), From 063223da70678e3eb0d0c7bc1a311b9bf756e2fa Mon Sep 17 00:00:00 2001 From: Markus Stockhausen Date: Fri, 3 Apr 2026 12:25:59 +0200 Subject: [PATCH 54/78] realtek: eth: convert set_rx_mode() to regmap Make use of regmap in all device specific set_rx_mode() functions. Adapt the constant prefixes to the rest of the driver. While we are here: - align the RTL931x function name with the other targets - replace constants with GENMASK() - use new lowercase style for hexadecimal values Signed-off-by: Markus Stockhausen Link: https://github.com/openwrt/openwrt/pull/22757 Signed-off-by: Robert Marko --- .../drivers/net/ethernet/rtl838x_eth.c | 68 +++++++++++-------- .../drivers/net/ethernet/rtl838x_eth.h | 26 ++++--- 2 files changed, 50 insertions(+), 44 deletions(-) diff --git a/target/linux/realtek/files-6.18/drivers/net/ethernet/rtl838x_eth.c b/target/linux/realtek/files-6.18/drivers/net/ethernet/rtl838x_eth.c index c50871ace1..33e1f11563 100644 --- a/target/linux/realtek/files-6.18/drivers/net/ethernet/rtl838x_eth.c +++ b/target/linux/realtek/files-6.18/drivers/net/ethernet/rtl838x_eth.c @@ -802,80 +802,88 @@ static int rteth_stop(struct net_device *ndev) static void rteth_838x_set_rx_mode(struct net_device *ndev) { + struct rteth_ctrl *ctrl = netdev_priv(ndev); + /* Flood all classes of RMA addresses (01-80-C2-00-00-{01..2F}) * CTRL_0_FULL = GENMASK(21, 0) = 0x3FFFFF */ if (!(ndev->flags & (IFF_PROMISC | IFF_ALLMULTI))) { - sw_w32(0x0, RTL838X_RMA_CTRL_0); - sw_w32(0x0, RTL838X_RMA_CTRL_1); + regmap_write(ctrl->map, RTETH_838X_RMA_CTRL_0, 0); + regmap_write(ctrl->map, RTETH_838X_RMA_CTRL_1, 0); } if (ndev->flags & IFF_ALLMULTI) - sw_w32(GENMASK(21, 0), RTL838X_RMA_CTRL_0); + regmap_write(ctrl->map, RTETH_838X_RMA_CTRL_0, GENMASK(21, 0)); if (ndev->flags & IFF_PROMISC) { - sw_w32(GENMASK(21, 0), RTL838X_RMA_CTRL_0); - sw_w32(0x7fff, RTL838X_RMA_CTRL_1); + regmap_write(ctrl->map, RTETH_838X_RMA_CTRL_0, GENMASK(21, 0)); + regmap_write(ctrl->map, RTETH_838X_RMA_CTRL_1, GENMASK(14, 0)); } } static void rteth_839x_set_rx_mode(struct net_device *ndev) { + struct rteth_ctrl *ctrl = netdev_priv(ndev); + /* Flood all classes of RMA addresses (01-80-C2-00-00-{01..2F}) * CTRL_0_FULL = GENMASK(31, 2) = 0xFFFFFFFC * Lower two bits are reserved, corresponding to RMA 01-80-C2-00-00-00 * CTRL_1_FULL = CTRL_2_FULL = GENMASK(31, 0) */ if (!(ndev->flags & (IFF_PROMISC | IFF_ALLMULTI))) { - sw_w32(0x0, RTL839X_RMA_CTRL_0); - sw_w32(0x0, RTL839X_RMA_CTRL_1); - sw_w32(0x0, RTL839X_RMA_CTRL_2); - sw_w32(0x0, RTL839X_RMA_CTRL_3); + regmap_write(ctrl->map, RTETH_839X_RMA_CTRL_0, 0); + regmap_write(ctrl->map, RTETH_839X_RMA_CTRL_1, 0); + regmap_write(ctrl->map, RTETH_839X_RMA_CTRL_2, 0); + regmap_write(ctrl->map, RTETH_839X_RMA_CTRL_3, 0); } if (ndev->flags & IFF_ALLMULTI) { - sw_w32(GENMASK(31, 2), RTL839X_RMA_CTRL_0); - sw_w32(GENMASK(31, 0), RTL839X_RMA_CTRL_1); - sw_w32(GENMASK(31, 0), RTL839X_RMA_CTRL_2); + regmap_write(ctrl->map, RTETH_839X_RMA_CTRL_0, GENMASK(31, 2)); + regmap_write(ctrl->map, RTETH_839X_RMA_CTRL_1, GENMASK(31, 0)); + regmap_write(ctrl->map, RTETH_839X_RMA_CTRL_2, GENMASK(31, 0)); } if (ndev->flags & IFF_PROMISC) { - sw_w32(GENMASK(31, 2), RTL839X_RMA_CTRL_0); - sw_w32(GENMASK(31, 0), RTL839X_RMA_CTRL_1); - sw_w32(GENMASK(31, 0), RTL839X_RMA_CTRL_2); - sw_w32(0x3ff, RTL839X_RMA_CTRL_3); + regmap_write(ctrl->map, RTETH_839X_RMA_CTRL_0, GENMASK(31, 2)); + regmap_write(ctrl->map, RTETH_839X_RMA_CTRL_1, GENMASK(31, 0)); + regmap_write(ctrl->map, RTETH_839X_RMA_CTRL_2, GENMASK(31, 0)); + regmap_write(ctrl->map, RTETH_839X_RMA_CTRL_3, GENMASK(9, 0)); } } static void rteth_930x_set_rx_mode(struct net_device *ndev) { + struct rteth_ctrl *ctrl = netdev_priv(ndev); + /* Flood all classes of RMA addresses (01-80-C2-00-00-{01..2F}) * CTRL_0_FULL = GENMASK(31, 2) = 0xFFFFFFFC * Lower two bits are reserved, corresponding to RMA 01-80-C2-00-00-00 * CTRL_1_FULL = CTRL_2_FULL = GENMASK(31, 0) */ if (ndev->flags & (IFF_ALLMULTI | IFF_PROMISC)) { - sw_w32(GENMASK(31, 2), RTL930X_RMA_CTRL_0); - sw_w32(GENMASK(31, 0), RTL930X_RMA_CTRL_1); - sw_w32(GENMASK(31, 0), RTL930X_RMA_CTRL_2); + regmap_write(ctrl->map, RTETH_930X_RMA_CTRL_0, GENMASK(31, 2)); + regmap_write(ctrl->map, RTETH_930X_RMA_CTRL_1, GENMASK(31, 0)); + regmap_write(ctrl->map, RTETH_930X_RMA_CTRL_2, GENMASK(31, 0)); } else { - sw_w32(0x0, RTL930X_RMA_CTRL_0); - sw_w32(0x0, RTL930X_RMA_CTRL_1); - sw_w32(0x0, RTL930X_RMA_CTRL_2); + regmap_write(ctrl->map, RTETH_930X_RMA_CTRL_0, 0); + regmap_write(ctrl->map, RTETH_930X_RMA_CTRL_1, 0); + regmap_write(ctrl->map, RTETH_930X_RMA_CTRL_2, 0); } } -static void rtl931x_eth_set_multicast_list(struct net_device *ndev) +static void rteth_931x_set_rx_mode(struct net_device *ndev) { + struct rteth_ctrl *ctrl = netdev_priv(ndev); + /* Flood all classes of RMA addresses (01-80-C2-00-00-{01..2F}) * CTRL_0_FULL = GENMASK(31, 2) = 0xFFFFFFFC * Lower two bits are reserved, corresponding to RMA 01-80-C2-00-00-00. * CTRL_1_FULL = CTRL_2_FULL = GENMASK(31, 0) */ if (ndev->flags & (IFF_ALLMULTI | IFF_PROMISC)) { - sw_w32(GENMASK(31, 2), RTL931X_RMA_CTRL_0); - sw_w32(GENMASK(31, 0), RTL931X_RMA_CTRL_1); - sw_w32(GENMASK(31, 0), RTL931X_RMA_CTRL_2); + regmap_write(ctrl->map, RTETH_931X_RMA_CTRL_0, GENMASK(31, 2)); + regmap_write(ctrl->map, RTETH_931X_RMA_CTRL_1, GENMASK(31, 0)); + regmap_write(ctrl->map, RTETH_931X_RMA_CTRL_2, GENMASK(31, 0)); } else { - sw_w32(0x0, RTL931X_RMA_CTRL_0); - sw_w32(0x0, RTL931X_RMA_CTRL_1); - sw_w32(0x0, RTL931X_RMA_CTRL_2); + regmap_write(ctrl->map, RTETH_931X_RMA_CTRL_0, 0); + regmap_write(ctrl->map, RTETH_931X_RMA_CTRL_1, 0); + regmap_write(ctrl->map, RTETH_931X_RMA_CTRL_2, 0); } } @@ -1410,7 +1418,7 @@ static const struct net_device_ops rteth_931x_netdev_ops = { .ndo_start_xmit = rteth_start_xmit, .ndo_set_mac_address = rteth_set_mac_address, .ndo_validate_addr = eth_validate_addr, - .ndo_set_rx_mode = rtl931x_eth_set_multicast_list, + .ndo_set_rx_mode = rteth_931x_set_rx_mode, .ndo_tx_timeout = rteth_tx_timeout, .ndo_set_features = rteth_93xx_set_features, .ndo_fix_features = rteth_fix_features, diff --git a/target/linux/realtek/files-6.18/drivers/net/ethernet/rtl838x_eth.h b/target/linux/realtek/files-6.18/drivers/net/ethernet/rtl838x_eth.h index b44dd305ab..79f624f1de 100644 --- a/target/linux/realtek/files-6.18/drivers/net/ethernet/rtl838x_eth.h +++ b/target/linux/realtek/files-6.18/drivers/net/ethernet/rtl838x_eth.h @@ -18,6 +18,8 @@ #define RTETH_838X_QM_PKT2CPU_INTPRI_MAP (0x5f10) #define RTETH_838X_QM_PKT2CPU_INTPRI_0 (0x5f04) #define RTETH_838X_QM_PKT2CPU_INTPRI_CNT 3 +#define RTETH_838X_RMA_CTRL_0 (0x4300) +#define RTETH_838X_RMA_CTRL_1 (0x4304) #define RTETH_839X_CPU_PORT 52 #define RTETH_839X_DMA_IF_INTR_MSK (0x7864) @@ -28,6 +30,10 @@ #define RTETH_839X_QM_PKT2CPU_INTPRI_MAP (0x1154) #define RTETH_839X_QM_PKT2CPU_INTPRI_0 (0x1148) #define RTETH_839X_QM_PKT2CPU_INTPRI_CNT 3 +#define RTETH_839X_RMA_CTRL_0 (0x1200) +#define RTETH_839X_RMA_CTRL_1 (0x1204) +#define RTETH_839X_RMA_CTRL_2 (0x1208) +#define RTETH_839X_RMA_CTRL_3 (0x120c) #define RTETH_930X_CPU_PORT 28 #define RTETH_930X_DMA_IF_INTR_MSK (0xe010) @@ -37,6 +43,9 @@ #define RTETH_930X_MAC_L2_PORT_CTRL (0x3268 + RTETH_930X_CPU_PORT * 64) #define RTETH_930X_QM_RSN2CPUQID_CTRL_0 (0xa344) #define RTETH_930X_QM_RSN2CPUQID_CTRL_CNT 11 +#define RTETH_930X_RMA_CTRL_0 (0x9e60) +#define RTETH_930X_RMA_CTRL_1 (0x9e64) +#define RTETH_930X_RMA_CTRL_2 (0x9e68) #define RTETH_931X_CPU_PORT 56 #define RTETH_931X_DMA_IF_INTR_MSK (0x0910) @@ -46,6 +55,9 @@ #define RTETH_931X_MAC_L2_PORT_CTRL (0x6000 + RTETH_931X_CPU_PORT * 128) #define RTETH_931X_QM_RSN2CPUQID_CTRL_0 (0xa9f4) #define RTETH_931X_QM_RSN2CPUQID_CTRL_CNT 14 +#define RTETH_931X_RMA_CTRL_0 (0x8800) +#define RTETH_931X_RMA_CTRL_1 (0x8804) +#define RTETH_931X_RMA_CTRL_2 (0x8808) /* * Reset @@ -146,24 +158,10 @@ /* TRAPPING to CPU-PORT */ #define RTL838X_SPCL_TRAP_IGMP_CTRL (0x6984) -#define RTL838X_RMA_CTRL_0 (0x4300) -#define RTL838X_RMA_CTRL_1 (0x4304) -#define RTL839X_RMA_CTRL_0 (0x1200) - #define RTL839X_SPCL_TRAP_IGMP_CTRL (0x1058) -#define RTL839X_RMA_CTRL_1 (0x1204) -#define RTL839X_RMA_CTRL_2 (0x1208) -#define RTL839X_RMA_CTRL_3 (0x120C) #define RTL930X_VLAN_APP_PKT_CTRL (0xA23C) -#define RTL930X_RMA_CTRL_0 (0x9E60) -#define RTL930X_RMA_CTRL_1 (0x9E64) -#define RTL930X_RMA_CTRL_2 (0x9E68) - #define RTL931X_VLAN_APP_PKT_CTRL (0x96b0) -#define RTL931X_RMA_CTRL_0 (0x8800) -#define RTL931X_RMA_CTRL_1 (0x8804) -#define RTL931X_RMA_CTRL_2 (0x8808) /* Chip configuration registers of the RTL9310 */ #define RTL931X_MEM_ENCAP_INIT (0x4854) From 15de91f1e963df248476f63c3ebb4dc4a210509b Mon Sep 17 00:00:00 2001 From: Markus Stockhausen Date: Wed, 1 Apr 2026 17:43:11 +0200 Subject: [PATCH 55/78] realtek: mdio: add mutex for multiple busses When the mdio driver gets enhanced for multiple busses it must snchronize reads/writes to the single controller. Add a lock to the control structure and guard the critical operations. Signed-off-by: Markus Stockhausen Link: https://github.com/openwrt/openwrt/pull/22731 Signed-off-by: Robert Marko --- .../files-6.18/drivers/net/mdio/mdio-realtek-otto.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/target/linux/realtek/files-6.18/drivers/net/mdio/mdio-realtek-otto.c b/target/linux/realtek/files-6.18/drivers/net/mdio/mdio-realtek-otto.c index d53e447c45..379952fda4 100644 --- a/target/linux/realtek/files-6.18/drivers/net/mdio/mdio-realtek-otto.c +++ b/target/linux/realtek/files-6.18/drivers/net/mdio/mdio-realtek-otto.c @@ -188,6 +188,7 @@ struct rtmdio_bus { }; struct rtmdio_ctrl { + struct mutex lock; struct regmap *map; const struct rtmdio_config *cfg; struct rtmdio_port port[RTMDIO_MAX_PHY]; @@ -508,9 +509,11 @@ static int rtmdio_read_c45(struct mii_bus *bus, int addr, int devnum, int regnum if (addr >= ctrl->cfg->num_phys) return -ENODEV; + guard(mutex)(&ctrl->lock); err = (*ctrl->cfg->read_mmd_phy)(bus, addr, devnum, regnum, &val); pr_debug("rd_MMD(adr=%d, dev=%d, reg=%d) = %d, err = %d\n", addr, devnum, regnum, val, err); + return err ? err : val; } @@ -522,6 +525,7 @@ static int rtmdio_read(struct mii_bus *bus, int addr, int regnum) if (addr >= ctrl->cfg->num_phys) return -ENODEV; + guard(mutex)(&ctrl->lock); if (regnum == RTMDIO_PAGE_SELECT && ctrl->port[addr].page != ctrl->cfg->raw_page) return ctrl->port[addr].page; @@ -530,6 +534,7 @@ static int rtmdio_read(struct mii_bus *bus, int addr, int regnum) err = (*ctrl->cfg->read_phy)(bus, addr, ctrl->port[addr].page, regnum, &val); pr_debug("rd_PHY(adr=%d, pag=%d, reg=%d) = %d, err = %d\n", addr, ctrl->port[addr].page, regnum, val, err); + return err ? err : val; } @@ -541,9 +546,11 @@ static int rtmdio_write_c45(struct mii_bus *bus, int addr, int devnum, int regnu if (addr >= ctrl->cfg->num_phys) return -ENODEV; + guard(mutex)(&ctrl->lock); err = (*ctrl->cfg->write_mmd_phy)(bus, addr, devnum, regnum, val); pr_debug("wr_MMD(adr=%d, dev=%d, reg=%d, val=%d) err = %d\n", addr, devnum, regnum, val, err); + return err; } @@ -555,6 +562,7 @@ static int rtmdio_write(struct mii_bus *bus, int addr, int regnum, u16 val) if (addr >= ctrl->cfg->num_phys) return -ENODEV; + guard(mutex)(&ctrl->lock); page = ctrl->port[addr].page; if (regnum == RTMDIO_PAGE_SELECT) @@ -571,6 +579,7 @@ static int rtmdio_write(struct mii_bus *bus, int addr, int regnum, u16 val) } ctrl->port[addr].raw = false; + return 0; } @@ -966,6 +975,10 @@ static int rtmdio_probe(struct platform_device *pdev) if (!ctrl) return -ENOMEM; + ret = devm_mutex_init(dev, &ctrl->lock); + if (ret) + return ret; + platform_set_drvdata(pdev, ctrl); ctrl->cfg = (const struct rtmdio_config *)device_get_match_data(dev); ctrl->map = syscon_node_to_regmap(pdev->dev.of_node->parent); From 3ef3fb9db9b1731e5164c2c99384f62491e3834a Mon Sep 17 00:00:00 2001 From: Markus Stockhausen Date: Wed, 1 Apr 2026 18:51:47 +0200 Subject: [PATCH 56/78] realtek: mdio: add phy to port lookup The Realtek mdio bus operations are based on the port number. As of now the driver exposes a single bus with a 1:1 mapping between phy and port. This will change in the future when the driver exposes multiple busses. This will need a mapping - e.g. - bus 0, phy 23 -> read/write port 23 - bus 1, phy 0 -> read/write port 24 Provide a rtmdio_phy_to_port() indirection function that will lookup the port number based on a bus and a phy. For now it will only run some basic sanity checks and return the given input address (because of 1:1 mapping). Signed-off-by: Markus Stockhausen Link: https://github.com/openwrt/openwrt/pull/22731 Signed-off-by: Robert Marko --- .../drivers/net/mdio/mdio-realtek-otto.c | 49 +++++++++++++------ 1 file changed, 33 insertions(+), 16 deletions(-) diff --git a/target/linux/realtek/files-6.18/drivers/net/mdio/mdio-realtek-otto.c b/target/linux/realtek/files-6.18/drivers/net/mdio/mdio-realtek-otto.c index 379952fda4..49584ef2c1 100644 --- a/target/linux/realtek/files-6.18/drivers/net/mdio/mdio-realtek-otto.c +++ b/target/linux/realtek/files-6.18/drivers/net/mdio/mdio-realtek-otto.c @@ -223,6 +223,19 @@ struct rtmdio_phy_info { unsigned int poll_lpa_1000; }; +static int rtmdio_phy_to_port(struct mii_bus *bus, int phy) +{ + struct rtmdio_ctrl *ctrl = rtmdio_ctrl_from_bus(bus); + + if (phy < 0 || phy >= ctrl->cfg->num_phys) + return -ENOENT; + + if (!test_bit(phy, ctrl->valid_ports)) + return -ENOENT; + + return phy; +} + static int rtmdio_run_cmd(struct mii_bus *bus, int cmd, int mask, int regnum, int fail) { struct rtmdio_ctrl *ctrl = rtmdio_ctrl_from_bus(bus); @@ -501,13 +514,14 @@ static int rtmdio_931x_write_mmd_phy(struct mii_bus *bus, u32 addr, u32 devnum, return rtmdio_931x_run_cmd(bus, RTMDIO_931X_CMD_WRITE_C45); } -static int rtmdio_read_c45(struct mii_bus *bus, int addr, int devnum, int regnum) +static int rtmdio_read_c45(struct mii_bus *bus, int phy, int devnum, int regnum) { struct rtmdio_ctrl *ctrl = rtmdio_ctrl_from_bus(bus); - int err, val; + int err, val, addr; - if (addr >= ctrl->cfg->num_phys) - return -ENODEV; + addr = rtmdio_phy_to_port(bus, phy); + if (addr < 0) + return addr; guard(mutex)(&ctrl->lock); err = (*ctrl->cfg->read_mmd_phy)(bus, addr, devnum, regnum, &val); @@ -517,13 +531,14 @@ static int rtmdio_read_c45(struct mii_bus *bus, int addr, int devnum, int regnum return err ? err : val; } -static int rtmdio_read(struct mii_bus *bus, int addr, int regnum) +static int rtmdio_read(struct mii_bus *bus, int phy, int regnum) { struct rtmdio_ctrl *ctrl = rtmdio_ctrl_from_bus(bus); - int err, val; + int err, val, addr; - if (addr >= ctrl->cfg->num_phys) - return -ENODEV; + addr = rtmdio_phy_to_port(bus, phy); + if (addr < 0) + return addr; guard(mutex)(&ctrl->lock); if (regnum == RTMDIO_PAGE_SELECT && ctrl->port[addr].page != ctrl->cfg->raw_page) @@ -538,13 +553,14 @@ static int rtmdio_read(struct mii_bus *bus, int addr, int regnum) return err ? err : val; } -static int rtmdio_write_c45(struct mii_bus *bus, int addr, int devnum, int regnum, u16 val) +static int rtmdio_write_c45(struct mii_bus *bus, int phy, int devnum, int regnum, u16 val) { struct rtmdio_ctrl *ctrl = rtmdio_ctrl_from_bus(bus); - int err; + int err, addr; - if (addr >= ctrl->cfg->num_phys) - return -ENODEV; + addr = rtmdio_phy_to_port(bus, phy); + if (addr < 0) + return addr; guard(mutex)(&ctrl->lock); err = (*ctrl->cfg->write_mmd_phy)(bus, addr, devnum, regnum, val); @@ -554,13 +570,14 @@ static int rtmdio_write_c45(struct mii_bus *bus, int addr, int devnum, int regnu return err; } -static int rtmdio_write(struct mii_bus *bus, int addr, int regnum, u16 val) +static int rtmdio_write(struct mii_bus *bus, int phy, int regnum, u16 val) { struct rtmdio_ctrl *ctrl = rtmdio_ctrl_from_bus(bus); - int err, page; + int err, page, addr; - if (addr >= ctrl->cfg->num_phys) - return -ENODEV; + addr = rtmdio_phy_to_port(bus, phy); + if (addr < 0) + return addr; guard(mutex)(&ctrl->lock); page = ctrl->port[addr].page; From a98d68dc70d0c45275425543f44e1faf019bf49d Mon Sep 17 00:00:00 2001 From: Mieczyslaw Nalewaj Date: Mon, 6 Apr 2026 09:41:25 +0200 Subject: [PATCH 57/78] kernel/ramips: create files for v6.18 (from v6.12) This is an automatically generated commit. When doing `git bisect`, consider `git bisect --skip`. Signed-off-by: Mieczyslaw Nalewaj Link: https://github.com/openwrt/openwrt/pull/21418 Signed-off-by: Robert Marko --- target/linux/ramips/mt7620/{config-6.12 => config-6.18} | 0 target/linux/ramips/mt7621/{config-6.12 => config-6.18} | 0 target/linux/ramips/mt76x8/{config-6.12 => config-6.18} | 0 ....13-clocksource-drivers-ralink-Add-Ralink-System-Tick-Co.patch | 0 ....13-clk-ralink-mtmips-add-mmc-related-clocks-for-SoCs-MT.patch | 0 ...-v6.13-mmc-mtk-sd-Implement-Host-Software-Queue-for-eMMC.patch | 0 ....15-dt-bindings-clock-add-clock-definitions-for-Ralink-S.patch | 0 .../100-mips-ralink-update-CPU-clock-index.patch | 0 .../101-clk-ralink-mtmips-add-pwm-clocks-for-mt76x8.patch | 0 ...102-01-pwm-mediatek-set-mt7628-pwm45_fixup-flag-to-false.patch | 0 .../102-02-pwm-mediatek-correct-mt7628-clock-source-setting.patch | 0 .../120-1-mips-pci-mt7620-fix-bridge-register-access.patch | 0 .../120-2-mips-pci-mt7620-add-more-register-init-values.patch | 0 .../120-3-mips-pci-mt7620-rework-initialization-procedure.patch | 0 ...130-phy-mediatek-allow-building-T-PHY-driver-for-MT7621-.patch | 0 .../{patches-6.12 => patches-6.18}/200-add-ralink-eth.patch | 0 .../300-mt7620-export-chip-version-and-pkg.patch | 0 ...311-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch | 0 .../312-MIPS-ralink-add-cpu-frequency-scaling.patch | 0 .../314-MIPS-add-bootargs-override-property.patch | 0 .../315-owrt-hack-fix-mt7688-cache-issue.patch | 0 ...316-arch-mips-do-not-select-illegal-access-driver-by-def.patch | 0 .../320-MIPS-add-support-for-buggy-MT7621S-core-detection.patch | 0 .../{patches-6.12 => patches-6.18}/324-mt7621-perfctr-fix.patch | 0 .../330-mt7620-avoid-direct-jal-in-random-helper.patch | 0 .../331-mt7620-avoid-direct-jal-in-resume_user_mode_work.patch | 0 .../332-mt7620-conditional-stack-align.patch | 0 .../400-mtd-cfi-cmdset-0002-force-word-write.patch | 0 .../405-mtd-spi-nor-Add-support-for-BoHong-bh25q128as.patch | 0 ...410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch | 0 ...411-dt-bindings-add-documentation-for-mt7621-nand-driver.patch | 0 .../720-NET-no-auto-carrier-off-support.patch | 0 .../800-dmaengine-mediatek-add-HSDMA-support-for-mt7621.patch | 0 .../801-DT-Add-documentation-for-gpio-ralink.patch | 0 .../802-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch | 0 .../804-dma-ralink-add-back-gdma-driver.patch | 0 ...808-pinctrl-mtmips-support-requesting-different-function.patch | 0 .../809-pinctrl-mtmips-allow-mux-SDXC-pins-for-mt76x8.patch | 0 .../810-uvc-add-iPassion-iP2970-support.patch | 0 .../820-DT-Add-documentation-for-spi-rt2880.patch | 0 .../821-SPI-ralink-add-Ralink-SoC-spi-driver.patch | 0 .../825-i2c-MIPS-adds-ralink-I2C-driver.patch | 0 .../830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch | 0 ...-01-mmc-mtk-sd-add-tuning-parameters-for-legacy-MIPS-MT7.patch | 0 .../831-02-mmc-mtk-sd-disable-auto-CMD23-support-for-mt7620.patch | 0 ...-03-mmc-mtk-sd-use-default-PATCH_BIT1-2-values-for-mt762.patch | 0 .../835-asoc-add-mt7620-support.patch | 0 .../840-serial-add-ugly-custom-baud-rate-hack.patch | 0 .../850-awake-rt305x-dwc2-controller.patch | 0 .../860-ramips-add-eip93-driver.patch | 0 .../870-Input-sx951x-add-Semtech-SX9512-SX9513-driver.patch | 0 .../900-pci-rt2880-static-pcibios_init.patch | 0 .../931-mips-ralink-add-missing-include.patch | 0 ...932-MIPS-Stop-secondary-CPUs-before-platform-restart-hal.patch | 0 ...933-MIPS-SMP-Wait-for-secondary-CPUs-to-stop-in-smp_send.patch | 0 .../934-MIPS-SMP-Properly-stop-secondary-CPUs-for-restart.patch | 0 target/linux/ramips/rt288x/{config-6.12 => config-6.18} | 0 target/linux/ramips/rt305x/{config-6.12 => config-6.18} | 0 target/linux/ramips/rt3883/{config-6.12 => config-6.18} | 0 59 files changed, 0 insertions(+), 0 deletions(-) rename target/linux/ramips/mt7620/{config-6.12 => config-6.18} (100%) rename target/linux/ramips/mt7621/{config-6.12 => config-6.18} (100%) rename target/linux/ramips/mt76x8/{config-6.12 => config-6.18} (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/001-v6.13-clocksource-drivers-ralink-Add-Ralink-System-Tick-Co.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/002-03-v6.13-clk-ralink-mtmips-add-mmc-related-clocks-for-SoCs-MT.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/003-v6.13-mmc-mtk-sd-Implement-Host-Software-Queue-for-eMMC.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/004-v6.15-dt-bindings-clock-add-clock-definitions-for-Ralink-S.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/100-mips-ralink-update-CPU-clock-index.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/101-clk-ralink-mtmips-add-pwm-clocks-for-mt76x8.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/102-01-pwm-mediatek-set-mt7628-pwm45_fixup-flag-to-false.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/102-02-pwm-mediatek-correct-mt7628-clock-source-setting.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/120-1-mips-pci-mt7620-fix-bridge-register-access.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/120-2-mips-pci-mt7620-add-more-register-init-values.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/120-3-mips-pci-mt7620-rework-initialization-procedure.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/130-phy-mediatek-allow-building-T-PHY-driver-for-MT7621-.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/200-add-ralink-eth.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/300-mt7620-export-chip-version-and-pkg.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/311-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/312-MIPS-ralink-add-cpu-frequency-scaling.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/314-MIPS-add-bootargs-override-property.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/315-owrt-hack-fix-mt7688-cache-issue.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/316-arch-mips-do-not-select-illegal-access-driver-by-def.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/320-MIPS-add-support-for-buggy-MT7621S-core-detection.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/324-mt7621-perfctr-fix.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/330-mt7620-avoid-direct-jal-in-random-helper.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/331-mt7620-avoid-direct-jal-in-resume_user_mode_work.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/332-mt7620-conditional-stack-align.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/400-mtd-cfi-cmdset-0002-force-word-write.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/405-mtd-spi-nor-Add-support-for-BoHong-bh25q128as.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/411-dt-bindings-add-documentation-for-mt7621-nand-driver.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/720-NET-no-auto-carrier-off-support.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/800-dmaengine-mediatek-add-HSDMA-support-for-mt7621.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/801-DT-Add-documentation-for-gpio-ralink.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/802-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/804-dma-ralink-add-back-gdma-driver.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/808-pinctrl-mtmips-support-requesting-different-function.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/809-pinctrl-mtmips-allow-mux-SDXC-pins-for-mt76x8.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/810-uvc-add-iPassion-iP2970-support.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/820-DT-Add-documentation-for-spi-rt2880.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/821-SPI-ralink-add-Ralink-SoC-spi-driver.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/825-i2c-MIPS-adds-ralink-I2C-driver.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/831-01-mmc-mtk-sd-add-tuning-parameters-for-legacy-MIPS-MT7.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/831-02-mmc-mtk-sd-disable-auto-CMD23-support-for-mt7620.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/831-03-mmc-mtk-sd-use-default-PATCH_BIT1-2-values-for-mt762.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/835-asoc-add-mt7620-support.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/840-serial-add-ugly-custom-baud-rate-hack.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/850-awake-rt305x-dwc2-controller.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/860-ramips-add-eip93-driver.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/870-Input-sx951x-add-Semtech-SX9512-SX9513-driver.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/900-pci-rt2880-static-pcibios_init.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/931-mips-ralink-add-missing-include.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/932-MIPS-Stop-secondary-CPUs-before-platform-restart-hal.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/933-MIPS-SMP-Wait-for-secondary-CPUs-to-stop-in-smp_send.patch (100%) rename target/linux/ramips/{patches-6.12 => patches-6.18}/934-MIPS-SMP-Properly-stop-secondary-CPUs-for-restart.patch (100%) rename target/linux/ramips/rt288x/{config-6.12 => config-6.18} (100%) rename target/linux/ramips/rt305x/{config-6.12 => config-6.18} (100%) rename target/linux/ramips/rt3883/{config-6.12 => config-6.18} (100%) diff --git a/target/linux/ramips/mt7620/config-6.12 b/target/linux/ramips/mt7620/config-6.18 similarity index 100% rename from target/linux/ramips/mt7620/config-6.12 rename to target/linux/ramips/mt7620/config-6.18 diff --git a/target/linux/ramips/mt7621/config-6.12 b/target/linux/ramips/mt7621/config-6.18 similarity index 100% rename from target/linux/ramips/mt7621/config-6.12 rename to target/linux/ramips/mt7621/config-6.18 diff --git a/target/linux/ramips/mt76x8/config-6.12 b/target/linux/ramips/mt76x8/config-6.18 similarity index 100% rename from target/linux/ramips/mt76x8/config-6.12 rename to target/linux/ramips/mt76x8/config-6.18 diff --git a/target/linux/ramips/patches-6.12/001-v6.13-clocksource-drivers-ralink-Add-Ralink-System-Tick-Co.patch b/target/linux/ramips/patches-6.18/001-v6.13-clocksource-drivers-ralink-Add-Ralink-System-Tick-Co.patch similarity index 100% rename from target/linux/ramips/patches-6.12/001-v6.13-clocksource-drivers-ralink-Add-Ralink-System-Tick-Co.patch rename to target/linux/ramips/patches-6.18/001-v6.13-clocksource-drivers-ralink-Add-Ralink-System-Tick-Co.patch diff --git a/target/linux/ramips/patches-6.12/002-03-v6.13-clk-ralink-mtmips-add-mmc-related-clocks-for-SoCs-MT.patch b/target/linux/ramips/patches-6.18/002-03-v6.13-clk-ralink-mtmips-add-mmc-related-clocks-for-SoCs-MT.patch similarity index 100% rename from target/linux/ramips/patches-6.12/002-03-v6.13-clk-ralink-mtmips-add-mmc-related-clocks-for-SoCs-MT.patch rename to target/linux/ramips/patches-6.18/002-03-v6.13-clk-ralink-mtmips-add-mmc-related-clocks-for-SoCs-MT.patch diff --git a/target/linux/ramips/patches-6.12/003-v6.13-mmc-mtk-sd-Implement-Host-Software-Queue-for-eMMC.patch b/target/linux/ramips/patches-6.18/003-v6.13-mmc-mtk-sd-Implement-Host-Software-Queue-for-eMMC.patch similarity index 100% rename from target/linux/ramips/patches-6.12/003-v6.13-mmc-mtk-sd-Implement-Host-Software-Queue-for-eMMC.patch rename to target/linux/ramips/patches-6.18/003-v6.13-mmc-mtk-sd-Implement-Host-Software-Queue-for-eMMC.patch diff --git a/target/linux/ramips/patches-6.12/004-v6.15-dt-bindings-clock-add-clock-definitions-for-Ralink-S.patch b/target/linux/ramips/patches-6.18/004-v6.15-dt-bindings-clock-add-clock-definitions-for-Ralink-S.patch similarity index 100% rename from target/linux/ramips/patches-6.12/004-v6.15-dt-bindings-clock-add-clock-definitions-for-Ralink-S.patch rename to target/linux/ramips/patches-6.18/004-v6.15-dt-bindings-clock-add-clock-definitions-for-Ralink-S.patch diff --git a/target/linux/ramips/patches-6.12/100-mips-ralink-update-CPU-clock-index.patch b/target/linux/ramips/patches-6.18/100-mips-ralink-update-CPU-clock-index.patch similarity index 100% rename from target/linux/ramips/patches-6.12/100-mips-ralink-update-CPU-clock-index.patch rename to target/linux/ramips/patches-6.18/100-mips-ralink-update-CPU-clock-index.patch diff --git a/target/linux/ramips/patches-6.12/101-clk-ralink-mtmips-add-pwm-clocks-for-mt76x8.patch b/target/linux/ramips/patches-6.18/101-clk-ralink-mtmips-add-pwm-clocks-for-mt76x8.patch similarity index 100% rename from target/linux/ramips/patches-6.12/101-clk-ralink-mtmips-add-pwm-clocks-for-mt76x8.patch rename to target/linux/ramips/patches-6.18/101-clk-ralink-mtmips-add-pwm-clocks-for-mt76x8.patch diff --git a/target/linux/ramips/patches-6.12/102-01-pwm-mediatek-set-mt7628-pwm45_fixup-flag-to-false.patch b/target/linux/ramips/patches-6.18/102-01-pwm-mediatek-set-mt7628-pwm45_fixup-flag-to-false.patch similarity index 100% rename from target/linux/ramips/patches-6.12/102-01-pwm-mediatek-set-mt7628-pwm45_fixup-flag-to-false.patch rename to target/linux/ramips/patches-6.18/102-01-pwm-mediatek-set-mt7628-pwm45_fixup-flag-to-false.patch diff --git a/target/linux/ramips/patches-6.12/102-02-pwm-mediatek-correct-mt7628-clock-source-setting.patch b/target/linux/ramips/patches-6.18/102-02-pwm-mediatek-correct-mt7628-clock-source-setting.patch similarity index 100% rename from target/linux/ramips/patches-6.12/102-02-pwm-mediatek-correct-mt7628-clock-source-setting.patch rename to target/linux/ramips/patches-6.18/102-02-pwm-mediatek-correct-mt7628-clock-source-setting.patch diff --git a/target/linux/ramips/patches-6.12/120-1-mips-pci-mt7620-fix-bridge-register-access.patch b/target/linux/ramips/patches-6.18/120-1-mips-pci-mt7620-fix-bridge-register-access.patch similarity index 100% rename from target/linux/ramips/patches-6.12/120-1-mips-pci-mt7620-fix-bridge-register-access.patch rename to target/linux/ramips/patches-6.18/120-1-mips-pci-mt7620-fix-bridge-register-access.patch diff --git a/target/linux/ramips/patches-6.12/120-2-mips-pci-mt7620-add-more-register-init-values.patch b/target/linux/ramips/patches-6.18/120-2-mips-pci-mt7620-add-more-register-init-values.patch similarity index 100% rename from target/linux/ramips/patches-6.12/120-2-mips-pci-mt7620-add-more-register-init-values.patch rename to target/linux/ramips/patches-6.18/120-2-mips-pci-mt7620-add-more-register-init-values.patch diff --git a/target/linux/ramips/patches-6.12/120-3-mips-pci-mt7620-rework-initialization-procedure.patch b/target/linux/ramips/patches-6.18/120-3-mips-pci-mt7620-rework-initialization-procedure.patch similarity index 100% rename from target/linux/ramips/patches-6.12/120-3-mips-pci-mt7620-rework-initialization-procedure.patch rename to target/linux/ramips/patches-6.18/120-3-mips-pci-mt7620-rework-initialization-procedure.patch diff --git a/target/linux/ramips/patches-6.12/130-phy-mediatek-allow-building-T-PHY-driver-for-MT7621-.patch b/target/linux/ramips/patches-6.18/130-phy-mediatek-allow-building-T-PHY-driver-for-MT7621-.patch similarity index 100% rename from target/linux/ramips/patches-6.12/130-phy-mediatek-allow-building-T-PHY-driver-for-MT7621-.patch rename to target/linux/ramips/patches-6.18/130-phy-mediatek-allow-building-T-PHY-driver-for-MT7621-.patch diff --git a/target/linux/ramips/patches-6.12/200-add-ralink-eth.patch b/target/linux/ramips/patches-6.18/200-add-ralink-eth.patch similarity index 100% rename from target/linux/ramips/patches-6.12/200-add-ralink-eth.patch rename to target/linux/ramips/patches-6.18/200-add-ralink-eth.patch diff --git a/target/linux/ramips/patches-6.12/300-mt7620-export-chip-version-and-pkg.patch b/target/linux/ramips/patches-6.18/300-mt7620-export-chip-version-and-pkg.patch similarity index 100% rename from target/linux/ramips/patches-6.12/300-mt7620-export-chip-version-and-pkg.patch rename to target/linux/ramips/patches-6.18/300-mt7620-export-chip-version-and-pkg.patch diff --git a/target/linux/ramips/patches-6.12/311-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch b/target/linux/ramips/patches-6.18/311-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch similarity index 100% rename from target/linux/ramips/patches-6.12/311-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch rename to target/linux/ramips/patches-6.18/311-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch diff --git a/target/linux/ramips/patches-6.12/312-MIPS-ralink-add-cpu-frequency-scaling.patch b/target/linux/ramips/patches-6.18/312-MIPS-ralink-add-cpu-frequency-scaling.patch similarity index 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b/target/linux/ramips/patches-6.18/324-mt7621-perfctr-fix.patch similarity index 100% rename from target/linux/ramips/patches-6.12/324-mt7621-perfctr-fix.patch rename to target/linux/ramips/patches-6.18/324-mt7621-perfctr-fix.patch diff --git a/target/linux/ramips/patches-6.12/330-mt7620-avoid-direct-jal-in-random-helper.patch b/target/linux/ramips/patches-6.18/330-mt7620-avoid-direct-jal-in-random-helper.patch similarity index 100% rename from target/linux/ramips/patches-6.12/330-mt7620-avoid-direct-jal-in-random-helper.patch rename to target/linux/ramips/patches-6.18/330-mt7620-avoid-direct-jal-in-random-helper.patch diff --git a/target/linux/ramips/patches-6.12/331-mt7620-avoid-direct-jal-in-resume_user_mode_work.patch b/target/linux/ramips/patches-6.18/331-mt7620-avoid-direct-jal-in-resume_user_mode_work.patch similarity index 100% rename from target/linux/ramips/patches-6.12/331-mt7620-avoid-direct-jal-in-resume_user_mode_work.patch rename to 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b/target/linux/ramips/patches-6.18/405-mtd-spi-nor-Add-support-for-BoHong-bh25q128as.patch similarity index 100% rename from target/linux/ramips/patches-6.12/405-mtd-spi-nor-Add-support-for-BoHong-bh25q128as.patch rename to target/linux/ramips/patches-6.18/405-mtd-spi-nor-Add-support-for-BoHong-bh25q128as.patch diff --git a/target/linux/ramips/patches-6.12/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch b/target/linux/ramips/patches-6.18/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch similarity index 100% rename from target/linux/ramips/patches-6.12/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch rename to target/linux/ramips/patches-6.18/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch diff --git a/target/linux/ramips/patches-6.12/411-dt-bindings-add-documentation-for-mt7621-nand-driver.patch b/target/linux/ramips/patches-6.18/411-dt-bindings-add-documentation-for-mt7621-nand-driver.patch similarity index 100% rename from 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target/linux/ramips/patches-6.18/809-pinctrl-mtmips-allow-mux-SDXC-pins-for-mt76x8.patch diff --git a/target/linux/ramips/patches-6.12/810-uvc-add-iPassion-iP2970-support.patch b/target/linux/ramips/patches-6.18/810-uvc-add-iPassion-iP2970-support.patch similarity index 100% rename from target/linux/ramips/patches-6.12/810-uvc-add-iPassion-iP2970-support.patch rename to target/linux/ramips/patches-6.18/810-uvc-add-iPassion-iP2970-support.patch diff --git a/target/linux/ramips/patches-6.12/820-DT-Add-documentation-for-spi-rt2880.patch b/target/linux/ramips/patches-6.18/820-DT-Add-documentation-for-spi-rt2880.patch similarity index 100% rename from target/linux/ramips/patches-6.12/820-DT-Add-documentation-for-spi-rt2880.patch rename to target/linux/ramips/patches-6.18/820-DT-Add-documentation-for-spi-rt2880.patch diff --git a/target/linux/ramips/patches-6.12/821-SPI-ralink-add-Ralink-SoC-spi-driver.patch b/target/linux/ramips/patches-6.18/821-SPI-ralink-add-Ralink-SoC-spi-driver.patch similarity index 100% rename from target/linux/ramips/patches-6.12/821-SPI-ralink-add-Ralink-SoC-spi-driver.patch rename to target/linux/ramips/patches-6.18/821-SPI-ralink-add-Ralink-SoC-spi-driver.patch diff --git a/target/linux/ramips/patches-6.12/825-i2c-MIPS-adds-ralink-I2C-driver.patch b/target/linux/ramips/patches-6.18/825-i2c-MIPS-adds-ralink-I2C-driver.patch similarity index 100% rename from target/linux/ramips/patches-6.12/825-i2c-MIPS-adds-ralink-I2C-driver.patch rename to target/linux/ramips/patches-6.18/825-i2c-MIPS-adds-ralink-I2C-driver.patch diff --git a/target/linux/ramips/patches-6.12/830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch b/target/linux/ramips/patches-6.18/830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch similarity index 100% rename from target/linux/ramips/patches-6.12/830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch rename to target/linux/ramips/patches-6.18/830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch diff --git a/target/linux/ramips/patches-6.12/831-01-mmc-mtk-sd-add-tuning-parameters-for-legacy-MIPS-MT7.patch b/target/linux/ramips/patches-6.18/831-01-mmc-mtk-sd-add-tuning-parameters-for-legacy-MIPS-MT7.patch similarity index 100% rename from target/linux/ramips/patches-6.12/831-01-mmc-mtk-sd-add-tuning-parameters-for-legacy-MIPS-MT7.patch rename to target/linux/ramips/patches-6.18/831-01-mmc-mtk-sd-add-tuning-parameters-for-legacy-MIPS-MT7.patch diff --git a/target/linux/ramips/patches-6.12/831-02-mmc-mtk-sd-disable-auto-CMD23-support-for-mt7620.patch b/target/linux/ramips/patches-6.18/831-02-mmc-mtk-sd-disable-auto-CMD23-support-for-mt7620.patch similarity index 100% rename from target/linux/ramips/patches-6.12/831-02-mmc-mtk-sd-disable-auto-CMD23-support-for-mt7620.patch rename to target/linux/ramips/patches-6.18/831-02-mmc-mtk-sd-disable-auto-CMD23-support-for-mt7620.patch diff --git a/target/linux/ramips/patches-6.12/831-03-mmc-mtk-sd-use-default-PATCH_BIT1-2-values-for-mt762.patch b/target/linux/ramips/patches-6.18/831-03-mmc-mtk-sd-use-default-PATCH_BIT1-2-values-for-mt762.patch similarity index 100% rename from target/linux/ramips/patches-6.12/831-03-mmc-mtk-sd-use-default-PATCH_BIT1-2-values-for-mt762.patch rename to target/linux/ramips/patches-6.18/831-03-mmc-mtk-sd-use-default-PATCH_BIT1-2-values-for-mt762.patch diff --git a/target/linux/ramips/patches-6.12/835-asoc-add-mt7620-support.patch b/target/linux/ramips/patches-6.18/835-asoc-add-mt7620-support.patch similarity index 100% rename from target/linux/ramips/patches-6.12/835-asoc-add-mt7620-support.patch rename to target/linux/ramips/patches-6.18/835-asoc-add-mt7620-support.patch diff --git a/target/linux/ramips/patches-6.12/840-serial-add-ugly-custom-baud-rate-hack.patch b/target/linux/ramips/patches-6.18/840-serial-add-ugly-custom-baud-rate-hack.patch similarity index 100% rename from target/linux/ramips/patches-6.12/840-serial-add-ugly-custom-baud-rate-hack.patch rename to target/linux/ramips/patches-6.18/840-serial-add-ugly-custom-baud-rate-hack.patch diff --git a/target/linux/ramips/patches-6.12/850-awake-rt305x-dwc2-controller.patch b/target/linux/ramips/patches-6.18/850-awake-rt305x-dwc2-controller.patch similarity index 100% rename from target/linux/ramips/patches-6.12/850-awake-rt305x-dwc2-controller.patch rename to target/linux/ramips/patches-6.18/850-awake-rt305x-dwc2-controller.patch diff --git a/target/linux/ramips/patches-6.12/860-ramips-add-eip93-driver.patch b/target/linux/ramips/patches-6.18/860-ramips-add-eip93-driver.patch similarity index 100% rename from target/linux/ramips/patches-6.12/860-ramips-add-eip93-driver.patch rename to target/linux/ramips/patches-6.18/860-ramips-add-eip93-driver.patch diff --git a/target/linux/ramips/patches-6.12/870-Input-sx951x-add-Semtech-SX9512-SX9513-driver.patch b/target/linux/ramips/patches-6.18/870-Input-sx951x-add-Semtech-SX9512-SX9513-driver.patch similarity index 100% rename from target/linux/ramips/patches-6.12/870-Input-sx951x-add-Semtech-SX9512-SX9513-driver.patch rename to target/linux/ramips/patches-6.18/870-Input-sx951x-add-Semtech-SX9512-SX9513-driver.patch diff --git a/target/linux/ramips/patches-6.12/900-pci-rt2880-static-pcibios_init.patch b/target/linux/ramips/patches-6.18/900-pci-rt2880-static-pcibios_init.patch similarity index 100% rename from target/linux/ramips/patches-6.12/900-pci-rt2880-static-pcibios_init.patch rename to target/linux/ramips/patches-6.18/900-pci-rt2880-static-pcibios_init.patch diff --git a/target/linux/ramips/patches-6.12/931-mips-ralink-add-missing-include.patch b/target/linux/ramips/patches-6.18/931-mips-ralink-add-missing-include.patch similarity index 100% rename from target/linux/ramips/patches-6.12/931-mips-ralink-add-missing-include.patch rename to target/linux/ramips/patches-6.18/931-mips-ralink-add-missing-include.patch diff --git a/target/linux/ramips/patches-6.12/932-MIPS-Stop-secondary-CPUs-before-platform-restart-hal.patch b/target/linux/ramips/patches-6.18/932-MIPS-Stop-secondary-CPUs-before-platform-restart-hal.patch similarity index 100% rename from target/linux/ramips/patches-6.12/932-MIPS-Stop-secondary-CPUs-before-platform-restart-hal.patch rename to target/linux/ramips/patches-6.18/932-MIPS-Stop-secondary-CPUs-before-platform-restart-hal.patch diff --git a/target/linux/ramips/patches-6.12/933-MIPS-SMP-Wait-for-secondary-CPUs-to-stop-in-smp_send.patch b/target/linux/ramips/patches-6.18/933-MIPS-SMP-Wait-for-secondary-CPUs-to-stop-in-smp_send.patch similarity index 100% rename from target/linux/ramips/patches-6.12/933-MIPS-SMP-Wait-for-secondary-CPUs-to-stop-in-smp_send.patch rename to target/linux/ramips/patches-6.18/933-MIPS-SMP-Wait-for-secondary-CPUs-to-stop-in-smp_send.patch diff --git a/target/linux/ramips/patches-6.12/934-MIPS-SMP-Properly-stop-secondary-CPUs-for-restart.patch b/target/linux/ramips/patches-6.18/934-MIPS-SMP-Properly-stop-secondary-CPUs-for-restart.patch similarity index 100% rename from target/linux/ramips/patches-6.12/934-MIPS-SMP-Properly-stop-secondary-CPUs-for-restart.patch rename to target/linux/ramips/patches-6.18/934-MIPS-SMP-Properly-stop-secondary-CPUs-for-restart.patch diff --git a/target/linux/ramips/rt288x/config-6.12 b/target/linux/ramips/rt288x/config-6.18 similarity index 100% rename from target/linux/ramips/rt288x/config-6.12 rename to target/linux/ramips/rt288x/config-6.18 diff --git a/target/linux/ramips/rt305x/config-6.12 b/target/linux/ramips/rt305x/config-6.18 similarity index 100% rename from target/linux/ramips/rt305x/config-6.12 rename to target/linux/ramips/rt305x/config-6.18 diff --git a/target/linux/ramips/rt3883/config-6.12 b/target/linux/ramips/rt3883/config-6.18 similarity index 100% rename from target/linux/ramips/rt3883/config-6.12 rename to target/linux/ramips/rt3883/config-6.18 From 951d884ebfad3138dda98a02c9a06478feb0b606 Mon Sep 17 00:00:00 2001 From: Mieczyslaw Nalewaj Date: Mon, 6 Apr 2026 09:41:28 +0200 Subject: [PATCH 58/78] kernel/ramips: restore files for v6.12 This is an automatically generated commit which aids following Kernel patch history, as git will see the move and copy as a rename thus defeating the purpose. For the original discussion see: https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html Signed-off-by: Mieczyslaw Nalewaj Link: https://github.com/openwrt/openwrt/pull/21418 Signed-off-by: Robert Marko --- target/linux/ramips/mt7620/config-6.12 | 228 ++ target/linux/ramips/mt7621/config-6.12 | 319 ++ target/linux/ramips/mt76x8/config-6.12 | 220 ++ ...ers-ralink-Add-Ralink-System-Tick-Co.patch | 384 ++ ...s-add-mmc-related-clocks-for-SoCs-MT.patch | 101 + ...plement-Host-Software-Queue-for-eMMC.patch | 188 + ...k-add-clock-definitions-for-Ralink-S.patch | 188 + ...0-mips-ralink-update-CPU-clock-index.patch | 58 + ...ink-mtmips-add-pwm-clocks-for-mt76x8.patch | 42 + ...set-mt7628-pwm45_fixup-flag-to-false.patch | 25 + ...-correct-mt7628-clock-source-setting.patch | 65 + ...ci-mt7620-fix-bridge-register-access.patch | 59 + ...mt7620-add-more-register-init-values.patch | 132 + ...7620-rework-initialization-procedure.patch | 95 + ...ow-building-T-PHY-driver-for-MT7621-.patch | 24 + .../patches-6.12/200-add-ralink-eth.patch | 20 + ...0-mt7620-export-chip-version-and-pkg.patch | 19 + ...e-to-enable-disable-the-cevt-r4k-irq.patch | 114 + ...IPS-ralink-add-cpu-frequency-scaling.patch | 202 + ...-MIPS-add-bootargs-override-property.patch | 63 + ...315-owrt-hack-fix-mt7688-cache-issue.patch | 28 + ...-select-illegal-access-driver-by-def.patch | 25 + ...ort-for-buggy-MT7621S-core-detection.patch | 63 + .../patches-6.12/324-mt7621-perfctr-fix.patch | 15 + ...20-avoid-direct-jal-in-random-helper.patch | 72 + ...-direct-jal-in-resume_user_mode_work.patch | 35 + .../332-mt7620-conditional-stack-align.patch | 30 + ...mtd-cfi-cmdset-0002-force-word-write.patch | 20 + ...or-Add-support-for-BoHong-bh25q128as.patch | 79 + ...driver-support-for-MT7621-nand-flash.patch | 47 + ...documentation-for-mt7621-nand-driver.patch | 85 + .../720-NET-no-auto-carrier-off-support.patch | 31 + ...ediatek-add-HSDMA-support-for-mt7621.patch | 37 + ...DT-Add-documentation-for-gpio-ralink.patch | 57 + ...alink-add-gpio-driver-for-ralink-SoC.patch | 275 ++ .../804-dma-ralink-add-back-gdma-driver.patch | 39 + ...upport-requesting-different-function.patch | 45 + ...tmips-allow-mux-SDXC-pins-for-mt76x8.patch | 105 + .../810-uvc-add-iPassion-iP2970-support.patch | 244 ++ ...-DT-Add-documentation-for-spi-rt2880.patch | 44 + ...SPI-ralink-add-Ralink-SoC-spi-driver.patch | 517 +++ .../825-i2c-MIPS-adds-ralink-I2C-driver.patch | 468 +++ ...IPS-ralink-add-sdhci-for-mt7620a-SoC.patch | 46 + ...uning-parameters-for-legacy-MIPS-MT7.patch | 81 + ...isable-auto-CMD23-support-for-mt7620.patch | 137 + ...efault-PATCH_BIT1-2-values-for-mt762.patch | 30 + .../835-asoc-add-mt7620-support.patch | 983 +++++ ...erial-add-ugly-custom-baud-rate-hack.patch | 22 + .../850-awake-rt305x-dwc2-controller.patch | 15 + .../860-ramips-add-eip93-driver.patch | 3273 +++++++++++++++++ ...51x-add-Semtech-SX9512-SX9513-driver.patch | 550 +++ .../900-pci-rt2880-static-pcibios_init.patch | 29 + .../931-mips-ralink-add-missing-include.patch | 25 + ...ary-CPUs-before-platform-restart-hal.patch | 67 + ...r-secondary-CPUs-to-stop-in-smp_send.patch | 36 + ...erly-stop-secondary-CPUs-for-restart.patch | 104 + target/linux/ramips/rt288x/config-6.12 | 210 ++ target/linux/ramips/rt305x/config-6.12 | 205 ++ target/linux/ramips/rt3883/config-6.12 | 205 ++ 59 files changed, 10925 insertions(+) create mode 100644 target/linux/ramips/mt7620/config-6.12 create mode 100644 target/linux/ramips/mt7621/config-6.12 create mode 100644 target/linux/ramips/mt76x8/config-6.12 create mode 100644 target/linux/ramips/patches-6.12/001-v6.13-clocksource-drivers-ralink-Add-Ralink-System-Tick-Co.patch create mode 100644 target/linux/ramips/patches-6.12/002-03-v6.13-clk-ralink-mtmips-add-mmc-related-clocks-for-SoCs-MT.patch create mode 100644 target/linux/ramips/patches-6.12/003-v6.13-mmc-mtk-sd-Implement-Host-Software-Queue-for-eMMC.patch create mode 100644 target/linux/ramips/patches-6.12/004-v6.15-dt-bindings-clock-add-clock-definitions-for-Ralink-S.patch create mode 100644 target/linux/ramips/patches-6.12/100-mips-ralink-update-CPU-clock-index.patch create mode 100644 target/linux/ramips/patches-6.12/101-clk-ralink-mtmips-add-pwm-clocks-for-mt76x8.patch create mode 100644 target/linux/ramips/patches-6.12/102-01-pwm-mediatek-set-mt7628-pwm45_fixup-flag-to-false.patch create mode 100644 target/linux/ramips/patches-6.12/102-02-pwm-mediatek-correct-mt7628-clock-source-setting.patch create mode 100644 target/linux/ramips/patches-6.12/120-1-mips-pci-mt7620-fix-bridge-register-access.patch create mode 100644 target/linux/ramips/patches-6.12/120-2-mips-pci-mt7620-add-more-register-init-values.patch create mode 100644 target/linux/ramips/patches-6.12/120-3-mips-pci-mt7620-rework-initialization-procedure.patch create mode 100644 target/linux/ramips/patches-6.12/130-phy-mediatek-allow-building-T-PHY-driver-for-MT7621-.patch create mode 100644 target/linux/ramips/patches-6.12/200-add-ralink-eth.patch create mode 100644 target/linux/ramips/patches-6.12/300-mt7620-export-chip-version-and-pkg.patch create mode 100644 target/linux/ramips/patches-6.12/311-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch create mode 100644 target/linux/ramips/patches-6.12/312-MIPS-ralink-add-cpu-frequency-scaling.patch create mode 100644 target/linux/ramips/patches-6.12/314-MIPS-add-bootargs-override-property.patch create mode 100644 target/linux/ramips/patches-6.12/315-owrt-hack-fix-mt7688-cache-issue.patch create mode 100644 target/linux/ramips/patches-6.12/316-arch-mips-do-not-select-illegal-access-driver-by-def.patch create mode 100644 target/linux/ramips/patches-6.12/320-MIPS-add-support-for-buggy-MT7621S-core-detection.patch create mode 100644 target/linux/ramips/patches-6.12/324-mt7621-perfctr-fix.patch create mode 100644 target/linux/ramips/patches-6.12/330-mt7620-avoid-direct-jal-in-random-helper.patch create mode 100644 target/linux/ramips/patches-6.12/331-mt7620-avoid-direct-jal-in-resume_user_mode_work.patch create mode 100644 target/linux/ramips/patches-6.12/332-mt7620-conditional-stack-align.patch create mode 100644 target/linux/ramips/patches-6.12/400-mtd-cfi-cmdset-0002-force-word-write.patch create mode 100644 target/linux/ramips/patches-6.12/405-mtd-spi-nor-Add-support-for-BoHong-bh25q128as.patch create mode 100644 target/linux/ramips/patches-6.12/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch create mode 100644 target/linux/ramips/patches-6.12/411-dt-bindings-add-documentation-for-mt7621-nand-driver.patch create mode 100644 target/linux/ramips/patches-6.12/720-NET-no-auto-carrier-off-support.patch create mode 100644 target/linux/ramips/patches-6.12/800-dmaengine-mediatek-add-HSDMA-support-for-mt7621.patch create mode 100644 target/linux/ramips/patches-6.12/801-DT-Add-documentation-for-gpio-ralink.patch create mode 100644 target/linux/ramips/patches-6.12/802-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch create mode 100644 target/linux/ramips/patches-6.12/804-dma-ralink-add-back-gdma-driver.patch create mode 100644 target/linux/ramips/patches-6.12/808-pinctrl-mtmips-support-requesting-different-function.patch create mode 100644 target/linux/ramips/patches-6.12/809-pinctrl-mtmips-allow-mux-SDXC-pins-for-mt76x8.patch create mode 100644 target/linux/ramips/patches-6.12/810-uvc-add-iPassion-iP2970-support.patch create mode 100644 target/linux/ramips/patches-6.12/820-DT-Add-documentation-for-spi-rt2880.patch create mode 100644 target/linux/ramips/patches-6.12/821-SPI-ralink-add-Ralink-SoC-spi-driver.patch create mode 100644 target/linux/ramips/patches-6.12/825-i2c-MIPS-adds-ralink-I2C-driver.patch create mode 100644 target/linux/ramips/patches-6.12/830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch create mode 100644 target/linux/ramips/patches-6.12/831-01-mmc-mtk-sd-add-tuning-parameters-for-legacy-MIPS-MT7.patch create mode 100644 target/linux/ramips/patches-6.12/831-02-mmc-mtk-sd-disable-auto-CMD23-support-for-mt7620.patch create mode 100644 target/linux/ramips/patches-6.12/831-03-mmc-mtk-sd-use-default-PATCH_BIT1-2-values-for-mt762.patch create mode 100644 target/linux/ramips/patches-6.12/835-asoc-add-mt7620-support.patch create mode 100644 target/linux/ramips/patches-6.12/840-serial-add-ugly-custom-baud-rate-hack.patch create mode 100644 target/linux/ramips/patches-6.12/850-awake-rt305x-dwc2-controller.patch create mode 100644 target/linux/ramips/patches-6.12/860-ramips-add-eip93-driver.patch create mode 100644 target/linux/ramips/patches-6.12/870-Input-sx951x-add-Semtech-SX9512-SX9513-driver.patch create mode 100644 target/linux/ramips/patches-6.12/900-pci-rt2880-static-pcibios_init.patch create mode 100644 target/linux/ramips/patches-6.12/931-mips-ralink-add-missing-include.patch create mode 100644 target/linux/ramips/patches-6.12/932-MIPS-Stop-secondary-CPUs-before-platform-restart-hal.patch create mode 100644 target/linux/ramips/patches-6.12/933-MIPS-SMP-Wait-for-secondary-CPUs-to-stop-in-smp_send.patch create mode 100644 target/linux/ramips/patches-6.12/934-MIPS-SMP-Properly-stop-secondary-CPUs-for-restart.patch create mode 100644 target/linux/ramips/rt288x/config-6.12 create mode 100644 target/linux/ramips/rt305x/config-6.12 create mode 100644 target/linux/ramips/rt3883/config-6.12 diff --git a/target/linux/ramips/mt7620/config-6.12 b/target/linux/ramips/mt7620/config-6.12 new file mode 100644 index 0000000000..e1dbbf013c --- /dev/null +++ b/target/linux/ramips/mt7620/config-6.12 @@ -0,0 +1,228 @@ +CONFIG_AR8216_PHY=y +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_BLK_MQ_PCI=y +CONFIG_CEVT_R4K=y +CONFIG_CEVT_SYSTICK_QUIRK=y +CONFIG_CLKSRC_MMIO=y +CONFIG_CLK_MTMIPS=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="rootfstype=squashfs,jffs2" +CONFIG_CMDLINE_BOOL=y +# CONFIG_CMDLINE_OVERRIDE is not set +CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_DIEI=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_CPU_MIPSR2=y +CONFIG_CPU_MIPSR2_IRQ_VI=y +CONFIG_CPU_MITIGATIONS=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CPU_SUPPORTS_MSA=y +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_GF128MUL=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_PINCTRL=y +CONFIG_DMA_NEED_SYNC=y +CONFIG_DMA_NONCOHERENT=y +# CONFIG_DTB_MT7620A_EVAL is not set +# CONFIG_DTB_OMEGA2P is not set +CONFIG_DTB_RT_NONE=y +# CONFIG_DTB_VOCORE2 is not set +CONFIG_DTC=y +CONFIG_EARLY_PRINTK=y +CONFIG_ETHERNET_PACKET_MANGLE=y +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_FIXED_PHY=y +CONFIG_FORCE_NR_CPUS=y +CONFIG_FS_IOMAP=y +CONFIG_FUNCTION_ALIGNMENT=0 +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GLOB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +# CONFIG_GPIO_MT7621 is not set +CONFIG_GPIO_RALINK=y +CONFIG_GPIO_WATCHDOG=y +# CONFIG_GPIO_WATCHDOG_ARCH_INITCALL is not set +CONFIG_HARDWARE_WATCHPOINTS=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HZ_PERIODIC=y +CONFIG_ICPLUS_PHY=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_INTC=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +CONFIG_LIBFDT=y +# CONFIG_LIST_HARDENED is not set +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_MARVELL_PHY=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_L1_CACHE_SHIFT=5 +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MIPS_SPRAM=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y +CONFIG_MODULES_USE_ELF_REL=y +# CONFIG_MT7621_WDT is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_PARSER_TPLINK_SAFELOADER is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y +CONFIG_MTD_SPLIT_JIMAGE_FW=y +CONFIG_MTD_SPLIT_SEAMA_FW=y +CONFIG_MTD_SPLIT_TPLINK_FW=y +CONFIG_MTD_SPLIT_UIMAGE_FW=y +CONFIG_MTD_VIRT_CONCAT=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NET_EGRESS=y +CONFIG_NET_INGRESS=y +CONFIG_NET_RALINK_GSW_MT7620=y +CONFIG_NET_RALINK_MDIO=y +CONFIG_NET_RALINK_MDIO_MT7620=y +CONFIG_NET_RALINK_MT7620=y +# CONFIG_NET_RALINK_RT3050 is not set +CONFIG_NET_RALINK_SOC=y +CONFIG_NET_SELFTESTS=y +# CONFIG_NET_SWITCHDEV is not set +# CONFIG_NET_VENDOR_MEDIATEK is not set +CONFIG_NET_VENDOR_RALINK=y +CONFIG_NET_XGRESS=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NVMEM=y +CONFIG_NVMEM_LAYOUTS=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PAGE_POOL=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLIB_LEDS=y +# CONFIG_PHY_MT7621_PCI is not set +CONFIG_PHY_RALINK_USB=y +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_AW9523 is not set +CONFIG_PINCTRL_MT7620=y +# CONFIG_PINCTRL_MT76X8 is not set +CONFIG_PINCTRL_MTK_MTMIPS=y +# CONFIG_PINCTRL_SINGLE is not set +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_RALINK=y +CONFIG_RALINK_TIMER=y +CONFIG_RALINK_WDT=y +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_RESET_CONTROLLER=y +CONFIG_SERIAL_8250_RT288X=y +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SOC_BUS=y +CONFIG_SOC_MT7620=y +# CONFIG_SOC_MT7621 is not set +# CONFIG_SOC_RT288X is not set +# CONFIG_SOC_RT305X is not set +# CONFIG_SOC_RT3883 is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +# CONFIG_SPI_MT7621 is not set +CONFIG_SPI_RT2880=y +# CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU is not set +CONFIG_SQUASHFS_COMPILE_DECOMP_SINGLE=y +CONFIG_SQUASHFS_DECOMP_SINGLE=y +CONFIG_SWCONFIG=y +CONFIG_SWCONFIG_LEDS=y +CONFIG_SWPHY=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_MIPS32_R2=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_SYS_SUPPORTS_MIPS16=y +CONFIG_SYS_SUPPORTS_ZBOOT=y +CONFIG_TARGET_ISA_REV=2 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TINY_SRCU=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_WATCHDOG_CORE=y +CONFIG_ZBOOT_LOAD_ADDRESS=0x0 diff --git a/target/linux/ramips/mt7621/config-6.12 b/target/linux/ramips/mt7621/config-6.12 new file mode 100644 index 0000000000..3d8fe345c2 --- /dev/null +++ b/target/linux/ramips/mt7621/config-6.12 @@ -0,0 +1,319 @@ +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_AT803X_PHY=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BOARD_SCACHE=y +CONFIG_CEVT_R4K=y +CONFIG_CLKSRC_MIPS_GIC=y +CONFIG_CLK_MT7621=y +CONFIG_CLOCKSOURCE_WATCHDOG=y +CONFIG_CLOCKSOURCE_WATCHDOG_MAX_SKEW_US=100 +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="rootfstype=squashfs,jffs2" +CONFIG_CMDLINE_BOOL=y +# CONFIG_CMDLINE_OVERRIDE is not set +CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_DIEI=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_CPU_MIPSR2=y +CONFIG_CPU_MIPSR2_IRQ_EI=y +CONFIG_CPU_MIPSR2_IRQ_VI=y +CONFIG_CPU_MITIGATIONS=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CPU_SUPPORTS_MSA=y +CONFIG_CRC16=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_GF128MUL=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_PINCTRL=y +CONFIG_DMA_NEED_SYNC=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DTC=y +CONFIG_EARLY_PRINTK=y +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_FIXED_PHY=y +CONFIG_FS_IOMAP=y +CONFIG_FUNCTION_ALIGNMENT=0 +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GLOB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_MT7621=y +CONFIG_GPIO_WATCHDOG=y +# CONFIG_GPIO_WATCHDOG_ARCH_INITCALL is not set +CONFIG_GRO_CELLS=y +CONFIG_HARDWARE_WATCHPOINTS=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_I2C=y +CONFIG_I2C_ALGOBIT=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_GPIO=y +CONFIG_I2C_MT7621=y +CONFIG_ICPLUS_PHY=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +CONFIG_LED_TRIGGER_PHY=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MEDIATEK_GE_PHY=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIKROTIK=y +CONFIG_MIKROTIK_RB_SYSFS=y +# CONFIG_MIKROTIK_WLAN_DECOMPRESS_LZ77 is not set +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +CONFIG_MIPS_CM=y +# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_CPC=y +CONFIG_MIPS_CPS=y +# CONFIG_MIPS_CPS_NS16550_BOOL is not set +CONFIG_MIPS_CPU_SCACHE=y +CONFIG_MIPS_GIC=y +CONFIG_MIPS_L1_CACHE_SHIFT=5 +CONFIG_MIPS_MT=y +CONFIG_MIPS_MT_FPAFF=y +CONFIG_MIPS_MT_SMP=y +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_NR_CPU_NR_MAP=4 +CONFIG_MIPS_PERF_SHARED_TC_COUNTERS=y +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MIPS_SPRAM=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MT7621_WDT=y +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +CONFIG_MTD_NAND_MT7621=y +CONFIG_MTD_NAND_MTK_BMT=y +# CONFIG_MTD_PARSER_TPLINK_SAFELOADER is not set +CONFIG_MTD_PARSER_TRX=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_ROUTERBOOT_PARTS=y +CONFIG_MTD_SERCOMM_PARTS=y +CONFIG_MTD_SPI_NAND=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y +CONFIG_MTD_SPLIT_FIT_FW=y +CONFIG_MTD_SPLIT_MINOR_FW=y +CONFIG_MTD_SPLIT_SEAMA_FW=y +CONFIG_MTD_SPLIT_TPLINK_FW=y +CONFIG_MTD_SPLIT_UIMAGE_FW=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_BLOCK=y +CONFIG_MTD_UBI_NVMEM=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTD_VIRT_CONCAT=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_SRCU_NMI_SAFE=y +# CONFIG_NET_AIROHA is not set +CONFIG_NET_DEVLINK=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_MT7530=y +CONFIG_NET_DSA_MT7530_MDIO=y +# CONFIG_NET_DSA_MT7530_MMIO is not set +CONFIG_NET_DSA_TAG_MTK=y +CONFIG_NET_EGRESS=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_INGRESS=y +CONFIG_NET_MEDIATEK_SOC=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_VENDOR_MEDIATEK=y +# CONFIG_NET_VENDOR_RALINK is not set +CONFIG_NET_XGRESS=y +CONFIG_NO_HZ_COMMON=y +CONFIG_NO_HZ_IDLE=y +CONFIG_NR_CPUS=4 +CONFIG_NVMEM=y +CONFIG_NVMEM_LAYOUTS=y +CONFIG_NVMEM_LAYOUT_ASCII_ENV=y +CONFIG_NVMEM_LAYOUT_MIKROTIK=y +CONFIG_NVMEM_LAYOUT_U_BOOT_ENV=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PADATA=y +CONFIG_PAGE_POOL=y +CONFIG_PAGE_POOL_STATS=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PCI=y +CONFIG_PCIE_MT7621=y +CONFIG_PCI_DISABLE_COMMON_QUIRKS=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_DRIVERS_GENERIC=y +CONFIG_PCS_MTK_LYNXI=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLIB_LEDS=y +CONFIG_PHYLINK=y +CONFIG_PHY_MT7621_PCI=y +# CONFIG_PHY_MTK_TPHY is not set +# CONFIG_PHY_RALINK_USB is not set +CONFIG_PINCTRL=y +CONFIG_PINCTRL_AW9523=y +CONFIG_PINCTRL_MT7621=y +CONFIG_PINCTRL_MTK_MTMIPS=y +# CONFIG_PINCTRL_SINGLE is not set +CONFIG_PINCTRL_SX150X=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_GPIO=y +CONFIG_POWER_SUPPLY=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_QCOM_NET_PHYLIB=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RALINK=y +# CONFIG_RALINK_WDT is not set +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_BQ32K=y +CONFIG_RTC_DRV_PCF8563=y +CONFIG_RTC_I2C_AND_SPI=y +CONFIG_RTC_MC146818_LIB=y +# CONFIG_SCHED_CORE is not set +CONFIG_SCHED_SMT=y +CONFIG_SERIAL_8250_NR_UARTS=3 +CONFIG_SERIAL_8250_RUNTIME_UARTS=3 +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SGL_ALLOC=y +CONFIG_SMP=y +CONFIG_SMP_UP=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y +CONFIG_SOC_BUS=y +# CONFIG_SOC_MT7620 is not set +CONFIG_SOC_MT7621=y +# CONFIG_SOC_RT288X is not set +# CONFIG_SOC_RT305X is not set +# CONFIG_SOC_RT3883 is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SPI_MT7621=y +# CONFIG_SPI_RT2880 is not set +CONFIG_SPLIT_PTE_PTLOCKS=y +CONFIG_SWPHY=y +CONFIG_SYNC_R4K=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_MIPS32_R2=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_HIGHMEM=y +CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_SYS_SUPPORTS_MIPS16=y +CONFIG_SYS_SUPPORTS_MIPS_CPS=y +CONFIG_SYS_SUPPORTS_MULTITHREADING=y +CONFIG_SYS_SUPPORTS_SCHED_SMT=y +CONFIG_SYS_SUPPORTS_SMP=y +CONFIG_SYS_SUPPORTS_ZBOOT=y +CONFIG_TARGET_ISA_REV=2 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_UBIFS_FS=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_WATCHDOG_CORE=y +CONFIG_WEAK_ORDERING=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_ZBOOT_LOAD_ADDRESS=0x0 +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMMON=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/ramips/mt76x8/config-6.12 b/target/linux/ramips/mt76x8/config-6.12 new file mode 100644 index 0000000000..68854319b9 --- /dev/null +++ b/target/linux/ramips/mt76x8/config-6.12 @@ -0,0 +1,220 @@ +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_BLK_MQ_PCI=y +CONFIG_CEVT_R4K=y +CONFIG_CLK_MTMIPS=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="rootfstype=squashfs,jffs2" +CONFIG_CMDLINE_BOOL=y +# CONFIG_CMDLINE_OVERRIDE is not set +CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_DIEI=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_CPU_MIPSR2=y +CONFIG_CPU_MIPSR2_IRQ_VI=y +CONFIG_CPU_MITIGATIONS=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CPU_SUPPORTS_MSA=y +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_GF128MUL=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_PINCTRL=y +CONFIG_DMA_NEED_SYNC=y +CONFIG_DMA_NONCOHERENT=y +# CONFIG_DTB_MT7620A_EVAL is not set +# CONFIG_DTB_OMEGA2P is not set +CONFIG_DTB_RT_NONE=y +# CONFIG_DTB_VOCORE2 is not set +CONFIG_DTC=y +CONFIG_EARLY_PRINTK=y +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_FIXED_PHY=y +CONFIG_FORCE_NR_CPUS=y +CONFIG_FS_IOMAP=y +CONFIG_FUNCTION_ALIGNMENT=0 +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GLOB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_MT7621=y +# CONFIG_GPIO_RALINK is not set +CONFIG_GPIO_WATCHDOG=y +# CONFIG_GPIO_WATCHDOG_ARCH_INITCALL is not set +CONFIG_HARDWARE_WATCHPOINTS=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_INTC=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_L1_CACHE_SHIFT=5 +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MIPS_SPRAM=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MT7621_WDT=y +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_PARSER_TPLINK_SAFELOADER is not set +CONFIG_MTD_PARSER_TRX=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y +CONFIG_MTD_SPLIT_TPLINK_FW=y +CONFIG_MTD_SPLIT_UIMAGE_FW=y +CONFIG_MTD_VIRT_CONCAT=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NET_EGRESS=y +CONFIG_NET_INGRESS=y +CONFIG_NET_RALINK_ESW_RT3050=y +# CONFIG_NET_RALINK_MT7620 is not set +CONFIG_NET_RALINK_RT3050=y +CONFIG_NET_RALINK_SOC=y +CONFIG_NET_SELFTESTS=y +# CONFIG_NET_SWITCHDEV is not set +# CONFIG_NET_VENDOR_MEDIATEK is not set +CONFIG_NET_VENDOR_RALINK=y +CONFIG_NET_XGRESS=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NVMEM=y +CONFIG_NVMEM_LAYOUTS=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PAGE_POOL=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLIB_LEDS=y +# CONFIG_PHY_MT7621_PCI is not set +CONFIG_PHY_RALINK_USB=y +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_AW9523 is not set +# CONFIG_PINCTRL_MT7620 is not set +CONFIG_PINCTRL_MT76X8=y +CONFIG_PINCTRL_MTK_MTMIPS=y +# CONFIG_PINCTRL_SINGLE is not set +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_RALINK=y +# CONFIG_RALINK_TIMER is not set +# CONFIG_RALINK_WDT is not set +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_I2C_AND_SPI=y +CONFIG_RTC_MC146818_LIB=y +CONFIG_SERIAL_8250_NR_UARTS=3 +CONFIG_SERIAL_8250_RUNTIME_UARTS=3 +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SOC_BUS=y +CONFIG_SOC_MT7620=y +# CONFIG_SOC_MT7621 is not set +# CONFIG_SOC_RT288X is not set +# CONFIG_SOC_RT305X is not set +# CONFIG_SOC_RT3883 is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SPI_MT7621=y +# CONFIG_SPI_RT2880 is not set +# CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU is not set +CONFIG_SQUASHFS_COMPILE_DECOMP_SINGLE=y +CONFIG_SQUASHFS_DECOMP_SINGLE=y +CONFIG_SWCONFIG=y +CONFIG_SWCONFIG_LEDS=y +CONFIG_SWPHY=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_MIPS32_R2=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_SYS_SUPPORTS_MIPS16=y +CONFIG_SYS_SUPPORTS_ZBOOT=y +CONFIG_TARGET_ISA_REV=2 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TINY_SRCU=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_WATCHDOG_CORE=y +CONFIG_ZBOOT_LOAD_ADDRESS=0x0 diff --git a/target/linux/ramips/patches-6.12/001-v6.13-clocksource-drivers-ralink-Add-Ralink-System-Tick-Co.patch b/target/linux/ramips/patches-6.12/001-v6.13-clocksource-drivers-ralink-Add-Ralink-System-Tick-Co.patch new file mode 100644 index 0000000000..48ca016212 --- /dev/null +++ b/target/linux/ramips/patches-6.12/001-v6.13-clocksource-drivers-ralink-Add-Ralink-System-Tick-Co.patch @@ -0,0 +1,384 @@ +From 57cbfd333c9d65bfab1a06b49c75536ee28dc2ce Mon Sep 17 00:00:00 2001 +From: Sergio Paracuellos +Date: Mon, 28 Oct 2024 21:36:43 +0100 +Subject: clocksource/drivers/ralink: Add Ralink System Tick Counter driver + +System Tick Counter is present on Ralink SoCs RT3352 and MT7620. This +driver has been in 'arch/mips/ralink' directory since the beggining of +Ralink architecture support. However, it can be moved into a more proper +place in 'drivers/clocksource'. Hence add it here adding also support for +compile test targets and reducing LOC in architecture code folder. + +Signed-off-by: Sergio Paracuellos +Link: https://lore.kernel.org/r/20241028203643.191268-2-sergio.paracuellos@gmail.com +Signed-off-by: Daniel Lezcano +--- + arch/mips/ralink/Kconfig | 7 -- + arch/mips/ralink/Makefile | 2 - + arch/mips/ralink/cevt-rt3352.c | 153 ------------------------------------- + drivers/clocksource/Kconfig | 9 +++ + drivers/clocksource/Makefile | 1 + + drivers/clocksource/timer-ralink.c | 150 ++++++++++++++++++++++++++++++++++++ + 6 files changed, 160 insertions(+), 162 deletions(-) + delete mode 100644 arch/mips/ralink/cevt-rt3352.c + create mode 100644 drivers/clocksource/timer-ralink.c + +--- a/arch/mips/ralink/Kconfig ++++ b/arch/mips/ralink/Kconfig +@@ -1,13 +1,6 @@ + # SPDX-License-Identifier: GPL-2.0 + if RALINK + +-config CLKEVT_RT3352 +- bool +- depends on SOC_RT305X || SOC_MT7620 +- default y +- select TIMER_OF +- select CLKSRC_MMIO +- + config RALINK_ILL_ACC + bool + depends on SOC_RT305X +--- a/arch/mips/ralink/Makefile ++++ b/arch/mips/ralink/Makefile +@@ -10,8 +10,6 @@ ifndef CONFIG_MIPS_GIC + obj-y += clk.o timer.o + endif + +-obj-$(CONFIG_CLKEVT_RT3352) += cevt-rt3352.o +- + obj-$(CONFIG_RALINK_ILL_ACC) += ill_acc.o + + obj-$(CONFIG_IRQ_INTC) += irq.o +--- a/arch/mips/ralink/cevt-rt3352.c ++++ /dev/null +@@ -1,153 +0,0 @@ +-/* +- * This file is subject to the terms and conditions of the GNU General Public +- * License. See the file "COPYING" in the main directory of this archive +- * for more details. +- * +- * Copyright (C) 2013 by John Crispin +- */ +- +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +- +-#include +- +-#define SYSTICK_FREQ (50 * 1000) +- +-#define SYSTICK_CONFIG 0x00 +-#define SYSTICK_COMPARE 0x04 +-#define SYSTICK_COUNT 0x08 +- +-/* route systick irq to mips irq 7 instead of the r4k-timer */ +-#define CFG_EXT_STK_EN 0x2 +-/* enable the counter */ +-#define CFG_CNT_EN 0x1 +- +-struct systick_device { +- void __iomem *membase; +- struct clock_event_device dev; +- int irq_requested; +- int freq_scale; +-}; +- +-static int systick_set_oneshot(struct clock_event_device *evt); +-static int systick_shutdown(struct clock_event_device *evt); +- +-static int systick_next_event(unsigned long delta, +- struct clock_event_device *evt) +-{ +- struct systick_device *sdev; +- u32 count; +- +- sdev = container_of(evt, struct systick_device, dev); +- count = ioread32(sdev->membase + SYSTICK_COUNT); +- count = (count + delta) % SYSTICK_FREQ; +- iowrite32(count, sdev->membase + SYSTICK_COMPARE); +- +- return 0; +-} +- +-static void systick_event_handler(struct clock_event_device *dev) +-{ +- /* noting to do here */ +-} +- +-static irqreturn_t systick_interrupt(int irq, void *dev_id) +-{ +- struct clock_event_device *dev = (struct clock_event_device *) dev_id; +- +- dev->event_handler(dev); +- +- return IRQ_HANDLED; +-} +- +-static struct systick_device systick = { +- .dev = { +- /* +- * cevt-r4k uses 300, make sure systick +- * gets used if available +- */ +- .rating = 310, +- .features = CLOCK_EVT_FEAT_ONESHOT, +- .set_next_event = systick_next_event, +- .set_state_shutdown = systick_shutdown, +- .set_state_oneshot = systick_set_oneshot, +- .event_handler = systick_event_handler, +- }, +-}; +- +-static int systick_shutdown(struct clock_event_device *evt) +-{ +- struct systick_device *sdev; +- +- sdev = container_of(evt, struct systick_device, dev); +- +- if (sdev->irq_requested) +- free_irq(systick.dev.irq, &systick.dev); +- sdev->irq_requested = 0; +- iowrite32(0, systick.membase + SYSTICK_CONFIG); +- +- return 0; +-} +- +-static int systick_set_oneshot(struct clock_event_device *evt) +-{ +- const char *name = systick.dev.name; +- struct systick_device *sdev; +- int irq = systick.dev.irq; +- +- sdev = container_of(evt, struct systick_device, dev); +- +- if (!sdev->irq_requested) { +- if (request_irq(irq, systick_interrupt, +- IRQF_PERCPU | IRQF_TIMER, name, &systick.dev)) +- pr_err("Failed to request irq %d (%s)\n", irq, name); +- } +- sdev->irq_requested = 1; +- iowrite32(CFG_EXT_STK_EN | CFG_CNT_EN, +- systick.membase + SYSTICK_CONFIG); +- +- return 0; +-} +- +-static int __init ralink_systick_init(struct device_node *np) +-{ +- int ret; +- +- systick.membase = of_iomap(np, 0); +- if (!systick.membase) +- return -ENXIO; +- +- systick.dev.name = np->name; +- clockevents_calc_mult_shift(&systick.dev, SYSTICK_FREQ, 60); +- systick.dev.max_delta_ns = clockevent_delta2ns(0x7fff, &systick.dev); +- systick.dev.max_delta_ticks = 0x7fff; +- systick.dev.min_delta_ns = clockevent_delta2ns(0x3, &systick.dev); +- systick.dev.min_delta_ticks = 0x3; +- systick.dev.irq = irq_of_parse_and_map(np, 0); +- if (!systick.dev.irq) { +- pr_err("%pOFn: request_irq failed", np); +- return -EINVAL; +- } +- +- ret = clocksource_mmio_init(systick.membase + SYSTICK_COUNT, np->name, +- SYSTICK_FREQ, 301, 16, +- clocksource_mmio_readl_up); +- if (ret) +- return ret; +- +- clockevents_register_device(&systick.dev); +- +- pr_info("%pOFn: running - mult: %d, shift: %d\n", +- np, systick.dev.mult, systick.dev.shift); +- +- return 0; +-} +- +-TIMER_OF_DECLARE(systick, "ralink,cevt-systick", ralink_systick_init); +--- a/drivers/clocksource/Kconfig ++++ b/drivers/clocksource/Kconfig +@@ -755,4 +755,13 @@ config EP93XX_TIMER + Enables support for the Cirrus Logic timer block + EP93XX. + ++config RALINK_TIMER ++ bool "Ralink System Tick Counter" ++ depends on SOC_RT305X || SOC_MT7620 || COMPILE_TEST ++ select CLKSRC_MMIO ++ select TIMER_OF ++ help ++ Enables support for system tick counter present on ++ Ralink SoCs RT3352 and MT7620. ++ + endmenu +--- a/drivers/clocksource/Makefile ++++ b/drivers/clocksource/Makefile +@@ -91,3 +91,4 @@ obj-$(CONFIG_GOLDFISH_TIMER) += timer-g + obj-$(CONFIG_GXP_TIMER) += timer-gxp.o + obj-$(CONFIG_CLKSRC_LOONGSON1_PWM) += timer-loongson1-pwm.o + obj-$(CONFIG_EP93XX_TIMER) += timer-ep93xx.o ++obj-$(CONFIG_RALINK_TIMER) += timer-ralink.o +--- /dev/null ++++ b/drivers/clocksource/timer-ralink.c +@@ -0,0 +1,150 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Ralink System Tick Counter driver present on RT3352 and MT7620 SoCs. ++ * ++ * Copyright (C) 2013 by John Crispin ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define SYSTICK_FREQ (50 * 1000) ++ ++#define SYSTICK_CONFIG 0x00 ++#define SYSTICK_COMPARE 0x04 ++#define SYSTICK_COUNT 0x08 ++ ++/* route systick irq to mips irq 7 instead of the r4k-timer */ ++#define CFG_EXT_STK_EN 0x2 ++/* enable the counter */ ++#define CFG_CNT_EN 0x1 ++ ++struct systick_device { ++ void __iomem *membase; ++ struct clock_event_device dev; ++ int irq_requested; ++ int freq_scale; ++}; ++ ++static int systick_set_oneshot(struct clock_event_device *evt); ++static int systick_shutdown(struct clock_event_device *evt); ++ ++static int systick_next_event(unsigned long delta, ++ struct clock_event_device *evt) ++{ ++ struct systick_device *sdev; ++ u32 count; ++ ++ sdev = container_of(evt, struct systick_device, dev); ++ count = ioread32(sdev->membase + SYSTICK_COUNT); ++ count = (count + delta) % SYSTICK_FREQ; ++ iowrite32(count, sdev->membase + SYSTICK_COMPARE); ++ ++ return 0; ++} ++ ++static void systick_event_handler(struct clock_event_device *dev) ++{ ++ /* noting to do here */ ++} ++ ++static irqreturn_t systick_interrupt(int irq, void *dev_id) ++{ ++ struct clock_event_device *dev = (struct clock_event_device *)dev_id; ++ ++ dev->event_handler(dev); ++ ++ return IRQ_HANDLED; ++} ++ ++static struct systick_device systick = { ++ .dev = { ++ /* ++ * cevt-r4k uses 300, make sure systick ++ * gets used if available ++ */ ++ .rating = 310, ++ .features = CLOCK_EVT_FEAT_ONESHOT, ++ .set_next_event = systick_next_event, ++ .set_state_shutdown = systick_shutdown, ++ .set_state_oneshot = systick_set_oneshot, ++ .event_handler = systick_event_handler, ++ }, ++}; ++ ++static int systick_shutdown(struct clock_event_device *evt) ++{ ++ struct systick_device *sdev; ++ ++ sdev = container_of(evt, struct systick_device, dev); ++ ++ if (sdev->irq_requested) ++ free_irq(systick.dev.irq, &systick.dev); ++ sdev->irq_requested = 0; ++ iowrite32(0, systick.membase + SYSTICK_CONFIG); ++ ++ return 0; ++} ++ ++static int systick_set_oneshot(struct clock_event_device *evt) ++{ ++ const char *name = systick.dev.name; ++ struct systick_device *sdev; ++ int irq = systick.dev.irq; ++ ++ sdev = container_of(evt, struct systick_device, dev); ++ ++ if (!sdev->irq_requested) { ++ if (request_irq(irq, systick_interrupt, ++ IRQF_PERCPU | IRQF_TIMER, name, &systick.dev)) ++ pr_err("Failed to request irq %d (%s)\n", irq, name); ++ } ++ sdev->irq_requested = 1; ++ iowrite32(CFG_EXT_STK_EN | CFG_CNT_EN, ++ systick.membase + SYSTICK_CONFIG); ++ ++ return 0; ++} ++ ++static int __init ralink_systick_init(struct device_node *np) ++{ ++ int ret; ++ ++ systick.membase = of_iomap(np, 0); ++ if (!systick.membase) ++ return -ENXIO; ++ ++ systick.dev.name = np->name; ++ clockevents_calc_mult_shift(&systick.dev, SYSTICK_FREQ, 60); ++ systick.dev.max_delta_ns = clockevent_delta2ns(0x7fff, &systick.dev); ++ systick.dev.max_delta_ticks = 0x7fff; ++ systick.dev.min_delta_ns = clockevent_delta2ns(0x3, &systick.dev); ++ systick.dev.min_delta_ticks = 0x3; ++ systick.dev.irq = irq_of_parse_and_map(np, 0); ++ if (!systick.dev.irq) { ++ pr_err("%pOFn: request_irq failed", np); ++ return -EINVAL; ++ } ++ ++ ret = clocksource_mmio_init(systick.membase + SYSTICK_COUNT, np->name, ++ SYSTICK_FREQ, 301, 16, ++ clocksource_mmio_readl_up); ++ if (ret) ++ return ret; ++ ++ clockevents_register_device(&systick.dev); ++ ++ pr_info("%pOFn: running - mult: %d, shift: %d\n", ++ np, systick.dev.mult, systick.dev.shift); ++ ++ return 0; ++} ++ ++TIMER_OF_DECLARE(systick, "ralink,cevt-systick", ralink_systick_init); diff --git a/target/linux/ramips/patches-6.12/002-03-v6.13-clk-ralink-mtmips-add-mmc-related-clocks-for-SoCs-MT.patch b/target/linux/ramips/patches-6.12/002-03-v6.13-clk-ralink-mtmips-add-mmc-related-clocks-for-SoCs-MT.patch new file mode 100644 index 0000000000..076cda246e --- /dev/null +++ b/target/linux/ramips/patches-6.12/002-03-v6.13-clk-ralink-mtmips-add-mmc-related-clocks-for-SoCs-MT.patch @@ -0,0 +1,101 @@ +From 198675bbc03d437fb80a35d781ad13d622d0ff68 Mon Sep 17 00:00:00 2001 +From: Sergio Paracuellos +Date: Tue, 10 Sep 2024 06:40:24 +0200 +Subject: [PATCH 3/3] clk: ralink: mtmips: add mmc related clocks for SoCs + MT7620, MT7628 and MT7688 + +Original architecture clock code from where this driver was derived did not +include nothing related to mmc clocks. OpenWRT people started to use mtk-sd +upstream driver recently and they were forced to use a dts 'fixed-clock' +node with 48 MHz clock: +- https://github.com/openwrt/openwrt/pull/15896 +The proper thing to do to avoid that is to add the mmc related clocks to the +driver to avoid a dts with fixed clocks nodes. The minimal documentation in +the mt7620 programming guide says that there is a BBP_PLL clock of 480 MHz +derived from the 40 MHz XTAL and from there a clock divider by ten produces +the desired SDHC clock of 48 MHz for the mmc. Hence add a fixed clock 'bbppll' +and factor clock 'sdhc' ten divider child to properly set the 'mmc' peripheral +clock with the desired 48 Mhz rate. + +Signed-off-by: Sergio Paracuellos +Link: https://lore.kernel.org/r/20240910044024.120009-4-sergio.paracuellos@gmail.com +Signed-off-by: Stephen Boyd +--- + drivers/clk/ralink/clk-mtmips.c | 30 +++++++++++++++++++++++------- + 1 file changed, 23 insertions(+), 7 deletions(-) + +--- a/drivers/clk/ralink/clk-mtmips.c ++++ b/drivers/clk/ralink/clk-mtmips.c +@@ -207,6 +207,7 @@ static struct mtmips_clk mt7620_pherip_c + { CLK_PERIPH("10000b00.spi", "bus") }, + { CLK_PERIPH("10000b40.spi", "bus") }, + { CLK_PERIPH("10000c00.uartlite", "periph") }, ++ { CLK_PERIPH("10130000.mmc", "sdhc") }, + { CLK_PERIPH("10180000.wmac", "xtal") } + }; + +@@ -220,6 +221,7 @@ static struct mtmips_clk mt76x8_pherip_c + { CLK_PERIPH("10000c00.uart0", "periph") }, + { CLK_PERIPH("10000d00.uart1", "periph") }, + { CLK_PERIPH("10000e00.uart2", "periph") }, ++ { CLK_PERIPH("10130000.mmc", "sdhc") }, + { CLK_PERIPH("10300000.wmac", "xtal") } + }; + +@@ -271,8 +273,13 @@ static struct mtmips_clk_fixed rt3352_fi + CLK_FIXED("periph", "xtal", 40000000) + }; + ++static struct mtmips_clk_fixed mt7620_fixed_clocks[] = { ++ CLK_FIXED("bbppll", "xtal", 480000000) ++}; ++ + static struct mtmips_clk_fixed mt76x8_fixed_clocks[] = { +- CLK_FIXED("pcmi2s", "xtal", 480000000), ++ CLK_FIXED("bbppll", "xtal", 480000000), ++ CLK_FIXED("pcmi2s", "bbppll", 480000000), + CLK_FIXED("periph", "xtal", 40000000) + }; + +@@ -327,6 +334,15 @@ static struct mtmips_clk_factor rt305x_f + CLK_FACTOR("bus", "cpu", 1, 3) + }; + ++static struct mtmips_clk_factor mt7620_factor_clocks[] = { ++ CLK_FACTOR("sdhc", "bbppll", 1, 10) ++}; ++ ++static struct mtmips_clk_factor mt76x8_factor_clocks[] = { ++ CLK_FACTOR("bus", "cpu", 1, 3), ++ CLK_FACTOR("sdhc", "bbppll", 1, 10) ++}; ++ + static int mtmips_register_factor_clocks(struct clk_hw_onecell_data *clk_data, + struct mtmips_clk_priv *priv) + { +@@ -810,10 +826,10 @@ static const struct mtmips_clk_data rt53 + static const struct mtmips_clk_data mt7620_clk_data = { + .clk_base = mt7620_clks_base, + .num_clk_base = ARRAY_SIZE(mt7620_clks_base), +- .clk_fixed = NULL, +- .num_clk_fixed = 0, +- .clk_factor = NULL, +- .num_clk_factor = 0, ++ .clk_fixed = mt7620_fixed_clocks, ++ .num_clk_fixed = ARRAY_SIZE(mt7620_fixed_clocks), ++ .clk_factor = mt7620_factor_clocks, ++ .num_clk_factor = ARRAY_SIZE(mt7620_factor_clocks), + .clk_periph = mt7620_pherip_clks, + .num_clk_periph = ARRAY_SIZE(mt7620_pherip_clks), + }; +@@ -823,8 +839,8 @@ static const struct mtmips_clk_data mt76 + .num_clk_base = ARRAY_SIZE(mt76x8_clks_base), + .clk_fixed = mt76x8_fixed_clocks, + .num_clk_fixed = ARRAY_SIZE(mt76x8_fixed_clocks), +- .clk_factor = rt305x_factor_clocks, +- .num_clk_factor = ARRAY_SIZE(rt305x_factor_clocks), ++ .clk_factor = mt76x8_factor_clocks, ++ .num_clk_factor = ARRAY_SIZE(mt76x8_factor_clocks), + .clk_periph = mt76x8_pherip_clks, + .num_clk_periph = ARRAY_SIZE(mt76x8_pherip_clks), + }; diff --git a/target/linux/ramips/patches-6.12/003-v6.13-mmc-mtk-sd-Implement-Host-Software-Queue-for-eMMC.patch b/target/linux/ramips/patches-6.12/003-v6.13-mmc-mtk-sd-Implement-Host-Software-Queue-for-eMMC.patch new file mode 100644 index 0000000000..de09b680ea --- /dev/null +++ b/target/linux/ramips/patches-6.12/003-v6.13-mmc-mtk-sd-Implement-Host-Software-Queue-for-eMMC.patch @@ -0,0 +1,188 @@ +From 7e9ddd7d45897b15a64c4a3c88f2f7909bf49749 Mon Sep 17 00:00:00 2001 +From: AngeloGioacchino Del Regno +Date: Mon, 30 Sep 2024 11:01:56 +0200 +Subject: [PATCH] mmc: mtk-sd: Implement Host Software Queue for eMMC and SD + Card + +Add support for Host Software Queue (HSQ) and enable it when the +controller instance does not have Command Queue Engine HW support. + +It was chosen to enable HSQ only for eMMC and SD/MicroSD cards +and not for SDIO as performance improvements are seen only for +the former. + +Performance was measured with a SanDisk Extreme Ultra A2 MicroSD +card in a MediaTek MT8195T Acer Chromebook Spin 513 (CP513-2H), +by running FIO (bs=4k) on an ArchLinux userspace. + +.... Summarizing .... +Random read: +24.28% IOPS, +24.29% BW +Sequential read: +3.14% IOPS, +3.49% BW +Random RW (avg): +50.53% IOPS, +50.68% BW + +Below, more data from the benchmarks. + +Before: + - Random read: IOPS=1643, BW=6574KiB/s + bw ( KiB/s): min= 4578, max= 7440, per=99.95%, avg=6571.55, stdev=74.16, samples=953 + iops : min= 1144, max= 1860, avg=1642.14, stdev=18.54, samples=953 + lat (msec) : 100=0.01%, 250=0.12%, 500=0.38%, 750=97.89%, 1000=1.44%, 2000=0.16% + - Sequential read: IOPS=19.1k, BW=74.4MiB/s + bw ( KiB/s): min=12288, max=118483, per=100.00%, avg=76293.38, stdev=1971.42, samples=956 + iops : min= 3072, max=29620, avg=19072.14, stdev=492.87, samples=956 + lat (msec) : 4=0.01%, 10=0.01%, 20=0.21%, 50=23.95%, 100=75.67%, 250=0.05%, 500=0.03%, 750=0.08% + - Random R/W: read: IOPS=282, BW=1129KiB/s (1156kB/s) write: IOPS=284, BW=1136KiB/s + read bw ( KiB/s): min= 31, max= 3496, per=100.00%, avg=1703.67, stdev=155.42, samples=630 + read iops : min= 7, max= 873, avg=425.22, stdev=38.85, samples=630 + wri bw ( KiB/s): min= 31, max= 3443, per=100.00%, avg=1674.27, stdev=164.23, samples=644 + wri iops : min= 7, max= 860, avg=417.87, stdev=41.03, samples=644 + lat (msec) : 250=0.13%, 500=0.44%, 750=0.84%, 1000=22.29%, 2000=74.01%, >=2000=2.30% + +After: + - Random read: IOPS=2042, BW=8171KiB/s + bw ( KiB/s): min= 4907, max= 9072, per=99.94%, avg=8166.80, stdev=93.77, samples=954 + iops : min= 1226, max= 2268, avg=2040.78, stdev=23.41, samples=954 + lat (msec) : 100=0.03%, 250=0.13%, 500=52.88%, 750=46.64%, 1000=0.32% + - Sequential read: IOPS=19.7k, BW=77.0MiB/s + bw ( KiB/s): min=67980, max=94248, per=100.00%, avg=78894.27, stdev=1475.07, samples=956 + iops : min=16994, max=23562, avg=19722.45, stdev=368.76, samples=956 + lat (msec) : 4=0.01%, 10=0.01%, 20=0.05%, 50=28.78%, 100=71.14%, 250=0.01%, 500=0.02% + - Random R/W: read: IOPS=424, BW=1699KiB/s write: IOPS=428, BW=1714KiB/s + read bw ( KiB/s): min= 228, max= 2856, per=100.00%, avg=1796.60, stdev=112.59, samples=901 + read iops : min= 54, max= 712, avg=447.81, stdev=28.21, samples=901 + wri bw ( KiB/s): min= 28, max= 2904, per=100.00%, avg=1780.11, stdev=128.27, samples=916 + wri iops : min= 4, max= 724, avg=443.69, stdev=32.14, samples=916 + +Signed-off-by: AngeloGioacchino Del Regno +Link: https://lore.kernel.org/r/20240930090156.33537-1-angelogioacchino.delregno@collabora.com +Signed-off-by: Ulf Hansson +--- + drivers/mmc/host/Kconfig | 1 + + drivers/mmc/host/mtk-sd.c | 49 +++++++++++++++++++++++++++++++++++++-- + 2 files changed, 48 insertions(+), 2 deletions(-) + +--- a/drivers/mmc/host/Kconfig ++++ b/drivers/mmc/host/Kconfig +@@ -1009,6 +1009,7 @@ config MMC_MTK + depends on COMMON_CLK + select REGULATOR + select MMC_CQHCI ++ select MMC_HSQ + help + This selects the MediaTek(R) Secure digital and Multimedia card Interface. + If you have a machine with a integrated SD/MMC card reader, say Y or M here. +--- a/drivers/mmc/host/mtk-sd.c ++++ b/drivers/mmc/host/mtk-sd.c +@@ -33,6 +33,7 @@ + #include + + #include "cqhci.h" ++#include "mmc_hsq.h" + + #define MAX_BD_NUM 1024 + #define MSDC_NR_CLOCKS 3 +@@ -475,6 +476,7 @@ struct msdc_host { + bool hs400_tuning; /* hs400 mode online tuning */ + bool internal_cd; /* Use internal card-detect logic */ + bool cqhci; /* support eMMC hw cmdq */ ++ bool hsq_en; /* Host Software Queue is enabled */ + struct msdc_save_para save_para; /* used when gate HCLK */ + struct msdc_tune_para def_tune_para; /* default tune setting */ + struct msdc_tune_para saved_tune_para; /* tune result of CMD21/CMD19 */ +@@ -1171,7 +1173,9 @@ static void msdc_track_cmd_data(struct m + + static void msdc_request_done(struct msdc_host *host, struct mmc_request *mrq) + { ++ struct mmc_host *mmc = mmc_from_priv(host); + unsigned long flags; ++ bool hsq_req_done; + + /* + * No need check the return value of cancel_delayed_work, as only ONE +@@ -1179,6 +1183,27 @@ static void msdc_request_done(struct msd + */ + cancel_delayed_work(&host->req_timeout); + ++ /* ++ * If the request was handled from Host Software Queue, there's almost ++ * nothing to do here, and we also don't need to reset mrq as any race ++ * condition would not have any room to happen, since HSQ stores the ++ * "scheduled" mrqs in an internal array of mrq slots anyway. ++ * However, if the controller experienced an error, we still want to ++ * reset it as soon as possible. ++ * ++ * Note that non-HSQ requests will still be happening at times, even ++ * though it is enabled, and that's what is going to reset host->mrq. ++ * Also, msdc_unprepare_data() is going to be called by HSQ when needed ++ * as HSQ request finalization will eventually call the .post_req() ++ * callback of this driver which, in turn, unprepares the data. ++ */ ++ hsq_req_done = host->hsq_en ? mmc_hsq_finalize_request(mmc, mrq) : false; ++ if (hsq_req_done) { ++ if (host->error) ++ msdc_reset_hw(host); ++ return; ++ } ++ + spin_lock_irqsave(&host->lock, flags); + host->mrq = NULL; + spin_unlock_irqrestore(&host->lock, flags); +@@ -1188,7 +1213,7 @@ static void msdc_request_done(struct msd + msdc_unprepare_data(host, mrq->data); + if (host->error) + msdc_reset_hw(host); +- mmc_request_done(mmc_from_priv(host), mrq); ++ mmc_request_done(mmc, mrq); + if (host->dev_comp->recheck_sdio_irq) + msdc_recheck_sdio_irq(host); + } +@@ -1348,7 +1373,7 @@ static void msdc_ops_request(struct mmc_ + struct msdc_host *host = mmc_priv(mmc); + + host->error = 0; +- WARN_ON(host->mrq); ++ WARN_ON(!host->hsq_en && host->mrq); + host->mrq = mrq; + + if (mrq->data) { +@@ -2925,6 +2950,19 @@ static int msdc_drv_probe(struct platfor + mmc->max_seg_size = 64 * 1024; + /* Reduce CIT to 0x40 that corresponds to 2.35us */ + msdc_cqe_cit_cal(host, 2350); ++ } else if (mmc->caps2 & MMC_CAP2_NO_SDIO) { ++ /* Use HSQ on eMMC/SD (but not on SDIO) if HW CQE not supported */ ++ struct mmc_hsq *hsq = devm_kzalloc(&pdev->dev, sizeof(*hsq), GFP_KERNEL); ++ if (!hsq) { ++ ret = -ENOMEM; ++ goto release; ++ } ++ ++ ret = mmc_hsq_init(hsq, mmc); ++ if (ret) ++ goto release; ++ ++ host->hsq_en = true; + } + + ret = devm_request_irq(&pdev->dev, host->irq, msdc_irq, +@@ -3050,6 +3088,9 @@ static int __maybe_unused msdc_runtime_s + struct mmc_host *mmc = dev_get_drvdata(dev); + struct msdc_host *host = mmc_priv(mmc); + ++ if (host->hsq_en) ++ mmc_hsq_suspend(mmc); ++ + msdc_save_reg(host); + + if (sdio_irq_claimed(mmc)) { +@@ -3080,6 +3121,10 @@ static int __maybe_unused msdc_runtime_r + pinctrl_select_state(host->pinctrl, host->pins_uhs); + enable_irq(host->irq); + } ++ ++ if (host->hsq_en) ++ mmc_hsq_resume(mmc); ++ + return 0; + } + diff --git a/target/linux/ramips/patches-6.12/004-v6.15-dt-bindings-clock-add-clock-definitions-for-Ralink-S.patch b/target/linux/ramips/patches-6.12/004-v6.15-dt-bindings-clock-add-clock-definitions-for-Ralink-S.patch new file mode 100644 index 0000000000..2697234667 --- /dev/null +++ b/target/linux/ramips/patches-6.12/004-v6.15-dt-bindings-clock-add-clock-definitions-for-Ralink-S.patch @@ -0,0 +1,188 @@ +From adb2424d0d05506c2f36fcba66101d34f7409e45 Mon Sep 17 00:00:00 2001 +From: Sergio Paracuellos +Date: Mon, 20 Jan 2025 10:21:41 +0100 +Subject: [PATCH] dt-bindings: clock: add clock definitions for Ralink SoCs + +Add clock missing definitions for RT2880, RT305X, RT3352, RT3383, RT5350, +MT7620 and MT76X8 Ralink SoCs. Update bindings to clarify clock depending +on these new introduced constants so consumer nodes can easily use the +correct one in DTS files matching properly what is being used in driver +code (clock IDs are implicitly used there). + +Signed-off-by: Sergio Paracuellos +Reviewed-by: Krzysztof Kozlowski +Acked-by: Stephen Boyd +Signed-off-by: Thomas Bogendoerfer +--- + .../bindings/clock/mediatek,mtmips-sysc.yaml | 11 +- + .../dt-bindings/clock/mediatek,mtmips-sysc.h | 130 ++++++++++++++++++ + 2 files changed, 140 insertions(+), 1 deletion(-) + create mode 100644 include/dt-bindings/clock/mediatek,mtmips-sysc.h + +--- a/Documentation/devicetree/bindings/clock/mediatek,mtmips-sysc.yaml ++++ b/Documentation/devicetree/bindings/clock/mediatek,mtmips-sysc.yaml +@@ -18,6 +18,12 @@ description: | + These SoCs have an XTAL from where the cpu clock is + provided as well as derived clocks for the bus and the peripherals. + ++ Each clock is assigned an identifier and client nodes use this identifier ++ to specify the clock which they consume. ++ ++ All these identifiers could be found in: ++ [1]: . ++ + properties: + compatible: + items: +@@ -38,7 +44,8 @@ properties: + + '#clock-cells': + description: +- The first cell indicates the clock number. ++ The first cell indicates the clock number, see [1] for available ++ clocks. + const: 1 + + '#reset-cells': +@@ -56,6 +63,8 @@ additionalProperties: false + + examples: + - | ++ #include ++ + syscon@0 { + compatible = "ralink,rt5350-sysc", "syscon"; + reg = <0x0 0x100>; +--- /dev/null ++++ b/include/dt-bindings/clock/mediatek,mtmips-sysc.h +@@ -0,0 +1,130 @@ ++/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ ++/* ++ * Author: Sergio Paracuellos ++ */ ++ ++#ifndef _DT_BINDINGS_CLK_MTMIPS_H ++#define _DT_BINDINGS_CLK_MTMIPS_H ++ ++/* Ralink RT-2880 clocks */ ++ ++#define RT2880_CLK_XTAL 0 ++#define RT2880_CLK_CPU 1 ++#define RT2880_CLK_BUS 2 ++#define RT2880_CLK_TIMER 3 ++#define RT2880_CLK_WATCHDOG 4 ++#define RT2880_CLK_UART 5 ++#define RT2880_CLK_I2C 6 ++#define RT2880_CLK_UARTLITE 7 ++#define RT2880_CLK_ETHERNET 8 ++#define RT2880_CLK_WMAC 9 ++ ++/* Ralink RT-305X clocks */ ++ ++#define RT305X_CLK_XTAL 0 ++#define RT305X_CLK_CPU 1 ++#define RT305X_CLK_BUS 2 ++#define RT305X_CLK_TIMER 3 ++#define RT305X_CLK_WATCHDOG 4 ++#define RT305X_CLK_UART 5 ++#define RT305X_CLK_I2C 6 ++#define RT305X_CLK_I2S 7 ++#define RT305X_CLK_SPI1 8 ++#define RT305X_CLK_SPI2 9 ++#define RT305X_CLK_UARTLITE 10 ++#define RT305X_CLK_ETHERNET 11 ++#define RT305X_CLK_WMAC 12 ++ ++/* Ralink RT-3352 clocks */ ++ ++#define RT3352_CLK_XTAL 0 ++#define RT3352_CLK_CPU 1 ++#define RT3352_CLK_PERIPH 2 ++#define RT3352_CLK_BUS 3 ++#define RT3352_CLK_TIMER 4 ++#define RT3352_CLK_WATCHDOG 5 ++#define RT3352_CLK_UART 6 ++#define RT3352_CLK_I2C 7 ++#define RT3352_CLK_I2S 8 ++#define RT3352_CLK_SPI1 9 ++#define RT3352_CLK_SPI2 10 ++#define RT3352_CLK_UARTLITE 11 ++#define RT3352_CLK_ETHERNET 12 ++#define RT3352_CLK_WMAC 13 ++ ++/* Ralink RT-3883 clocks */ ++ ++#define RT3883_CLK_XTAL 0 ++#define RT3883_CLK_CPU 1 ++#define RT3883_CLK_BUS 2 ++#define RT3883_CLK_PERIPH 3 ++#define RT3883_CLK_TIMER 4 ++#define RT3883_CLK_WATCHDOG 5 ++#define RT3883_CLK_UART 6 ++#define RT3883_CLK_I2C 7 ++#define RT3883_CLK_I2S 8 ++#define RT3883_CLK_SPI1 9 ++#define RT3883_CLK_SPI2 10 ++#define RT3883_CLK_UARTLITE 11 ++#define RT3883_CLK_ETHERNET 12 ++#define RT3883_CLK_WMAC 13 ++ ++/* Ralink RT-5350 clocks */ ++ ++#define RT5350_CLK_XTAL 0 ++#define RT5350_CLK_CPU 1 ++#define RT5350_CLK_BUS 2 ++#define RT5350_CLK_PERIPH 3 ++#define RT5350_CLK_TIMER 4 ++#define RT5350_CLK_WATCHDOG 5 ++#define RT5350_CLK_UART 6 ++#define RT5350_CLK_I2C 7 ++#define RT5350_CLK_I2S 8 ++#define RT5350_CLK_SPI1 9 ++#define RT5350_CLK_SPI2 10 ++#define RT5350_CLK_UARTLITE 11 ++#define RT5350_CLK_ETHERNET 12 ++#define RT5350_CLK_WMAC 13 ++ ++/* Ralink MT-7620 clocks */ ++ ++#define MT7620_CLK_XTAL 0 ++#define MT7620_CLK_PLL 1 ++#define MT7620_CLK_CPU 2 ++#define MT7620_CLK_PERIPH 3 ++#define MT7620_CLK_BUS 4 ++#define MT7620_CLK_BBPPLL 5 ++#define MT7620_CLK_SDHC 6 ++#define MT7620_CLK_TIMER 7 ++#define MT7620_CLK_WATCHDOG 8 ++#define MT7620_CLK_UART 9 ++#define MT7620_CLK_I2C 10 ++#define MT7620_CLK_I2S 11 ++#define MT7620_CLK_SPI1 12 ++#define MT7620_CLK_SPI2 13 ++#define MT7620_CLK_UARTLITE 14 ++#define MT7620_CLK_MMC 15 ++#define MT7620_CLK_WMAC 16 ++ ++/* Ralink MT-76X8 clocks */ ++ ++#define MT76X8_CLK_XTAL 0 ++#define MT76X8_CLK_CPU 1 ++#define MT76X8_CLK_BBPPLL 2 ++#define MT76X8_CLK_PCMI2S 3 ++#define MT76X8_CLK_PERIPH 4 ++#define MT76X8_CLK_BUS 5 ++#define MT76X8_CLK_SDHC 6 ++#define MT76X8_CLK_TIMER 7 ++#define MT76X8_CLK_WATCHDOG 8 ++#define MT76X8_CLK_I2C 9 ++#define MT76X8_CLK_I2S 10 ++#define MT76X8_CLK_SPI1 11 ++#define MT76X8_CLK_SPI2 12 ++#define MT76X8_CLK_UART0 13 ++#define MT76X8_CLK_UART1 14 ++#define MT76X8_CLK_UART2 15 ++#define MT76X8_CLK_MMC 16 ++#define MT76X8_CLK_WMAC 17 ++ ++#endif /* _DT_BINDINGS_CLK_MTMIPS_H */ diff --git a/target/linux/ramips/patches-6.12/100-mips-ralink-update-CPU-clock-index.patch b/target/linux/ramips/patches-6.12/100-mips-ralink-update-CPU-clock-index.patch new file mode 100644 index 0000000000..c19771ee87 --- /dev/null +++ b/target/linux/ramips/patches-6.12/100-mips-ralink-update-CPU-clock-index.patch @@ -0,0 +1,58 @@ +From ef57412d070fe663a66a5473ffc708bd89671259 Mon Sep 17 00:00:00 2001 +From: Signed-off-by: Shiji Yang +Date: Sun, 2 Feb 2025 17:10:14 +0800 +Subject: [PATCH] mips: ralink: update CPU clock index + +Some clock indexes have been reorganized in commit d34db686a3d7 +("clk: ralink: mtmips: fix clocks probe order in oldest ralink SoCs"). +Update CPU clock index to match the clock driver changes. + +Signed-off-by: Shiji Yang +Co-authored-by: Mieczyslaw Nalewaj +--- + arch/mips/ralink/clk.c | 11 ++--------- + 1 file changed, 2 insertions(+), 9 deletions(-) + +--- a/arch/mips/ralink/clk.c ++++ b/arch/mips/ralink/clk.c +@@ -19,27 +19,22 @@ + + static const char *clk_cpu(int *idx) + { ++ *idx = 1; ++ + switch (ralink_soc) { + case RT2880_SOC: +- *idx = 0; + return "ralink,rt2880-sysc"; + case RT3883_SOC: +- *idx = 0; + return "ralink,rt3883-sysc"; + case RT305X_SOC_RT3050: +- *idx = 0; + return "ralink,rt3050-sysc"; + case RT305X_SOC_RT3052: +- *idx = 0; + return "ralink,rt3052-sysc"; + case RT305X_SOC_RT3350: +- *idx = 1; + return "ralink,rt3350-sysc"; + case RT305X_SOC_RT3352: +- *idx = 1; + return "ralink,rt3352-sysc"; + case RT305X_SOC_RT5350: +- *idx = 1; + return "ralink,rt5350-sysc"; + case MT762X_SOC_MT7620A: + *idx = 2; +@@ -48,10 +43,8 @@ static const char *clk_cpu(int *idx) + *idx = 2; + return "ralink,mt7620-sysc"; + case MT762X_SOC_MT7628AN: +- *idx = 1; + return "ralink,mt7628-sysc"; + case MT762X_SOC_MT7688: +- *idx = 1; + return "ralink,mt7688-sysc"; + default: + *idx = -1; diff --git a/target/linux/ramips/patches-6.12/101-clk-ralink-mtmips-add-pwm-clocks-for-mt76x8.patch b/target/linux/ramips/patches-6.12/101-clk-ralink-mtmips-add-pwm-clocks-for-mt76x8.patch new file mode 100644 index 0000000000..94880f7e07 --- /dev/null +++ b/target/linux/ramips/patches-6.12/101-clk-ralink-mtmips-add-pwm-clocks-for-mt76x8.patch @@ -0,0 +1,42 @@ +From f0300b3fc74a71742eee50ac596166b5780e0df6 Mon Sep 17 00:00:00 2001 +From: Shiji Yang +Date: Tue, 24 Feb 2026 19:19:14 +0800 +Subject: [PATCH] clk: ralink: mtmips: add pwm clocks for mt76x8 + +Signed-off-by: Shiji Yang +--- + drivers/clk/ralink/clk-mtmips.c | 8 +++++++- + include/dt-bindings/clock/mediatek,mtmips-sysc.h | 6 ++++++ + 2 files changed, 13 insertions(+), 1 deletion(-) + +--- a/drivers/clk/ralink/clk-mtmips.c ++++ b/drivers/clk/ralink/clk-mtmips.c +@@ -222,7 +222,13 @@ static struct mtmips_clk mt76x8_pherip_c + { CLK_PERIPH("10000d00.uart1", "periph") }, + { CLK_PERIPH("10000e00.uart2", "periph") }, + { CLK_PERIPH("10130000.mmc", "sdhc") }, +- { CLK_PERIPH("10300000.wmac", "xtal") } ++ { CLK_PERIPH("10300000.wmac", "xtal") }, ++ { CLK_PERIPH("10005000.pwm-top", "periph") }, ++ { CLK_PERIPH("10005000.pwm-main", "periph") }, ++ { CLK_PERIPH("10005000.pwm-ch1", "periph") }, ++ { CLK_PERIPH("10005000.pwm-ch2", "periph") }, ++ { CLK_PERIPH("10005000.pwm-ch3", "periph") }, ++ { CLK_PERIPH("10005000.pwm-ch4", "periph") } + }; + + static int mtmips_register_pherip_clocks(struct device_node *np, +--- a/include/dt-bindings/clock/mediatek,mtmips-sysc.h ++++ b/include/dt-bindings/clock/mediatek,mtmips-sysc.h +@@ -126,5 +126,11 @@ + #define MT76X8_CLK_UART2 15 + #define MT76X8_CLK_MMC 16 + #define MT76X8_CLK_WMAC 17 ++#define MT76X8_CLK_PWM_TOP 18 ++#define MT76X8_CLK_PWM_MAIN 19 ++#define MT76X8_CLK_PWM_CH1 20 ++#define MT76X8_CLK_PWM_CH2 21 ++#define MT76X8_CLK_PWM_CH3 22 ++#define MT76X8_CLK_PWM_CH4 23 + + #endif /* _DT_BINDINGS_CLK_MTMIPS_H */ diff --git a/target/linux/ramips/patches-6.12/102-01-pwm-mediatek-set-mt7628-pwm45_fixup-flag-to-false.patch b/target/linux/ramips/patches-6.12/102-01-pwm-mediatek-set-mt7628-pwm45_fixup-flag-to-false.patch new file mode 100644 index 0000000000..130b877737 --- /dev/null +++ b/target/linux/ramips/patches-6.12/102-01-pwm-mediatek-set-mt7628-pwm45_fixup-flag-to-false.patch @@ -0,0 +1,25 @@ +From 2ff84ce933de37e91d132553a2555c4b4e9dedc8 Mon Sep 17 00:00:00 2001 +From: Shiji Yang +Date: Tue, 24 Feb 2026 15:32:42 +0800 +Subject: [PATCH 1/2] pwm: mediatek: set mt7628 pwm45_fixup flag to false + +According to the programing guide, mt7628 has generic register layout +like most other hardware revisions. We should not set pwm45_fixup flag +for it. + +Signed-off-by: Shiji Yang +--- + drivers/pwm/pwm-mediatek.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/pwm/pwm-mediatek.c ++++ b/drivers/pwm/pwm-mediatek.c +@@ -324,7 +324,7 @@ static const struct pwm_mediatek_of_data + + static const struct pwm_mediatek_of_data mt7628_pwm_data = { + .num_pwms = 4, +- .pwm45_fixup = true, ++ .pwm45_fixup = false, + .has_ck_26m_sel = false, + .reg_offset = mtk_pwm_reg_offset_v1, + }; diff --git a/target/linux/ramips/patches-6.12/102-02-pwm-mediatek-correct-mt7628-clock-source-setting.patch b/target/linux/ramips/patches-6.12/102-02-pwm-mediatek-correct-mt7628-clock-source-setting.patch new file mode 100644 index 0000000000..498eb7fc63 --- /dev/null +++ b/target/linux/ramips/patches-6.12/102-02-pwm-mediatek-correct-mt7628-clock-source-setting.patch @@ -0,0 +1,65 @@ +From 1d846d6f80f24066747dac57440c84502a8a1cd3 Mon Sep 17 00:00:00 2001 +From: Shiji Yang +Date: Tue, 24 Feb 2026 16:19:54 +0800 +Subject: [PATCH 2/2] pwm: mediatek: correct mt7628 clock source setting + +PWMCON register Bit(3) is used to configure whether to pre divide +the clock source. Most revisions clear this bit to disable frequency +division. However, mt7628 needs to set this bit. Hence, we introduce +a new clksel_fixup flag to correctly configure the clock source for +mt7628. + +Signed-off-by: Shiji Yang +--- + drivers/pwm/pwm-mediatek.c | 23 ++++++++++++++++++++++- + 1 file changed, 22 insertions(+), 1 deletion(-) + +--- a/drivers/pwm/pwm-mediatek.c ++++ b/drivers/pwm/pwm-mediatek.c +@@ -21,6 +21,8 @@ + + /* PWM registers and bits definitions */ + #define PWMCON 0x00 ++#define PWMCON_CLKSEL BIT(3) ++#define PWMCON_OLD_PWM_MODE BIT(15) + #define PWMHDUR 0x04 + #define PWMLDUR 0x08 + #define PWMGDUR 0x0c +@@ -35,6 +37,7 @@ + + struct pwm_mediatek_of_data { + unsigned int num_pwms; ++ bool clksel_fixup; + bool pwm45_fixup; + bool has_ck_26m_sel; + const unsigned int *reg_offset; +@@ -141,6 +144,7 @@ static int pwm_mediatek_config(struct pw + struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip); + u32 clkdiv = 0, cnt_period, cnt_duty, reg_width = PWMDWIDTH, + reg_thres = PWMTHRES; ++ u32 con_val; + unsigned long clk_rate; + u64 resolution; + int ret; +@@ -191,7 +195,12 @@ static int pwm_mediatek_config(struct pw + + cnt_duty = DIV_ROUND_CLOSEST_ULL((u64)duty_ns * 1000, resolution); + +- pwm_mediatek_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | clkdiv); ++ con_val = PWMCON_OLD_PWM_MODE | clkdiv; ++ /* Set BIT(3) to disable clock division */ ++ if (pc->soc->clksel_fixup) ++ con_val |= PWMCON_CLKSEL; ++ ++ pwm_mediatek_writel(pc, pwm->hwpwm, PWMCON, con_val); + pwm_mediatek_writel(pc, pwm->hwpwm, reg_width, cnt_period - 1); + + if (cnt_duty) { +@@ -324,6 +333,7 @@ static const struct pwm_mediatek_of_data + + static const struct pwm_mediatek_of_data mt7628_pwm_data = { + .num_pwms = 4, ++ .clksel_fixup = true, + .pwm45_fixup = false, + .has_ck_26m_sel = false, + .reg_offset = mtk_pwm_reg_offset_v1, diff --git a/target/linux/ramips/patches-6.12/120-1-mips-pci-mt7620-fix-bridge-register-access.patch b/target/linux/ramips/patches-6.12/120-1-mips-pci-mt7620-fix-bridge-register-access.patch new file mode 100644 index 0000000000..742e6b8cd5 --- /dev/null +++ b/target/linux/ramips/patches-6.12/120-1-mips-pci-mt7620-fix-bridge-register-access.patch @@ -0,0 +1,59 @@ +From: Shiji Yang +Date: Mon, 17 Mar 2025 20:35:44 +0800 +Subject: [PATCH 1/3] mips: pci-mt7620: fix bridge register access + +Host bridge registers and PCI RC control registers have different +memory base. pcie_m32() is used to write the RC control registers +instead of bridge registers. This patch introduces bridge_m32() +and use it to operate bridge registers to fix the access issue. + +Signed-off-by: Shiji Yang +--- + arch/mips/pci/pci-mt7620.c | 15 ++++++++++++--- + 1 file changed, 12 insertions(+), 3 deletions(-) + +--- a/arch/mips/pci/pci-mt7620.c ++++ b/arch/mips/pci/pci-mt7620.c +@@ -87,6 +87,15 @@ static inline u32 bridge_r32(unsigned re + return ioread32(bridge_base + reg); + } + ++static inline void bridge_m32(u32 clr, u32 set, unsigned reg) ++{ ++ u32 val = bridge_r32(reg); ++ ++ val &= ~clr; ++ val |= set; ++ bridge_w32(val, reg); ++} ++ + static inline void pcie_w32(u32 val, unsigned reg) + { + iowrite32(val, pcie_base + reg); +@@ -228,7 +237,7 @@ static int mt7620_pci_hw_init(struct pla + pcie_phy(0x68, 0xB4); + + /* put core into reset */ +- pcie_m32(0, PCIRST, RALINK_PCI_PCICFG_ADDR); ++ bridge_m32(PCIRST, PCIRST, RALINK_PCI_PCICFG_ADDR); + reset_control_assert(rstpcie0); + + /* disable power and all clocks */ +@@ -318,7 +327,7 @@ static int mt7620_pci_probe(struct platf + mdelay(50); + + /* enable write access */ +- pcie_m32(PCIRST, 0, RALINK_PCI_PCICFG_ADDR); ++ bridge_m32(PCIRST, 0, RALINK_PCI_PCICFG_ADDR); + mdelay(100); + + /* check if there is a card present */ +@@ -340,7 +349,7 @@ static int mt7620_pci_probe(struct platf + pcie_w32(0x06040001, RALINK_PCI0_CLASS); + + /* enable interrupts */ +- pcie_m32(0, PCIINT2, RALINK_PCI_PCIENA); ++ bridge_m32(PCIINT2, PCIINT2, RALINK_PCI_PCIENA); + + /* voodoo from the SDK driver */ + pci_config_read(NULL, 0, 4, 4, &val); diff --git a/target/linux/ramips/patches-6.12/120-2-mips-pci-mt7620-add-more-register-init-values.patch b/target/linux/ramips/patches-6.12/120-2-mips-pci-mt7620-add-more-register-init-values.patch new file mode 100644 index 0000000000..52e389dc1e --- /dev/null +++ b/target/linux/ramips/patches-6.12/120-2-mips-pci-mt7620-add-more-register-init-values.patch @@ -0,0 +1,132 @@ +From: Shiji Yang +Date: Mon, 17 Mar 2025 20:54:24 +0800 +Subject: [PATCH 2/3] mips: pci-mt7620: add more register init values + +These missing register init values are ported from the vendor SDK. +It should have some stability enhancements. Tested on both MT7620 +and MT7628. + +Signed-off-by: Shiji Yang +--- + arch/mips/pci/pci-mt7620.c | 59 +++++++++++++++++++++++++++++--------- + 1 file changed, 46 insertions(+), 13 deletions(-) + +--- a/arch/mips/pci/pci-mt7620.c ++++ b/arch/mips/pci/pci-mt7620.c +@@ -26,6 +26,8 @@ + + #define RALINK_INT_PCIE0 4 + ++#define RALINK_SYSCFG0 0x10 ++#define RALINK_SYSCFG0_XTAL40 BIT(6) + #define RALINK_CLKCFG1 0x30 + #define RALINK_GPIOMODE 0x60 + +@@ -62,7 +64,7 @@ + + #define PCIEPHY0_CFG 0x90 + +-#define RALINK_PCIEPHY_P0_CTL_OFFSET 0x7498 ++#define RALINK_PCIEPHY_P0_CTL_OFFSET 0x7000 + #define RALINK_PCIE0_CLK_EN BIT(26) + + #define BUSY 0x80000000 +@@ -115,6 +117,14 @@ static inline void pcie_m32(u32 clr, u32 + pcie_w32(val, reg); + } + ++static inline void ++pcie_phyctrl_set(unsigned offset, u32 b_start, u32 bits, u32 val) ++{ ++ pcie_m32(GENMASK(b_start + bits - 1, b_start), ++ val << b_start, ++ RALINK_PCIEPHY_P0_CTL_OFFSET + offset); ++} ++ + static int wait_pciephy_busy(void) + { + unsigned long reg_value = 0x0, retry = 0; +@@ -263,10 +273,8 @@ static int mt7620_pci_hw_init(struct pla + return 0; + } + +-static int mt7628_pci_hw_init(struct platform_device *pdev) ++static void mt7628_pci_hw_init(struct platform_device *pdev) + { +- u32 val = 0; +- + /* bring the core out of reset */ + rt_sysc_m32(BIT(16), 0, RALINK_GPIOMODE); + reset_control_deassert(rstpcie0); +@@ -276,14 +284,33 @@ static int mt7628_pci_hw_init(struct pla + mdelay(100); + + /* voodoo from the SDK driver */ +- pcie_m32(~0xff, 0x5, RALINK_PCIEPHY_P0_CTL_OFFSET); +- +- pci_config_read(NULL, 0, 0x70c, 4, &val); +- val &= ~(0xff) << 8; +- val |= 0x50 << 8; +- pci_config_write(NULL, 0, 0x70c, 4, val); ++ pcie_phyctrl_set(0x400, 8, 1, 0x1); ++ pcie_phyctrl_set(0x400, 9, 2, 0x0); ++ pcie_phyctrl_set(0x000, 4, 1, 0x1); ++ pcie_phyctrl_set(0x000, 5, 1, 0x0); ++ pcie_phyctrl_set(0x4ac, 16, 3, 0x3); ++ ++ if (rt_sysc_r32(RALINK_SYSCFG0) & RALINK_SYSCFG0_XTAL40) { ++ pcie_phyctrl_set(0x4bc, 24, 8, 0x7d); ++ pcie_phyctrl_set(0x490, 12, 4, 0x08); ++ pcie_phyctrl_set(0x490, 6, 2, 0x01); ++ pcie_phyctrl_set(0x4c0, 0, 32, 0x1f400000); ++ pcie_phyctrl_set(0x4a4, 0, 16, 0x013d); ++ pcie_phyctrl_set(0x4a8, 16, 16, 0x74); ++ pcie_phyctrl_set(0x4a8, 0, 16, 0x74); ++ } else { ++ pcie_phyctrl_set(0x4bc, 24, 8, 0x64); ++ pcie_phyctrl_set(0x490, 12, 4, 0x0a); ++ pcie_phyctrl_set(0x490, 6, 2, 0x00); ++ pcie_phyctrl_set(0x4c0, 0, 32, 0x19000000); ++ pcie_phyctrl_set(0x4a4, 0, 16, 0x018d); ++ pcie_phyctrl_set(0x4a8, 16, 16, 0x4a); ++ pcie_phyctrl_set(0x4a8, 0, 16, 0x4a); ++ } + +- return 0; ++ pcie_phyctrl_set(0x498, 0, 8, 0x5); ++ pcie_phyctrl_set(0x000, 5, 1, 0x1); ++ pcie_phyctrl_set(0x000, 4, 1, 0x0); + } + + static int mt7620_pci_probe(struct platform_device *pdev) +@@ -316,8 +343,7 @@ static int mt7620_pci_probe(struct platf + + case MT762X_SOC_MT7628AN: + case MT762X_SOC_MT7688: +- if (mt7628_pci_hw_init(pdev)) +- return -1; ++ mt7628_pci_hw_init(pdev); + break; + + default: +@@ -336,6 +362,8 @@ static int mt7620_pci_probe(struct platf + rt_sysc_m32(RALINK_PCIE0_CLK_EN, 0, RALINK_CLKCFG1); + if (ralink_soc == MT762X_SOC_MT7620A) + rt_sysc_m32(LC_CKDRVPD, PDRV_SW_SET, PPLL_DRV); ++ else ++ pcie_phyctrl_set(0x000, 0, 32, 0x10); + dev_info(&pdev->dev, "PCIE0 no card, disable it(RST&CLK)\n"); + return -1; + } +@@ -355,6 +383,11 @@ static int mt7620_pci_probe(struct platf + pci_config_read(NULL, 0, 4, 4, &val); + pci_config_write(NULL, 0, 4, 4, val | 0x7); + ++ pci_config_read(NULL, 0, 0x70c, 4, &val); ++ val &= ~(0xff) << 8; ++ val |= 0x50 << 8; ++ pci_config_write(NULL, 0, 0x70c, 4, val); ++ + pci_load_of_ranges(&mt7620_controller, pdev->dev.of_node); + register_pci_controller(&mt7620_controller); + diff --git a/target/linux/ramips/patches-6.12/120-3-mips-pci-mt7620-rework-initialization-procedure.patch b/target/linux/ramips/patches-6.12/120-3-mips-pci-mt7620-rework-initialization-procedure.patch new file mode 100644 index 0000000000..c262d0031b --- /dev/null +++ b/target/linux/ramips/patches-6.12/120-3-mips-pci-mt7620-rework-initialization-procedure.patch @@ -0,0 +1,95 @@ +From: Shiji Yang +Date: Mon, 17 Mar 2025 23:55:24 +0800 +Subject: [PATCH 3/3] mips: pci-mt7620: rework initialization procedure + +Move the reset operation to the common part to reduce the code +redundancy. They are actually the same and needed for all SoCs. +Disabling power and clock are unnecessary for MT7620 and will be +removed. In vendor SDK, it's used to save the power when the PCI +driver is not selected. The MT7628 GPIO pinctrl has been removed +because this should be done in device-tree. Some delay intervals +have also been increased to follow the recommendations of the SoC +SDK and datasheet. Tested on both MT7620 and MT7628. + +Signed-off-by: Shiji Yang +--- + arch/mips/pci/pci-mt7620.c | 38 +++++++++++++------------------------- + 1 file changed, 13 insertions(+), 25 deletions(-) + +--- a/arch/mips/pci/pci-mt7620.c ++++ b/arch/mips/pci/pci-mt7620.c +@@ -29,7 +29,6 @@ + #define RALINK_SYSCFG0 0x10 + #define RALINK_SYSCFG0_XTAL40 BIT(6) + #define RALINK_CLKCFG1 0x30 +-#define RALINK_GPIOMODE 0x60 + + #define PPLL_CFG1 0x9c + #define PPLL_LD BIT(23) +@@ -246,19 +245,6 @@ static int mt7620_pci_hw_init(struct pla + /* Elastic buffer control */ + pcie_phy(0x68, 0xB4); + +- /* put core into reset */ +- bridge_m32(PCIRST, PCIRST, RALINK_PCI_PCICFG_ADDR); +- reset_control_assert(rstpcie0); +- +- /* disable power and all clocks */ +- rt_sysc_m32(RALINK_PCIE0_CLK_EN, 0, RALINK_CLKCFG1); +- rt_sysc_m32(LC_CKDRVPD, PDRV_SW_SET, PPLL_DRV); +- +- /* bring core out of reset */ +- reset_control_deassert(rstpcie0); +- rt_sysc_m32(0, RALINK_PCIE0_CLK_EN, RALINK_CLKCFG1); +- mdelay(100); +- + if (!(rt_sysc_r32(PPLL_CFG1) & PPLL_LD)) { + dev_err(&pdev->dev, "pcie PLL not locked, aborting init\n"); + reset_control_assert(rstpcie0); +@@ -275,14 +261,6 @@ static int mt7620_pci_hw_init(struct pla + + static void mt7628_pci_hw_init(struct platform_device *pdev) + { +- /* bring the core out of reset */ +- rt_sysc_m32(BIT(16), 0, RALINK_GPIOMODE); +- reset_control_deassert(rstpcie0); +- +- /* enable the pci clk */ +- rt_sysc_m32(0, RALINK_PCIE0_CLK_EN, RALINK_CLKCFG1); +- mdelay(100); +- + /* voodoo from the SDK driver */ + pcie_phyctrl_set(0x400, 8, 1, 0x1); + pcie_phyctrl_set(0x400, 9, 2, 0x0); +@@ -334,6 +312,16 @@ static int mt7620_pci_probe(struct platf + ioport_resource.start = 0; + ioport_resource.end = ~0; + ++ /* reset PCIe controller */ ++ reset_control_assert(rstpcie0); ++ msleep(100); ++ reset_control_deassert(rstpcie0); ++ rt_sysc_m32(0, RALINK_PCIE0_CLK_EN, RALINK_CLKCFG1); ++ msleep(100); ++ ++ /* assert PERST_N pin */ ++ bridge_m32(PCIRST, PCIRST, RALINK_PCI_PCICFG_ADDR); ++ + /* bring up the pci core */ + switch (ralink_soc) { + case MT762X_SOC_MT7620A: +@@ -350,11 +338,11 @@ static int mt7620_pci_probe(struct platf + dev_err(&pdev->dev, "pcie is not supported on this hardware\n"); + return -1; + } +- mdelay(50); ++ msleep(500); + +- /* enable write access */ ++ /* deassert PERST_N pin and wait PCIe peripheral init */ + bridge_m32(PCIRST, 0, RALINK_PCI_PCICFG_ADDR); +- mdelay(100); ++ msleep(1000); + + /* check if there is a card present */ + if ((pcie_r32(RALINK_PCI0_STATUS) & PCIE_LINK_UP_ST) == 0) { diff --git a/target/linux/ramips/patches-6.12/130-phy-mediatek-allow-building-T-PHY-driver-for-MT7621-.patch b/target/linux/ramips/patches-6.12/130-phy-mediatek-allow-building-T-PHY-driver-for-MT7621-.patch new file mode 100644 index 0000000000..8dc5a39545 --- /dev/null +++ b/target/linux/ramips/patches-6.12/130-phy-mediatek-allow-building-T-PHY-driver-for-MT7621-.patch @@ -0,0 +1,24 @@ +From 939c662ec8a221aedde213583e07e8c0cac810af Mon Sep 17 00:00:00 2001 +From: Shiji Yang +Date: Thu, 19 Feb 2026 14:23:56 +0800 +Subject: [PATCH] phy: mediatek: allow building T-PHY driver for MT7621 MIPS + SoC + +MT7621 also has compatible T-PHY which attached to the XHCI interface. + +Signed-off-by: Shiji Yang +--- + drivers/phy/mediatek/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/phy/mediatek/Kconfig ++++ b/drivers/phy/mediatek/Kconfig +@@ -26,7 +26,7 @@ config PHY_MTK_XFI_TPHY + + config PHY_MTK_TPHY + tristate "MediaTek T-PHY Driver" +- depends on ARCH_MEDIATEK || COMPILE_TEST ++ depends on ARCH_MEDIATEK || SOC_MT7621 || COMPILE_TEST + depends on OF && OF_ADDRESS + depends on HAS_IOMEM + select GENERIC_PHY diff --git a/target/linux/ramips/patches-6.12/200-add-ralink-eth.patch b/target/linux/ramips/patches-6.12/200-add-ralink-eth.patch new file mode 100644 index 0000000000..da1c5aaa5e --- /dev/null +++ b/target/linux/ramips/patches-6.12/200-add-ralink-eth.patch @@ -0,0 +1,20 @@ +--- a/drivers/net/ethernet/Kconfig ++++ b/drivers/net/ethernet/Kconfig +@@ -175,6 +175,7 @@ source "drivers/net/ethernet/pensando/Kc + source "drivers/net/ethernet/qlogic/Kconfig" + source "drivers/net/ethernet/brocade/Kconfig" + source "drivers/net/ethernet/qualcomm/Kconfig" ++source "drivers/net/ethernet/ralink/Kconfig" + source "drivers/net/ethernet/rdc/Kconfig" + source "drivers/net/ethernet/realtek/Kconfig" + source "drivers/net/ethernet/renesas/Kconfig" +--- a/drivers/net/ethernet/Makefile ++++ b/drivers/net/ethernet/Makefile +@@ -78,6 +78,7 @@ obj-$(CONFIG_NET_VENDOR_PACKET_ENGINES) + obj-$(CONFIG_NET_VENDOR_PASEMI) += pasemi/ + obj-$(CONFIG_NET_VENDOR_QLOGIC) += qlogic/ + obj-$(CONFIG_NET_VENDOR_QUALCOMM) += qualcomm/ ++obj-$(CONFIG_NET_VENDOR_RALINK) += ralink/ + obj-$(CONFIG_NET_VENDOR_REALTEK) += realtek/ + obj-$(CONFIG_NET_VENDOR_RENESAS) += renesas/ + obj-$(CONFIG_NET_VENDOR_RDC) += rdc/ diff --git a/target/linux/ramips/patches-6.12/300-mt7620-export-chip-version-and-pkg.patch b/target/linux/ramips/patches-6.12/300-mt7620-export-chip-version-and-pkg.patch new file mode 100644 index 0000000000..6b80acec98 --- /dev/null +++ b/target/linux/ramips/patches-6.12/300-mt7620-export-chip-version-and-pkg.patch @@ -0,0 +1,19 @@ +--- a/arch/mips/include/asm/mach-ralink/mt7620.h ++++ b/arch/mips/include/asm/mach-ralink/mt7620.h +@@ -62,4 +62,16 @@ static inline int mt7620_get_eco(void) + return rt_sysc_r32(SYSC_REG_CHIP_REV) & CHIP_REV_ECO_MASK; + } + ++static inline int mt7620_get_chipver(void) ++{ ++ return (rt_sysc_r32(SYSC_REG_CHIP_REV) >> CHIP_REV_VER_SHIFT) & ++ CHIP_REV_VER_MASK; ++} ++ ++static inline int mt7620_get_pkg(void) ++{ ++ return (rt_sysc_r32(SYSC_REG_CHIP_REV) >> CHIP_REV_PKG_SHIFT) & ++ CHIP_REV_PKG_MASK; ++} ++ + #endif diff --git a/target/linux/ramips/patches-6.12/311-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch b/target/linux/ramips/patches-6.12/311-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch new file mode 100644 index 0000000000..b13d2b605b --- /dev/null +++ b/target/linux/ramips/patches-6.12/311-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch @@ -0,0 +1,114 @@ +From: John Crispin +Date: Sun, 14 Jul 2013 23:08:11 +0200 +Subject: [PATCH 1/2] MIPS: use set_mode() to enable/disable the cevt-r4k irq + +Signed-off-by: John Crispin +--- + arch/mips/kernel/cevt-r4k.c | 43 +++++++++++++++++++++++++++++++++++++ + drivers/clocksource/Kconfig | 5 +++++ + 2 files changed, 48 insertions(+) + +--- a/arch/mips/kernel/cevt-r4k.c ++++ b/arch/mips/kernel/cevt-r4k.c +@@ -16,6 +16,31 @@ + #include + #include + ++#ifdef CONFIG_CEVT_SYSTICK_QUIRK ++static int mips_state_oneshot(struct clock_event_device *evt) ++{ ++ unsigned long flags = IRQF_PERCPU | IRQF_TIMER | IRQF_SHARED; ++ if (!cp0_timer_irq_installed) { ++ cp0_timer_irq_installed = 1; ++ if (request_irq(evt->irq, c0_compare_interrupt, flags, "timer", ++ c0_compare_interrupt)) ++ pr_err("Failed to request irq %d (timer)\n", evt->irq); ++ } ++ ++ return 0; ++} ++ ++static int mips_state_shutdown(struct clock_event_device *evt) ++{ ++ if (cp0_timer_irq_installed) { ++ cp0_timer_irq_installed = 0; ++ free_irq(evt->irq, NULL); ++ } ++ ++ return 0; ++} ++#endif ++ + static int mips_next_event(unsigned long delta, + struct clock_event_device *evt) + { +@@ -292,7 +317,9 @@ core_initcall(r4k_register_cpufreq_notif + + int r4k_clockevent_init(void) + { ++#ifndef CONFIG_CEVT_SYSTICK_QUIRK + unsigned long flags = IRQF_PERCPU | IRQF_TIMER | IRQF_SHARED; ++#endif + unsigned int cpu = smp_processor_id(); + struct clock_event_device *cd; + unsigned int irq, min_delta; +@@ -303,6 +330,15 @@ int r4k_clockevent_init(void) + if (!c0_compare_int_usable()) + return -ENXIO; + ++#ifdef CONFIG_CEVT_SYSTICK_QUIRK ++ /* ++ * With vectored interrupts things are getting platform specific. ++ * get_c0_compare_int is a hook to allow a platform to return the ++ * interrupt number of its liking. ++ */ ++ irq = get_c0_compare_int(); ++#endif ++ + cd = &per_cpu(mips_clockevent_device, cpu); + + cd->name = "MIPS"; +@@ -314,11 +350,17 @@ int r4k_clockevent_init(void) + + cd->rating = 300; + cd->cpumask = cpumask_of(cpu); ++#ifdef CONFIG_CEVT_SYSTICK_QUIRK ++ cd->irq = irq; ++ cd->set_state_shutdown = mips_state_shutdown; ++ cd->set_state_oneshot = mips_state_oneshot; ++#endif + cd->set_next_event = mips_next_event; + cd->event_handler = mips_event_handler; + + clockevents_config_and_register(cd, mips_hpt_frequency, min_delta, 0x7fffffff); + ++#ifndef CONFIG_CEVT_SYSTICK_QUIRK + if (cp0_timer_irq_installed) + return 0; + +@@ -334,6 +376,7 @@ int r4k_clockevent_init(void) + if (request_irq(irq, c0_compare_interrupt, flags, "timer", + c0_compare_interrupt)) + pr_err("Failed to request irq %d (timer)\n", irq); ++#endif + + return 0; + } +--- a/drivers/clocksource/Kconfig ++++ b/drivers/clocksource/Kconfig +@@ -754,10 +754,15 @@ config EP93XX_TIMER + help + Enables support for the Cirrus Logic timer block + EP93XX. ++ ++config CEVT_SYSTICK_QUIRK ++ bool ++ default n + + config RALINK_TIMER + bool "Ralink System Tick Counter" + depends on SOC_RT305X || SOC_MT7620 || COMPILE_TEST ++ select CEVT_SYSTICK_QUIRK + select CLKSRC_MMIO + select TIMER_OF + help diff --git a/target/linux/ramips/patches-6.12/312-MIPS-ralink-add-cpu-frequency-scaling.patch b/target/linux/ramips/patches-6.12/312-MIPS-ralink-add-cpu-frequency-scaling.patch new file mode 100644 index 0000000000..6acdfff837 --- /dev/null +++ b/target/linux/ramips/patches-6.12/312-MIPS-ralink-add-cpu-frequency-scaling.patch @@ -0,0 +1,202 @@ +From: John Crispin +Date: Sun, 28 Jul 2013 16:26:41 +0200 +Subject: [PATCH 2/2] MIPS: ralink: add cpu frequency scaling + +This feature will break udelay() and cause the delay loop to have longer delays +when the frequency is scaled causing a performance hit. + +Signed-off-by: John Crispin +--- + drivers/clocksource/timer-ralink.c | 117 ++++++++++++++++++++++------- + 1 file changed, 89 insertions(+), 28 deletions(-) + +--- a/drivers/clocksource/timer-ralink.c ++++ b/drivers/clocksource/timer-ralink.c +@@ -5,6 +5,7 @@ + * Copyright (C) 2013 by John Crispin + */ + ++#include + #include + #include + #include +@@ -26,6 +27,10 @@ + /* enable the counter */ + #define CFG_CNT_EN 0x1 + ++/* mt7620 frequency scaling defines */ ++#define CLK_LUT_CFG 0x40 ++#define SLEEP_EN BIT(31) ++ + struct systick_device { + void __iomem *membase; + struct clock_event_device dev; +@@ -33,21 +38,53 @@ struct systick_device { + int freq_scale; + }; + ++static void (*systick_freq_scaling)(struct systick_device *sdev, int status); ++ + static int systick_set_oneshot(struct clock_event_device *evt); + static int systick_shutdown(struct clock_event_device *evt); + ++static inline void mt7620_freq_scaling(struct systick_device *sdev, int status) ++{ ++ if (sdev->freq_scale == status) ++ return; ++ ++ sdev->freq_scale = status; ++ ++ pr_info("%s: %s autosleep mode\n", sdev->dev.name, ++ (status) ? ("enable") : ("disable")); ++ if (status) ++ rt_sysc_w32(rt_sysc_r32(CLK_LUT_CFG) | SLEEP_EN, CLK_LUT_CFG); ++ else ++ rt_sysc_w32(rt_sysc_r32(CLK_LUT_CFG) & ~SLEEP_EN, CLK_LUT_CFG); ++} ++ ++static inline unsigned int read_count(struct systick_device *sdev) ++{ ++ return ioread32(sdev->membase + SYSTICK_COUNT); ++} ++ ++static inline unsigned int read_compare(struct systick_device *sdev) ++{ ++ return ioread32(sdev->membase + SYSTICK_COMPARE); ++} ++ ++static inline void write_compare(struct systick_device *sdev, unsigned int val) ++{ ++ iowrite32(val, sdev->membase + SYSTICK_COMPARE); ++} ++ + static int systick_next_event(unsigned long delta, + struct clock_event_device *evt) + { + struct systick_device *sdev; +- u32 count; ++ int res; + + sdev = container_of(evt, struct systick_device, dev); +- count = ioread32(sdev->membase + SYSTICK_COUNT); +- count = (count + delta) % SYSTICK_FREQ; +- iowrite32(count, sdev->membase + SYSTICK_COMPARE); ++ delta += read_count(sdev); ++ write_compare(sdev, delta); ++ res = ((int)(read_count(sdev) - delta) >= 0) ? -ETIME : 0; + +- return 0; ++ return res; + } + + static void systick_event_handler(struct clock_event_device *dev) +@@ -57,20 +94,25 @@ static void systick_event_handler(struct + + static irqreturn_t systick_interrupt(int irq, void *dev_id) + { +- struct clock_event_device *dev = (struct clock_event_device *)dev_id; ++ int ret = 0; ++ struct clock_event_device *cdev; ++ struct systick_device *sdev; + +- dev->event_handler(dev); ++ if (read_c0_cause() & STATUSF_IP7) { ++ cdev = (struct clock_event_device *)dev_id; ++ sdev = container_of(cdev, struct systick_device, dev); ++ ++ /* Clear Count/Compare Interrupt */ ++ write_compare(sdev, read_compare(sdev)); ++ cdev->event_handler(cdev); ++ ret = 1; ++ } + +- return IRQ_HANDLED; ++ return IRQ_RETVAL(ret); + } + + static struct systick_device systick = { + .dev = { +- /* +- * cevt-r4k uses 300, make sure systick +- * gets used if available +- */ +- .rating = 310, + .features = CLOCK_EVT_FEAT_ONESHOT, + .set_next_event = systick_next_event, + .set_state_shutdown = systick_shutdown, +@@ -88,7 +130,13 @@ static int systick_shutdown(struct clock + if (sdev->irq_requested) + free_irq(systick.dev.irq, &systick.dev); + sdev->irq_requested = 0; +- iowrite32(0, systick.membase + SYSTICK_CONFIG); ++ iowrite32(CFG_CNT_EN, systick.membase + SYSTICK_CONFIG); ++ ++ if (systick_freq_scaling) ++ systick_freq_scaling(sdev, 0); ++ ++ if (systick_freq_scaling) ++ systick_freq_scaling(sdev, 1); + + return 0; + } +@@ -113,33 +161,46 @@ static int systick_set_oneshot(struct cl + return 0; + } + ++static const struct of_device_id systick_match[] = { ++ { .compatible = "ralink,mt7620a-systick", .data = mt7620_freq_scaling}, ++ {}, ++}; ++ + static int __init ralink_systick_init(struct device_node *np) + { +- int ret; ++ const struct of_device_id *match; ++ int rating = 200; + + systick.membase = of_iomap(np, 0); + if (!systick.membase) + return -ENXIO; + +- systick.dev.name = np->name; +- clockevents_calc_mult_shift(&systick.dev, SYSTICK_FREQ, 60); +- systick.dev.max_delta_ns = clockevent_delta2ns(0x7fff, &systick.dev); +- systick.dev.max_delta_ticks = 0x7fff; +- systick.dev.min_delta_ns = clockevent_delta2ns(0x3, &systick.dev); +- systick.dev.min_delta_ticks = 0x3; ++ match = of_match_node(systick_match, np); ++ if (match) { ++ systick_freq_scaling = match->data; ++ /* ++ * cevt-r4k uses 300, make sure systick ++ * gets used if available ++ */ ++ rating = 310; ++ } ++ ++ /* enable counter than register clock source */ ++ iowrite32(CFG_CNT_EN, systick.membase + SYSTICK_CONFIG); ++ clocksource_mmio_init(systick.membase + SYSTICK_COUNT, np->name, ++ SYSTICK_FREQ, rating, 16, clocksource_mmio_readl_up); ++ ++ /* register clock event */ + systick.dev.irq = irq_of_parse_and_map(np, 0); + if (!systick.dev.irq) { + pr_err("%pOFn: request_irq failed", np); + return -EINVAL; + } + +- ret = clocksource_mmio_init(systick.membase + SYSTICK_COUNT, np->name, +- SYSTICK_FREQ, 301, 16, +- clocksource_mmio_readl_up); +- if (ret) +- return ret; +- +- clockevents_register_device(&systick.dev); ++ systick.dev.name = np->name; ++ systick.dev.rating = rating; ++ systick.dev.cpumask = cpumask_of(0); ++ clockevents_config_and_register(&systick.dev, SYSTICK_FREQ, 0x3, 0x7fff); + + pr_info("%pOFn: running - mult: %d, shift: %d\n", + np, systick.dev.mult, systick.dev.shift); diff --git a/target/linux/ramips/patches-6.12/314-MIPS-add-bootargs-override-property.patch b/target/linux/ramips/patches-6.12/314-MIPS-add-bootargs-override-property.patch new file mode 100644 index 0000000000..fa03d3a14b --- /dev/null +++ b/target/linux/ramips/patches-6.12/314-MIPS-add-bootargs-override-property.patch @@ -0,0 +1,63 @@ +From f15d27f9c90ede4b16eb37f9ae573ef81c2b6996 Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Thu, 31 Dec 2020 18:49:12 +0100 +Subject: [PATCH] MIPS: add bootargs-override property + +Add support for the bootargs-override property to the chosen node +similar to the one used on ipq806x or mpc85xx. + +This is necessary, as the U-Boot used on some boards, notably the +Ubiquiti UniFi 6 Lite, overwrite the bootargs property of the chosen +node leading to a kernel panic when loading OpenWrt. + +Signed-off-by: David Bauer +--- + arch/mips/kernel/setup.c | 30 ++++++++++++++++++++++++++++++ + 1 file changed, 30 insertions(+) + +--- a/arch/mips/kernel/setup.c ++++ b/arch/mips/kernel/setup.c +@@ -556,8 +556,28 @@ static int __init bootcmdline_scan_chose + + #endif /* CONFIG_OF_EARLY_FLATTREE */ + ++static int __init bootcmdline_scan_chosen_override(unsigned long node, const char *uname, ++ int depth, void *data) ++{ ++ bool *dt_bootargs = data; ++ const char *p; ++ int l; ++ ++ if (depth != 1 || !data || strcmp(uname, "chosen") != 0) ++ return 0; ++ ++ p = of_get_flat_dt_prop(node, "bootargs-override", &l); ++ if (p != NULL && l > 0) { ++ strscpy(boot_command_line, p, COMMAND_LINE_SIZE); ++ *dt_bootargs = true; ++ } ++ ++ return 1; ++} ++ + static void __init bootcmdline_init(void) + { ++ bool dt_bootargs_override = false; + bool dt_bootargs = false; + + /* +@@ -571,6 +591,14 @@ static void __init bootcmdline_init(void + } + + /* ++ * If bootargs-override in the chosen node is set, use this as the ++ * command line ++ */ ++ of_scan_flat_dt(bootcmdline_scan_chosen_override, &dt_bootargs_override); ++ if (dt_bootargs_override) ++ return; ++ ++ /* + * If the user specified a built-in command line & + * MIPS_CMDLINE_BUILTIN_EXTEND, then the built-in command line is + * prepended to arguments from the bootloader or DT so we'll copy them diff --git a/target/linux/ramips/patches-6.12/315-owrt-hack-fix-mt7688-cache-issue.patch b/target/linux/ramips/patches-6.12/315-owrt-hack-fix-mt7688-cache-issue.patch new file mode 100644 index 0000000000..4bf5f6c33a --- /dev/null +++ b/target/linux/ramips/patches-6.12/315-owrt-hack-fix-mt7688-cache-issue.patch @@ -0,0 +1,28 @@ +From 5ede027f6c4a57ed25da872420508b7f1168b36b Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Mon, 7 Dec 2015 17:15:32 +0100 +Subject: [PATCH 13/53] owrt: hack: fix mt7688 cache issue + +Signed-off-by: John Crispin +--- + arch/mips/kernel/setup.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/mips/kernel/setup.c ++++ b/arch/mips/kernel/setup.c +@@ -698,7 +698,6 @@ static void __init arch_mem_init(char ** + mips_reserve_vmcore(); + + mips_parse_crashkernel(); +- device_tree_init(); + + /* + * In order to reduce the possibility of kernel panic when failed to +@@ -828,6 +827,7 @@ void __init setup_arch(char **cmdline_p) + + cpu_cache_init(); + paging_init(); ++ device_tree_init(); + + memblock_dump_all(); + diff --git a/target/linux/ramips/patches-6.12/316-arch-mips-do-not-select-illegal-access-driver-by-def.patch b/target/linux/ramips/patches-6.12/316-arch-mips-do-not-select-illegal-access-driver-by-def.patch new file mode 100644 index 0000000000..8568041670 --- /dev/null +++ b/target/linux/ramips/patches-6.12/316-arch-mips-do-not-select-illegal-access-driver-by-def.patch @@ -0,0 +1,25 @@ +From 9e6ce539092a1dd605a20bf73c655a9de58d8641 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Mon, 7 Dec 2015 17:18:05 +0100 +Subject: [PATCH 15/53] arch: mips: do not select illegal access driver by + default + +Signed-off-by: John Crispin +--- + arch/mips/ralink/Kconfig | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/arch/mips/ralink/Kconfig ++++ b/arch/mips/ralink/Kconfig +@@ -2,9 +2,9 @@ + if RALINK + + config RALINK_ILL_ACC +- bool ++ bool "illegal access irq" + depends on SOC_RT305X +- default y ++ default n + + config IRQ_INTC + bool diff --git a/target/linux/ramips/patches-6.12/320-MIPS-add-support-for-buggy-MT7621S-core-detection.patch b/target/linux/ramips/patches-6.12/320-MIPS-add-support-for-buggy-MT7621S-core-detection.patch new file mode 100644 index 0000000000..b1580c4e90 --- /dev/null +++ b/target/linux/ramips/patches-6.12/320-MIPS-add-support-for-buggy-MT7621S-core-detection.patch @@ -0,0 +1,63 @@ +From 6decd1aad15f56b169217789630a0098b496de0e Mon Sep 17 00:00:00 2001 +From: Ilya Lipnitskiy +Date: Wed, 7 Apr 2021 13:07:38 -0700 +Subject: [PATCH] MIPS: add support for buggy MT7621S core detection + +Most MT7621 SoCs have 2 cores, which is detected and supported properly +by CPS. + +Unfortunately, MT7621 SoC has a less common S variant with only one core. +On MT7621S, GCR_CONFIG still reports 2 cores, which leads to hangs when +starting SMP. CPULAUNCH registers can be used in that case to detect the +absence of the second core and override the GCR_CONFIG PCORES field. + +Rework a long-standing OpenWrt patch to override the value of +mips_cps_numcores on single-core MT7621 systems. + +Tested on a dual-core MT7621 device (Ubiquiti ER-X) and a single-core +MT7621 device (Netgear R6220). + +Original 4.14 OpenWrt patch: +Link: https://git.openwrt.org/?p=openwrt/openwrt.git;a=commitdiff;h=4cdbc90a376dd0555201c1434a2081e055e9ceb7 +Current 5.10 OpenWrt patch: +Link: https://git.openwrt.org/?p=openwrt/openwrt.git;a=blob;f=target/linux/ramips/patches-5.10/320-mt7621-core-detect-hack.patch;h=c63f0f4c1ec742e24d8480e80553863744b58f6a;hb=10267e17299806f9885d086147878f6c492cb904 + +Suggested-by: Felix Fietkau +Signed-off-by: Ilya Lipnitskiy +Signed-off-by: Thomas Bogendoerfer +--- + +The proposed detection method was based on reading the LAUNCH_FREADY core flag. +However, this method only works before the cores are launched. +For this reason, the core number detection method has been changed to a simpler one. +For mt6721s the 17th revision bit is zero, hence we know that it is this chip, +so the number of cores is 1. + +Co-authored-by: Shiji Yang +Signed-off-by: Mieczyslaw Nalewaj +--- + arch/mips/include/asm/mips-cps.h | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/arch/mips/include/asm/mips-cps.h ++++ b/arch/mips/include/asm/mips-cps.h +@@ -12,6 +12,8 @@ + #include + #include + ++#include ++ + extern unsigned long __cps_access_bad_size(void) + __compiletime_error("Bad size for CPS accessor"); + +@@ -166,6 +168,10 @@ static inline unsigned int mips_cps_numc + if (!mips_cm_present()) + return 0; + ++ if (IS_ENABLED(CONFIG_SOC_MT7621) && ++ !FIELD_GET(0x20000, __raw_readl(MT7621_SYSC_BASE + SYSC_REG_CHIP_REV))) ++ return 1; ++ + /* Add one before masking to handle 0xff indicating no cores */ + return FIELD_GET(CM_GCR_CONFIG_PCORES, + mips_cps_cluster_config(cluster) + 1); diff --git a/target/linux/ramips/patches-6.12/324-mt7621-perfctr-fix.patch b/target/linux/ramips/patches-6.12/324-mt7621-perfctr-fix.patch new file mode 100644 index 0000000000..0aa1884077 --- /dev/null +++ b/target/linux/ramips/patches-6.12/324-mt7621-perfctr-fix.patch @@ -0,0 +1,15 @@ +--- a/arch/mips/ralink/irq-gic.c ++++ b/arch/mips/ralink/irq-gic.c +@@ -14,6 +14,12 @@ + + int get_c0_perfcount_int(void) + { ++ /* ++ * Performance counter events are routed through GIC. ++ * Prevent them from firing on CPU IRQ7 as well ++ */ ++ clear_c0_status(IE_SW0 << 7); ++ + return gic_get_c0_perfcount_int(); + } + EXPORT_SYMBOL_GPL(get_c0_perfcount_int); diff --git a/target/linux/ramips/patches-6.12/330-mt7620-avoid-direct-jal-in-random-helper.patch b/target/linux/ramips/patches-6.12/330-mt7620-avoid-direct-jal-in-random-helper.patch new file mode 100644 index 0000000000..c65b417f91 --- /dev/null +++ b/target/linux/ramips/patches-6.12/330-mt7620-avoid-direct-jal-in-random-helper.patch @@ -0,0 +1,72 @@ +From: Mieczyslaw Nalewaj +Date: Sun, 26 Oct 2025 10:36:02 +0100 +Subject: [PATCH] mt7620: avoid direct jal imm26 in random helper + +This patch forces an indirect call (via a function pointer) on the mt7620 +platform when calling the small random helpers used by the constant-folding +fast path of get_random_u32_below(). That avoids embedding a 26-bit immediate +jump target in a direct `jal` instruction, which on affected platforms can +lead to sporadic incorrect jump targets, intermittent oopses/crashes/hangs, +corrupted backtraces, or "half-written" instructions under some circumstances. + +The change is targetted and conservative: it only alters code generation on +CONFIG_NET_RALINK_MT7620 builds and does not change the algorithmic behaviour +of get_random_u32_below(). + +Signed-off-by: Mieczyslaw Nalewaj +--- + a/include/linux/random.h | 36 ++++++++++++++++++++++++++++++++++++---- + 1 file changed, 32 insertions(+), 4 deletions(-) + +--- a/include/linux/random.h ++++ b/include/linux/random.h +@@ -73,17 +73,45 @@ static inline u32 get_random_u32_below(u + BUILD_BUG_ON_MSG(!ceil, "get_random_u32_below() must take ceil > 0"); + if (ceil <= 1) + return 0; +- for (;;) { +- if (ceil <= 1U << 8) { ++ if (ceil <= 1U << 8) { ++#ifdef CONFIG_NET_RALINK_MT7620 ++ typedef u8 (*getrnd_t)(void); ++ volatile getrnd_t rnd_fn = (getrnd_t)get_random_u8; ++#endif ++ for (;;) { ++#ifdef CONFIG_NET_RALINK_MT7620 ++ u32 mult = ceil * rnd_fn(); ++#else + u32 mult = ceil * get_random_u8(); ++#endif + if (likely(is_power_of_2(ceil) || (u8)mult >= (1U << 8) % ceil)) + return mult >> 8; +- } else if (ceil <= 1U << 16) { ++ } ++ } else if (ceil <= 1U << 16) { ++#ifdef CONFIG_NET_RALINK_MT7620 ++ typedef u16 (*getrnd_t)(void); ++ volatile getrnd_t rnd_fn = (getrnd_t)get_random_u16; ++#endif ++ for (;;) { ++#ifdef CONFIG_NET_RALINK_MT7620 ++ u32 mult = ceil * rnd_fn(); ++#else + u32 mult = ceil * get_random_u16(); ++#endif + if (likely(is_power_of_2(ceil) || (u16)mult >= (1U << 16) % ceil)) + return mult >> 16; +- } else { ++ } ++ } else { ++#ifdef CONFIG_NET_RALINK_MT7620 ++ typedef u32 (*getrnd_t)(void); ++ volatile getrnd_t rnd_fn = (getrnd_t)get_random_u32; ++#endif ++ for (;;) { ++#ifdef CONFIG_NET_RALINK_MT7620 ++ u64 mult = (u64)ceil * rnd_fn(); ++#else + u64 mult = (u64)ceil * get_random_u32(); ++#endif + if (likely(is_power_of_2(ceil) || (u32)mult >= -ceil % ceil)) + return mult >> 32; + } diff --git a/target/linux/ramips/patches-6.12/331-mt7620-avoid-direct-jal-in-resume_user_mode_work.patch b/target/linux/ramips/patches-6.12/331-mt7620-avoid-direct-jal-in-resume_user_mode_work.patch new file mode 100644 index 0000000000..d501734bf8 --- /dev/null +++ b/target/linux/ramips/patches-6.12/331-mt7620-avoid-direct-jal-in-resume_user_mode_work.patch @@ -0,0 +1,35 @@ +From: Mieczyslaw Nalewaj +Date: Tue, 28 Oct 2025 22:50:41 +0100 +Subject: [PATCH] mt7620: avoid direct jal imm26 in resume_user_mode_work + +This patch forces an indirect call (via a function pointer) on the mt7620 +platform when invoking blkcg_maybe_throttle_current() from +resume_user_mode_work(). Avoiding a direct `jal` with a 26-bit immediate +jump target prevents sporadic incorrect jump targets / intermittent oopses, +crashes or hanging behavior that can appear on affected platforms. + +The change is targeted: it only alters the call site when CONFIG_NET_RALINK_MT7620 +is enabled and does not change the functional behaviour of resume_user_mode_work(). + +Signed-off-by: Mieczyslaw Nalewaj + +--- + a/include/linux/resume_user_mode.h | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +--- a/include/linux/resume_user_mode.h ++++ b/include/linux/resume_user_mode.h +@@ -57,7 +57,13 @@ static inline void resume_user_mode_work + #endif + + mem_cgroup_handle_over_high(GFP_KERNEL); ++#ifdef CONFIG_NET_RALINK_MT7620 ++ typedef void (*bmtc_t)(void); ++ volatile bmtc_t bmtc_fn = (bmtc_t)blkcg_maybe_throttle_current; ++ bmtc_fn(); ++#else + blkcg_maybe_throttle_current(); ++#endif + + rseq_handle_notify_resume(NULL, regs); + } diff --git a/target/linux/ramips/patches-6.12/332-mt7620-conditional-stack-align.patch b/target/linux/ramips/patches-6.12/332-mt7620-conditional-stack-align.patch new file mode 100644 index 0000000000..37b2b19657 --- /dev/null +++ b/target/linux/ramips/patches-6.12/332-mt7620-conditional-stack-align.patch @@ -0,0 +1,30 @@ +From: Mieczyslaw Nalewaj +Date: Sun, 26 Oct 2025 10:36:02 +0100 +Subject: [PATCH] mt7620: conditional stack align + +This patch avoids applying arch_align_stack() and PAGE_ALIGN() in the exec +path on CONFIG_NET_RALINK_MT7620 builds. Many ports (including mt7620) +implement only micro-randomization inside arch_align_stack() (random offset +< PAGE_SIZE and then align-down to small alignment). Callers that immediately +apply PAGE_ALIGN() will round that micro-offset back to the original page +boundary, so invoking arch_align_stack() then PAGE_ALIGN() is pointless and +can be avoided on the affected platform. + +Signed-off-by: Mieczyslaw Nalewaj +--- + a/fs/exec.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/fs/exec.c ++++ b/fs/exec.c +@@ -750,8 +750,10 @@ int setup_arg_pages(struct linux_binprm + mm->arg_start = bprm->p - stack_shift; + bprm->p = vma->vm_end - stack_shift; + #else ++#ifndef CONFIG_NET_RALINK_MT7620 + stack_top = arch_align_stack(stack_top); + stack_top = PAGE_ALIGN(stack_top); ++#endif + + if (unlikely(stack_top < mmap_min_addr) || + unlikely(vma->vm_end - vma->vm_start >= stack_top - mmap_min_addr)) diff --git a/target/linux/ramips/patches-6.12/400-mtd-cfi-cmdset-0002-force-word-write.patch b/target/linux/ramips/patches-6.12/400-mtd-cfi-cmdset-0002-force-word-write.patch new file mode 100644 index 0000000000..a1b861e412 --- /dev/null +++ b/target/linux/ramips/patches-6.12/400-mtd-cfi-cmdset-0002-force-word-write.patch @@ -0,0 +1,20 @@ +From ee9081b2726a5ca8cde5497afdc5425e21ff8f8b Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Mon, 15 Jul 2013 00:39:21 +0200 +Subject: [PATCH 37/53] mtd: cfi cmdset 0002 force word write + +--- + drivers/mtd/chips/cfi_cmdset_0002.c | 9 +++++++-- + 1 file changed, 7 insertions(+), 2 deletions(-) + +--- a/drivers/mtd/chips/cfi_cmdset_0002.c ++++ b/drivers/mtd/chips/cfi_cmdset_0002.c +@@ -38,7 +38,7 @@ + #include + + #define AMD_BOOTLOC_BUG +-#define FORCE_WORD_WRITE 0 ++#define FORCE_WORD_WRITE 1 + + #define MAX_RETRIES 3 + diff --git a/target/linux/ramips/patches-6.12/405-mtd-spi-nor-Add-support-for-BoHong-bh25q128as.patch b/target/linux/ramips/patches-6.12/405-mtd-spi-nor-Add-support-for-BoHong-bh25q128as.patch new file mode 100644 index 0000000000..2d780878be --- /dev/null +++ b/target/linux/ramips/patches-6.12/405-mtd-spi-nor-Add-support-for-BoHong-bh25q128as.patch @@ -0,0 +1,79 @@ +From 52d14545d2fc276b1bf9ccf48d4612fab6edfb6a Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Thu, 6 May 2021 17:49:55 +0200 +Subject: [PATCH] mtd: spi-nor: Add support for BoHong bh25q128as + +Add MTD support for the BoHong bh25q128as SPI NOR chip. +The chip has 16MB of total capacity, divided into a total of 256 +sectors, each 64KB sized. The chip also supports 4KB sectors. +Additionally, it supports dual and quad read modes. + +Functionality was verified on an Tenbay WR1800K / MTK MT7621 board. + +Signed-off-by: David Bauer +--- + drivers/mtd/spi-nor/Makefile | 1 + + drivers/mtd/spi-nor/bohong.c | 21 +++++++++++++++++++++ + drivers/mtd/spi-nor/core.c | 1 + + drivers/mtd/spi-nor/core.h | 1 + + 4 files changed, 24 insertions(+) + create mode 100644 drivers/mtd/spi-nor/bohong.c + +--- a/drivers/mtd/spi-nor/Makefile ++++ b/drivers/mtd/spi-nor/Makefile +@@ -2,6 +2,7 @@ + + spi-nor-objs := core.o sfdp.o swp.o otp.o sysfs.o + spi-nor-objs += atmel.o ++spi-nor-objs += bohong.o + spi-nor-objs += eon.o + spi-nor-objs += esmt.o + spi-nor-objs += everspin.o +--- /dev/null ++++ b/drivers/mtd/spi-nor/bohong.c +@@ -0,0 +1,25 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2005, Intec Automation Inc. ++ * Copyright (C) 2014, Freescale Semiconductor, Inc. ++ */ ++ ++#include ++ ++#include "core.h" ++ ++static const struct flash_info bohong_parts[] = { ++ /* BoHong Microelectronics */ ++ { ++ .id = SNOR_ID(0x68, 0x40, 0x18), ++ .name = "bh25q128s", ++ .size = SZ_16M, ++ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, ++ }, ++}; ++ ++const struct spi_nor_manufacturer spi_nor_bohong = { ++ .name = "bohong", ++ .parts = bohong_parts, ++ .nparts = ARRAY_SIZE(bohong_parts), ++}; +--- a/drivers/mtd/spi-nor/core.c ++++ b/drivers/mtd/spi-nor/core.c +@@ -1966,6 +1966,7 @@ int spi_nor_sr2_bit7_quad_enable(struct + + static const struct spi_nor_manufacturer *manufacturers[] = { + &spi_nor_atmel, ++ &spi_nor_bohong, + &spi_nor_eon, + &spi_nor_esmt, + &spi_nor_everspin, +--- a/drivers/mtd/spi-nor/core.h ++++ b/drivers/mtd/spi-nor/core.h +@@ -580,6 +580,7 @@ struct sfdp { + + /* Manufacturer drivers. */ + extern const struct spi_nor_manufacturer spi_nor_atmel; ++extern const struct spi_nor_manufacturer spi_nor_bohong; + extern const struct spi_nor_manufacturer spi_nor_eon; + extern const struct spi_nor_manufacturer spi_nor_esmt; + extern const struct spi_nor_manufacturer spi_nor_everspin; diff --git a/target/linux/ramips/patches-6.12/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch b/target/linux/ramips/patches-6.12/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch new file mode 100644 index 0000000000..0183199348 --- /dev/null +++ b/target/linux/ramips/patches-6.12/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch @@ -0,0 +1,47 @@ +From e84e2430ee0e483842b4ff013ae8a6e7e2fa2734 Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Wed, 1 Apr 2020 02:07:58 +0800 +Subject: [PATCH 1/2] mtd: rawnand: add driver support for MT7621 nand + flash controller + +This patch adds NAND flash controller driver for MediaTek MT7621 SoC. + +The NAND flash controller is similar with controllers described in +mtk_nand.c, except that the controller from MT7621 doesn't support DMA +transmission, and some registers' offset and fields are different. + +Signed-off-by: Weijie Gao +--- + drivers/mtd/nand/raw/Kconfig | 8 + + drivers/mtd/nand/raw/Makefile | 1 + + drivers/mtd/nand/raw/mt7621_nand.c | 1348 ++++++++++++++++++++++++++++++++++++ + 3 files changed, 1357 insertions(+) + create mode 100644 drivers/mtd/nand/raw/mt7621_nand.c + +--- a/drivers/mtd/nand/raw/Kconfig ++++ b/drivers/mtd/nand/raw/Kconfig +@@ -337,6 +337,14 @@ config MTD_NAND_QCOM + Enables support for NAND flash chips on SoCs containing the EBI2 NAND + controller. This controller is found on IPQ806x SoC. + ++config MTD_NAND_MT7621 ++ tristate "MT7621 NAND controller" ++ depends on SOC_MT7621 || COMPILE_TEST ++ depends on HAS_IOMEM ++ help ++ Enables support for NAND controller on MT7621 SoC. ++ This driver uses PIO mode for data transmission instead of DMA mode. ++ + config MTD_NAND_MTK + tristate "MTK NAND controller" + depends on MTD_NAND_ECC_MEDIATEK +--- a/drivers/mtd/nand/raw/Makefile ++++ b/drivers/mtd/nand/raw/Makefile +@@ -47,6 +47,7 @@ obj-$(CONFIG_MTD_NAND_SUNXI) += sunxi_n + obj-$(CONFIG_MTD_NAND_HISI504) += hisi504_nand.o + obj-$(CONFIG_MTD_NAND_BRCMNAND) += brcmnand/ + obj-$(CONFIG_MTD_NAND_QCOM) += qcom_nandc.o ++obj-$(CONFIG_MTD_NAND_MT7621) += mt7621_nand.o + obj-$(CONFIG_MTD_NAND_MTK) += mtk_nand.o + obj-$(CONFIG_MTD_NAND_MXIC) += mxic_nand.o + obj-$(CONFIG_MTD_NAND_TEGRA) += tegra_nand.o diff --git a/target/linux/ramips/patches-6.12/411-dt-bindings-add-documentation-for-mt7621-nand-driver.patch b/target/linux/ramips/patches-6.12/411-dt-bindings-add-documentation-for-mt7621-nand-driver.patch new file mode 100644 index 0000000000..3d122c10c0 --- /dev/null +++ b/target/linux/ramips/patches-6.12/411-dt-bindings-add-documentation-for-mt7621-nand-driver.patch @@ -0,0 +1,85 @@ +From 3d5f4da8296b23eb3abf8b13122b0d06a215e79c Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Wed, 1 Apr 2020 02:07:59 +0800 +Subject: [PATCH 2/2] dt-bindings: add documentation for mt7621-nand driver + +This patch adds documentation for MediaTek MT7621 NAND flash controller +driver. + +Signed-off-by: Weijie Gao +--- + .../bindings/mtd/mediatek,mt7621-nfc.yaml | 68 ++++++++++++++++++++++ + 1 file changed, 68 insertions(+) + create mode 100644 Documentation/devicetree/bindings/mtd/mediatek,mt7621-nfc.yaml + +--- /dev/null ++++ b/Documentation/devicetree/bindings/mtd/mediatek,mt7621-nfc.yaml +@@ -0,0 +1,68 @@ ++# SPDX-License-Identifier: GPL-2.0 ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/mtd/mediatek,mt7621-nfc.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: MediaTek MT7621 SoC NAND Flash Controller (NFC) DT binding ++ ++maintainers: ++ - Weijie Gao ++ ++description: | ++ This driver uses a single node to describe both NAND Flash controller ++ interface (NFI) and ECC engine for MT7621 SoC. ++ MT7621 supports only one chip select. ++ ++properties: ++ "#address-cells": false ++ "#size-cells": false ++ ++ compatible: ++ enum: ++ - mediatek,mt7621-nfc ++ ++ reg: ++ items: ++ - description: Register base of NFI core ++ - description: Register base of ECC engine ++ ++ reg-names: ++ items: ++ - const: nfi ++ - const: ecc ++ ++ clocks: ++ items: ++ - description: Source clock for NFI core, fixed 125MHz ++ ++ clock-names: ++ items: ++ - const: nfi_clk ++ ++required: ++ - compatible ++ - reg ++ - reg-names ++ - clocks ++ - clock-names ++ ++examples: ++ - | ++ nficlock: nficlock { ++ #clock-cells = <0>; ++ compatible = "fixed-clock"; ++ ++ clock-frequency = <125000000>; ++ }; ++ ++ nand@1e003000 { ++ compatible = "mediatek,mt7621-nfc"; ++ ++ reg = <0x1e003000 0x800 ++ 0x1e003800 0x800>; ++ reg-names = "nfi", "ecc"; ++ ++ clocks = <&nficlock>; ++ clock-names = "nfi_clk"; ++ }; diff --git a/target/linux/ramips/patches-6.12/720-NET-no-auto-carrier-off-support.patch b/target/linux/ramips/patches-6.12/720-NET-no-auto-carrier-off-support.patch new file mode 100644 index 0000000000..f5f9c8e3a4 --- /dev/null +++ b/target/linux/ramips/patches-6.12/720-NET-no-auto-carrier-off-support.patch @@ -0,0 +1,31 @@ +From: John Crispin +Date: Sun, 27 Jul 2014 09:38:50 +0100 +Subject: [PATCH] NET: multi phy support + +Signed-off-by: John Crispin +--- + drivers/net/phy/phy_device.c | 2 +- + include/linux/phy.h | 1 + + 2 files changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/net/phy/phy_device.c ++++ b/drivers/net/phy/phy_device.c +@@ -295,7 +295,7 @@ static void phy_link_change(struct phy_d + + if (up) + netif_carrier_on(netdev); +- else ++ else if (!phydev->no_auto_carrier_off) + netif_carrier_off(netdev); + phydev->adjust_link(netdev); + if (phydev->mii_ts && phydev->mii_ts->link_state) +--- a/include/linux/phy.h ++++ b/include/linux/phy.h +@@ -685,6 +685,7 @@ struct phy_device { + unsigned downshifted_rate:1; + unsigned is_on_sfp_module:1; + unsigned mac_managed_pm:1; ++ unsigned no_auto_carrier_off:1; + unsigned wol_enabled:1; + + unsigned autoneg:1; diff --git a/target/linux/ramips/patches-6.12/800-dmaengine-mediatek-add-HSDMA-support-for-mt7621.patch b/target/linux/ramips/patches-6.12/800-dmaengine-mediatek-add-HSDMA-support-for-mt7621.patch new file mode 100644 index 0000000000..a793011223 --- /dev/null +++ b/target/linux/ramips/patches-6.12/800-dmaengine-mediatek-add-HSDMA-support-for-mt7621.patch @@ -0,0 +1,37 @@ +From d94fc5ce1dc395747c3934ecffcdec0396583755 Mon Sep 17 00:00:00 2001 +From: Nick Hainke +Date: Fri, 26 May 2023 19:46:33 +0200 +Subject: [PATCH] dmaengine: mediatek: add HSDMA support for mt7621 + +Commit 87dd67f496f7 ("staging: mt7621-dma: remove driver from tree") +removed the mt7621-dma driver. Move the driver from staging to the +folder "drivers/dma/mediatek" containing already other mediatek dma +driver implementations and maintain it downstream in OpenWrt. + +This patch will not be sent to upstream linux. It is just a workaround. + +Signed-off-by: Nick Hainke +--- + drivers/dma/mediatek/Kconfig | 6 ++++++ + drivers/dma/mediatek/Makefile | 1 + + 2 files changed, 7 insertions(+) + +--- a/drivers/dma/mediatek/Kconfig ++++ b/drivers/dma/mediatek/Kconfig +@@ -36,3 +36,9 @@ config MTK_UART_APDMA + When SERIAL_8250_MT6577 is enabled, and if you want to use DMA, + you can enable the config. The DMA engine can only be used + with MediaTek SoCs. ++ ++config MTK_HSDMA ++ tristate "MTK HSDMA support" ++ depends on RALINK && SOC_MT7621 ++ select DMA_ENGINE ++ select DMA_VIRTUAL_CHANNELS +--- a/drivers/dma/mediatek/Makefile ++++ b/drivers/dma/mediatek/Makefile +@@ -2,3 +2,4 @@ + obj-$(CONFIG_MTK_UART_APDMA) += mtk-uart-apdma.o + obj-$(CONFIG_MTK_HSDMA) += mtk-hsdma.o + obj-$(CONFIG_MTK_CQDMA) += mtk-cqdma.o ++obj-$(CONFIG_MTK_HSDMA) += hsdma-mt7621.o diff --git a/target/linux/ramips/patches-6.12/801-DT-Add-documentation-for-gpio-ralink.patch b/target/linux/ramips/patches-6.12/801-DT-Add-documentation-for-gpio-ralink.patch new file mode 100644 index 0000000000..d4db7c1b4f --- /dev/null +++ b/target/linux/ramips/patches-6.12/801-DT-Add-documentation-for-gpio-ralink.patch @@ -0,0 +1,57 @@ +From: John Crispin +Date: Sun, 28 Jul 2013 19:45:30 +0200 +Subject: [PATCH 1/2] DT: Add documentation for gpio-ralink + +Describe gpio-ralink binding. + +Signed-off-by: John Crispin +--- + .../devicetree/bindings/gpio/gpio-ralink.txt | 42 +++++++++++++++++++ + 1 file changed, 42 insertions(+) + create mode 100644 Documentation/devicetree/bindings/gpio/gpio-ralink.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/gpio/gpio-ralink.txt +@@ -0,0 +1,42 @@ ++Ralink SoC GPIO controller bindings ++ ++Required properties: ++- compatible: ++ - "ralink,rt2880-gpio" for Ralink controllers ++- #gpio-cells : Should be two. ++ - first cell is the pin number ++ - second cell is used to specify optional parameters (unused) ++- gpio-controller : Marks the device node as a GPIO controller ++- reg : Physical base address and length of the controller's registers ++- interrupt-parent: phandle to the INTC device node ++- interrupts : Specify the INTC interrupt number ++- ngpios : Specify the number of GPIOs ++- ralink,register-map : The register layout depends on the GPIO bank and actual ++ SoC type. Register offsets need to be in this order. ++ [ INT, EDGE, RENA, FENA, DATA, DIR, POL, SET, RESET, TOGGLE ] ++- interrupt-controller : marks this as an interrupt controller ++- #interrupt-cells : a standard two-cell interrupt flag, see ++ interrupt-controller/interrupts.txt ++ ++Example: ++ ++ gpio0: gpio@600 { ++ compatible = "ralink,rt2880-gpio"; ++ ++ #gpio-cells = <2>; ++ gpio-controller; ++ ++ reg = <0x600 0x34>; ++ ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ ++ interrupt-parent = <&intc>; ++ interrupts = <6>; ++ ++ ngpios = <24>; ++ ralink,register-map = [ 00 04 08 0c ++ 20 24 28 2c ++ 30 34 ]; ++ ++ }; diff --git a/target/linux/ramips/patches-6.12/802-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch b/target/linux/ramips/patches-6.12/802-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch new file mode 100644 index 0000000000..971f39f8d8 --- /dev/null +++ b/target/linux/ramips/patches-6.12/802-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch @@ -0,0 +1,275 @@ +From: John Crispin +Date: Mon, 4 Aug 2014 20:36:29 +0200 +Subject: [PATCH 2/2] GPIO: MIPS: ralink: add gpio driver for ralink SoC + +Add gpio driver for Ralink SoC. This driver makes the gpio core on +RT2880, RT305x, rt3352, rt3662, rt3883, rt5350 and mt7620 work. + +Signed-off-by: John Crispin +--- + drivers/gpio/Kconfig | 8 ++ + drivers/gpio/Makefile | 1 + + drivers/gpio/gpio-ralink.c | 230 +++++++++++++++++++++++++++++++++++++ + 3 files changed, 239 insertions(+) + create mode 100644 drivers/gpio/gpio-ralink.c + +--- a/drivers/gpio/Kconfig ++++ b/drivers/gpio/Kconfig +@@ -555,6 +555,14 @@ config GPIO_PXA + help + Say yes here to support the PXA GPIO device. + ++config GPIO_RALINK ++ bool "Ralink GPIO Support" ++ depends on SOC_RT288X || SOC_RT305X || SOC_RT3883 || SOC_MT7620 ++ select GPIO_GENERIC ++ select GPIOLIB_IRQCHIP ++ help ++ Say yes here to support the Ralink SoC GPIO device ++ + config GPIO_RCAR + tristate "Renesas R-Car and RZ/G GPIO support" + depends on ARCH_RENESAS || COMPILE_TEST +--- a/drivers/gpio/Makefile ++++ b/drivers/gpio/Makefile +@@ -136,6 +136,7 @@ obj-$(CONFIG_GPIO_PISOSR) += gpio-pisos + obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o + obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio-pmic-eic-sprd.o + obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o ++obj-$(CONFIG_GPIO_RALINK) += gpio-ralink.o + obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o + obj-$(CONFIG_GPIO_RC5T583) += gpio-rc5t583.o + obj-$(CONFIG_GPIO_RCAR) += gpio-rcar.o +--- /dev/null ++++ b/drivers/gpio/gpio-ralink.c +@@ -0,0 +1,230 @@ ++/* ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ * ++ * Copyright (C) 2009-2011 Gabor Juhos ++ * Copyright (C) 2013 John Crispin ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++enum ralink_gpio_reg { ++ GPIO_REG_INT = 0, ++ GPIO_REG_EDGE, ++ GPIO_REG_RENA, ++ GPIO_REG_FENA, ++ GPIO_REG_DATA, ++ GPIO_REG_DIR, ++ GPIO_REG_POL, ++ GPIO_REG_SET, ++ GPIO_REG_RESET, ++ GPIO_REG_TOGGLE, ++ GPIO_REG_MAX ++}; ++ ++struct ralink_gpio_chip { ++ struct gpio_chip chip; ++ u8 regs[GPIO_REG_MAX]; ++ ++ spinlock_t lock; ++ void __iomem *membase; ++ int gpio_irq; ++ ++ u32 rising; ++ u32 falling; ++}; ++ ++static inline void rt_gpio_w32(struct ralink_gpio_chip *rg, u8 reg, u32 val) ++{ ++ iowrite32(val, rg->membase + rg->regs[reg]); ++} ++ ++static inline u32 rt_gpio_r32(struct ralink_gpio_chip *rg, u8 reg) ++{ ++ return ioread32(rg->membase + rg->regs[reg]); ++} ++ ++static irqreturn_t ralink_gpio_irq_handler(int irq, void *data) ++{ ++ struct gpio_chip *gc = data; ++ struct ralink_gpio_chip *rg = gpiochip_get_data(gc); ++ irqreturn_t ret = IRQ_NONE; ++ unsigned long pending; ++ int bit; ++ ++ pending = rt_gpio_r32(rg, GPIO_REG_INT); ++ for_each_set_bit(bit, &pending, rg->chip.ngpio) { ++ generic_handle_domain_irq(gc->irq.domain, bit); ++ rt_gpio_w32(rg, GPIO_REG_INT, BIT(bit)); ++ ret |= IRQ_HANDLED; ++ } ++ ++ return ret; ++} ++ ++static void ralink_gpio_irq_unmask(struct irq_data *d) ++{ ++ struct gpio_chip *gc = irq_data_get_irq_chip_data(d); ++ struct ralink_gpio_chip *rg = gpiochip_get_data(gc); ++ unsigned long flags; ++ u32 rise, fall; ++ ++ rise = rt_gpio_r32(rg, GPIO_REG_RENA); ++ fall = rt_gpio_r32(rg, GPIO_REG_FENA); ++ ++ spin_lock_irqsave(&rg->lock, flags); ++ rt_gpio_w32(rg, GPIO_REG_RENA, rise | (BIT(d->hwirq) & rg->rising)); ++ rt_gpio_w32(rg, GPIO_REG_FENA, fall | (BIT(d->hwirq) & rg->falling)); ++ spin_unlock_irqrestore(&rg->lock, flags); ++} ++ ++static void ralink_gpio_irq_mask(struct irq_data *d) ++{ ++ struct gpio_chip *gc = irq_data_get_irq_chip_data(d); ++ struct ralink_gpio_chip *rg = gpiochip_get_data(gc); ++ unsigned long flags; ++ u32 rise, fall; ++ ++ rise = rt_gpio_r32(rg, GPIO_REG_RENA); ++ fall = rt_gpio_r32(rg, GPIO_REG_FENA); ++ ++ spin_lock_irqsave(&rg->lock, flags); ++ rt_gpio_w32(rg, GPIO_REG_FENA, fall & ~BIT(d->hwirq)); ++ rt_gpio_w32(rg, GPIO_REG_RENA, rise & ~BIT(d->hwirq)); ++ spin_unlock_irqrestore(&rg->lock, flags); ++} ++ ++static int ralink_gpio_irq_type(struct irq_data *d, unsigned int type) ++{ ++ struct gpio_chip *gc = irq_data_get_irq_chip_data(d); ++ struct ralink_gpio_chip *rg = gpiochip_get_data(gc); ++ u32 mask = BIT(d->hwirq); ++ ++ if (type == IRQ_TYPE_PROBE) { ++ if ((rg->rising | rg->falling) & mask) ++ return 0; ++ ++ type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING; ++ } ++ ++ if (type & IRQ_TYPE_EDGE_RISING) ++ rg->rising |= mask; ++ else ++ rg->rising &= ~mask; ++ ++ if (type & IRQ_TYPE_EDGE_FALLING) ++ rg->falling |= mask; ++ else ++ rg->falling &= ~mask; ++ ++ return 0; ++} ++ ++static struct irq_chip ralink_gpio_irq_chip = { ++ .name = "gpio-ralink", ++ .irq_unmask = ralink_gpio_irq_unmask, ++ .irq_mask = ralink_gpio_irq_mask, ++ .irq_mask_ack = ralink_gpio_irq_mask, ++ .irq_set_type = ralink_gpio_irq_type, ++ .flags = IRQCHIP_IMMUTABLE, ++ GPIOCHIP_IRQ_RESOURCE_HELPERS, ++}; ++ ++static int ralink_gpio_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct device_node *np = dev->of_node; ++ struct ralink_gpio_chip *rg; ++ int ret; ++ ++ rg = devm_kzalloc(dev, sizeof(struct ralink_gpio_chip), GFP_KERNEL); ++ if (!rg) ++ return -ENOMEM; ++ ++ rg->membase = devm_platform_ioremap_resource(pdev, 0); ++ if (IS_ERR(rg->membase)) ++ return PTR_ERR(rg->membase); ++ ++ if (of_property_read_u8_array(np, "ralink,register-map", ++ rg->regs, GPIO_REG_MAX)) { ++ dev_err(dev, "failed to read register definition\n"); ++ return -EINVAL; ++ } ++ ++ spin_lock_init(&rg->lock); ++ ++ ret = bgpio_init(&rg->chip, dev, 4, ++ rg->membase + rg->regs[GPIO_REG_DATA], ++ rg->membase + rg->regs[GPIO_REG_SET], ++ rg->membase + rg->regs[GPIO_REG_RESET], ++ rg->membase + rg->regs[GPIO_REG_DIR], ++ NULL, 0); ++ if (ret) ++ return dev_err_probe(dev, ret, "bgpio_init() failed\n"); ++ ++ /* set polarity to low for all lines */ ++ rt_gpio_w32(rg, GPIO_REG_POL, 0); ++ ++ rg->gpio_irq = platform_get_irq(pdev, 0); ++ if (rg->gpio_irq < 0) ++ return rg->gpio_irq; ++ ++ if (rg->gpio_irq) { ++ struct gpio_irq_chip *girq; ++ ++ /* ++ * Directly request the irq here instead of passing ++ * a flow-handler because the irq is shared. ++ */ ++ ret = devm_request_irq(dev, rg->gpio_irq, ++ ralink_gpio_irq_handler, IRQF_SHARED, ++ NULL, &rg->chip); ++ if (ret) { ++ dev_err(dev, "Error requesting IRQ %d: %d\n", ++ rg->gpio_irq, ret); ++ return ret; ++ } ++ ++ girq = &rg->chip.irq; ++ gpio_irq_chip_set_chip(girq, &ralink_gpio_irq_chip); ++ /* This will let us handle the parent IRQ in the driver */ ++ girq->parent_handler = NULL; ++ girq->num_parents = 0; ++ girq->parents = NULL; ++ girq->default_type = IRQ_TYPE_NONE; ++ girq->handler = handle_simple_irq; ++ ++ rt_gpio_w32(rg, GPIO_REG_RENA, 0); ++ rt_gpio_w32(rg, GPIO_REG_FENA, 0); ++ } ++ ++ return devm_gpiochip_add_data(dev, &rg->chip, rg); ++} ++ ++static const struct of_device_id ralink_gpio_match[] = { ++ { .compatible = "ralink,rt2880-gpio" }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, ralink_gpio_match); ++ ++static struct platform_driver ralink_gpio_driver = { ++ .probe = ralink_gpio_probe, ++ .driver = { ++ .name = "ralink_gpio", ++ .of_match_table = ralink_gpio_match, ++ }, ++}; ++ ++static int __init ralink_gpio_init(void) ++{ ++ return platform_driver_register(&ralink_gpio_driver); ++} ++ ++subsys_initcall(ralink_gpio_init); diff --git a/target/linux/ramips/patches-6.12/804-dma-ralink-add-back-gdma-driver.patch b/target/linux/ramips/patches-6.12/804-dma-ralink-add-back-gdma-driver.patch new file mode 100644 index 0000000000..4f39000a5e --- /dev/null +++ b/target/linux/ramips/patches-6.12/804-dma-ralink-add-back-gdma-driver.patch @@ -0,0 +1,39 @@ +From: Shiji Yang +Date: Mon, 27 May 2024 08:25:57 +0000 +Subject: [PATCH] dma: ralink: add back gdma driver + +The upstream staging driver has been removed[1] since kernel v5.17. + +[1] 5bfc10690c6c ("staging: ralink-gdma: remove driver from tree") + +Signed-off-by: Shiji Yang +--- + drivers/dma/Kconfig | 6 ++++++ + drivers/dma/Makefile | 1 + + 2 files changed, 7 insertions(+) + +--- a/drivers/dma/Kconfig ++++ b/drivers/dma/Kconfig +@@ -564,6 +564,12 @@ config PLX_DMA + These are exposed via extra functions on the switch's + upstream port. Each function exposes one DMA channel. + ++config RALINK_GDMA ++ tristate "RALINK GDMA support" ++ depends on RALINK && !SOC_RT288X ++ select DMA_ENGINE ++ select DMA_VIRTUAL_CHANNELS ++ + config STE_DMA40 + bool "ST-Ericsson DMA40 support" + depends on ARCH_U8500 +--- a/drivers/dma/Makefile ++++ b/drivers/dma/Makefile +@@ -69,6 +69,7 @@ obj-$(CONFIG_PL330_DMA) += pl330.o + obj-$(CONFIG_PLX_DMA) += plx_dma.o + obj-$(CONFIG_PPC_BESTCOMM) += bestcomm/ + obj-$(CONFIG_PXA_DMA) += pxa_dma.o ++obj-$(CONFIG_RALINK_GDMA) += ralink-gdma.o + obj-$(CONFIG_RENESAS_DMA) += sh/ + obj-$(CONFIG_SF_PDMA) += sf-pdma/ + obj-$(CONFIG_STE_DMA40) += ste_dma40.o ste_dma40_ll.o diff --git a/target/linux/ramips/patches-6.12/808-pinctrl-mtmips-support-requesting-different-function.patch b/target/linux/ramips/patches-6.12/808-pinctrl-mtmips-support-requesting-different-function.patch new file mode 100644 index 0000000000..e5b03507aa --- /dev/null +++ b/target/linux/ramips/patches-6.12/808-pinctrl-mtmips-support-requesting-different-function.patch @@ -0,0 +1,45 @@ +From: Shiji Yang +Date: Wed, 26 Jul 2023 01:32:55 +0800 +Subject: [PATCH] pinctrl: mtmips: support requesting different functions for + same group + +Sometimes pinctrl consumers may request different functions for the +same pin group in different situations. This patch can help to reset +the group function flag when requesting a different function. + +Signed-off-by: Shiji Yang +--- + drivers/pinctrl/mediatek/pinctrl-mtmips.c | 21 +++++++++++++++++---- + 1 file changed, 17 insertions(+), 4 deletions(-) + +--- a/drivers/pinctrl/mediatek/pinctrl-mtmips.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mtmips.c +@@ -123,11 +123,24 @@ static int mtmips_pmx_group_enable(struc + int i; + int shift; + +- /* dont allow double use */ ++ /* ++ * for the same pin group, if request a different function, ++ * then clear the group function flag and continue, else exit. ++ */ + if (p->groups[group].enabled) { +- dev_err(p->dev, "%s is already enabled\n", +- p->groups[group].name); +- return 0; ++ for (i = 0; i < p->groups[group].func_count; i++) { ++ if (p->groups[group].func[i].enabled == 1) { ++ if (!strcmp(p->func[func]->name, ++ p->groups[group].func[i].name)) ++ return 0; ++ p->groups[group].func[i].enabled = 0; ++ break; ++ } ++ } ++ ++ /* exit if request the "gpio" function again */ ++ if (i == p->groups[group].func_count && func == 0) ++ return 0; + } + + p->groups[group].enabled = 1; diff --git a/target/linux/ramips/patches-6.12/809-pinctrl-mtmips-allow-mux-SDXC-pins-for-mt76x8.patch b/target/linux/ramips/patches-6.12/809-pinctrl-mtmips-allow-mux-SDXC-pins-for-mt76x8.patch new file mode 100644 index 0000000000..17add6054e --- /dev/null +++ b/target/linux/ramips/patches-6.12/809-pinctrl-mtmips-allow-mux-SDXC-pins-for-mt76x8.patch @@ -0,0 +1,105 @@ +From: Shiji Yang +Date: Wed, 1 Jan 2025 13:30:11 +0800 +Subject: [PATCH] pinctrl: mtmips: allow mux SDXC pins for mt76x8 + +This is a hack to supprot two types of mt76x8 SDXC pinmaps: + +a) Use ethernet phy pins as SDXC IO. + +&pinctrl { + ephy-digital; + + sdxc_iot_mode: sdxc_iot_mode { + esd { + groups = "esd"; + function = "iot"; + }; + + sdxc { + groups = "sdmode"; + function = "sdxc"; + }; + }; +}; + +b) Use I2S/I2C/GPIO0/UART1 pins as SDXC IO. + +&pinctrl { + ephy-analog; + + sdxc_router_mode: sdxc_router_mode { + groups = "esd", "gpio", "i2c", "i2s", "sdmode", "uart1"; + function = "gpio"; + }; +}; + +Signed-off-by: Shiji Yang +--- + drivers/pinctrl/mediatek/pinctrl-mt76x8.c | 24 ++++++++++++++++++++++- + 1 file changed, 22 insertions(+), 1 deletion(-) + +--- a/drivers/pinctrl/mediatek/pinctrl-mt76x8.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mt76x8.c +@@ -1,10 +1,13 @@ + // SPDX-License-Identifier: GPL-2.0-only + ++#include + #include + #include + #include + #include "pinctrl-mtmips.h" + ++#define SYSC_REG_AGPIO_CFG 0x3c ++ + #define MT76X8_GPIO_MODE_MASK 0x3 + + #define MT76X8_GPIO_MODE_P4LED_KN 58 +@@ -26,6 +29,7 @@ + #define MT76X8_GPIO_MODE_I2C 20 + #define MT76X8_GPIO_MODE_REFCLK 18 + #define MT76X8_GPIO_MODE_PERST 16 ++#define MT76X8_GPIO_MODE_ESD 15 + #define MT76X8_GPIO_MODE_WDT 14 + #define MT76X8_GPIO_MODE_SPI 12 + #define MT76X8_GPIO_MODE_SDMODE 10 +@@ -68,6 +72,12 @@ static struct mtmips_pmx_func refclk_grp + static struct mtmips_pmx_func perst_grp[] = { FUNC("perst", 0, 36, 1) }; + static struct mtmips_pmx_func wdt_grp[] = { FUNC("wdt", 0, 38, 1) }; + static struct mtmips_pmx_func spi_grp[] = { FUNC("spi", 0, 7, 4) }; ++/* ++ * "esd" (Ethernet SDXC) group supports two mode: ++ * "gpio" - SDXC mux to I2S/I2C/GPIO0/UART1 pins with "gpio" mode ++ * "iot" - SDXC mux to EPHY pins, eth p1-p4 pad must be set to "digital" ++ */ ++static struct mtmips_pmx_func esd_grp[] = { FUNC("iot", 0, 47, 1) }; + + static struct mtmips_pmx_func sd_mode_grp[] = { + FUNC("sdxc jtag", 3, 22, 8), +@@ -182,6 +192,7 @@ static struct mtmips_pmx_group mt76x8_pi + GRP("perst", perst_grp, 1, MT76X8_GPIO_MODE_PERST), + GRP("wdt", wdt_grp, 1, MT76X8_GPIO_MODE_WDT), + GRP("spi", spi_grp, 1, MT76X8_GPIO_MODE_SPI), ++ GRP("esd", esd_grp, 1, MT76X8_GPIO_MODE_ESD), + GRP_G("sdmode", sd_mode_grp, MT76X8_GPIO_MODE_MASK, + 1, MT76X8_GPIO_MODE_SDMODE), + GRP_G("uart0", uart0_grp, MT76X8_GPIO_MODE_MASK, +@@ -223,7 +234,18 @@ static struct mtmips_pmx_group mt76x8_pi + + static int mt76x8_pinctrl_probe(struct platform_device *pdev) + { +- return mtmips_pinctrl_init(pdev, mt76x8_pinmux_data); ++ int ret; ++ ++ ret = mtmips_pinctrl_init(pdev, mt76x8_pinmux_data); ++ if (ret) ++ return ret; ++ ++ if (of_property_present(pdev->dev.of_node, "ephy-analog")) ++ rt_sysc_m32(0xf << 17, 0, SYSC_REG_AGPIO_CFG); ++ else if (of_property_present(pdev->dev.of_node, "ephy-digital")) ++ rt_sysc_m32(0xf << 17, 0xf << 17, SYSC_REG_AGPIO_CFG); ++ ++ return ret; + } + + static const struct of_device_id mt76x8_pinctrl_match[] = { diff --git a/target/linux/ramips/patches-6.12/810-uvc-add-iPassion-iP2970-support.patch b/target/linux/ramips/patches-6.12/810-uvc-add-iPassion-iP2970-support.patch new file mode 100644 index 0000000000..fe918d5697 --- /dev/null +++ b/target/linux/ramips/patches-6.12/810-uvc-add-iPassion-iP2970-support.patch @@ -0,0 +1,244 @@ +From 975e76214cd2516eb6cfff4c3eec581872645e88 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Thu, 19 Sep 2013 01:50:59 +0200 +Subject: [PATCH 31/53] uvc: add iPassion iP2970 support + +Signed-off-by: John Crispin +--- + drivers/media/usb/uvc/uvc_driver.c | 12 +++ + drivers/media/usb/uvc/uvc_status.c | 2 + + drivers/media/usb/uvc/uvc_video.c | 147 ++++++++++++++++++++++++++++++++++++ + drivers/media/usb/uvc/uvcvideo.h | 5 +- + 4 files changed, 165 insertions(+), 1 deletion(-) + +--- a/drivers/media/usb/uvc/uvc_driver.c ++++ b/drivers/media/usb/uvc/uvc_driver.c +@@ -3229,6 +3229,18 @@ static const struct usb_device_id uvc_id + .bInterfaceSubClass = 1, + .bInterfaceProtocol = 0, + .driver_info = UVC_INFO_META(V4L2_META_FMT_D4XX) }, ++ /* iPassion iP2970 */ ++ { .match_flags = USB_DEVICE_ID_MATCH_DEVICE ++ | USB_DEVICE_ID_MATCH_INT_INFO, ++ .idVendor = 0x1B3B, ++ .idProduct = 0x2970, ++ .bInterfaceClass = USB_CLASS_VIDEO, ++ .bInterfaceSubClass = 1, ++ .bInterfaceProtocol = 0, ++ .driver_info = UVC_QUIRK_PROBE_MINMAX ++ | UVC_QUIRK_STREAM_NO_FID ++ | UVC_QUIRK_MOTION ++ | UVC_QUIRK_SINGLE_ISO }, + /* Generic USB Video Class */ + { USB_INTERFACE_INFO(USB_CLASS_VIDEO, 1, UVC_PC_PROTOCOL_UNDEFINED) }, + { USB_INTERFACE_INFO(USB_CLASS_VIDEO, 1, UVC_PC_PROTOCOL_15) }, +--- a/drivers/media/usb/uvc/uvc_status.c ++++ b/drivers/media/usb/uvc/uvc_status.c +@@ -228,6 +228,7 @@ static void uvc_status_complete(struct u + if (uvc_event_control(urb, dev->status, len)) + /* The URB will be resubmitted in work context. */ + return; ++ dev->motion = 1; + break; + } + +@@ -274,6 +275,7 @@ int uvc_status_init(struct uvc_device *d + } + + pipe = usb_rcvintpipe(dev->udev, ep->desc.bEndpointAddress); ++ dev->motion = 0; + + /* + * For high-speed interrupt endpoints, the bInterval value is used as +--- a/drivers/media/usb/uvc/uvc_video.c ++++ b/drivers/media/usb/uvc/uvc_video.c +@@ -19,6 +19,11 @@ + #include + #include + #include ++#include ++#include ++#include ++#include ++#include + + #include + #include +@@ -1353,9 +1358,149 @@ static void uvc_video_decode_data(struct + uvc_urb->async_operations++; + } + ++struct bh_priv { ++ unsigned long seen; ++}; ++ ++struct bh_event { ++ const char *name; ++ struct sk_buff *skb; ++ struct work_struct work; ++}; ++ ++#define BH_ERR(fmt, args...) printk(KERN_ERR "%s: " fmt, "webcam", ##args ) ++#define BH_DBG(fmt, args...) do {} while (0) ++#define BH_SKB_SIZE 2048 ++ ++extern u64 uevent_next_seqnum(void); ++static int seen = 0; ++ ++static int bh_event_add_var(struct bh_event *event, int argv, ++ const char *format, ...) ++{ ++ static char buf[128]; ++ char *s; ++ va_list args; ++ int len; ++ ++ if (argv) ++ return 0; ++ ++ va_start(args, format); ++ len = vsnprintf(buf, sizeof(buf), format, args); ++ va_end(args); ++ ++ if (len >= sizeof(buf)) { ++ BH_ERR("buffer size too small\n"); ++ WARN_ON(1); ++ return -ENOMEM; ++ } ++ ++ s = skb_put(event->skb, len + 1); ++ strcpy(s, buf); ++ ++ BH_DBG("added variable '%s'\n", s); ++ ++ return 0; ++} ++ ++static int motion_hotplug_fill_event(struct bh_event *event) ++{ ++ int s = jiffies; ++ int ret; ++ ++ if (!seen) ++ seen = jiffies; ++ ++ ret = bh_event_add_var(event, 0, "HOME=%s", "/"); ++ if (ret) ++ return ret; ++ ++ ret = bh_event_add_var(event, 0, "PATH=%s", ++ "/sbin:/bin:/usr/sbin:/usr/bin"); ++ if (ret) ++ return ret; ++ ++ ret = bh_event_add_var(event, 0, "SUBSYSTEM=usb"); ++ if (ret) ++ return ret; ++ ++ ret = bh_event_add_var(event, 0, "ACTION=motion"); ++ if (ret) ++ return ret; ++ ++ ret = bh_event_add_var(event, 0, "SEEN=%d", s - seen); ++ if (ret) ++ return ret; ++ seen = s; ++ ++ ret = bh_event_add_var(event, 0, "SEQNUM=%llu", uevent_next_seqnum()); ++ ++ return ret; ++} ++ ++static void motion_hotplug_work(struct work_struct *work) ++{ ++ struct bh_event *event = container_of(work, struct bh_event, work); ++ int ret = 0; ++ ++ event->skb = alloc_skb(BH_SKB_SIZE, GFP_KERNEL); ++ if (!event->skb) ++ goto out_free_event; ++ ++ ret = bh_event_add_var(event, 0, "%s@", "add"); ++ if (ret) ++ goto out_free_skb; ++ ++ ret = motion_hotplug_fill_event(event); ++ if (ret) ++ goto out_free_skb; ++ ++ NETLINK_CB(event->skb).dst_group = 1; ++ broadcast_uevent(event->skb, 0, 1, GFP_KERNEL); ++ ++out_free_skb: ++ if (ret) { ++ BH_ERR("work error %d\n", ret); ++ kfree_skb(event->skb); ++ } ++out_free_event: ++ kfree(event); ++} ++ ++static int motion_hotplug_create_event(void) ++{ ++ struct bh_event *event; ++ ++ event = kzalloc(sizeof(*event), GFP_KERNEL); ++ if (!event) ++ return -ENOMEM; ++ ++ event->name = "motion"; ++ ++ INIT_WORK(&event->work, (void *)(void *)motion_hotplug_work); ++ schedule_work(&event->work); ++ ++ return 0; ++} ++ ++#define MOTION_FLAG_OFFSET 4 + static void uvc_video_decode_end(struct uvc_streaming *stream, + struct uvc_buffer *buf, const u8 *data, int len) + { ++ if ((stream->dev->quirks & UVC_QUIRK_MOTION) && ++ (data[len - 2] == 0xff) && (data[len - 1] == 0xd9)) { ++ u8 *mem; ++ buf->state = UVC_BUF_STATE_READY; ++ mem = (u8 *) (buf->mem + MOTION_FLAG_OFFSET); ++ if ( stream->dev->motion ) { ++ stream->dev->motion = 0; ++ motion_hotplug_create_event(); ++ } else { ++ *mem &= 0x7f; ++ } ++ } ++ + /* Mark the buffer as done if the EOF marker is set. */ + if (data[1] & UVC_STREAM_EOF && buf->bytesused != 0) { + uvc_dbg(stream->dev, FRAME, "Frame complete (EOF found)\n"); +@@ -1938,6 +2083,8 @@ static int uvc_init_video_isoc(struct uv + if (npackets == 0) + return -ENOMEM; + ++ if (stream->dev->quirks & UVC_QUIRK_SINGLE_ISO) ++ npackets = 1; + size = npackets * psize; + + for_each_uvc_urb(uvc_urb, stream) { +--- a/drivers/media/usb/uvc/uvcvideo.h ++++ b/drivers/media/usb/uvc/uvcvideo.h +@@ -79,6 +79,8 @@ + #define UVC_QUIRK_DISABLE_AUTOSUSPEND 0x00008000 + #define UVC_QUIRK_INVALID_DEVICE_SOF 0x00010000 + #define UVC_QUIRK_MJPEG_NO_EOF 0x00020000 ++#define UVC_QUIRK_MOTION 0x00040000 ++#define UVC_QUIRK_SINGLE_ISO 0x00080000 + + /* Format flags */ + #define UVC_FMT_FLAG_COMPRESSED 0x00000001 +@@ -598,6 +600,7 @@ struct uvc_device { + + struct input_dev *input; + char input_phys[64]; ++ int motion; + + struct uvc_ctrl_work { + struct work_struct work; diff --git a/target/linux/ramips/patches-6.12/820-DT-Add-documentation-for-spi-rt2880.patch b/target/linux/ramips/patches-6.12/820-DT-Add-documentation-for-spi-rt2880.patch new file mode 100644 index 0000000000..e2643e3f25 --- /dev/null +++ b/target/linux/ramips/patches-6.12/820-DT-Add-documentation-for-spi-rt2880.patch @@ -0,0 +1,44 @@ +From da6015e7f19d749f135f7ac55c4ec47b06faa868 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Fri, 9 Aug 2013 20:12:59 +0200 +Subject: [PATCH 41/53] DT: Add documentation for spi-rt2880 + +Describe the SPI master found on the MIPS based Ralink RT2880 SoC. + +Signed-off-by: John Crispin +--- + .../devicetree/bindings/spi/spi-rt2880.txt | 28 ++++++++++++++++++++ + 1 file changed, 28 insertions(+) + create mode 100644 Documentation/devicetree/bindings/spi/spi-rt2880.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/spi/spi-rt2880.txt +@@ -0,0 +1,28 @@ ++Ralink SoC RT2880 SPI master controller. ++ ++This SPI controller is found on most wireless SoCs made by ralink. ++ ++Required properties: ++- compatible : "ralink,rt2880-spi" ++- reg : The register base for the controller. ++- #address-cells : <1>, as required by generic SPI binding. ++- #size-cells : <0>, also as required by generic SPI binding. ++ ++Child nodes as per the generic SPI binding. ++ ++Example: ++ ++ spi@b00 { ++ compatible = "ralink,rt2880-spi"; ++ reg = <0xb00 0x100>; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ m25p80@0 { ++ compatible = "m25p80"; ++ reg = <0>; ++ spi-max-frequency = <10000000>; ++ }; ++ }; ++ diff --git a/target/linux/ramips/patches-6.12/821-SPI-ralink-add-Ralink-SoC-spi-driver.patch b/target/linux/ramips/patches-6.12/821-SPI-ralink-add-Ralink-SoC-spi-driver.patch new file mode 100644 index 0000000000..ab33f8cb21 --- /dev/null +++ b/target/linux/ramips/patches-6.12/821-SPI-ralink-add-Ralink-SoC-spi-driver.patch @@ -0,0 +1,517 @@ +From 683af4ebb91a1600df1946ac4769d916b8a1be65 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sun, 27 Jul 2014 11:15:12 +0100 +Subject: [PATCH 42/53] SPI: ralink: add Ralink SoC spi driver + +Add the driver needed to make SPI work on Ralink SoC. + +Signed-off-by: Gabor Juhos +Acked-by: John Crispin +--- + drivers/spi/Kconfig | 6 + + drivers/spi/Makefile | 1 + + drivers/spi/spi-rt2880.c | 530 ++++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 537 insertions(+) + create mode 100644 drivers/spi/spi-rt2880.c + +--- a/drivers/spi/Kconfig ++++ b/drivers/spi/Kconfig +@@ -932,6 +932,12 @@ config SPI_QCOM_GENI + This driver can also be built as a module. If so, the module + will be called spi-geni-qcom. + ++config SPI_RT2880 ++ tristate "Ralink RT288x SPI Controller" ++ depends on RALINK ++ help ++ This selects a driver for the Ralink RT288x/RT305x SPI Controller. ++ + config SPI_S3C64XX + tristate "Samsung S3C64XX/Exynos SoC series type SPI" + depends on (PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST) +--- a/drivers/spi/Makefile ++++ b/drivers/spi/Makefile +@@ -122,6 +122,7 @@ obj-$(CONFIG_SPI_RB4XX) += spi-rb4xx.o + obj-$(CONFIG_MACH_REALTEK_RTL) += spi-realtek-rtl.o + obj-$(CONFIG_SPI_RPCIF) += spi-rpc-if.o + obj-$(CONFIG_SPI_RSPI) += spi-rspi.o ++obj-$(CONFIG_SPI_RT2880) += spi-rt2880.o + obj-$(CONFIG_SPI_RZV2M_CSI) += spi-rzv2m-csi.o + obj-$(CONFIG_SPI_S3C64XX) += spi-s3c64xx.o + obj-$(CONFIG_SPI_SC18IS602) += spi-sc18is602.o +--- /dev/null ++++ b/drivers/spi/spi-rt2880.c +@@ -0,0 +1,473 @@ ++/* ++ * spi-rt2880.c -- Ralink RT288x/RT305x SPI controller driver ++ * ++ * Copyright (C) 2011 Sergiy ++ * Copyright (C) 2011-2013 Gabor Juhos ++ * ++ * Some parts are based on spi-orion.c: ++ * Author: Shadi Ammouri ++ * Copyright (C) 2007-2008 Marvell Ltd. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define DRIVER_NAME "spi-rt2880" ++ ++#define RAMIPS_SPI_STAT 0x00 ++#define RAMIPS_SPI_CFG 0x10 ++#define RAMIPS_SPI_CTL 0x14 ++#define RAMIPS_SPI_DATA 0x20 ++#define RAMIPS_SPI_ADDR 0x24 ++#define RAMIPS_SPI_BS 0x28 ++#define RAMIPS_SPI_USER 0x2C ++#define RAMIPS_SPI_TXFIFO 0x30 ++#define RAMIPS_SPI_RXFIFO 0x34 ++#define RAMIPS_SPI_FIFO_STAT 0x38 ++#define RAMIPS_SPI_MODE 0x3C ++#define RAMIPS_SPI_DEV_OFFSET 0x40 ++#define RAMIPS_SPI_DMA 0x80 ++#define RAMIPS_SPI_DMASTAT 0x84 ++#define RAMIPS_SPI_ARBITER 0xF0 ++ ++/* SPISTAT register bit field */ ++#define SPISTAT_BUSY BIT(0) ++ ++/* SPICFG register bit field */ ++#define SPICFG_ADDRMODE BIT(12) ++#define SPICFG_RXENVDIS BIT(11) ++#define SPICFG_RXCAP BIT(10) ++#define SPICFG_SPIENMODE BIT(9) ++#define SPICFG_MSBFIRST BIT(8) ++#define SPICFG_SPICLKPOL BIT(6) ++#define SPICFG_RXCLKEDGE_FALLING BIT(5) ++#define SPICFG_TXCLKEDGE_FALLING BIT(4) ++#define SPICFG_HIZSPI BIT(3) ++#define SPICFG_SPICLK_PRESCALE_MASK 0x7 ++#define SPICFG_SPICLK_DIV2 0 ++#define SPICFG_SPICLK_DIV4 1 ++#define SPICFG_SPICLK_DIV8 2 ++#define SPICFG_SPICLK_DIV16 3 ++#define SPICFG_SPICLK_DIV32 4 ++#define SPICFG_SPICLK_DIV64 5 ++#define SPICFG_SPICLK_DIV128 6 ++#define SPICFG_SPICLK_DISABLE 7 ++ ++/* SPICTL register bit field */ ++#define SPICTL_START BIT(4) ++#define SPICTL_HIZSDO BIT(3) ++#define SPICTL_STARTWR BIT(2) ++#define SPICTL_STARTRD BIT(1) ++#define SPICTL_SPIENA BIT(0) ++ ++/* SPIUSER register bit field */ ++#define SPIUSER_USERMODE BIT(21) ++#define SPIUSER_INSTR_PHASE BIT(20) ++#define SPIUSER_ADDR_PHASE_MASK 0x7 ++#define SPIUSER_ADDR_PHASE_OFFSET 17 ++#define SPIUSER_MODE_PHASE BIT(16) ++#define SPIUSER_DUMMY_PHASE_MASK 0x3 ++#define SPIUSER_DUMMY_PHASE_OFFSET 14 ++#define SPIUSER_DATA_PHASE_MASK 0x3 ++#define SPIUSER_DATA_PHASE_OFFSET 12 ++#define SPIUSER_DATA_READ (BIT(0) << SPIUSER_DATA_PHASE_OFFSET) ++#define SPIUSER_DATA_WRITE (BIT(1) << SPIUSER_DATA_PHASE_OFFSET) ++#define SPIUSER_ADDR_TYPE_OFFSET 9 ++#define SPIUSER_MODE_TYPE_OFFSET 6 ++#define SPIUSER_DUMMY_TYPE_OFFSET 3 ++#define SPIUSER_DATA_TYPE_OFFSET 0 ++#define SPIUSER_TRANSFER_MASK 0x7 ++#define SPIUSER_TRANSFER_SINGLE BIT(0) ++#define SPIUSER_TRANSFER_DUAL BIT(1) ++#define SPIUSER_TRANSFER_QUAD BIT(2) ++ ++#define SPIUSER_TRANSFER_TYPE(type) ( \ ++ (type << SPIUSER_ADDR_TYPE_OFFSET) | \ ++ (type << SPIUSER_MODE_TYPE_OFFSET) | \ ++ (type << SPIUSER_DUMMY_TYPE_OFFSET) | \ ++ (type << SPIUSER_DATA_TYPE_OFFSET) \ ++) ++ ++/* SPIFIFOSTAT register bit field */ ++#define SPIFIFOSTAT_TXEMPTY BIT(19) ++#define SPIFIFOSTAT_RXEMPTY BIT(18) ++#define SPIFIFOSTAT_TXFULL BIT(17) ++#define SPIFIFOSTAT_RXFULL BIT(16) ++#define SPIFIFOSTAT_FIFO_MASK 0xff ++#define SPIFIFOSTAT_TX_OFFSET 8 ++#define SPIFIFOSTAT_RX_OFFSET 0 ++ ++#define SPI_FIFO_DEPTH 16 ++ ++/* SPIMODE register bit field */ ++#define SPIMODE_MODE_OFFSET 24 ++#define SPIMODE_DUMMY_OFFSET 0 ++ ++/* SPIARB register bit field */ ++#define SPICTL_ARB_EN BIT(31) ++#define SPICTL_CSCTL1 BIT(16) ++#define SPI1_POR BIT(1) ++#define SPI0_POR BIT(0) ++ ++#define RT2880_SPI_MODE_BITS (SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST | \ ++ SPI_CS_HIGH) ++ ++struct rt2880_spi { ++ struct spi_controller *master; ++ void __iomem *base; ++ u32 speed; ++ u16 wait_loops; ++ u16 mode; ++ struct clk *clk; ++}; ++ ++static inline struct rt2880_spi *spidev_to_rt2880_spi(struct spi_device *spi) ++{ ++ return spi_controller_get_devdata(spi->controller); ++} ++ ++static inline u32 rt2880_spi_read(struct rt2880_spi *rs, u32 reg) ++{ ++ return ioread32(rs->base + reg); ++} ++ ++static inline void rt2880_spi_write(struct rt2880_spi *rs, u32 reg, ++ const u32 val) ++{ ++ iowrite32(val, rs->base + reg); ++} ++ ++static inline void rt2880_spi_setbits(struct rt2880_spi *rs, u32 reg, u32 mask) ++{ ++ void __iomem *addr = rs->base + reg; ++ ++ iowrite32((ioread32(addr) | mask), addr); ++} ++ ++static inline void rt2880_spi_clrbits(struct rt2880_spi *rs, u32 reg, u32 mask) ++{ ++ void __iomem *addr = rs->base + reg; ++ ++ iowrite32((ioread32(addr) & ~mask), addr); ++} ++ ++static u32 rt2880_spi_baudrate_get(struct spi_device *spi, unsigned int speed) ++{ ++ struct rt2880_spi *rs = spidev_to_rt2880_spi(spi); ++ u32 rate; ++ u32 prescale; ++ ++ /* ++ * the supported rates are: 2, 4, 8, ... 128 ++ * round up as we look for equal or less speed ++ */ ++ rate = DIV_ROUND_UP(clk_get_rate(rs->clk), speed); ++ rate = roundup_pow_of_two(rate); ++ ++ /* Convert the rate to SPI clock divisor value. */ ++ prescale = ilog2(rate / 2); ++ ++ /* some tolerance. double and add 100 */ ++ rs->wait_loops = (8 * HZ * loops_per_jiffy) / ++ (clk_get_rate(rs->clk) / rate); ++ rs->wait_loops = (rs->wait_loops << 1) + 100; ++ rs->speed = speed; ++ ++ dev_dbg(&spi->dev, "speed: %lu/%u, rate: %u, prescal: %u, loops: %hu\n", ++ clk_get_rate(rs->clk) / rate, speed, rate, prescale, ++ rs->wait_loops); ++ ++ return prescale; ++} ++ ++static u32 get_arbiter_offset(struct spi_controller *master) ++{ ++ u32 offset; ++ ++ offset = RAMIPS_SPI_ARBITER; ++ if (master->bus_num == 1) ++ offset -= RAMIPS_SPI_DEV_OFFSET; ++ ++ return offset; ++} ++ ++static void rt2880_spi_set_cs(struct spi_device *spi, bool enable) ++{ ++ struct rt2880_spi *rs = spidev_to_rt2880_spi(spi); ++ ++ if (enable) ++ rt2880_spi_setbits(rs, RAMIPS_SPI_CTL, SPICTL_SPIENA); ++ else ++ rt2880_spi_clrbits(rs, RAMIPS_SPI_CTL, SPICTL_SPIENA); ++} ++ ++static int rt2880_spi_wait_ready(struct rt2880_spi *rs, int len) ++{ ++ int loop = rs->wait_loops * len; ++ ++ while ((rt2880_spi_read(rs, RAMIPS_SPI_STAT) & SPISTAT_BUSY) && --loop) ++ cpu_relax(); ++ ++ if (loop) ++ return 0; ++ ++ return -ETIMEDOUT; ++} ++ ++static void rt2880_dump_reg(struct spi_controller *master) ++{ ++ struct rt2880_spi *rs = spi_controller_get_devdata(master); ++ ++ dev_dbg(&master->dev, "stat: %08x, cfg: %08x, ctl: %08x, " \ ++ "data: %08x, arb: %08x\n", ++ rt2880_spi_read(rs, RAMIPS_SPI_STAT), ++ rt2880_spi_read(rs, RAMIPS_SPI_CFG), ++ rt2880_spi_read(rs, RAMIPS_SPI_CTL), ++ rt2880_spi_read(rs, RAMIPS_SPI_DATA), ++ rt2880_spi_read(rs, get_arbiter_offset(master))); ++} ++ ++static int rt2880_spi_transfer_one(struct spi_controller *master, ++ struct spi_device *spi, struct spi_transfer *xfer) ++{ ++ struct rt2880_spi *rs = spi_controller_get_devdata(master); ++ unsigned len; ++ const u8 *tx = xfer->tx_buf; ++ u8 *rx = xfer->rx_buf; ++ int err = 0; ++ ++ /* change clock speed */ ++ if (unlikely(rs->speed != xfer->speed_hz)) { ++ u32 reg; ++ reg = rt2880_spi_read(rs, RAMIPS_SPI_CFG); ++ reg &= ~SPICFG_SPICLK_PRESCALE_MASK; ++ reg |= rt2880_spi_baudrate_get(spi, xfer->speed_hz); ++ rt2880_spi_write(rs, RAMIPS_SPI_CFG, reg); ++ } ++ ++ if (tx) { ++ len = xfer->len; ++ while (len-- > 0) { ++ rt2880_spi_write(rs, RAMIPS_SPI_DATA, *tx++); ++ rt2880_spi_setbits(rs, RAMIPS_SPI_CTL, SPICTL_STARTWR); ++ err = rt2880_spi_wait_ready(rs, 1); ++ if (err) { ++ dev_err(&spi->dev, "TX failed, err=%d\n", err); ++ goto out; ++ } ++ } ++ } ++ ++ if (rx) { ++ len = xfer->len; ++ while (len-- > 0) { ++ rt2880_spi_setbits(rs, RAMIPS_SPI_CTL, SPICTL_STARTRD); ++ err = rt2880_spi_wait_ready(rs, 1); ++ if (err) { ++ dev_err(&spi->dev, "RX failed, err=%d\n", err); ++ goto out; ++ } ++ *rx++ = (u8) rt2880_spi_read(rs, RAMIPS_SPI_DATA); ++ } ++ } ++ ++out: ++ return err; ++} ++ ++static int rt2880_spi_setup(struct spi_device *spi) ++{ ++ struct spi_controller *master = spi->controller; ++ struct rt2880_spi *rs = spi_controller_get_devdata(master); ++ u32 reg, old_reg, arbit_off; ++ ++ if ((spi->max_speed_hz > master->max_speed_hz) || ++ (spi->max_speed_hz < master->min_speed_hz)) { ++ dev_err(&spi->dev, "invalide requested speed %d Hz\n", ++ spi->max_speed_hz); ++ return -EINVAL; ++ } ++ ++ if (!(master->bits_per_word_mask & ++ BIT(spi->bits_per_word - 1))) { ++ dev_err(&spi->dev, "invalide bits_per_word %d\n", ++ spi->bits_per_word); ++ return -EINVAL; ++ } ++ ++ /* the hardware seems can't work on mode0 force it to mode3 */ ++ if ((spi->mode & (SPI_CPOL | SPI_CPHA)) == SPI_MODE_0) { ++ dev_warn(&spi->dev, "force spi mode3\n"); ++ spi->mode |= SPI_MODE_3; ++ } ++ ++ /* chip polarity */ ++ arbit_off = get_arbiter_offset(master); ++ reg = old_reg = rt2880_spi_read(rs, arbit_off); ++ if (spi->mode & SPI_CS_HIGH) { ++ switch (master->bus_num) { ++ case 1: ++ reg |= SPI1_POR; ++ break; ++ default: ++ reg |= SPI0_POR; ++ break; ++ } ++ } else { ++ switch (master->bus_num) { ++ case 1: ++ reg &= ~SPI1_POR; ++ break; ++ default: ++ reg &= ~SPI0_POR; ++ break; ++ } ++ } ++ ++ /* enable spi1 */ ++ if (master->bus_num == 1) ++ reg |= SPICTL_ARB_EN; ++ ++ if (reg != old_reg) ++ rt2880_spi_write(rs, arbit_off, reg); ++ ++ rt2880_dump_reg(master); ++ ++ return 0; ++} ++ ++static int rt2880_spi_prepare_message(struct spi_controller *master, ++ struct spi_message *msg) ++{ ++ struct rt2880_spi *rs = spi_controller_get_devdata(master); ++ struct spi_device *spi = msg->spi; ++ u32 reg; ++ ++ if ((rs->mode == spi->mode) && (rs->speed == spi->max_speed_hz)) ++ return 0; ++ ++#if 0 ++ /* set spido to tri-state */ ++ rt2880_spi_setbits(rs, RAMIPS_SPI_CTL, SPICTL_HIZSDO); ++#endif ++ ++ reg = rt2880_spi_read(rs, RAMIPS_SPI_CFG); ++ ++ reg &= ~(SPICFG_MSBFIRST | SPICFG_SPICLKPOL | ++ SPICFG_RXCLKEDGE_FALLING | ++ SPICFG_TXCLKEDGE_FALLING | ++ SPICFG_SPICLK_PRESCALE_MASK); ++ ++ /* MSB */ ++ if (!(spi->mode & SPI_LSB_FIRST)) ++ reg |= SPICFG_MSBFIRST; ++ ++ /* spi mode */ ++ switch (spi->mode & (SPI_CPOL | SPI_CPHA)) { ++ case SPI_MODE_0: ++ reg |= SPICFG_TXCLKEDGE_FALLING; ++ break; ++ case SPI_MODE_1: ++ reg |= SPICFG_RXCLKEDGE_FALLING; ++ break; ++ case SPI_MODE_2: ++ reg |= SPICFG_SPICLKPOL | SPICFG_RXCLKEDGE_FALLING; ++ break; ++ case SPI_MODE_3: ++ reg |= SPICFG_SPICLKPOL | SPICFG_TXCLKEDGE_FALLING; ++ break; ++ } ++ rs->mode = spi->mode; ++ ++#if 0 ++ /* set spiclk and spiena to tri-state */ ++ reg |= SPICFG_HIZSPI; ++#endif ++ ++ /* clock divide */ ++ reg |= rt2880_spi_baudrate_get(spi, spi->max_speed_hz); ++ ++ rt2880_spi_write(rs, RAMIPS_SPI_CFG, reg); ++ ++ return 0; ++} ++ ++static int rt2880_spi_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct spi_controller *master; ++ struct rt2880_spi *rs; ++ void __iomem *base; ++ struct clk *clk; ++ int ret; ++ ++ base = devm_platform_ioremap_resource(pdev, 0); ++ if (IS_ERR(base)) ++ return PTR_ERR(base); ++ ++ clk = devm_clk_get_enabled(dev, NULL); ++ if (IS_ERR(clk)) ++ return dev_err_probe(dev, PTR_ERR(clk), "unable to get SYS clock"); ++ ++ master = devm_spi_alloc_master(dev, sizeof(*rs)); ++ if (!master) { ++ dev_err(dev, "master allocation failed\n"); ++ return -ENOMEM; ++ } ++ ++ master->dev.of_node = pdev->dev.of_node; ++ master->mode_bits = RT2880_SPI_MODE_BITS; ++ master->bits_per_word_mask = SPI_BPW_MASK(8); ++ master->min_speed_hz = clk_get_rate(clk) / 128; ++ master->max_speed_hz = clk_get_rate(clk) / 2; ++ master->flags = SPI_CONTROLLER_HALF_DUPLEX; ++ master->setup = rt2880_spi_setup; ++ master->prepare_message = rt2880_spi_prepare_message; ++ master->set_cs = rt2880_spi_set_cs; ++ master->transfer_one = rt2880_spi_transfer_one, ++ ++ rs = spi_controller_get_devdata(master); ++ rs->master = master; ++ rs->base = base; ++ rs->clk = clk; ++ ++ ret = device_reset(&pdev->dev); ++ if (ret) ++ return ret; ++ ++ return devm_spi_register_controller(dev, master); ++} ++ ++MODULE_ALIAS("platform:" DRIVER_NAME); ++ ++static const struct of_device_id rt2880_spi_match[] = { ++ { .compatible = "ralink,rt2880-spi" }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, rt2880_spi_match); ++ ++static struct platform_driver rt2880_spi_driver = { ++ .driver = { ++ .name = DRIVER_NAME, ++ .of_match_table = rt2880_spi_match, ++ }, ++ .probe = rt2880_spi_probe, ++}; ++ ++module_platform_driver(rt2880_spi_driver); ++ ++MODULE_DESCRIPTION("Ralink SPI driver"); ++MODULE_AUTHOR("Sergiy "); ++MODULE_AUTHOR("Gabor Juhos "); ++MODULE_LICENSE("GPL"); diff --git a/target/linux/ramips/patches-6.12/825-i2c-MIPS-adds-ralink-I2C-driver.patch b/target/linux/ramips/patches-6.12/825-i2c-MIPS-adds-ralink-I2C-driver.patch new file mode 100644 index 0000000000..5bed8ea448 --- /dev/null +++ b/target/linux/ramips/patches-6.12/825-i2c-MIPS-adds-ralink-I2C-driver.patch @@ -0,0 +1,468 @@ +From 723b8beaabf3c3c4b1ce69480141f1e926f3f3b2 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sun, 27 Jul 2014 09:52:56 +0100 +Subject: [PATCH 44/53] i2c: MIPS: adds ralink I2C driver + +Signed-off-by: John Crispin +--- + .../devicetree/bindings/i2c/i2c-ralink.txt | 27 ++ + drivers/i2c/busses/Kconfig | 4 + + drivers/i2c/busses/Makefile | 1 + + drivers/i2c/busses/i2c-ralink.c | 327 ++++++++++++++++++++ + 4 files changed, 359 insertions(+) + create mode 100644 Documentation/devicetree/bindings/i2c/i2c-ralink.txt + create mode 100644 drivers/i2c/busses/i2c-ralink.c + +--- /dev/null ++++ b/Documentation/devicetree/bindings/i2c/i2c-ralink.txt +@@ -0,0 +1,27 @@ ++I2C for Ralink platforms ++ ++Required properties : ++- compatible : Must be "link,rt3052-i2c" ++- reg: physical base address of the controller and length of memory mapped ++ region. ++- #address-cells = <1>; ++- #size-cells = <0>; ++ ++Optional properties: ++- Child nodes conforming to i2c bus binding ++ ++Example : ++ ++palmbus@10000000 { ++ i2c@900 { ++ compatible = "link,rt3052-i2c"; ++ reg = <0x900 0x100>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ hwmon@4b { ++ compatible = "national,lm92"; ++ reg = <0x4b>; ++ }; ++ }; ++}; +--- a/drivers/i2c/busses/Kconfig ++++ b/drivers/i2c/busses/Kconfig +@@ -1062,6 +1062,11 @@ config I2C_RK3X + This driver can also be built as a module. If so, the module will + be called i2c-rk3x. + ++config I2C_RALINK ++ tristate "Ralink I2C Controller" ++ depends on RALINK && !SOC_MT7621 ++ select OF_I2C ++ + config I2C_RZV2M + tristate "Renesas RZ/V2M adapter" + depends on ARCH_RENESAS || COMPILE_TEST +--- a/drivers/i2c/busses/Makefile ++++ b/drivers/i2c/busses/Makefile +@@ -98,6 +98,7 @@ obj-$(CONFIG_I2C_PCA_PLATFORM) += i2c-pc + obj-$(CONFIG_I2C_PNX) += i2c-pnx.o + obj-$(CONFIG_I2C_PXA) += i2c-pxa.o + obj-$(CONFIG_I2C_PXA_PCI) += i2c-pxa-pci.o ++obj-$(CONFIG_I2C_RALINK) += i2c-ralink.o + obj-$(CONFIG_I2C_QCOM_CCI) += i2c-qcom-cci.o + obj-$(CONFIG_I2C_QCOM_GENI) += i2c-qcom-geni.o + obj-$(CONFIG_I2C_QUP) += i2c-qup.o +--- /dev/null ++++ b/drivers/i2c/busses/i2c-ralink.c +@@ -0,0 +1,396 @@ ++/* ++ * drivers/i2c/busses/i2c-ralink.c ++ * ++ * Copyright (C) 2013 Steven Liu ++ * Copyright (C) 2016 Michael Lee ++ * ++ * Improve driver for i2cdetect from i2c-tools to detect i2c devices on the bus. ++ * (C) 2014 Sittisak ++ * ++ * This software is licensed under the terms of the GNU General Public ++ * License version 2, as published by the Free Software Foundation, and ++ * may be copied, distributed, and modified under those terms. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define REG_CONFIG_REG 0x00 ++#define REG_CLKDIV_REG 0x04 ++#define REG_DEVADDR_REG 0x08 ++#define REG_ADDR_REG 0x0C ++#define REG_DATAOUT_REG 0x10 ++#define REG_DATAIN_REG 0x14 ++#define REG_STATUS_REG 0x18 ++#define REG_STARTXFR_REG 0x1C ++#define REG_BYTECNT_REG 0x20 ++ ++/* REG_CONFIG_REG */ ++#define I2C_ADDRLEN_OFFSET 5 ++#define I2C_DEVADLEN_OFFSET 2 ++#define I2C_ADDRLEN_MASK 0x3 ++#define I2C_ADDR_DIS BIT(1) ++#define I2C_DEVADDR_DIS BIT(0) ++#define I2C_ADDRLEN_8 (7 << I2C_ADDRLEN_OFFSET) ++#define I2C_DEVADLEN_7 (6 << I2C_DEVADLEN_OFFSET) ++#define I2C_CONF_DEFAULT (I2C_ADDRLEN_8 | I2C_DEVADLEN_7) ++ ++/* REG_CLKDIV_REG */ ++#define I2C_CLKDIV_MASK 0xffff ++ ++/* REG_DEVADDR_REG */ ++#define I2C_DEVADDR_MASK 0x7f ++ ++/* REG_ADDR_REG */ ++#define I2C_ADDR_MASK 0xff ++ ++/* REG_STATUS_REG */ ++#define I2C_STARTERR BIT(4) ++#define I2C_ACKERR BIT(3) ++#define I2C_DATARDY BIT(2) ++#define I2C_SDOEMPTY BIT(1) ++#define I2C_BUSY BIT(0) ++ ++/* REG_STARTXFR_REG */ ++#define NOSTOP_CMD BIT(2) ++#define NODATA_CMD BIT(1) ++#define READ_CMD BIT(0) ++ ++/* REG_BYTECNT_REG */ ++#define BYTECNT_MAX 64 ++#define SET_BYTECNT(x) (x - 1) ++ ++/* timeout waiting for I2C devices to respond (clock streching) */ ++#define TIMEOUT_MS 1000 ++#define DELAY_INTERVAL_US 100 ++ ++struct rt_i2c { ++ void __iomem *base; ++ struct clk *clk; ++ struct device *dev; ++ struct i2c_adapter adap; ++ u32 cur_clk; ++ u32 clk_div; ++ u32 flags; ++}; ++ ++static void rt_i2c_w32(struct rt_i2c *i2c, u32 val, unsigned reg) ++{ ++ iowrite32(val, i2c->base + reg); ++} ++ ++static u32 rt_i2c_r32(struct rt_i2c *i2c, unsigned reg) ++{ ++ return ioread32(i2c->base + reg); ++} ++ ++static int poll_down_timeout(void __iomem *addr, u32 mask) ++{ ++ unsigned long timeout = jiffies + msecs_to_jiffies(TIMEOUT_MS); ++ ++ do { ++ if (!(readl_relaxed(addr) & mask)) ++ return 0; ++ ++ usleep_range(DELAY_INTERVAL_US, DELAY_INTERVAL_US + 50); ++ } while (time_before(jiffies, timeout)); ++ ++ return (readl_relaxed(addr) & mask) ? -EAGAIN : 0; ++} ++ ++static int rt_i2c_wait_idle(struct rt_i2c *i2c) ++{ ++ int ret; ++ ++ ret = poll_down_timeout(i2c->base + REG_STATUS_REG, I2C_BUSY); ++ if (ret < 0) ++ dev_dbg(i2c->dev, "idle err(%d)\n", ret); ++ ++ return ret; ++} ++ ++static int poll_up_timeout(void __iomem *addr, u32 mask) ++{ ++ unsigned long timeout = jiffies + msecs_to_jiffies(TIMEOUT_MS); ++ u32 status; ++ ++ do { ++ status = readl_relaxed(addr); ++ ++ /* check error status */ ++ if (status & I2C_STARTERR) ++ return -EAGAIN; ++ else if (status & I2C_ACKERR) ++ return -ENXIO; ++ else if (status & mask) ++ return 0; ++ ++ usleep_range(DELAY_INTERVAL_US, DELAY_INTERVAL_US + 50); ++ } while (time_before(jiffies, timeout)); ++ ++ return -ETIMEDOUT; ++} ++ ++static int rt_i2c_wait_rx_done(struct rt_i2c *i2c) ++{ ++ int ret; ++ ++ ret = poll_up_timeout(i2c->base + REG_STATUS_REG, I2C_DATARDY); ++ if (ret < 0) ++ dev_dbg(i2c->dev, "rx err(%d)\n", ret); ++ ++ return ret; ++} ++ ++static int rt_i2c_wait_tx_done(struct rt_i2c *i2c) ++{ ++ int ret; ++ ++ ret = poll_up_timeout(i2c->base + REG_STATUS_REG, I2C_SDOEMPTY); ++ if (ret < 0) ++ dev_dbg(i2c->dev, "tx err(%d)\n", ret); ++ ++ return ret; ++} ++ ++static void rt_i2c_reset(struct rt_i2c *i2c) ++{ ++ int ret; ++ ++ ret = device_reset(i2c->adap.dev.parent); ++ if (ret) ++ dev_err(i2c->dev, "Failed to reset device"); ++ ++ barrier(); ++ rt_i2c_w32(i2c, i2c->clk_div, REG_CLKDIV_REG); ++} ++ ++static void rt_i2c_dump_reg(struct rt_i2c *i2c) ++{ ++ dev_dbg(i2c->dev, "conf %08x, clkdiv %08x, devaddr %08x, " \ ++ "addr %08x, dataout %08x, datain %08x, " \ ++ "status %08x, startxfr %08x, bytecnt %08x\n", ++ rt_i2c_r32(i2c, REG_CONFIG_REG), ++ rt_i2c_r32(i2c, REG_CLKDIV_REG), ++ rt_i2c_r32(i2c, REG_DEVADDR_REG), ++ rt_i2c_r32(i2c, REG_ADDR_REG), ++ rt_i2c_r32(i2c, REG_DATAOUT_REG), ++ rt_i2c_r32(i2c, REG_DATAIN_REG), ++ rt_i2c_r32(i2c, REG_STATUS_REG), ++ rt_i2c_r32(i2c, REG_STARTXFR_REG), ++ rt_i2c_r32(i2c, REG_BYTECNT_REG)); ++} ++ ++static int rt_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, ++ int num) ++{ ++ struct rt_i2c *i2c; ++ struct i2c_msg *pmsg; ++ unsigned char addr; ++ int i, j, ret; ++ u32 cmd; ++ ++ i2c = i2c_get_adapdata(adap); ++ ++ for (i = 0; i < num; i++) { ++ pmsg = &msgs[i]; ++ if (i == (num - 1)) ++ cmd = 0; ++ else ++ cmd = NOSTOP_CMD; ++ ++ dev_dbg(i2c->dev, "addr: 0x%x, len: %d, flags: 0x%x, stop: %d\n", ++ pmsg->addr, pmsg->len, pmsg->flags, ++ (cmd == 0)? 1 : 0); ++ ++ /* wait hardware idle */ ++ if ((ret = rt_i2c_wait_idle(i2c))) ++ goto err_timeout; ++ ++ if (pmsg->flags & I2C_M_TEN) { ++ rt_i2c_w32(i2c, I2C_CONF_DEFAULT, REG_CONFIG_REG); ++ /* 10 bits address */ ++ addr = 0x78 | ((pmsg->addr >> 8) & 0x03); ++ rt_i2c_w32(i2c, addr & I2C_DEVADDR_MASK, ++ REG_DEVADDR_REG); ++ rt_i2c_w32(i2c, pmsg->addr & I2C_ADDR_MASK, ++ REG_ADDR_REG); ++ } else { ++ rt_i2c_w32(i2c, I2C_CONF_DEFAULT | I2C_ADDR_DIS, ++ REG_CONFIG_REG); ++ /* 7 bits address */ ++ rt_i2c_w32(i2c, pmsg->addr & I2C_DEVADDR_MASK, ++ REG_DEVADDR_REG); ++ } ++ ++ /* buffer length */ ++ if (pmsg->len == 0) ++ cmd |= NODATA_CMD; ++ else ++ rt_i2c_w32(i2c, SET_BYTECNT(pmsg->len), ++ REG_BYTECNT_REG); ++ ++ j = 0; ++ if (pmsg->flags & I2C_M_RD) { ++ cmd |= READ_CMD; ++ /* start transfer */ ++ barrier(); ++ rt_i2c_w32(i2c, cmd, REG_STARTXFR_REG); ++ do { ++ /* wait */ ++ if ((ret = rt_i2c_wait_rx_done(i2c))) ++ goto err_timeout; ++ /* read data */ ++ if (pmsg->len) ++ pmsg->buf[j] = rt_i2c_r32(i2c, ++ REG_DATAIN_REG); ++ j++; ++ } while (j < pmsg->len); ++ } else { ++ do { ++ /* write data */ ++ if (pmsg->len) ++ rt_i2c_w32(i2c, pmsg->buf[j], ++ REG_DATAOUT_REG); ++ /* start transfer */ ++ if (j == 0) { ++ barrier(); ++ rt_i2c_w32(i2c, cmd, REG_STARTXFR_REG); ++ } ++ /* wait */ ++ if ((ret = rt_i2c_wait_tx_done(i2c))) ++ goto err_timeout; ++ j++; ++ } while (j < pmsg->len); ++ } ++ } ++ /* the return value is number of executed messages */ ++ ret = i; ++ ++ return ret; ++ ++err_timeout: ++ rt_i2c_dump_reg(i2c); ++ rt_i2c_reset(i2c); ++ return ret; ++} ++ ++static u32 rt_i2c_func(struct i2c_adapter *a) ++{ ++ return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; ++} ++ ++static const struct i2c_algorithm rt_i2c_algo = { ++ .master_xfer = rt_i2c_master_xfer, ++ .functionality = rt_i2c_func, ++}; ++ ++static const struct of_device_id i2c_rt_dt_ids[] = { ++ { .compatible = "ralink,rt2880-i2c" }, ++ { /* sentinel */ } ++}; ++ ++MODULE_DEVICE_TABLE(of, i2c_rt_dt_ids); ++ ++static struct i2c_adapter_quirks rt_i2c_quirks = { ++ .max_write_len = BYTECNT_MAX, ++ .max_read_len = BYTECNT_MAX, ++}; ++ ++static int rt_i2c_init(struct rt_i2c *i2c) ++{ ++ u32 reg; ++ ++ /* i2c_sclk = periph_clk / ((2 * clk_div) + 5) */ ++ i2c->clk_div = (clk_get_rate(i2c->clk) - (5 * i2c->cur_clk)) / ++ (2 * i2c->cur_clk); ++ if (i2c->clk_div < 8) ++ i2c->clk_div = 8; ++ if (i2c->clk_div > I2C_CLKDIV_MASK) ++ i2c->clk_div = I2C_CLKDIV_MASK; ++ ++ /* check support combinde/repeated start message */ ++ rt_i2c_w32(i2c, NOSTOP_CMD, REG_STARTXFR_REG); ++ reg = rt_i2c_r32(i2c, REG_STARTXFR_REG) & NOSTOP_CMD; ++ ++ rt_i2c_reset(i2c); ++ ++ return reg; ++} ++ ++static int rt_i2c_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct rt_i2c *i2c; ++ struct i2c_adapter *adap; ++ int restart; ++ ++ i2c = devm_kzalloc(dev, sizeof(struct rt_i2c), GFP_KERNEL); ++ if (!i2c) { ++ dev_err(dev, "failed to allocate i2c_adapter\n"); ++ return -ENOMEM; ++ } ++ ++ i2c->base = devm_platform_ioremap_resource(pdev, 0); ++ if (IS_ERR(i2c->base)) ++ return PTR_ERR(i2c->base); ++ ++ i2c->clk = devm_clk_get_enabled(dev, NULL); ++ if (IS_ERR(i2c->clk)) ++ return dev_err_probe(dev, PTR_ERR(i2c->clk), "no clock defined"); ++ ++ i2c->dev = dev; ++ ++ if (of_property_read_u32(pdev->dev.of_node, ++ "clock-frequency", &i2c->cur_clk)) ++ i2c->cur_clk = 100000; ++ ++ adap = &i2c->adap; ++ adap->class = I2C_CLASS_HWMON; ++ adap->algo = &rt_i2c_algo; ++ adap->retries = 3; ++ adap->dev.parent = dev; ++ i2c_set_adapdata(adap, i2c); ++ adap->dev.of_node = pdev->dev.of_node; ++ strscpy(adap->name, dev_name(dev), sizeof(adap->name)); ++ adap->quirks = &rt_i2c_quirks; ++ ++ restart = rt_i2c_init(i2c); ++ ++ dev_info(dev, "clock %uKHz, re-start %ssupport\n", ++ i2c->cur_clk/1000, restart ? "" : "not "); ++ ++ return devm_i2c_add_adapter(dev, adap); ++} ++ ++static struct platform_driver rt_i2c_driver = { ++ .probe = rt_i2c_probe, ++ .driver = { ++ .name = "i2c-ralink", ++ .of_match_table = i2c_rt_dt_ids, ++ }, ++}; ++ ++module_platform_driver(rt_i2c_driver); ++ ++MODULE_AUTHOR("Steven Liu "); ++MODULE_DESCRIPTION("Ralink I2c host driver"); ++MODULE_LICENSE("GPL"); ++MODULE_ALIAS("platform:Ralink-I2C"); diff --git a/target/linux/ramips/patches-6.12/830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch b/target/linux/ramips/patches-6.12/830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch new file mode 100644 index 0000000000..c4cf5ddcde --- /dev/null +++ b/target/linux/ramips/patches-6.12/830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch @@ -0,0 +1,46 @@ +From 23147af14531cbdada194b94120ef8774f46292d Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Thu, 13 Nov 2014 19:08:40 +0100 +Subject: [PATCH 46/53] mmc: MIPS: ralink: add sdhci for mt7620a SoC + +Signed-off-by: John Crispin +--- + drivers/mmc/host/Kconfig | 2 + + drivers/mmc/host/Makefile | 1 + + drivers/mmc/host/mtk-mmc/Kconfig | 16 + + drivers/mmc/host/mtk-mmc/Makefile | 42 + + drivers/mmc/host/mtk-mmc/board.h | 137 ++ + drivers/mmc/host/mtk-mmc/dbg.c | 347 ++++ + drivers/mmc/host/mtk-mmc/dbg.h | 156 ++ + drivers/mmc/host/mtk-mmc/mt6575_sd.h | 1001 +++++++++++ + drivers/mmc/host/mtk-mmc/sd.c | 3060 ++++++++++++++++++++++++++++++++++ + 9 files changed, 4762 insertions(+) + create mode 100644 drivers/mmc/host/mtk-mmc/Kconfig + create mode 100644 drivers/mmc/host/mtk-mmc/Makefile + create mode 100644 drivers/mmc/host/mtk-mmc/board.h + create mode 100644 drivers/mmc/host/mtk-mmc/dbg.c + create mode 100644 drivers/mmc/host/mtk-mmc/dbg.h + create mode 100644 drivers/mmc/host/mtk-mmc/mt6575_sd.h + create mode 100644 drivers/mmc/host/mtk-mmc/sd.c + +--- a/drivers/mmc/host/Kconfig ++++ b/drivers/mmc/host/Kconfig +@@ -1090,6 +1090,8 @@ config MMC_OWL + config MMC_SDHCI_EXTERNAL_DMA + bool + ++source "drivers/mmc/host/mtk-mmc/Kconfig" ++ + config MMC_LITEX + tristate "LiteX MMC Host Controller support" + depends on ((PPC_MICROWATT || LITEX) && OF && HAVE_CLK) || COMPILE_TEST +--- a/drivers/mmc/host/Makefile ++++ b/drivers/mmc/host/Makefile +@@ -3,6 +3,7 @@ + # Makefile for MMC/SD host controller drivers + # + ++obj-$(CONFIG_MTK_MMC) += mtk-mmc/ + obj-$(CONFIG_MMC_ARMMMCI) += armmmci.o + armmmci-y := mmci.o + armmmci-$(CONFIG_MMC_QCOM_DML) += mmci_qcom_dml.o diff --git a/target/linux/ramips/patches-6.12/831-01-mmc-mtk-sd-add-tuning-parameters-for-legacy-MIPS-MT7.patch b/target/linux/ramips/patches-6.12/831-01-mmc-mtk-sd-add-tuning-parameters-for-legacy-MIPS-MT7.patch new file mode 100644 index 0000000000..e7d353a13d --- /dev/null +++ b/target/linux/ramips/patches-6.12/831-01-mmc-mtk-sd-add-tuning-parameters-for-legacy-MIPS-MT7.patch @@ -0,0 +1,81 @@ +From: Shiji Yang +Date: Sat, 24 May 2025 15:53:26 +0800 +Subject: [PATCH 1/3] mmc: mtk-sd: add tuning parameters for legacy MIPS MT762x + SoCs + +The MIPS MT762x SoCs require some specific tuning parameters at +different clock frequencies. These legacy SoCs only support max +48~50 MHz High-Speed SD mode. Therefore, the standard tuning step +is not available. We have to hard code these tuning parameters +to make them work properly. + +Signed-off-by: Shiji Yang +--- + drivers/mmc/host/mtk-sd.c | 26 +++++++++++++++++++++++++- + 1 file changed, 25 insertions(+), 1 deletion(-) + +--- a/drivers/mmc/host/mtk-sd.c ++++ b/drivers/mmc/host/mtk-sd.c +@@ -75,8 +75,13 @@ + #define MSDC_PATCH_BIT 0xb0 + #define MSDC_PATCH_BIT1 0xb4 + #define MSDC_PATCH_BIT2 0xb8 ++#define MSDC_PAD_CTRL0 0xe0 ++#define MSDC_PAD_CTRL1 0xe4 ++#define MSDC_PAD_CTRL2 0xe8 + #define MSDC_PAD_TUNE 0xec + #define MSDC_PAD_TUNE0 0xf0 ++#define MSDC_DAT_RDDLY0 0xf0 ++#define MSDC_DAT_RDDLY1 0xf4 + #define PAD_DS_TUNE 0x188 + #define PAD_CMD_TUNE 0x18c + #define EMMC51_CFG0 0x204 +@@ -408,6 +413,7 @@ struct mtk_mmc_compatible { + bool enhance_rx; + bool support_64g; + bool use_internal_cd; ++ bool mips_mt762x; + }; + + struct msdc_tune_para { +@@ -547,6 +553,7 @@ static const struct mtk_mmc_compatible m + .stop_clk_fix = false, + .enhance_rx = false, + .use_internal_cd = true, ++ .mips_mt762x = true, + }; + + static const struct mtk_mmc_compatible mt7622_compat = { +@@ -975,7 +982,12 @@ static void msdc_set_mclk(struct msdc_ho + * mmc_select_hs400() will drop to 50Mhz and High speed mode, + * tune result of hs200/200Mhz is not suitable for 50Mhz + */ +- if (mmc->actual_clock <= 52000000) { ++ if (host->dev_comp->mips_mt762x && ++ mmc->actual_clock > 25000000) { ++ sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); ++ sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL); ++ sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL); ++ } else if (mmc->actual_clock <= 52000000) { + writel(host->def_tune_para.iocon, host->base + MSDC_IOCON); + if (host->top_base) { + writel(host->def_tune_para.emmc_top_control, +@@ -1856,6 +1868,18 @@ static void msdc_init_hw(struct msdc_hos + MSDC_PAD_TUNE_RXDLYSEL); + } + ++ if (host->dev_comp->mips_mt762x) { ++ /* Set pins drive strength */ ++ writel(0x000d0044, host->base + MSDC_PAD_CTRL0); ++ writel(0x000e0044, host->base + MSDC_PAD_CTRL1); ++ writel(0x000e0044, host->base + MSDC_PAD_CTRL2); ++ ++ /* Set tuning parameters */ ++ writel(0x84101010, host->base + tune_reg); ++ writel(0x10101010, host->base + MSDC_DAT_RDDLY0); ++ writel(0x10101010, host->base + MSDC_DAT_RDDLY1); ++ } ++ + if (mmc->caps2 & MMC_CAP2_NO_SDIO) { + sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_SDIO); + sdr_clr_bits(host->base + MSDC_INTEN, MSDC_INTEN_SDIOIRQ); diff --git a/target/linux/ramips/patches-6.12/831-02-mmc-mtk-sd-disable-auto-CMD23-support-for-mt7620.patch b/target/linux/ramips/patches-6.12/831-02-mmc-mtk-sd-disable-auto-CMD23-support-for-mt7620.patch new file mode 100644 index 0000000000..b9d25dff84 --- /dev/null +++ b/target/linux/ramips/patches-6.12/831-02-mmc-mtk-sd-disable-auto-CMD23-support-for-mt7620.patch @@ -0,0 +1,137 @@ +From: Shiji Yang +Date: Fri, 13 Jun 2025 20:12:55 +0800 +Subject: [PATCH 2/3] mmc: mtk-sd: disable auto CMD23 support for mt7620 + +MT7628 ProgrammingGuide indicates that the host controller version +3.0 and later support auto CMD23 function. However, it doesn't +define SD command register BIT[29](Auto CMD23 enable bit). I guess +the legacy MIPS MT762x series SoCs don't support this feature at +all. The experiment on JDCloud RE-SP-01B(MT7621 + 128 GiB EMMC) +shows that disabling auto CMD23 can fix the following IO errors: + +[ 143.344604] mtk-msdc 1e130000.mmc: msdc_track_cmd_data: cmd=6 arg=03B30101; host->error=0x00000002 +[ 143.353661] mtk-msdc 1e130000.mmc: msdc_track_cmd_data: cmd=6 arg=03B30101; host->error=0x00000002 +[ 143.362662] mtk-msdc 1e130000.mmc: msdc_track_cmd_data: cmd=6 arg=03B30101; host->error=0x00000002 +[ 143.371684] mtk-msdc 1e130000.mmc: msdc_track_cmd_data: cmd=6 arg=03B30101; host->error=0x00000002 +[ 143.380684] I/O error, dev mmcblk0boot0, sector 0 op 0x0:(READ) flags 0x80700 phys_seg 4 prio class 0 +[ 143.390414] mtk-msdc 1e130000.mmc: msdc_track_cmd_data: cmd=6 arg=03B30101; host->error=0x00000002 +[ 143.399468] mtk-msdc 1e130000.mmc: msdc_track_cmd_data: cmd=6 arg=03B30101; host->error=0x00000002 +[ 143.408516] mtk-msdc 1e130000.mmc: msdc_track_cmd_data: cmd=6 arg=03B30101; host->error=0x00000002 +[ 143.417556] mtk-msdc 1e130000.mmc: msdc_track_cmd_data: cmd=6 arg=03B30101; host->error=0x00000002 +[ 143.426590] I/O error, dev mmcblk0boot0, sector 0 op 0x0:(READ) flags 0x0 phys_seg 1 prio class 0 +[ 143.435585] Buffer I/O error on dev mmcblk0boot0, logical block 0, async page read + +Signed-off-by: Shiji Yang +--- + drivers/mmc/host/mtk-sd.c | 16 +++++++++++++++- + 1 file changed, 15 insertions(+), 1 deletion(-) + +--- a/drivers/mmc/host/mtk-sd.c ++++ b/drivers/mmc/host/mtk-sd.c +@@ -412,6 +412,7 @@ struct mtk_mmc_compatible { + bool stop_clk_fix; + bool enhance_rx; + bool support_64g; ++ bool support_cmd23; + bool use_internal_cd; + bool mips_mt762x; + }; +@@ -501,6 +502,7 @@ static const struct mtk_mmc_compatible m + .stop_clk_fix = false, + .enhance_rx = false, + .support_64g = false, ++ .support_cmd23 = true, + }; + + static const struct mtk_mmc_compatible mt2712_compat = { +@@ -514,6 +516,7 @@ static const struct mtk_mmc_compatible m + .stop_clk_fix = true, + .enhance_rx = true, + .support_64g = true, ++ .support_cmd23 = true, + }; + + static const struct mtk_mmc_compatible mt6779_compat = { +@@ -527,6 +530,7 @@ static const struct mtk_mmc_compatible m + .stop_clk_fix = true, + .enhance_rx = true, + .support_64g = true, ++ .support_cmd23 = true, + }; + + static const struct mtk_mmc_compatible mt6795_compat = { +@@ -540,6 +544,7 @@ static const struct mtk_mmc_compatible m + .stop_clk_fix = false, + .enhance_rx = false, + .support_64g = false, ++ .support_cmd23 = true, + }; + + static const struct mtk_mmc_compatible mt7620_compat = { +@@ -552,6 +557,7 @@ static const struct mtk_mmc_compatible m + .busy_check = false, + .stop_clk_fix = false, + .enhance_rx = false, ++ .support_cmd23 = false, + .use_internal_cd = true, + .mips_mt762x = true, + }; +@@ -567,6 +573,7 @@ static const struct mtk_mmc_compatible m + .stop_clk_fix = true, + .enhance_rx = true, + .support_64g = false, ++ .support_cmd23 = true, + }; + + static const struct mtk_mmc_compatible mt7986_compat = { +@@ -580,6 +587,7 @@ static const struct mtk_mmc_compatible m + .stop_clk_fix = true, + .enhance_rx = true, + .support_64g = true, ++ .support_cmd23 = true, + }; + + static const struct mtk_mmc_compatible mt8135_compat = { +@@ -593,6 +601,7 @@ static const struct mtk_mmc_compatible m + .stop_clk_fix = false, + .enhance_rx = false, + .support_64g = false, ++ .support_cmd23 = true, + }; + + static const struct mtk_mmc_compatible mt8173_compat = { +@@ -606,6 +615,7 @@ static const struct mtk_mmc_compatible m + .stop_clk_fix = false, + .enhance_rx = false, + .support_64g = false, ++ .support_cmd23 = true, + }; + + static const struct mtk_mmc_compatible mt8183_compat = { +@@ -619,6 +629,7 @@ static const struct mtk_mmc_compatible m + .stop_clk_fix = true, + .enhance_rx = true, + .support_64g = true, ++ .support_cmd23 = true, + }; + + static const struct mtk_mmc_compatible mt8516_compat = { +@@ -630,6 +641,7 @@ static const struct mtk_mmc_compatible m + .data_tune = true, + .busy_check = true, + .stop_clk_fix = true, ++ .support_cmd23 = true, + }; + + static const struct of_device_id msdc_of_ids[] = { +@@ -2913,7 +2925,9 @@ static int msdc_drv_probe(struct platfor + if (mmc->caps & MMC_CAP_SDIO_IRQ) + mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD; + +- mmc->caps |= MMC_CAP_CMD23; ++ if (host->dev_comp->support_cmd23) ++ mmc->caps |= MMC_CAP_CMD23; ++ + if (host->cqhci) + mmc->caps2 |= MMC_CAP2_CQE | MMC_CAP2_CQE_DCMD; + /* MMC core transfer sizes tunable parameters */ diff --git a/target/linux/ramips/patches-6.12/831-03-mmc-mtk-sd-use-default-PATCH_BIT1-2-values-for-mt762.patch b/target/linux/ramips/patches-6.12/831-03-mmc-mtk-sd-use-default-PATCH_BIT1-2-values-for-mt762.patch new file mode 100644 index 0000000000..3142870aee --- /dev/null +++ b/target/linux/ramips/patches-6.12/831-03-mmc-mtk-sd-use-default-PATCH_BIT1-2-values-for-mt762.patch @@ -0,0 +1,30 @@ +From: Shiji Yang +Date: Sat, 24 May 2025 15:53:26 +0800 +Subject: [PATCH 3/3] mmc: mtk-sd: use default PATCH_BIT1/2 values for mt7620 + +The definitions of these two registers seem to be slightly different +from other variants. Use their default values to follow the vendor +SDK driver behaviors. + +Signed-off-by: Shiji Yang +--- + drivers/mmc/host/mtk-sd.c | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +--- a/drivers/mmc/host/mtk-sd.c ++++ b/drivers/mmc/host/mtk-sd.c +@@ -1804,9 +1804,11 @@ static void msdc_init_hw(struct msdc_hos + } + writel(0, host->base + MSDC_IOCON); + sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_DDLSEL, 0); +- writel(0x403c0046, host->base + MSDC_PATCH_BIT); +- sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1); +- writel(0xffff4089, host->base + MSDC_PATCH_BIT1); ++ if (!host->dev_comp->mips_mt762x) { ++ writel(0x403c0046, host->base + MSDC_PATCH_BIT); ++ sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1); ++ writel(0xffff4089, host->base + MSDC_PATCH_BIT1); ++ } + sdr_set_bits(host->base + EMMC50_CFG0, EMMC50_CFG_CFCSTS_SEL); + + if (host->dev_comp->stop_clk_fix) { diff --git a/target/linux/ramips/patches-6.12/835-asoc-add-mt7620-support.patch b/target/linux/ramips/patches-6.12/835-asoc-add-mt7620-support.patch new file mode 100644 index 0000000000..d4027c904a --- /dev/null +++ b/target/linux/ramips/patches-6.12/835-asoc-add-mt7620-support.patch @@ -0,0 +1,983 @@ +From 7f29222b1731e8182ba94a331531dec18865a1e4 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sun, 27 Jul 2014 09:31:47 +0100 +Subject: [PATCH 48/53] asoc: add mt7620 support + +Signed-off-by: John Crispin +--- + sound/soc/Kconfig | 1 + + sound/soc/Makefile | 1 + + sound/soc/ralink/Kconfig | 15 ++ + sound/soc/ralink/Makefile | 11 + + sound/soc/ralink/mt7620-i2s.c | 436 ++++++++++++++++++++++++++++++++++++++ + sound/soc/ralink/mt7620-wm8960.c | 233 ++++++++++++++++++++ + 7 files changed, 699 insertions(+) + create mode 100644 sound/soc/ralink/Kconfig + create mode 100644 sound/soc/ralink/Makefile + create mode 100644 sound/soc/ralink/mt7620-i2s.c + create mode 100644 sound/soc/ralink/mt7620-wm8960.c + +--- a/sound/soc/Kconfig ++++ b/sound/soc/Kconfig +@@ -107,6 +107,7 @@ source "sound/soc/mxs/Kconfig" + source "sound/soc/pxa/Kconfig" + source "sound/soc/qcom/Kconfig" + source "sound/soc/rockchip/Kconfig" ++source "sound/soc/ralink/Kconfig" + source "sound/soc/samsung/Kconfig" + source "sound/soc/sh/Kconfig" + source "sound/soc/sof/Kconfig" +--- a/sound/soc/Makefile ++++ b/sound/soc/Makefile +@@ -60,6 +60,7 @@ obj-$(CONFIG_SND_SOC) += kirkwood/ + obj-$(CONFIG_SND_SOC) += pxa/ + obj-$(CONFIG_SND_SOC) += qcom/ + obj-$(CONFIG_SND_SOC) += rockchip/ ++obj-$(CONFIG_SND_SOC) += ralink/ + obj-$(CONFIG_SND_SOC) += samsung/ + obj-$(CONFIG_SND_SOC) += sh/ + obj-$(CONFIG_SND_SOC) += sof/ +--- /dev/null ++++ b/sound/soc/ralink/Kconfig +@@ -0,0 +1,8 @@ ++config SND_RALINK_SOC_I2S ++ depends on RALINK && SND_SOC && !SOC_RT288X ++ select SND_SOC_GENERIC_DMAENGINE_PCM ++ select REGMAP_MMIO ++ tristate "SoC Audio (I2S protocol) for Ralink SoC" ++ help ++ Say Y if you want to use I2S protocol and I2S codec on Ralink/MediaTek ++ based boards. +--- /dev/null ++++ b/sound/soc/ralink/Makefile +@@ -0,0 +1,6 @@ ++# ++# Ralink/MediaTek Platform Support ++# ++snd-soc-ralink-i2s-objs := ralink-i2s.o ++ ++obj-$(CONFIG_SND_RALINK_SOC_I2S) += snd-soc-ralink-i2s.o +--- /dev/null ++++ b/sound/soc/ralink/ralink-i2s.c +@@ -0,0 +1,921 @@ ++/* ++ * Copyright (C) 2010, Lars-Peter Clausen ++ * Copyright (C) 2016 Michael Lee ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 675 Mass Ave, Cambridge, MA 02139, USA. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#define DRV_NAME "ralink-i2s" ++ ++#define I2S_REG_CFG0 0x00 ++#define I2S_REG_INT_STATUS 0x04 ++#define I2S_REG_INT_EN 0x08 ++#define I2S_REG_FF_STATUS 0x0c ++#define I2S_REG_WREG 0x10 ++#define I2S_REG_RREG 0x14 ++#define I2S_REG_CFG1 0x18 ++#define I2S_REG_DIVCMP 0x20 ++#define I2S_REG_DIVINT 0x24 ++ ++/* I2S_REG_CFG0 */ ++#define I2S_REG_CFG0_EN BIT(31) ++#define I2S_REG_CFG0_DMA_EN BIT(30) ++#define I2S_REG_CFG0_BYTE_SWAP BIT(28) ++#define I2S_REG_CFG0_TX_EN BIT(24) ++#define I2S_REG_CFG0_RX_EN BIT(20) ++#define I2S_REG_CFG0_SLAVE BIT(16) ++#define I2S_REG_CFG0_RX_THRES 12 ++#define I2S_REG_CFG0_TX_THRES 4 ++#define I2S_REG_CFG0_THRES_MASK (0xf << I2S_REG_CFG0_RX_THRES) | \ ++ (4 << I2S_REG_CFG0_TX_THRES) ++#define I2S_REG_CFG0_DFT_THRES (4 << I2S_REG_CFG0_RX_THRES) | \ ++ (4 << I2S_REG_CFG0_TX_THRES) ++/* RT305x */ ++#define I2S_REG_CFG0_CLK_DIS BIT(8) ++#define I2S_REG_CFG0_TXCH_SWAP BIT(3) ++#define I2S_REG_CFG0_TXCH1_OFF BIT(2) ++#define I2S_REG_CFG0_TXCH0_OFF BIT(1) ++#define I2S_REG_CFG0_SLAVE_EN BIT(0) ++/* RT3883 */ ++#define I2S_REG_CFG0_RXCH_SWAP BIT(11) ++#define I2S_REG_CFG0_RXCH1_OFF BIT(10) ++#define I2S_REG_CFG0_RXCH0_OFF BIT(9) ++#define I2S_REG_CFG0_WS_INV BIT(0) ++/* MT7628 */ ++#define I2S_REG_CFG0_FMT_LE BIT(29) ++#define I2S_REG_CFG0_SYS_BE BIT(28) ++#define I2S_REG_CFG0_NORM_24 BIT(18) ++#define I2S_REG_CFG0_DATA_24 BIT(17) ++ ++/* I2S_REG_INT_STATUS */ ++#define I2S_REG_INT_RX_FAULT BIT(7) ++#define I2S_REG_INT_RX_OVRUN BIT(6) ++#define I2S_REG_INT_RX_UNRUN BIT(5) ++#define I2S_REG_INT_RX_THRES BIT(4) ++#define I2S_REG_INT_TX_FAULT BIT(3) ++#define I2S_REG_INT_TX_OVRUN BIT(2) ++#define I2S_REG_INT_TX_UNRUN BIT(1) ++#define I2S_REG_INT_TX_THRES BIT(0) ++#define I2S_REG_INT_TX_MASK 0xf ++#define I2S_REG_INT_RX_MASK 0xf0 ++ ++/* I2S_REG_INT_STATUS */ ++#define I2S_RX_AVCNT(x) ((x >> 4) & 0xf) ++#define I2S_TX_AVCNT(x) (x & 0xf) ++/* MT7628 */ ++#define MT7628_I2S_RX_AVCNT(x) ((x >> 8) & 0x1f) ++#define MT7628_I2S_TX_AVCNT(x) (x & 0x1f) ++ ++/* I2S_REG_CFG1 */ ++#define I2S_REG_CFG1_LBK BIT(31) ++#define I2S_REG_CFG1_EXTLBK BIT(30) ++/* RT3883 */ ++#define I2S_REG_CFG1_LEFT_J BIT(0) ++#define I2S_REG_CFG1_RIGHT_J BIT(1) ++#define I2S_REG_CFG1_FMT_MASK 0x3 ++ ++/* I2S_REG_DIVCMP */ ++#define I2S_REG_DIVCMP_CLKEN BIT(31) ++#define I2S_REG_DIVCMP_DIVCOMP_MASK 0x1ff ++ ++/* I2S_REG_DIVINT */ ++#define I2S_REG_DIVINT_MASK 0x3ff ++ ++/* BCLK dividers */ ++#define RALINK_I2S_DIVCMP 0 ++#define RALINK_I2S_DIVINT 1 ++ ++/* FIFO */ ++#define RALINK_I2S_FIFO_SIZE 32 ++ ++/* feature flags */ ++#define RALINK_FLAGS_TXONLY BIT(0) ++#define RALINK_FLAGS_LEFT_J BIT(1) ++#define RALINK_FLAGS_RIGHT_J BIT(2) ++#define RALINK_FLAGS_ENDIAN BIT(3) ++#define RALINK_FLAGS_24BIT BIT(4) ++ ++#define RALINK_I2S_INT_EN 0 ++ ++struct ralink_i2s_stats { ++ u32 dmafault; ++ u32 overrun; ++ u32 underrun; ++ u32 belowthres; ++}; ++ ++struct ralink_i2s { ++ struct device *dev; ++ void __iomem *regs; ++ struct clk *clk; ++ struct regmap *regmap; ++ u32 flags; ++ unsigned int fmt; ++ u16 txdma_req; ++ u16 rxdma_req; ++ ++ struct snd_dmaengine_dai_dma_data playback_dma_data; ++ struct snd_dmaengine_dai_dma_data capture_dma_data; ++ ++ struct dentry *dbg_dir; ++ struct ralink_i2s_stats txstats; ++ struct ralink_i2s_stats rxstats; ++}; ++ ++static void ralink_i2s_dump_regs(struct ralink_i2s *i2s) ++{ ++ u32 buf[10]; ++ int ret; ++ ++ ret = regmap_bulk_read(i2s->regmap, I2S_REG_CFG0, ++ buf, ARRAY_SIZE(buf)); ++ ++ dev_dbg(i2s->dev, "CFG0: %08x, INTSTAT: %08x, INTEN: %08x, " \ ++ "FFSTAT: %08x, WREG: %08x, RREG: %08x, " \ ++ "CFG1: %08x, DIVCMP: %08x, DIVINT: %08x\n", ++ buf[0], buf[1], buf[2], buf[3], buf[4], ++ buf[5], buf[6], buf[8], buf[9]); ++} ++ ++static int ralink_i2s_set_sysclk(struct snd_soc_dai *dai, ++ int clk_id, unsigned int freq, int dir) ++{ ++ return 0; ++} ++ ++static int ralink_i2s_set_sys_bclk(struct snd_soc_dai *dai, int width, int rate) ++{ ++ struct ralink_i2s *i2s = snd_soc_dai_get_drvdata(dai); ++ unsigned long clk = clk_get_rate(i2s->clk); ++ int div; ++ uint32_t data; ++ ++ /* disable clock at slave mode */ ++ if ((i2s->fmt & SND_SOC_DAIFMT_MASTER_MASK) == ++ SND_SOC_DAIFMT_CBM_CFM) { ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, ++ I2S_REG_CFG0_CLK_DIS, ++ I2S_REG_CFG0_CLK_DIS); ++ return 0; ++ } ++ ++ /* FREQOUT = FREQIN / (I2S_CLK_DIV + 1) */ ++ div = (clk / rate ) - 1; ++ ++ data = rt_sysc_r32(0x30); ++ data &= (0xff << 8); ++ data |= (0x1 << 15) | (div << 8); ++ rt_sysc_w32(data, 0x30); ++ ++ /* enable clock */ ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, I2S_REG_CFG0_CLK_DIS, 0); ++ ++ dev_dbg(i2s->dev, "clk: %lu, rate: %u, div: %d\n", ++ clk, rate, div); ++ ++ return 0; ++} ++ ++static int ralink_i2s_set_bclk(struct snd_soc_dai *dai, int width, int rate) ++{ ++ struct ralink_i2s *i2s = snd_soc_dai_get_drvdata(dai); ++ unsigned long clk = clk_get_rate(i2s->clk); ++ int divint, divcomp; ++ ++ /* disable clock at slave mode */ ++ if ((i2s->fmt & SND_SOC_DAIFMT_MASTER_MASK) == ++ SND_SOC_DAIFMT_CBM_CFM) { ++ regmap_update_bits(i2s->regmap, I2S_REG_DIVCMP, ++ I2S_REG_DIVCMP_CLKEN, 0); ++ return 0; ++ } ++ ++ /* FREQOUT = FREQIN * (1/2) * (1/(DIVINT + DIVCOMP/512)) */ ++ clk = clk / (2 * 2 * width); ++ divint = clk / rate; ++ divcomp = ((clk % rate) * 512) / rate; ++ ++ if ((divint > I2S_REG_DIVINT_MASK) || ++ (divcomp > I2S_REG_DIVCMP_DIVCOMP_MASK)) ++ return -EINVAL; ++ ++ regmap_update_bits(i2s->regmap, I2S_REG_DIVINT, ++ I2S_REG_DIVINT_MASK, divint); ++ regmap_update_bits(i2s->regmap, I2S_REG_DIVCMP, ++ I2S_REG_DIVCMP_DIVCOMP_MASK, divcomp); ++ ++ /* enable clock */ ++ regmap_update_bits(i2s->regmap, I2S_REG_DIVCMP, I2S_REG_DIVCMP_CLKEN, ++ I2S_REG_DIVCMP_CLKEN); ++ ++ dev_dbg(i2s->dev, "clk: %lu, rate: %u, int: %d, comp: %d\n", ++ clk_get_rate(i2s->clk), rate, divint, divcomp); ++ ++ return 0; ++} ++ ++static int ralink_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) ++{ ++ struct ralink_i2s *i2s = snd_soc_dai_get_drvdata(dai); ++ unsigned int cfg0 = 0, cfg1 = 0; ++ ++ /* set master/slave audio interface */ ++ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { ++ case SND_SOC_DAIFMT_CBM_CFM: ++ if (i2s->flags & RALINK_FLAGS_TXONLY) ++ cfg0 |= I2S_REG_CFG0_SLAVE_EN; ++ else ++ cfg0 |= I2S_REG_CFG0_SLAVE; ++ break; ++ case SND_SOC_DAIFMT_CBS_CFS: ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ /* interface format */ ++ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { ++ case SND_SOC_DAIFMT_I2S: ++ break; ++ case SND_SOC_DAIFMT_RIGHT_J: ++ if (i2s->flags & RALINK_FLAGS_RIGHT_J) { ++ cfg1 |= I2S_REG_CFG1_RIGHT_J; ++ break; ++ } ++ return -EINVAL; ++ case SND_SOC_DAIFMT_LEFT_J: ++ if (i2s->flags & RALINK_FLAGS_LEFT_J) { ++ cfg1 |= I2S_REG_CFG1_LEFT_J; ++ break; ++ } ++ return -EINVAL; ++ default: ++ return -EINVAL; ++ } ++ ++ /* clock inversion */ ++ switch (fmt & SND_SOC_DAIFMT_INV_MASK) { ++ case SND_SOC_DAIFMT_NB_NF: ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ if (i2s->flags & RALINK_FLAGS_TXONLY) { ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, ++ I2S_REG_CFG0_SLAVE_EN, cfg0); ++ } else { ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, ++ I2S_REG_CFG0_SLAVE, cfg0); ++ } ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG1, ++ I2S_REG_CFG1_FMT_MASK, cfg1); ++ i2s->fmt = fmt; ++ ++ return 0; ++} ++ ++static int ralink_i2s_startup(struct snd_pcm_substream *substream, ++ struct snd_soc_dai *dai) ++{ ++ struct ralink_i2s *i2s = snd_soc_dai_get_drvdata(dai); ++ ++ if (snd_soc_dai_active(dai)) ++ return 0; ++ ++ /* setup status interrupt */ ++#if (RALINK_I2S_INT_EN) ++ regmap_write(i2s->regmap, I2S_REG_INT_EN, 0xff); ++#else ++ regmap_write(i2s->regmap, I2S_REG_INT_EN, 0x0); ++#endif ++ ++ /* enable */ ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, ++ I2S_REG_CFG0_EN | I2S_REG_CFG0_DMA_EN | ++ I2S_REG_CFG0_THRES_MASK, ++ I2S_REG_CFG0_EN | I2S_REG_CFG0_DMA_EN | ++ I2S_REG_CFG0_DFT_THRES); ++ ++ return 0; ++} ++ ++static void ralink_i2s_shutdown(struct snd_pcm_substream *substream, ++ struct snd_soc_dai *dai) ++{ ++ struct ralink_i2s *i2s = snd_soc_dai_get_drvdata(dai); ++ ++ /* If both streams are stopped, disable module and clock */ ++ if (snd_soc_dai_active(dai)) ++ return; ++ ++ /* ++ * datasheet mention when disable all control regs are cleared ++ * to initial values. need reinit at startup. ++ */ ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, I2S_REG_CFG0_EN, 0); ++} ++ ++static int ralink_i2s_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) ++{ ++ struct ralink_i2s *i2s = snd_soc_dai_get_drvdata(dai); ++ int width; ++ int ret; ++ ++ width = params_width(params); ++ switch (width) { ++ case 16: ++ if (i2s->flags & RALINK_FLAGS_24BIT) ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, ++ I2S_REG_CFG0_DATA_24, 0); ++ break; ++ case 24: ++ if (i2s->flags & RALINK_FLAGS_24BIT) { ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, ++ I2S_REG_CFG0_DATA_24, ++ I2S_REG_CFG0_DATA_24); ++ break; ++ } ++ return -EINVAL; ++ default: ++ return -EINVAL; ++ } ++ ++ switch (params_channels(params)) { ++ case 2: ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ if (i2s->flags & RALINK_FLAGS_ENDIAN) { ++ /* system endian */ ++#ifdef SNDRV_LITTLE_ENDIAN ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, ++ I2S_REG_CFG0_SYS_BE, 0); ++#else ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, ++ I2S_REG_CFG0_SYS_BE, ++ I2S_REG_CFG0_SYS_BE); ++#endif ++ ++ /* data endian */ ++ switch (params_format(params)) { ++ case SNDRV_PCM_FORMAT_S16_LE: ++ case SNDRV_PCM_FORMAT_S24_LE: ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, ++ I2S_REG_CFG0_FMT_LE, ++ I2S_REG_CFG0_FMT_LE); ++ break; ++ case SNDRV_PCM_FORMAT_S16_BE: ++ case SNDRV_PCM_FORMAT_S24_BE: ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, ++ I2S_REG_CFG0_FMT_LE, 0); ++ break; ++ default: ++ return -EINVAL; ++ } ++ } ++ ++ /* setup bclk rate */ ++ if (i2s->flags & RALINK_FLAGS_TXONLY) ++ ret = ralink_i2s_set_sys_bclk(dai, width, params_rate(params)); ++ else ++ ret = ralink_i2s_set_bclk(dai, width, params_rate(params)); ++ ++ return ret; ++} ++ ++static int ralink_i2s_trigger(struct snd_pcm_substream *substream, int cmd, ++ struct snd_soc_dai *dai) ++{ ++ struct ralink_i2s *i2s = snd_soc_dai_get_drvdata(dai); ++ unsigned int mask, val; ++ ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ++ mask = I2S_REG_CFG0_TX_EN; ++ else ++ mask = I2S_REG_CFG0_RX_EN; ++ ++ switch (cmd) { ++ case SNDRV_PCM_TRIGGER_START: ++ case SNDRV_PCM_TRIGGER_RESUME: ++ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: ++ val = mask; ++ break; ++ case SNDRV_PCM_TRIGGER_STOP: ++ case SNDRV_PCM_TRIGGER_SUSPEND: ++ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: ++ val = 0; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, mask, val); ++ ++ return 0; ++} ++ ++static void ralink_i2s_init_dma_data(struct ralink_i2s *i2s, ++ struct resource *res) ++{ ++ struct snd_dmaengine_dai_dma_data *dma_data; ++ ++ /* Playback */ ++ dma_data = &i2s->playback_dma_data; ++ dma_data->addr = res->start + I2S_REG_WREG; ++ dma_data->addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; ++ dma_data->maxburst = 1; ++ ++ if (i2s->flags & RALINK_FLAGS_TXONLY) ++ return; ++ ++ /* Capture */ ++ dma_data = &i2s->capture_dma_data; ++ dma_data->addr = res->start + I2S_REG_RREG; ++ dma_data->addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; ++ dma_data->maxburst = 1; ++} ++ ++static int ralink_i2s_dai_probe(struct snd_soc_dai *dai) ++{ ++ struct ralink_i2s *i2s = snd_soc_dai_get_drvdata(dai); ++ ++ snd_soc_dai_init_dma_data(dai, &i2s->playback_dma_data, ++ &i2s->capture_dma_data); ++ ++ return 0; ++} ++ ++static int ralink_i2s_dai_remove(struct snd_soc_dai *dai) ++{ ++ return 0; ++} ++ ++static const struct snd_soc_dai_ops ralink_i2s_dai_ops = { ++ .set_sysclk = ralink_i2s_set_sysclk, ++ .set_fmt = ralink_i2s_set_fmt, ++ .startup = ralink_i2s_startup, ++ .shutdown = ralink_i2s_shutdown, ++ .hw_params = ralink_i2s_hw_params, ++ .trigger = ralink_i2s_trigger, ++ .probe = ralink_i2s_dai_probe, ++ .remove = ralink_i2s_dai_remove, ++}; ++ ++static struct snd_soc_dai_driver ralink_i2s_dai = { ++ .name = DRV_NAME, ++ .ops = &ralink_i2s_dai_ops, ++ .capture = { ++ .stream_name = "I2S Capture", ++ .channels_min = 2, ++ .channels_max = 2, ++ .rate_min = 5512, ++ .rate_max = 192000, ++ .rates = SNDRV_PCM_RATE_CONTINUOUS, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE, ++ }, ++ .playback = { ++ .stream_name = "I2S Playback", ++ .channels_min = 2, ++ .channels_max = 2, ++ .rate_min = 5512, ++ .rate_max = 192000, ++ .rates = SNDRV_PCM_RATE_CONTINUOUS, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE, ++ }, ++ .symmetric_rate = 1, ++}; ++ ++static struct snd_pcm_hardware ralink_pcm_hardware = { ++ .info = SNDRV_PCM_INFO_MMAP | ++ SNDRV_PCM_INFO_MMAP_VALID | ++ SNDRV_PCM_INFO_INTERLEAVED | ++ SNDRV_PCM_INFO_BLOCK_TRANSFER, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE, ++ .channels_min = 2, ++ .channels_max = 2, ++ .period_bytes_min = PAGE_SIZE, ++ .period_bytes_max = PAGE_SIZE * 2, ++ .periods_min = 2, ++ .periods_max = 128, ++ .buffer_bytes_max = 128 * 1024, ++ .fifo_size = RALINK_I2S_FIFO_SIZE, ++}; ++ ++static const struct snd_dmaengine_pcm_config ralink_dmaengine_pcm_config = { ++ .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config, ++ .pcm_hardware = &ralink_pcm_hardware, ++ .prealloc_buffer_size = 256 * PAGE_SIZE, ++}; ++ ++static const struct snd_soc_component_driver ralink_i2s_component = { ++ .name = DRV_NAME, ++}; ++ ++static bool ralink_i2s_readable_reg(struct device *dev, unsigned int reg) ++{ ++ return true; ++} ++ ++static bool ralink_i2s_volatile_reg(struct device *dev, unsigned int reg) ++{ ++ switch (reg) { ++ case I2S_REG_INT_STATUS: ++ case I2S_REG_FF_STATUS: ++ return true; ++ } ++ return false; ++} ++ ++static bool ralink_i2s_writeable_reg(struct device *dev, unsigned int reg) ++{ ++ switch (reg) { ++ case I2S_REG_FF_STATUS: ++ case I2S_REG_RREG: ++ return false; ++ } ++ return true; ++} ++ ++static const struct regmap_config ralink_i2s_regmap_config = { ++ .reg_bits = 32, ++ .reg_stride = 4, ++ .val_bits = 32, ++ .writeable_reg = ralink_i2s_writeable_reg, ++ .readable_reg = ralink_i2s_readable_reg, ++ .volatile_reg = ralink_i2s_volatile_reg, ++ .max_register = I2S_REG_DIVINT, ++}; ++ ++#if (RALINK_I2S_INT_EN) ++static irqreturn_t ralink_i2s_irq(int irq, void *devid) ++{ ++ struct ralink_i2s *i2s = devid; ++ u32 status; ++ ++ regmap_read(i2s->regmap, I2S_REG_INT_STATUS, &status); ++ if (unlikely(!status)) ++ return IRQ_NONE; ++ ++ /* tx stats */ ++ if (status & I2S_REG_INT_TX_MASK) { ++ if (status & I2S_REG_INT_TX_THRES) ++ i2s->txstats.belowthres++; ++ if (status & I2S_REG_INT_TX_UNRUN) ++ i2s->txstats.underrun++; ++ if (status & I2S_REG_INT_TX_OVRUN) ++ i2s->txstats.overrun++; ++ if (status & I2S_REG_INT_TX_FAULT) ++ i2s->txstats.dmafault++; ++ } ++ ++ /* rx stats */ ++ if (status & I2S_REG_INT_RX_MASK) { ++ if (status & I2S_REG_INT_RX_THRES) ++ i2s->rxstats.belowthres++; ++ if (status & I2S_REG_INT_RX_UNRUN) ++ i2s->rxstats.underrun++; ++ if (status & I2S_REG_INT_RX_OVRUN) ++ i2s->rxstats.overrun++; ++ if (status & I2S_REG_INT_RX_FAULT) ++ i2s->rxstats.dmafault++; ++ } ++ ++ /* clean status bits */ ++ regmap_write(i2s->regmap, I2S_REG_INT_STATUS, status); ++ ++ return IRQ_HANDLED; ++} ++#endif ++ ++#if IS_ENABLED(CONFIG_DEBUG_FS) ++static int ralink_i2s_stats_show(struct seq_file *s, void *unused) ++{ ++ struct ralink_i2s *i2s = s->private; ++ ++ seq_printf(s, "tx stats\n"); ++ seq_printf(s, "\tbelow threshold\t%u\n", i2s->txstats.belowthres); ++ seq_printf(s, "\tunder run\t%u\n", i2s->txstats.underrun); ++ seq_printf(s, "\tover run\t%u\n", i2s->txstats.overrun); ++ seq_printf(s, "\tdma fault\t%u\n", i2s->txstats.dmafault); ++ ++ seq_printf(s, "rx stats\n"); ++ seq_printf(s, "\tbelow threshold\t%u\n", i2s->rxstats.belowthres); ++ seq_printf(s, "\tunder run\t%u\n", i2s->rxstats.underrun); ++ seq_printf(s, "\tover run\t%u\n", i2s->rxstats.overrun); ++ seq_printf(s, "\tdma fault\t%u\n", i2s->rxstats.dmafault); ++ ++ ralink_i2s_dump_regs(i2s); ++ ++ return 0; ++} ++ ++static inline int ralink_i2s_debugfs_create(struct ralink_i2s *i2s) ++{ ++ i2s->dbg_dir = debugfs_create_dir(dev_name(i2s->dev), NULL); ++ if (!i2s->dbg_dir) ++ return -ENOMEM; ++ ++ debugfs_create_devm_seqfile(i2s->dev, "stats", i2s->dbg_dir, ++ &ralink_i2s_stats_show); ++ ++ return 0; ++} ++ ++static inline void ralink_i2s_debugfs_remove(struct ralink_i2s *i2s) ++{ ++ debugfs_remove(i2s->dbg_dir); ++} ++#else ++static inline int ralink_i2s_debugfs_create(struct ralink_i2s *i2s) ++{ ++ return 0; ++} ++ ++static inline void ralink_i2s_debugfs_remove(struct ralink_i2s *i2s) ++{ ++} ++#endif ++ ++/* ++ * TODO: these refclk setup functions should use ++ * clock framework instead. hardcode it now. ++ */ ++static void rt3350_refclk_setup(void) ++{ ++ uint32_t data; ++ ++ /* set refclk output 12Mhz clock */ ++ data = rt_sysc_r32(0x2c); ++ data |= (0x1 << 8); ++ rt_sysc_w32(data, 0x2c); ++} ++ ++static void rt3883_refclk_setup(void) ++{ ++ uint32_t data; ++ ++ /* set refclk output 12Mhz clock */ ++ data = rt_sysc_r32(0x2c); ++ data &= ~(0x3 << 13); ++ data |= (0x1 << 13); ++ rt_sysc_w32(data, 0x2c); ++} ++ ++static void rt3552_refclk_setup(void) ++{ ++ uint32_t data; ++ ++ /* set refclk output 12Mhz clock */ ++ data = rt_sysc_r32(0x2c); ++ data &= ~(0xf << 8); ++ data |= (0x3 << 8); ++ rt_sysc_w32(data, 0x2c); ++} ++ ++static void mt7620_refclk_setup(void) ++{ ++ uint32_t data; ++ ++ /* set refclk output 12Mhz clock */ ++ data = rt_sysc_r32(0x2c); ++ data &= ~(0x7 << 9); ++ data |= 0x1 << 9; ++ rt_sysc_w32(data, 0x2c); ++} ++ ++static void mt7621_refclk_setup(void) ++{ ++ uint32_t data; ++ ++ /* set refclk output 12Mhz clock */ ++ data = rt_sysc_r32(0x2c); ++ data &= ~(0x1f << 18); ++ data |= (0x19 << 18); ++ data &= ~(0x1f << 12); ++ data |= (0x1 << 12); ++ data &= ~(0x7 << 9); ++ data |= (0x5 << 9); ++ rt_sysc_w32(data, 0x2c); ++} ++ ++static void mt7628_refclk_setup(void) ++{ ++ uint32_t data; ++ ++ /* set i2s and refclk digital pad */ ++ data = rt_sysc_r32(0x3c); ++ data |= 0x1f; ++ rt_sysc_w32(data, 0x3c); ++ ++ /* Adjust REFCLK0's driving strength */ ++ data = rt_sysc_r32(0x1354); ++ data &= ~(0x1 << 5); ++ rt_sysc_w32(data, 0x1354); ++ data = rt_sysc_r32(0x1364); ++ data |= ~(0x1 << 5); ++ rt_sysc_w32(data, 0x1364); ++ ++ /* set refclk output 12Mhz clock */ ++ data = rt_sysc_r32(0x2c); ++ data &= ~(0x7 << 9); ++ data |= 0x1 << 9; ++ rt_sysc_w32(data, 0x2c); ++} ++ ++struct rt_i2s_data { ++ u32 flags; ++ void (*refclk_setup)(void); ++}; ++ ++struct rt_i2s_data rt3050_i2s_data = { .flags = RALINK_FLAGS_TXONLY }; ++struct rt_i2s_data rt3350_i2s_data = { .flags = RALINK_FLAGS_TXONLY, ++ .refclk_setup = rt3350_refclk_setup }; ++struct rt_i2s_data rt3883_i2s_data = { ++ .flags = (RALINK_FLAGS_LEFT_J | RALINK_FLAGS_RIGHT_J), ++ .refclk_setup = rt3883_refclk_setup }; ++struct rt_i2s_data rt3352_i2s_data = { .refclk_setup = rt3552_refclk_setup}; ++struct rt_i2s_data mt7620_i2s_data = { .refclk_setup = mt7620_refclk_setup}; ++struct rt_i2s_data mt7621_i2s_data = { .refclk_setup = mt7621_refclk_setup}; ++struct rt_i2s_data mt7628_i2s_data = { ++ .flags = (RALINK_FLAGS_ENDIAN | RALINK_FLAGS_24BIT | ++ RALINK_FLAGS_LEFT_J), ++ .refclk_setup = mt7628_refclk_setup}; ++ ++static const struct of_device_id ralink_i2s_match_table[] = { ++ { .compatible = "ralink,rt3050-i2s", ++ .data = (void *)&rt3050_i2s_data }, ++ { .compatible = "ralink,rt3350-i2s", ++ .data = (void *)&rt3350_i2s_data }, ++ { .compatible = "ralink,rt3883-i2s", ++ .data = (void *)&rt3883_i2s_data }, ++ { .compatible = "ralink,rt3352-i2s", ++ .data = (void *)&rt3352_i2s_data }, ++ { .compatible = "mediatek,mt7620-i2s", ++ .data = (void *)&mt7620_i2s_data }, ++ { .compatible = "mediatek,mt7621-i2s", ++ .data = (void *)&mt7621_i2s_data }, ++ { .compatible = "mediatek,mt7628-i2s", ++ .data = (void *)&mt7628_i2s_data }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, ralink_i2s_match_table); ++ ++static int ralink_i2s_probe(struct platform_device *pdev) ++{ ++ const struct of_device_id *match; ++ struct device_node *np = pdev->dev.of_node; ++ struct device *dev = &pdev->dev; ++ struct resource *res; ++ struct ralink_i2s *i2s; ++ int irq, ret; ++ u32 dma_req; ++ struct rt_i2s_data *data; ++ ++ i2s = devm_kzalloc(dev, sizeof(*i2s), GFP_KERNEL); ++ if (!i2s) ++ return -ENOMEM; ++ ++ i2s->dev = dev; ++ ++ match = of_match_device(ralink_i2s_match_table, dev); ++ if (!match) ++ return -EINVAL; ++ data = (struct rt_i2s_data *)match->data; ++ i2s->flags = data->flags; ++ /* setup out 12Mhz refclk to codec as mclk */ ++ if (data->refclk_setup) ++ data->refclk_setup(); ++ ++ if (of_property_read_u32(np, "txdma-req", &dma_req)) { ++ dev_err(dev, "no txdma-req define\n"); ++ return -EINVAL; ++ } ++ i2s->txdma_req = (u16)dma_req; ++ if (!(i2s->flags & RALINK_FLAGS_TXONLY)) { ++ if (of_property_read_u32(np, "rxdma-req", &dma_req)) { ++ dev_err(dev, "no rxdma-req define\n"); ++ return -EINVAL; ++ } ++ i2s->rxdma_req = (u16)dma_req; ++ } ++ ++ i2s->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); ++ if (IS_ERR(i2s->regs)) ++ return PTR_ERR(i2s->regs); ++ ++ i2s->regmap = devm_regmap_init_mmio(dev, i2s->regs, ++ &ralink_i2s_regmap_config); ++ if (IS_ERR(i2s->regmap)) ++ return dev_err_probe(dev, PTR_ERR(i2s->regmap), "regmap init failed"); ++ ++ irq = platform_get_irq(pdev, 0); ++ if (irq < 0) { ++ dev_err(dev, "failed to get irq\n"); ++ return -EINVAL; ++ } ++ ++#if (RALINK_I2S_INT_EN) ++ ret = devm_request_irq(dev, irq, ralink_i2s_irq, ++ 0, dev_name(dev), i2s); ++ if (ret) ++ return dev_err_probe(dev, ret, "failed to request irq"); ++#endif ++ ++ i2s->clk = devm_clk_get_enabled(dev, NULL); ++ if (IS_ERR(i2s->clk)) ++ return dev_err_probe(dev, PTR_ERR(i2s->clk), "no clock defined"); ++ ++ ralink_i2s_init_dma_data(i2s, res); ++ ++ ret = device_reset(dev); ++ if (ret) ++ return dev_err_probe(dev, ret, "failed to reset device\n"); ++ ++ /* enable 24bits support */ ++ if (i2s->flags & RALINK_FLAGS_24BIT) { ++ ralink_i2s_dai.capture.formats |= SNDRV_PCM_FMTBIT_S24_LE; ++ ralink_i2s_dai.playback.formats |= SNDRV_PCM_FMTBIT_S24_LE; ++ } ++ ++ /* enable big endian support */ ++ if (i2s->flags & RALINK_FLAGS_ENDIAN) { ++ ralink_i2s_dai.capture.formats |= SNDRV_PCM_FMTBIT_S16_BE; ++ ralink_i2s_dai.playback.formats |= SNDRV_PCM_FMTBIT_S16_BE; ++ ralink_pcm_hardware.formats |= SNDRV_PCM_FMTBIT_S16_BE; ++ if (i2s->flags & RALINK_FLAGS_24BIT) { ++ ralink_i2s_dai.capture.formats |= ++ SNDRV_PCM_FMTBIT_S24_BE; ++ ralink_i2s_dai.playback.formats |= ++ SNDRV_PCM_FMTBIT_S24_BE; ++ ralink_pcm_hardware.formats |= ++ SNDRV_PCM_FMTBIT_S24_BE; ++ } ++ } ++ ++ /* disable capture support */ ++ if (i2s->flags & RALINK_FLAGS_TXONLY) ++ memset(&ralink_i2s_dai.capture, sizeof(ralink_i2s_dai.capture), ++ 0); ++ ++ ret = devm_snd_soc_register_component(dev, &ralink_i2s_component, ++ &ralink_i2s_dai, 1); ++ if (ret) ++ return ret; ++ ++ ret = devm_snd_dmaengine_pcm_register(dev, ++ &ralink_dmaengine_pcm_config, ++ SND_DMAENGINE_PCM_FLAG_COMPAT); ++ if (ret) ++ return ret; ++ ++ dev_info(i2s->dev, "mclk %luMHz\n", clk_get_rate(i2s->clk) / 1000000); ++ ++ platform_set_drvdata(pdev, i2s); ++ return ralink_i2s_debugfs_create(i2s); ++} ++ ++static void ralink_i2s_remove(struct platform_device *pdev) ++{ ++ struct ralink_i2s *i2s = platform_get_drvdata(pdev); ++ ++ ralink_i2s_debugfs_remove(i2s); ++} ++ ++static struct platform_driver ralink_i2s_driver = { ++ .probe = ralink_i2s_probe, ++ .remove_new = ralink_i2s_remove, ++ .driver = { ++ .name = DRV_NAME, ++ .of_match_table = ralink_i2s_match_table, ++ }, ++}; ++module_platform_driver(ralink_i2s_driver); ++ ++MODULE_AUTHOR("Lars-Peter Clausen, "); ++MODULE_DESCRIPTION("Ralink/MediaTek I2S driver"); ++MODULE_LICENSE("GPL"); ++MODULE_ALIAS("platform:" DRV_NAME); diff --git a/target/linux/ramips/patches-6.12/840-serial-add-ugly-custom-baud-rate-hack.patch b/target/linux/ramips/patches-6.12/840-serial-add-ugly-custom-baud-rate-hack.patch new file mode 100644 index 0000000000..df360b380f --- /dev/null +++ b/target/linux/ramips/patches-6.12/840-serial-add-ugly-custom-baud-rate-hack.patch @@ -0,0 +1,22 @@ +From a7eb46e0ea4a11e4dfb56ab129bf816d1059a6c5 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Mon, 7 Dec 2015 17:31:08 +0100 +Subject: [PATCH 51/53] serial: add ugly custom baud rate hack + +Signed-off-by: John Crispin +--- + drivers/tty/serial/serial_core.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/tty/serial/serial_core.c ++++ b/drivers/tty/serial/serial_core.c +@@ -503,6 +503,9 @@ uart_get_baud_rate(struct uart_port *por + break; + } + ++ if (tty_termios_baud_rate(termios) == 2500000) ++ return 250000; ++ + for (try = 0; try < 2; try++) { + baud = tty_termios_baud_rate(termios); + diff --git a/target/linux/ramips/patches-6.12/850-awake-rt305x-dwc2-controller.patch b/target/linux/ramips/patches-6.12/850-awake-rt305x-dwc2-controller.patch new file mode 100644 index 0000000000..f963c756ec --- /dev/null +++ b/target/linux/ramips/patches-6.12/850-awake-rt305x-dwc2-controller.patch @@ -0,0 +1,15 @@ +--- a/drivers/usb/dwc2/platform.c ++++ b/drivers/usb/dwc2/platform.c +@@ -484,6 +484,12 @@ static int dwc2_driver_probe(struct plat + if (retval) + return retval; + ++ /* Enable USB port before any regs access */ ++ if (readl(hsotg->regs + PCGCTL) & 0x0f) { ++ writel(0x00, hsotg->regs + PCGCTL); ++ /* TODO: mdelay(25) here? vendor driver don't use it */ ++ } ++ + hsotg->needs_byte_swap = dwc2_check_core_endianness(hsotg); + + retval = dwc2_get_dr_mode(hsotg); diff --git a/target/linux/ramips/patches-6.12/860-ramips-add-eip93-driver.patch b/target/linux/ramips/patches-6.12/860-ramips-add-eip93-driver.patch new file mode 100644 index 0000000000..f41063845f --- /dev/null +++ b/target/linux/ramips/patches-6.12/860-ramips-add-eip93-driver.patch @@ -0,0 +1,3273 @@ +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/Kconfig +@@ -0,0 +1,64 @@ ++# SPDX-License-Identifier: GPL-2.0 ++config CRYPTO_DEV_EIP93_SKCIPHER ++ tristate ++ ++config CRYPTO_DEV_EIP93_HMAC ++ tristate ++ ++config CRYPTO_DEV_EIP93 ++ tristate "Support for EIP93 crypto HW accelerators" ++ depends on SOC_MT7621 || COMPILE_TEST ++ help ++ EIP93 have various crypto HW accelerators. Select this if ++ you want to use the EIP93 modules for any of the crypto algorithms. ++ ++if CRYPTO_DEV_EIP93 ++ ++config CRYPTO_DEV_EIP93_AES ++ bool "Register AES algorithm implementations with the Crypto API" ++ default y ++ select CRYPTO_DEV_EIP93_SKCIPHER ++ select CRYPTO_LIB_AES ++ select CRYPTO_SKCIPHER ++ help ++ Selecting this will offload AES - ECB, CBC and CTR crypto ++ to the EIP-93 crypto engine. ++ ++config CRYPTO_DEV_EIP93_DES ++ bool "Register legacy DES / 3DES algorithm with the Crypto API" ++ default y ++ select CRYPTO_DEV_EIP93_SKCIPHER ++ select CRYPTO_LIB_DES ++ select CRYPTO_SKCIPHER ++ help ++ Selecting this will offload DES and 3DES ECB and CBC ++ crypto to the EIP-93 crypto engine. ++ ++config CRYPTO_DEV_EIP93_AEAD ++ bool "Register AEAD algorithm with the Crypto API" ++ default y ++ select CRYPTO_DEV_EIP93_HMAC ++ select CRYPTO_AEAD ++ select CRYPTO_AUTHENC ++ select CRYPTO_MD5 ++ select CRYPTO_SHA1 ++ select CRYPTO_SHA256 ++ help ++ Selecting this will offload AEAD authenc(hmac(x), cipher(y)) ++ crypto to the EIP-93 crypto engine. ++ ++config CRYPTO_DEV_EIP93_GENERIC_SW_MAX_LEN ++ int "Max skcipher software fallback length" ++ default 256 ++ help ++ Max length of crypt request which ++ will fallback to software crypt of skcipher *except* AES-128. ++ ++config CRYPTO_DEV_EIP93_AES_128_SW_MAX_LEN ++ int "Max AES-128 skcipher software fallback length" ++ default 512 ++ help ++ Max length of crypt request which ++ will fallback to software crypt of AES-128 skcipher. ++ ++endif +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/Makefile +@@ -0,0 +1,7 @@ ++obj-$(CONFIG_CRYPTO_DEV_EIP93) += crypto-hw-eip93.o ++ ++crypto-hw-eip93-y += eip93-main.o eip93-common.o ++ ++crypto-hw-eip93-$(CONFIG_CRYPTO_DEV_EIP93_SKCIPHER) += eip93-cipher.o ++crypto-hw-eip93-$(CONFIG_CRYPTO_DEV_EIP93_AEAD) += eip93-aead.o ++ +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/eip93-aead.c +@@ -0,0 +1,768 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2019 - 2021 ++ * ++ * Richard van Schagen ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) ++#include ++#endif ++ ++#include ++#include ++ ++#include "eip93-aead.h" ++#include "eip93-cipher.h" ++#include "eip93-common.h" ++#include "eip93-regs.h" ++ ++void mtk_aead_handle_result(struct crypto_async_request *async, int err) ++{ ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(async->tfm); ++ struct mtk_device *mtk = ctx->mtk; ++ struct aead_request *req = aead_request_cast(async); ++ struct mtk_cipher_reqctx *rctx = aead_request_ctx(req); ++ ++ mtk_unmap_dma(mtk, rctx, req->src, req->dst); ++ mtk_handle_result(mtk, rctx, req->iv); ++ ++ if (err == 1) ++ err = -EBADMSG; ++ /* let software handle anti-replay errors */ ++ if (err == 4) ++ err = 0; ++ ++ aead_request_complete(req, err); ++} ++ ++static int mtk_aead_send_req(struct crypto_async_request *async) ++{ ++ struct aead_request *req = aead_request_cast(async); ++ struct mtk_cipher_reqctx *rctx = aead_request_ctx(req); ++ int err; ++ ++ err = check_valid_request(rctx); ++ if (err) { ++ aead_request_complete(req, err); ++ return err; ++ } ++ ++ return mtk_send_req(async, req->iv, rctx); ++} ++ ++/* Crypto aead API functions */ ++static int mtk_aead_cra_init(struct crypto_tfm *tfm) ++{ ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(tfm); ++ struct mtk_alg_template *tmpl = container_of(tfm->__crt_alg, ++ struct mtk_alg_template, alg.aead.base); ++ u32 flags = tmpl->flags; ++ char *alg_base; ++ ++ crypto_aead_set_reqsize(__crypto_aead_cast(tfm), ++ sizeof(struct mtk_cipher_reqctx)); ++ ++ ctx->mtk = tmpl->mtk; ++ ctx->in_first = true; ++ ctx->out_first = true; ++ ++ ctx->sa_in = kzalloc(sizeof(struct saRecord_s), GFP_KERNEL); ++ if (!ctx->sa_in) ++ return -ENOMEM; ++ ++ ctx->sa_base_in = dma_map_single(ctx->mtk->dev, ctx->sa_in, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ ++ ctx->sa_out = kzalloc(sizeof(struct saRecord_s), GFP_KERNEL); ++ if (!ctx->sa_out) ++ return -ENOMEM; ++ ++ ctx->sa_base_out = dma_map_single(ctx->mtk->dev, ctx->sa_out, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ ++ /* software workaround for now */ ++ if (IS_HASH_MD5(flags)) ++ alg_base = "md5"; ++ if (IS_HASH_SHA1(flags)) ++ alg_base = "sha1"; ++ if (IS_HASH_SHA224(flags)) ++ alg_base = "sha224"; ++ if (IS_HASH_SHA256(flags)) ++ alg_base = "sha256"; ++ ++ ctx->shash = crypto_alloc_shash(alg_base, 0, CRYPTO_ALG_NEED_FALLBACK); ++ ++ if (IS_ERR(ctx->shash)) { ++ dev_err(ctx->mtk->dev, "base driver %s could not be loaded.\n", ++ alg_base); ++ return PTR_ERR(ctx->shash); ++ } ++ ++ return 0; ++} ++ ++static void mtk_aead_cra_exit(struct crypto_tfm *tfm) ++{ ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(tfm); ++ ++ if (ctx->shash) ++ crypto_free_shash(ctx->shash); ++ ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_in, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_out, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ kfree(ctx->sa_in); ++ kfree(ctx->sa_out); ++} ++ ++static int mtk_aead_setkey(struct crypto_aead *ctfm, const u8 *key, ++ unsigned int len) ++{ ++ struct crypto_tfm *tfm = crypto_aead_tfm(ctfm); ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(tfm); ++ struct mtk_alg_template *tmpl = container_of(tfm->__crt_alg, ++ struct mtk_alg_template, alg.skcipher.base); ++ u32 flags = tmpl->flags; ++ u32 nonce = 0; ++ struct crypto_authenc_keys keys; ++ struct crypto_aes_ctx aes; ++ struct saRecord_s *saRecord = ctx->sa_out; ++ int sa_size = sizeof(struct saRecord_s); ++ int err = -EINVAL; ++ ++ ++ if (crypto_authenc_extractkeys(&keys, key, len)) ++ return err; ++ ++ if (IS_RFC3686(flags)) { ++ if (keys.enckeylen < CTR_RFC3686_NONCE_SIZE) ++ return err; ++ ++ keys.enckeylen -= CTR_RFC3686_NONCE_SIZE; ++ memcpy(&nonce, keys.enckey + keys.enckeylen, ++ CTR_RFC3686_NONCE_SIZE); ++ } ++ ++ switch ((flags & MTK_ALG_MASK)) { ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) ++ case MTK_ALG_DES: ++ err = verify_aead_des_key(ctfm, keys.enckey, keys.enckeylen); ++ break; ++ case MTK_ALG_3DES: ++ if (keys.enckeylen != DES3_EDE_KEY_SIZE) ++ return -EINVAL; ++ ++ err = verify_aead_des3_key(ctfm, keys.enckey, keys.enckeylen); ++ break; ++#endif ++ case MTK_ALG_AES: ++ err = aes_expandkey(&aes, keys.enckey, keys.enckeylen); ++ } ++ if (err) ++ return err; ++ ++ ctx->blksize = crypto_aead_blocksize(ctfm); ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_in, sa_size, ++ DMA_TO_DEVICE); ++ ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_out, sa_size, ++ DMA_TO_DEVICE); ++ /* Encryption key */ ++ mtk_set_saRecord(saRecord, keys.enckeylen, flags); ++ saRecord->saCmd0.bits.opCode = 1; ++ saRecord->saCmd0.bits.digestLength = ctx->authsize >> 2; ++ ++ memcpy(saRecord->saKey, keys.enckey, keys.enckeylen); ++ ctx->saNonce = nonce; ++ saRecord->saNonce = nonce; ++ ++ /* authentication key */ ++ err = mtk_authenc_setkey(ctx->shash, saRecord, keys.authkey, ++ keys.authkeylen); ++ ++ saRecord->saCmd0.bits.direction = 0; ++ memcpy(ctx->sa_in, saRecord, sa_size); ++ ctx->sa_in->saCmd0.bits.direction = 1; ++ ctx->sa_in->saCmd1.bits.copyDigest = 0; ++ ++ ctx->sa_base_out = dma_map_single(ctx->mtk->dev, ctx->sa_out, sa_size, ++ DMA_TO_DEVICE); ++ ctx->sa_base_in = dma_map_single(ctx->mtk->dev, ctx->sa_in, sa_size, ++ DMA_TO_DEVICE); ++ ctx->in_first = true; ++ ctx->out_first = true; ++ ++ return err; ++} ++ ++static int mtk_aead_setauthsize(struct crypto_aead *ctfm, ++ unsigned int authsize) ++{ ++ struct crypto_tfm *tfm = crypto_aead_tfm(ctfm); ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(tfm); ++ ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_in, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_out, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ ++ ctx->authsize = authsize; ++ ctx->sa_in->saCmd0.bits.digestLength = ctx->authsize >> 2; ++ ctx->sa_out->saCmd0.bits.digestLength = ctx->authsize >> 2; ++ ++ ctx->sa_base_out = dma_map_single(ctx->mtk->dev, ctx->sa_out, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ ctx->sa_base_in = dma_map_single(ctx->mtk->dev, ctx->sa_in, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ return 0; ++} ++ ++static void mtk_aead_setassoc(struct mtk_crypto_ctx *ctx, ++ struct aead_request *req, bool in) ++{ ++ struct saRecord_s *saRecord; ++ ++ if (in) { ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_in, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ saRecord = ctx->sa_in; ++ saRecord->saCmd1.bits.hashCryptOffset = req->assoclen >> 2; ++ ++ ctx->sa_base_in = dma_map_single(ctx->mtk->dev, ctx->sa_in, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ ctx->assoclen_in = req->assoclen; ++ } else { ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_out, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ saRecord = ctx->sa_out; ++ saRecord->saCmd1.bits.hashCryptOffset = req->assoclen >> 2; ++ ++ ctx->sa_base_out = dma_map_single(ctx->mtk->dev, ctx->sa_out, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ ctx->assoclen_out = req->assoclen; ++ } ++} ++ ++static int mtk_aead_crypt(struct aead_request *req) ++{ ++ struct mtk_cipher_reqctx *rctx = aead_request_ctx(req); ++ struct crypto_async_request *async = &req->base; ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(req->base.tfm); ++ struct crypto_aead *aead = crypto_aead_reqtfm(req); ++ ++ rctx->textsize = req->cryptlen; ++ rctx->blksize = ctx->blksize; ++ rctx->assoclen = req->assoclen; ++ rctx->authsize = ctx->authsize; ++ rctx->sg_src = req->src; ++ rctx->sg_dst = req->dst; ++ rctx->ivsize = crypto_aead_ivsize(aead); ++ rctx->flags |= MTK_DESC_AEAD; ++ ++ if IS_DECRYPT(rctx->flags) ++ rctx->textsize -= rctx->authsize; ++ ++ return mtk_aead_send_req(async); ++} ++ ++static int mtk_aead_encrypt(struct aead_request *req) ++{ ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(req->base.tfm); ++ struct mtk_cipher_reqctx *rctx = aead_request_ctx(req); ++ struct mtk_alg_template *tmpl = container_of(req->base.tfm->__crt_alg, ++ struct mtk_alg_template, alg.aead.base); ++ ++ rctx->flags = tmpl->flags; ++ rctx->flags |= MTK_ENCRYPT; ++ if (ctx->out_first) { ++ mtk_aead_setassoc(ctx, req, false); ++ ctx->out_first = false; ++ } ++ ++ if (req->assoclen != ctx->assoclen_out) { ++ dev_err(ctx->mtk->dev, "Request AAD length error\n"); ++ return -EINVAL; ++ } ++ ++ rctx->saRecord_base = ctx->sa_base_out; ++ ++ return mtk_aead_crypt(req); ++} ++ ++static int mtk_aead_decrypt(struct aead_request *req) ++{ ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(req->base.tfm); ++ struct mtk_cipher_reqctx *rctx = aead_request_ctx(req); ++ struct mtk_alg_template *tmpl = container_of(req->base.tfm->__crt_alg, ++ struct mtk_alg_template, alg.aead.base); ++ ++ rctx->flags = tmpl->flags; ++ rctx->flags |= MTK_DECRYPT; ++ if (ctx->in_first) { ++ mtk_aead_setassoc(ctx, req, true); ++ ctx->in_first = false; ++ } ++ ++ if (req->assoclen != ctx->assoclen_in) { ++ dev_err(ctx->mtk->dev, "Request AAD length error\n"); ++ return -EINVAL; ++ } ++ ++ rctx->saRecord_base = ctx->sa_base_in; ++ ++ return mtk_aead_crypt(req); ++} ++ ++/* Available authenc algorithms in this module */ ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) ++struct mtk_alg_template mtk_alg_authenc_hmac_md5_cbc_aes = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_MD5 | MTK_MODE_CBC | MTK_ALG_AES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = AES_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = MD5_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(md5),cbc(aes))", ++ .cra_driver_name = ++ "authenc(hmac(md5-eip93), cbc(aes-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = AES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha1_cbc_aes = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA1 | MTK_MODE_CBC | MTK_ALG_AES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = AES_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA1_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha1),cbc(aes))", ++ .cra_driver_name = ++ "authenc(hmac(sha1-eip93),cbc(aes-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = AES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha224_cbc_aes = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA224 | MTK_MODE_CBC | MTK_ALG_AES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = AES_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA224_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha224),cbc(aes))", ++ .cra_driver_name = ++ "authenc(hmac(sha224-eip93),cbc(aes-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = AES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha256_cbc_aes = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA256 | MTK_MODE_CBC | MTK_ALG_AES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = AES_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA256_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha256),cbc(aes))", ++ .cra_driver_name = ++ "authenc(hmac(sha256-eip93),cbc(aes-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = AES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_md5_rfc3686_aes = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_MD5 | ++ MTK_MODE_CTR | MTK_MODE_RFC3686 | MTK_ALG_AES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = CTR_RFC3686_IV_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = MD5_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(md5),rfc3686(ctr(aes)))", ++ .cra_driver_name = ++ "authenc(hmac(md5-eip93),rfc3686(ctr(aes-eip93)))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = 1, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha1_rfc3686_aes = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA1 | ++ MTK_MODE_CTR | MTK_MODE_RFC3686 | MTK_ALG_AES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = CTR_RFC3686_IV_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA1_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha1),rfc3686(ctr(aes)))", ++ .cra_driver_name = ++ "authenc(hmac(sha1-eip93),rfc3686(ctr(aes-eip93)))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = 1, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha224_rfc3686_aes = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA224 | ++ MTK_MODE_CTR | MTK_MODE_RFC3686 | MTK_ALG_AES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = CTR_RFC3686_IV_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA224_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha224),rfc3686(ctr(aes)))", ++ .cra_driver_name = ++ "authenc(hmac(sha224-eip93),rfc3686(ctr(aes-eip93)))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = 1, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha256_rfc3686_aes = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA256 | ++ MTK_MODE_CTR | MTK_MODE_RFC3686 | MTK_ALG_AES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = CTR_RFC3686_IV_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA256_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha256),rfc3686(ctr(aes)))", ++ .cra_driver_name = ++ "authenc(hmac(sha256-eip93),rfc3686(ctr(aes-eip93)))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = 1, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) ++struct mtk_alg_template mtk_alg_authenc_hmac_md5_cbc_des = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_MD5 | MTK_MODE_CBC | MTK_ALG_DES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = DES_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = MD5_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(md5),cbc(des))", ++ .cra_driver_name = ++ "authenc(hmac(md5-eip93),cbc(des-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha1_cbc_des = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA1 | MTK_MODE_CBC | MTK_ALG_DES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = DES_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA1_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha1),cbc(des))", ++ .cra_driver_name = ++ "authenc(hmac(sha1-eip93),cbc(des-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha224_cbc_des = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA224 | MTK_MODE_CBC | MTK_ALG_DES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = DES_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA224_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha224),cbc(des))", ++ .cra_driver_name = ++ "authenc(hmac(sha224-eip93),cbc(des-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha256_cbc_des = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA256 | MTK_MODE_CBC | MTK_ALG_DES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = DES_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA256_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha256),cbc(des))", ++ .cra_driver_name = ++ "authenc(hmac(sha256-eip93),cbc(des-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_md5_cbc_des3_ede = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_MD5 | MTK_MODE_CBC | MTK_ALG_3DES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = DES3_EDE_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = MD5_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(md5),cbc(des3_ede))", ++ .cra_driver_name = ++ "authenc(hmac(md5-eip93),cbc(des3_ede-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES3_EDE_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0x0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha1_cbc_des3_ede = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA1 | MTK_MODE_CBC | MTK_ALG_3DES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = DES3_EDE_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA1_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha1),cbc(des3_ede))", ++ .cra_driver_name = ++ "authenc(hmac(sha1-eip93),cbc(des3_ede-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES3_EDE_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0x0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha224_cbc_des3_ede = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA224 | MTK_MODE_CBC | MTK_ALG_3DES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = DES3_EDE_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA224_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha224),cbc(des3_ede))", ++ .cra_driver_name = ++ "authenc(hmac(sha224-eip93),cbc(des3_ede-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES3_EDE_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0x0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha256_cbc_des3_ede = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA256 | MTK_MODE_CBC | MTK_ALG_3DES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = DES3_EDE_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA256_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha256),cbc(des3_ede))", ++ .cra_driver_name = ++ "authenc(hmac(sha256-eip93),cbc(des3_ede-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES3_EDE_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0x0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++#endif +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/eip93-aead.h +@@ -0,0 +1,31 @@ ++/* SPDX-License-Identifier: GPL-2.0 ++ * ++ * Copyright (C) 2019 - 2021 ++ * ++ * Richard van Schagen ++ */ ++#ifndef _EIP93_AEAD_H_ ++#define _EIP93_AEAD_H_ ++ ++extern struct mtk_alg_template mtk_alg_authenc_hmac_md5_cbc_aes; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha1_cbc_aes; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha224_cbc_aes; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha256_cbc_aes; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_md5_rfc3686_aes; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha1_rfc3686_aes; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha224_rfc3686_aes; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha256_rfc3686_aes; ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) ++extern struct mtk_alg_template mtk_alg_authenc_hmac_md5_cbc_des; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha1_cbc_des; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha224_cbc_des; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha256_cbc_des; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_md5_cbc_des3_ede; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha1_cbc_des3_ede; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha224_cbc_des3_ede; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha256_cbc_des3_ede; ++#endif ++ ++void mtk_aead_handle_result(struct crypto_async_request *async, int err); ++ ++#endif /* _EIP93_AEAD_H_ */ +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/eip93-aes.h +@@ -0,0 +1,15 @@ ++/* SPDX-License-Identifier: GPL-2.0 ++ * ++ * Copyright (C) 2019 - 2021 ++ * ++ * Richard van Schagen ++ */ ++#ifndef _EIP93_AES_H_ ++#define _EIP93_AES_H_ ++ ++extern struct mtk_alg_template mtk_alg_ecb_aes; ++extern struct mtk_alg_template mtk_alg_cbc_aes; ++extern struct mtk_alg_template mtk_alg_ctr_aes; ++extern struct mtk_alg_template mtk_alg_rfc3686_aes; ++ ++#endif /* _EIP93_AES_H_ */ +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/eip93-cipher.c +@@ -0,0 +1,483 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2019 - 2021 ++ * ++ * Richard van Schagen ++ */ ++ ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) ++#include ++#include ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) ++#include ++#endif ++#include ++ ++#include "eip93-cipher.h" ++#include "eip93-common.h" ++#include "eip93-regs.h" ++ ++void mtk_skcipher_handle_result(struct crypto_async_request *async, int err) ++{ ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(async->tfm); ++ struct mtk_device *mtk = ctx->mtk; ++ struct skcipher_request *req = skcipher_request_cast(async); ++ struct mtk_cipher_reqctx *rctx = skcipher_request_ctx(req); ++ ++ mtk_unmap_dma(mtk, rctx, req->src, req->dst); ++ mtk_handle_result(mtk, rctx, req->iv); ++ ++ skcipher_request_complete(req, err); ++} ++ ++static inline bool mtk_skcipher_is_fallback(const struct crypto_tfm *tfm, ++ u32 flags) ++{ ++ return (tfm->__crt_alg->cra_flags & CRYPTO_ALG_NEED_FALLBACK) && ++ !IS_RFC3686(flags); ++} ++ ++static int mtk_skcipher_send_req(struct crypto_async_request *async) ++{ ++ struct skcipher_request *req = skcipher_request_cast(async); ++ struct mtk_cipher_reqctx *rctx = skcipher_request_ctx(req); ++ int err; ++ ++ err = check_valid_request(rctx); ++ ++ if (err) { ++ skcipher_request_complete(req, err); ++ return err; ++ } ++ ++ return mtk_send_req(async, req->iv, rctx); ++} ++ ++/* Crypto skcipher API functions */ ++static int mtk_skcipher_cra_init(struct crypto_tfm *tfm) ++{ ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(tfm); ++ struct mtk_alg_template *tmpl = container_of(tfm->__crt_alg, ++ struct mtk_alg_template, alg.skcipher.base); ++ bool fallback = mtk_skcipher_is_fallback(tfm, tmpl->flags); ++ ++ if (fallback) { ++ ctx->fallback = crypto_alloc_skcipher( ++ crypto_tfm_alg_name(tfm), 0, CRYPTO_ALG_NEED_FALLBACK); ++ if (IS_ERR(ctx->fallback)) ++ return PTR_ERR(ctx->fallback); ++ } ++ ++ crypto_skcipher_set_reqsize( ++ __crypto_skcipher_cast(tfm), ++ sizeof(struct mtk_cipher_reqctx) + ++ (fallback ? crypto_skcipher_reqsize(ctx->fallback) : ++ 0)); ++ ++ ctx->mtk = tmpl->mtk; ++ ++ ctx->sa_in = kzalloc(sizeof(struct saRecord_s), GFP_KERNEL); ++ if (!ctx->sa_in) ++ return -ENOMEM; ++ ++ ctx->sa_base_in = dma_map_single(ctx->mtk->dev, ctx->sa_in, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ ++ ctx->sa_out = kzalloc(sizeof(struct saRecord_s), GFP_KERNEL); ++ if (!ctx->sa_out) ++ return -ENOMEM; ++ ++ ctx->sa_base_out = dma_map_single(ctx->mtk->dev, ctx->sa_out, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ return 0; ++} ++ ++static void mtk_skcipher_cra_exit(struct crypto_tfm *tfm) ++{ ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(tfm); ++ ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_in, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_out, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ kfree(ctx->sa_in); ++ kfree(ctx->sa_out); ++ ++ crypto_free_skcipher(ctx->fallback); ++} ++ ++static int mtk_skcipher_setkey(struct crypto_skcipher *ctfm, const u8 *key, ++ unsigned int len) ++{ ++ struct crypto_tfm *tfm = crypto_skcipher_tfm(ctfm); ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(tfm); ++ struct mtk_alg_template *tmpl = container_of(tfm->__crt_alg, ++ struct mtk_alg_template, alg.skcipher.base); ++ struct saRecord_s *saRecord = ctx->sa_out; ++ u32 flags = tmpl->flags; ++ u32 nonce = 0; ++ unsigned int keylen = len; ++ int sa_size = sizeof(struct saRecord_s); ++ int err = -EINVAL; ++ ++ if (!key || !keylen) ++ return err; ++ ++ ctx->keylen = keylen; ++ ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) ++ if (IS_RFC3686(flags)) { ++ if (len < CTR_RFC3686_NONCE_SIZE) ++ return err; ++ ++ keylen = len - CTR_RFC3686_NONCE_SIZE; ++ memcpy(&nonce, key + keylen, CTR_RFC3686_NONCE_SIZE); ++ } ++#endif ++ ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) ++ if (flags & MTK_ALG_DES) { ++ ctx->blksize = DES_BLOCK_SIZE; ++ err = verify_skcipher_des_key(ctfm, key); ++ } ++ if (flags & MTK_ALG_3DES) { ++ ctx->blksize = DES3_EDE_BLOCK_SIZE; ++ err = verify_skcipher_des3_key(ctfm, key); ++ } ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) ++ if (flags & MTK_ALG_AES) { ++ struct crypto_aes_ctx aes; ++ bool fallback = mtk_skcipher_is_fallback(tfm, flags); ++ ++ if (fallback && !IS_RFC3686(flags)) { ++ err = crypto_skcipher_setkey(ctx->fallback, key, ++ keylen); ++ if (err) ++ return err; ++ } ++ ++ ctx->blksize = AES_BLOCK_SIZE; ++ err = aes_expandkey(&aes, key, keylen); ++ } ++#endif ++ if (err) ++ return err; ++ ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_in, sa_size, ++ DMA_TO_DEVICE); ++ ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_out, sa_size, ++ DMA_TO_DEVICE); ++ ++ mtk_set_saRecord(saRecord, keylen, flags); ++ ++ memcpy(saRecord->saKey, key, keylen); ++ ctx->saNonce = nonce; ++ saRecord->saNonce = nonce; ++ saRecord->saCmd0.bits.direction = 0; ++ ++ memcpy(ctx->sa_in, saRecord, sa_size); ++ ctx->sa_in->saCmd0.bits.direction = 1; ++ ++ ctx->sa_base_out = dma_map_single(ctx->mtk->dev, ctx->sa_out, sa_size, ++ DMA_TO_DEVICE); ++ ++ ctx->sa_base_in = dma_map_single(ctx->mtk->dev, ctx->sa_in, sa_size, ++ DMA_TO_DEVICE); ++ return err; ++} ++ ++static int mtk_skcipher_crypt(struct skcipher_request *req, bool encrypt) ++{ ++ struct mtk_cipher_reqctx *rctx = skcipher_request_ctx(req); ++ struct crypto_async_request *async = &req->base; ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(req->base.tfm); ++ struct crypto_skcipher *skcipher = crypto_skcipher_reqtfm(req); ++ bool fallback = mtk_skcipher_is_fallback(req->base.tfm, rctx->flags); ++ ++ if (!req->cryptlen) ++ return 0; ++ ++ /* ++ * ECB and CBC algorithms require message lengths to be ++ * multiples of block size. ++ */ ++ if (IS_ECB(rctx->flags) || IS_CBC(rctx->flags)) ++ if (!IS_ALIGNED(req->cryptlen, ++ crypto_skcipher_blocksize(skcipher))) ++ return -EINVAL; ++ ++ if (fallback && ++ req->cryptlen <= (AES_KEYSIZE_128 ? ++ CONFIG_CRYPTO_DEV_EIP93_AES_128_SW_MAX_LEN : ++ CONFIG_CRYPTO_DEV_EIP93_GENERIC_SW_MAX_LEN)) { ++ skcipher_request_set_tfm(&rctx->fallback_req, ctx->fallback); ++ skcipher_request_set_callback(&rctx->fallback_req, ++ req->base.flags, ++ req->base.complete, ++ req->base.data); ++ skcipher_request_set_crypt(&rctx->fallback_req, req->src, ++ req->dst, req->cryptlen, req->iv); ++ return encrypt ? crypto_skcipher_encrypt(&rctx->fallback_req) : ++ crypto_skcipher_decrypt(&rctx->fallback_req); ++ } ++ ++ rctx->assoclen = 0; ++ rctx->textsize = req->cryptlen; ++ rctx->authsize = 0; ++ rctx->sg_src = req->src; ++ rctx->sg_dst = req->dst; ++ rctx->ivsize = crypto_skcipher_ivsize(skcipher); ++ rctx->blksize = ctx->blksize; ++ rctx->flags |= MTK_DESC_SKCIPHER; ++ if (!IS_ECB(rctx->flags)) ++ rctx->flags |= MTK_DESC_DMA_IV; ++ ++ return mtk_skcipher_send_req(async); ++} ++ ++static int mtk_skcipher_encrypt(struct skcipher_request *req) ++{ ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(req->base.tfm); ++ struct mtk_cipher_reqctx *rctx = skcipher_request_ctx(req); ++ struct mtk_alg_template *tmpl = container_of(req->base.tfm->__crt_alg, ++ struct mtk_alg_template, alg.skcipher.base); ++ ++ rctx->flags = tmpl->flags; ++ rctx->flags |= MTK_ENCRYPT; ++ rctx->saRecord_base = ctx->sa_base_out; ++ ++ return mtk_skcipher_crypt(req, true); ++} ++ ++static int mtk_skcipher_decrypt(struct skcipher_request *req) ++{ ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(req->base.tfm); ++ struct mtk_cipher_reqctx *rctx = skcipher_request_ctx(req); ++ struct mtk_alg_template *tmpl = container_of(req->base.tfm->__crt_alg, ++ struct mtk_alg_template, alg.skcipher.base); ++ ++ rctx->flags = tmpl->flags; ++ rctx->flags |= MTK_DECRYPT; ++ rctx->saRecord_base = ctx->sa_base_in; ++ ++ return mtk_skcipher_crypt(req, false); ++} ++ ++/* Available algorithms in this module */ ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) ++struct mtk_alg_template mtk_alg_ecb_aes = { ++ .type = MTK_ALG_TYPE_SKCIPHER, ++ .flags = MTK_MODE_ECB | MTK_ALG_AES, ++ .alg.skcipher = { ++ .setkey = mtk_skcipher_setkey, ++ .encrypt = mtk_skcipher_encrypt, ++ .decrypt = mtk_skcipher_decrypt, ++ .min_keysize = AES_MIN_KEY_SIZE, ++ .max_keysize = AES_MAX_KEY_SIZE, ++ .ivsize = 0, ++ .base = { ++ .cra_name = "ecb(aes)", ++ .cra_driver_name = "ecb(aes-eip93)", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_NEED_FALLBACK | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = AES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0xf, ++ .cra_init = mtk_skcipher_cra_init, ++ .cra_exit = mtk_skcipher_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_cbc_aes = { ++ .type = MTK_ALG_TYPE_SKCIPHER, ++ .flags = MTK_MODE_CBC | MTK_ALG_AES, ++ .alg.skcipher = { ++ .setkey = mtk_skcipher_setkey, ++ .encrypt = mtk_skcipher_encrypt, ++ .decrypt = mtk_skcipher_decrypt, ++ .min_keysize = AES_MIN_KEY_SIZE, ++ .max_keysize = AES_MAX_KEY_SIZE, ++ .ivsize = AES_BLOCK_SIZE, ++ .base = { ++ .cra_name = "cbc(aes)", ++ .cra_driver_name = "cbc(aes-eip93)", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_NEED_FALLBACK | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = AES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0xf, ++ .cra_init = mtk_skcipher_cra_init, ++ .cra_exit = mtk_skcipher_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_ctr_aes = { ++ .type = MTK_ALG_TYPE_SKCIPHER, ++ .flags = MTK_MODE_CTR | MTK_ALG_AES, ++ .alg.skcipher = { ++ .setkey = mtk_skcipher_setkey, ++ .encrypt = mtk_skcipher_encrypt, ++ .decrypt = mtk_skcipher_decrypt, ++ .min_keysize = AES_MIN_KEY_SIZE, ++ .max_keysize = AES_MAX_KEY_SIZE, ++ .ivsize = AES_BLOCK_SIZE, ++ .base = { ++ .cra_name = "ctr(aes)", ++ .cra_driver_name = "ctr(aes-eip93)", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_NEED_FALLBACK | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = 1, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0xf, ++ .cra_init = mtk_skcipher_cra_init, ++ .cra_exit = mtk_skcipher_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_rfc3686_aes = { ++ .type = MTK_ALG_TYPE_SKCIPHER, ++ .flags = MTK_MODE_CTR | MTK_MODE_RFC3686 | MTK_ALG_AES, ++ .alg.skcipher = { ++ .setkey = mtk_skcipher_setkey, ++ .encrypt = mtk_skcipher_encrypt, ++ .decrypt = mtk_skcipher_decrypt, ++ .min_keysize = AES_MIN_KEY_SIZE + CTR_RFC3686_NONCE_SIZE, ++ .max_keysize = AES_MAX_KEY_SIZE + CTR_RFC3686_NONCE_SIZE, ++ .ivsize = CTR_RFC3686_IV_SIZE, ++ .base = { ++ .cra_name = "rfc3686(ctr(aes))", ++ .cra_driver_name = "rfc3686(ctr(aes-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_NEED_FALLBACK | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = 1, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0xf, ++ .cra_init = mtk_skcipher_cra_init, ++ .cra_exit = mtk_skcipher_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) ++struct mtk_alg_template mtk_alg_ecb_des = { ++ .type = MTK_ALG_TYPE_SKCIPHER, ++ .flags = MTK_MODE_ECB | MTK_ALG_DES, ++ .alg.skcipher = { ++ .setkey = mtk_skcipher_setkey, ++ .encrypt = mtk_skcipher_encrypt, ++ .decrypt = mtk_skcipher_decrypt, ++ .min_keysize = DES_KEY_SIZE, ++ .max_keysize = DES_KEY_SIZE, ++ .ivsize = 0, ++ .base = { ++ .cra_name = "ecb(des)", ++ .cra_driver_name = "ebc(des-eip93)", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_skcipher_cra_init, ++ .cra_exit = mtk_skcipher_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_cbc_des = { ++ .type = MTK_ALG_TYPE_SKCIPHER, ++ .flags = MTK_MODE_CBC | MTK_ALG_DES, ++ .alg.skcipher = { ++ .setkey = mtk_skcipher_setkey, ++ .encrypt = mtk_skcipher_encrypt, ++ .decrypt = mtk_skcipher_decrypt, ++ .min_keysize = DES_KEY_SIZE, ++ .max_keysize = DES_KEY_SIZE, ++ .ivsize = DES_BLOCK_SIZE, ++ .base = { ++ .cra_name = "cbc(des)", ++ .cra_driver_name = "cbc(des-eip93)", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_skcipher_cra_init, ++ .cra_exit = mtk_skcipher_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_ecb_des3_ede = { ++ .type = MTK_ALG_TYPE_SKCIPHER, ++ .flags = MTK_MODE_ECB | MTK_ALG_3DES, ++ .alg.skcipher = { ++ .setkey = mtk_skcipher_setkey, ++ .encrypt = mtk_skcipher_encrypt, ++ .decrypt = mtk_skcipher_decrypt, ++ .min_keysize = DES3_EDE_KEY_SIZE, ++ .max_keysize = DES3_EDE_KEY_SIZE, ++ .ivsize = 0, ++ .base = { ++ .cra_name = "ecb(des3_ede)", ++ .cra_driver_name = "ecb(des3_ede-eip93)", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES3_EDE_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_skcipher_cra_init, ++ .cra_exit = mtk_skcipher_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_cbc_des3_ede = { ++ .type = MTK_ALG_TYPE_SKCIPHER, ++ .flags = MTK_MODE_CBC | MTK_ALG_3DES, ++ .alg.skcipher = { ++ .setkey = mtk_skcipher_setkey, ++ .encrypt = mtk_skcipher_encrypt, ++ .decrypt = mtk_skcipher_decrypt, ++ .min_keysize = DES3_EDE_KEY_SIZE, ++ .max_keysize = DES3_EDE_KEY_SIZE, ++ .ivsize = DES3_EDE_BLOCK_SIZE, ++ .base = { ++ .cra_name = "cbc(des3_ede)", ++ .cra_driver_name = "cbc(des3_ede-eip93)", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES3_EDE_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_skcipher_cra_init, ++ .cra_exit = mtk_skcipher_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++#endif +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/eip93-cipher.h +@@ -0,0 +1,66 @@ ++/* SPDX-License-Identifier: GPL-2.0 ++ * ++ * Copyright (C) 2019 - 2021 ++ * ++ * Richard van Schagen ++ */ ++#ifndef _EIP93_CIPHER_H_ ++#define _EIP93_CIPHER_H_ ++ ++#include "eip93-main.h" ++ ++struct mtk_crypto_ctx { ++ struct mtk_device *mtk; ++ struct saRecord_s *sa_in; ++ dma_addr_t sa_base_in; ++ struct saRecord_s *sa_out; ++ dma_addr_t sa_base_out; ++ uint32_t saNonce; ++ int blksize; ++ /* AEAD specific */ ++ unsigned int authsize; ++ unsigned int assoclen_in; ++ unsigned int assoclen_out; ++ bool in_first; ++ bool out_first; ++ struct crypto_shash *shash; ++ unsigned int keylen; ++ struct crypto_skcipher *fallback; ++}; ++ ++struct mtk_cipher_reqctx { ++ unsigned long flags; ++ unsigned int blksize; ++ unsigned int ivsize; ++ unsigned int textsize; ++ unsigned int assoclen; ++ unsigned int authsize; ++ dma_addr_t saRecord_base; ++ struct saState_s *saState; ++ dma_addr_t saState_base; ++ uint32_t saState_idx; ++ struct eip93_descriptor_s *cdesc; ++ struct scatterlist *sg_src; ++ struct scatterlist *sg_dst; ++ int src_nents; ++ int dst_nents; ++ struct saState_s *saState_ctr; ++ dma_addr_t saState_base_ctr; ++ uint32_t saState_ctr_idx; ++ struct skcipher_request fallback_req; // keep at the end ++}; ++ ++int check_valid_request(struct mtk_cipher_reqctx *rctx); ++ ++void mtk_unmap_dma(struct mtk_device *mtk, struct mtk_cipher_reqctx *rctx, ++ struct scatterlist *reqsrc, struct scatterlist *reqdst); ++ ++void mtk_skcipher_handle_result(struct crypto_async_request *async, int err); ++ ++int mtk_send_req(struct crypto_async_request *async, ++ const u8 *reqiv, struct mtk_cipher_reqctx *rctx); ++ ++void mtk_handle_result(struct mtk_device *mtk, struct mtk_cipher_reqctx *rctx, ++ u8 *reqiv); ++ ++#endif /* _EIP93_CIPHER_H_ */ +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/eip93-common.c +@@ -0,0 +1,749 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2019 - 2021 ++ * ++ * Richard van Schagen ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "eip93-cipher.h" ++#include "eip93-common.h" ++#include "eip93-main.h" ++#include "eip93-regs.h" ++ ++inline void *mtk_ring_next_wptr(struct mtk_device *mtk, ++ struct mtk_desc_ring *ring) ++{ ++ void *ptr = ring->write; ++ ++ if ((ring->write == ring->read - ring->offset) || ++ (ring->read == ring->base && ring->write == ring->base_end)) ++ return ERR_PTR(-ENOMEM); ++ ++ if (ring->write == ring->base_end) ++ ring->write = ring->base; ++ else ++ ring->write += ring->offset; ++ ++ return ptr; ++} ++ ++inline void *mtk_ring_next_rptr(struct mtk_device *mtk, ++ struct mtk_desc_ring *ring) ++{ ++ void *ptr = ring->read; ++ ++ if (ring->write == ring->read) ++ return ERR_PTR(-ENOENT); ++ ++ if (ring->read == ring->base_end) ++ ring->read = ring->base; ++ else ++ ring->read += ring->offset; ++ ++ return ptr; ++} ++ ++inline int mtk_put_descriptor(struct mtk_device *mtk, ++ struct eip93_descriptor_s *desc) ++{ ++ struct eip93_descriptor_s *cdesc; ++ struct eip93_descriptor_s *rdesc; ++ unsigned long irqflags; ++ ++ spin_lock_irqsave(&mtk->ring->write_lock, irqflags); ++ ++ rdesc = mtk_ring_next_wptr(mtk, &mtk->ring->rdr); ++ ++ if (IS_ERR(rdesc)) { ++ spin_unlock_irqrestore(&mtk->ring->write_lock, irqflags); ++ return -ENOENT; ++ } ++ ++ cdesc = mtk_ring_next_wptr(mtk, &mtk->ring->cdr); ++ ++ if (IS_ERR(cdesc)) { ++ spin_unlock_irqrestore(&mtk->ring->write_lock, irqflags); ++ return -ENOENT; ++ } ++ ++ memset(rdesc, 0, sizeof(struct eip93_descriptor_s)); ++ memcpy(cdesc, desc, sizeof(struct eip93_descriptor_s)); ++ ++ atomic_dec(&mtk->ring->free); ++ spin_unlock_irqrestore(&mtk->ring->write_lock, irqflags); ++ ++ return 0; ++} ++ ++inline void *mtk_get_descriptor(struct mtk_device *mtk) ++{ ++ struct eip93_descriptor_s *cdesc; ++ void *ptr; ++ unsigned long irqflags; ++ ++ spin_lock_irqsave(&mtk->ring->read_lock, irqflags); ++ ++ cdesc = mtk_ring_next_rptr(mtk, &mtk->ring->cdr); ++ ++ if (IS_ERR(cdesc)) { ++ spin_unlock_irqrestore(&mtk->ring->read_lock, irqflags); ++ return ERR_PTR(-ENOENT); ++ } ++ ++ memset(cdesc, 0, sizeof(struct eip93_descriptor_s)); ++ ++ ptr = mtk_ring_next_rptr(mtk, &mtk->ring->rdr); ++ if (IS_ERR(ptr)) { ++ spin_unlock_irqrestore(&mtk->ring->read_lock, irqflags); ++ return ERR_PTR(-ENOENT); ++ } ++ ++ atomic_inc(&mtk->ring->free); ++ spin_unlock_irqrestore(&mtk->ring->read_lock, irqflags); ++ ++ return ptr; ++} ++ ++inline int mtk_get_free_saState(struct mtk_device *mtk) ++{ ++ struct mtk_state_pool *saState_pool; ++ int i; ++ ++ for (i = 0; i < MTK_RING_SIZE; i++) { ++ saState_pool = &mtk->ring->saState_pool[i]; ++ if (saState_pool->in_use == false) { ++ saState_pool->in_use = true; ++ return i; ++ } ++ ++ } ++ ++ return -ENOENT; ++} ++ ++static inline void mtk_free_sg_copy(const int len, struct scatterlist **sg) ++{ ++ if (!*sg || !len) ++ return; ++ ++ free_pages((unsigned long)sg_virt(*sg), get_order(len)); ++ kfree(*sg); ++ *sg = NULL; ++} ++ ++static inline int mtk_make_sg_copy(struct scatterlist *src, ++ struct scatterlist **dst, ++ const uint32_t len, const bool copy) ++{ ++ void *pages; ++ ++ *dst = kmalloc(sizeof(**dst), GFP_KERNEL); ++ if (!*dst) ++ return -ENOMEM; ++ ++ ++ pages = (void *)__get_free_pages(GFP_KERNEL | GFP_DMA, ++ get_order(len)); ++ ++ if (!pages) { ++ kfree(*dst); ++ *dst = NULL; ++ return -ENOMEM; ++ } ++ ++ sg_init_table(*dst, 1); ++ sg_set_buf(*dst, pages, len); ++ ++ /* copy only as requested */ ++ if (copy) ++ sg_copy_to_buffer(src, sg_nents(src), pages, len); ++ ++ return 0; ++} ++ ++static inline bool mtk_is_sg_aligned(struct scatterlist *sg, u32 len, ++ const int blksize) ++{ ++ int nents; ++ ++ for (nents = 0; sg; sg = sg_next(sg), ++nents) { ++ if (!IS_ALIGNED(sg->offset, 4)) ++ return false; ++ ++ if (len <= sg->length) { ++ if (!IS_ALIGNED(len, blksize)) ++ return false; ++ ++ return true; ++ } ++ ++ if (!IS_ALIGNED(sg->length, blksize)) ++ return false; ++ ++ len -= sg->length; ++ } ++ return false; ++} ++ ++int check_valid_request(struct mtk_cipher_reqctx *rctx) ++{ ++ struct scatterlist *src = rctx->sg_src; ++ struct scatterlist *dst = rctx->sg_dst; ++ uint32_t src_nents, dst_nents; ++ u32 textsize = rctx->textsize; ++ u32 authsize = rctx->authsize; ++ u32 blksize = rctx->blksize; ++ u32 totlen_src = rctx->assoclen + rctx->textsize; ++ u32 totlen_dst = rctx->assoclen + rctx->textsize; ++ u32 copy_len; ++ bool src_align, dst_align; ++ int err = -EINVAL; ++ ++ if (!IS_CTR(rctx->flags)) { ++ if (!IS_ALIGNED(textsize, blksize)) ++ return err; ++ } ++ ++ if (authsize) { ++ if (IS_ENCRYPT(rctx->flags)) ++ totlen_dst += authsize; ++ else ++ totlen_src += authsize; ++ } ++ ++ src_nents = sg_nents_for_len(src, totlen_src); ++ dst_nents = sg_nents_for_len(dst, totlen_dst); ++ ++ if (src == dst) { ++ src_nents = max(src_nents, dst_nents); ++ dst_nents = src_nents; ++ if (unlikely((totlen_src || totlen_dst) && (src_nents <= 0))) ++ return err; ++ ++ } else { ++ if (unlikely(totlen_src && (src_nents <= 0))) ++ return err; ++ ++ if (unlikely(totlen_dst && (dst_nents <= 0))) ++ return err; ++ } ++ ++ if (authsize) { ++ if (dst_nents == 1 && src_nents == 1) { ++ src_align = mtk_is_sg_aligned(src, totlen_src, blksize); ++ if (src == dst) ++ dst_align = src_align; ++ else ++ dst_align = mtk_is_sg_aligned(dst, ++ totlen_dst, blksize); ++ } else { ++ src_align = false; ++ dst_align = false; ++ } ++ } else { ++ src_align = mtk_is_sg_aligned(src, totlen_src, blksize); ++ if (src == dst) ++ dst_align = src_align; ++ else ++ dst_align = mtk_is_sg_aligned(dst, totlen_dst, blksize); ++ } ++ ++ copy_len = max(totlen_src, totlen_dst); ++ if (!src_align) { ++ err = mtk_make_sg_copy(src, &rctx->sg_src, copy_len, true); ++ if (err) ++ return err; ++ } ++ ++ if (!dst_align) { ++ err = mtk_make_sg_copy(dst, &rctx->sg_dst, copy_len, false); ++ if (err) ++ return err; ++ } ++ ++ rctx->src_nents = sg_nents_for_len(rctx->sg_src, totlen_src); ++ rctx->dst_nents = sg_nents_for_len(rctx->sg_dst, totlen_dst); ++ ++ return 0; ++} ++/* ++ * Set saRecord function: ++ * Even saRecord is set to "0", keep " = 0" for readability. ++ */ ++void mtk_set_saRecord(struct saRecord_s *saRecord, const unsigned int keylen, ++ const u32 flags) ++{ ++ saRecord->saCmd0.bits.ivSource = 2; ++ if (IS_ECB(flags)) ++ saRecord->saCmd0.bits.saveIv = 0; ++ else ++ saRecord->saCmd0.bits.saveIv = 1; ++ ++ saRecord->saCmd0.bits.opGroup = 0; ++ saRecord->saCmd0.bits.opCode = 0; ++ ++ switch ((flags & MTK_ALG_MASK)) { ++ case MTK_ALG_AES: ++ saRecord->saCmd0.bits.cipher = 3; ++ saRecord->saCmd1.bits.aesKeyLen = keylen >> 3; ++ break; ++ case MTK_ALG_3DES: ++ saRecord->saCmd0.bits.cipher = 1; ++ break; ++ case MTK_ALG_DES: ++ saRecord->saCmd0.bits.cipher = 0; ++ break; ++ default: ++ saRecord->saCmd0.bits.cipher = 15; ++ } ++ ++ switch ((flags & MTK_HASH_MASK)) { ++ case MTK_HASH_SHA256: ++ saRecord->saCmd0.bits.hash = 3; ++ break; ++ case MTK_HASH_SHA224: ++ saRecord->saCmd0.bits.hash = 2; ++ break; ++ case MTK_HASH_SHA1: ++ saRecord->saCmd0.bits.hash = 1; ++ break; ++ case MTK_HASH_MD5: ++ saRecord->saCmd0.bits.hash = 0; ++ break; ++ default: ++ saRecord->saCmd0.bits.hash = 15; ++ } ++ ++ saRecord->saCmd0.bits.hdrProc = 0; ++ saRecord->saCmd0.bits.padType = 3; ++ saRecord->saCmd0.bits.extPad = 0; ++ saRecord->saCmd0.bits.scPad = 0; ++ ++ switch ((flags & MTK_MODE_MASK)) { ++ case MTK_MODE_CBC: ++ saRecord->saCmd1.bits.cipherMode = 1; ++ break; ++ case MTK_MODE_CTR: ++ saRecord->saCmd1.bits.cipherMode = 2; ++ break; ++ case MTK_MODE_ECB: ++ saRecord->saCmd1.bits.cipherMode = 0; ++ break; ++ } ++ ++ saRecord->saCmd1.bits.byteOffset = 0; ++ saRecord->saCmd1.bits.hashCryptOffset = 0; ++ saRecord->saCmd0.bits.digestLength = 0; ++ saRecord->saCmd1.bits.copyPayload = 0; ++ ++ if (IS_HMAC(flags)) { ++ saRecord->saCmd1.bits.hmac = 1; ++ saRecord->saCmd1.bits.copyDigest = 1; ++ saRecord->saCmd1.bits.copyHeader = 1; ++ } else { ++ saRecord->saCmd1.bits.hmac = 0; ++ saRecord->saCmd1.bits.copyDigest = 0; ++ saRecord->saCmd1.bits.copyHeader = 0; ++ } ++ ++ saRecord->saCmd1.bits.seqNumCheck = 0; ++ saRecord->saSpi = 0x0; ++ saRecord->saSeqNumMask[0] = 0xFFFFFFFF; ++ saRecord->saSeqNumMask[1] = 0x0; ++} ++ ++/* ++ * Poor mans Scatter/gather function: ++ * Create a Descriptor for every segment to avoid copying buffers. ++ * For performance better to wait for hardware to perform multiple DMA ++ * ++ */ ++static inline int mtk_scatter_combine(struct mtk_device *mtk, ++ struct mtk_cipher_reqctx *rctx, ++ u32 datalen, u32 split, int offsetin) ++{ ++ struct eip93_descriptor_s *cdesc = rctx->cdesc; ++ struct scatterlist *sgsrc = rctx->sg_src; ++ struct scatterlist *sgdst = rctx->sg_dst; ++ unsigned int remainin = sg_dma_len(sgsrc); ++ unsigned int remainout = sg_dma_len(sgdst); ++ dma_addr_t saddr = sg_dma_address(sgsrc); ++ dma_addr_t daddr = sg_dma_address(sgdst); ++ dma_addr_t stateAddr; ++ u32 srcAddr, dstAddr, len, n; ++ bool nextin = false; ++ bool nextout = false; ++ int offsetout = 0; ++ int ndesc_cdr = 0, err; ++ ++ if (IS_ECB(rctx->flags)) ++ rctx->saState_base = 0; ++ ++ if (split < datalen) { ++ stateAddr = rctx->saState_base_ctr; ++ n = split; ++ } else { ++ stateAddr = rctx->saState_base; ++ n = datalen; ++ } ++ ++ do { ++ if (nextin) { ++ sgsrc = sg_next(sgsrc); ++ remainin = sg_dma_len(sgsrc); ++ if (remainin == 0) ++ continue; ++ ++ saddr = sg_dma_address(sgsrc); ++ offsetin = 0; ++ nextin = false; ++ } ++ ++ if (nextout) { ++ sgdst = sg_next(sgdst); ++ remainout = sg_dma_len(sgdst); ++ if (remainout == 0) ++ continue; ++ ++ daddr = sg_dma_address(sgdst); ++ offsetout = 0; ++ nextout = false; ++ } ++ srcAddr = saddr + offsetin; ++ dstAddr = daddr + offsetout; ++ ++ if (remainin == remainout) { ++ len = remainin; ++ if (len > n) { ++ len = n; ++ remainin -= n; ++ remainout -= n; ++ offsetin += n; ++ offsetout += n; ++ } else { ++ nextin = true; ++ nextout = true; ++ } ++ } else if (remainin < remainout) { ++ len = remainin; ++ if (len > n) { ++ len = n; ++ remainin -= n; ++ remainout -= n; ++ offsetin += n; ++ offsetout += n; ++ } else { ++ offsetout += len; ++ remainout -= len; ++ nextin = true; ++ } ++ } else { ++ len = remainout; ++ if (len > n) { ++ len = n; ++ remainin -= n; ++ remainout -= n; ++ offsetin += n; ++ offsetout += n; ++ } else { ++ offsetin += len; ++ remainin -= len; ++ nextout = true; ++ } ++ } ++ n -= len; ++ ++ cdesc->srcAddr = srcAddr; ++ cdesc->dstAddr = dstAddr; ++ cdesc->stateAddr = stateAddr; ++ cdesc->peLength.bits.peReady = 0; ++ cdesc->peLength.bits.byPass = 0; ++ cdesc->peLength.bits.length = len; ++ cdesc->peLength.bits.hostReady = 1; ++ ++ if (n == 0) { ++ n = datalen - split; ++ split = datalen; ++ stateAddr = rctx->saState_base; ++ } ++ ++ if (n == 0) ++ cdesc->userId |= MTK_DESC_LAST; ++ ++ /* Loop - Delay - No need to rollback ++ * Maybe refine by slowing down at MTK_RING_BUSY ++ */ ++again: ++ err = mtk_put_descriptor(mtk, cdesc); ++ if (err) { ++ udelay(500); ++ goto again; ++ } ++ /* Writing new descriptor count starts DMA action */ ++ writel(1, mtk->base + EIP93_REG_PE_CD_COUNT); ++ ++ ndesc_cdr++; ++ } while (n); ++ ++ return -EINPROGRESS; ++} ++ ++int mtk_send_req(struct crypto_async_request *async, ++ const u8 *reqiv, struct mtk_cipher_reqctx *rctx) ++{ ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(async->tfm); ++ struct mtk_device *mtk = ctx->mtk; ++ struct scatterlist *src = rctx->sg_src; ++ struct scatterlist *dst = rctx->sg_dst; ++ struct saState_s *saState; ++ struct mtk_state_pool *saState_pool; ++ struct eip93_descriptor_s cdesc; ++ u32 flags = rctx->flags; ++ int idx; ++ int offsetin = 0, err = -ENOMEM; ++ u32 datalen = rctx->assoclen + rctx->textsize; ++ u32 split = datalen; ++ u32 start, end, ctr, blocks; ++ u32 iv[AES_BLOCK_SIZE / sizeof(u32)]; ++ ++ rctx->saState_ctr = NULL; ++ rctx->saState = NULL; ++ ++ if (IS_ECB(flags)) ++ goto skip_iv; ++ ++ memcpy(iv, reqiv, rctx->ivsize); ++ ++ if (!IS_ALIGNED((u32)reqiv, rctx->ivsize) || IS_RFC3686(flags)) { ++ rctx->flags &= ~MTK_DESC_DMA_IV; ++ flags = rctx->flags; ++ } ++ ++ if (IS_DMA_IV(flags)) { ++ rctx->saState = (void *)reqiv; ++ } else { ++ idx = mtk_get_free_saState(mtk); ++ if (idx < 0) ++ goto send_err; ++ saState_pool = &mtk->ring->saState_pool[idx]; ++ rctx->saState_idx = idx; ++ rctx->saState = saState_pool->base; ++ rctx->saState_base = saState_pool->base_dma; ++ memcpy(rctx->saState->stateIv, iv, rctx->ivsize); ++ } ++ ++ saState = rctx->saState; ++ ++ if (IS_RFC3686(flags)) { ++ saState->stateIv[0] = ctx->saNonce; ++ saState->stateIv[1] = iv[0]; ++ saState->stateIv[2] = iv[1]; ++ saState->stateIv[3] = cpu_to_be32(1); ++ } else if (!IS_HMAC(flags) && IS_CTR(flags)) { ++ /* Compute data length. */ ++ blocks = DIV_ROUND_UP(rctx->textsize, AES_BLOCK_SIZE); ++ ctr = be32_to_cpu(iv[3]); ++ /* Check 32bit counter overflow. */ ++ start = ctr; ++ end = start + blocks - 1; ++ if (end < start) { ++ split = AES_BLOCK_SIZE * -start; ++ /* ++ * Increment the counter manually to cope with ++ * the hardware counter overflow. ++ */ ++ iv[3] = 0xffffffff; ++ crypto_inc((u8 *)iv, AES_BLOCK_SIZE); ++ idx = mtk_get_free_saState(mtk); ++ if (idx < 0) ++ goto free_state; ++ saState_pool = &mtk->ring->saState_pool[idx]; ++ rctx->saState_ctr_idx = idx; ++ rctx->saState_ctr = saState_pool->base; ++ rctx->saState_base_ctr = saState_pool->base_dma; ++ ++ memcpy(rctx->saState_ctr->stateIv, reqiv, rctx->ivsize); ++ memcpy(saState->stateIv, iv, rctx->ivsize); ++ } ++ } ++ ++ if (IS_DMA_IV(flags)) { ++ rctx->saState_base = dma_map_single(mtk->dev, (void *)reqiv, ++ rctx->ivsize, DMA_TO_DEVICE); ++ if (dma_mapping_error(mtk->dev, rctx->saState_base)) ++ goto free_state; ++ } ++skip_iv: ++ cdesc.peCrtlStat.bits.hostReady = 1; ++ cdesc.peCrtlStat.bits.prngMode = 0; ++ cdesc.peCrtlStat.bits.hashFinal = 0; ++ cdesc.peCrtlStat.bits.padCrtlStat = 0; ++ cdesc.peCrtlStat.bits.peReady = 0; ++ cdesc.saAddr = rctx->saRecord_base; ++ cdesc.arc4Addr = (uint32_t)async; ++ cdesc.userId = flags; ++ rctx->cdesc = &cdesc; ++ ++ /* map DMA_BIDIRECTIONAL to invalidate cache on destination ++ * implies __dma_cache_wback_inv ++ */ ++ dma_map_sg(mtk->dev, dst, rctx->dst_nents, DMA_BIDIRECTIONAL); ++ if (src != dst) ++ dma_map_sg(mtk->dev, src, rctx->src_nents, DMA_TO_DEVICE); ++ ++ err = mtk_scatter_combine(mtk, rctx, datalen, split, offsetin); ++ ++ return err; ++ ++free_state: ++ if (rctx->saState) { ++ saState_pool = &mtk->ring->saState_pool[rctx->saState_idx]; ++ saState_pool->in_use = false; ++ } ++ ++ if (rctx->saState_ctr) { ++ saState_pool = &mtk->ring->saState_pool[rctx->saState_ctr_idx]; ++ saState_pool->in_use = false; ++ } ++send_err: ++ return err; ++} ++ ++void mtk_unmap_dma(struct mtk_device *mtk, struct mtk_cipher_reqctx *rctx, ++ struct scatterlist *reqsrc, struct scatterlist *reqdst) ++{ ++ u32 len = rctx->assoclen + rctx->textsize; ++ u32 authsize = rctx->authsize; ++ u32 flags = rctx->flags; ++ u32 *otag; ++ int i; ++ ++ if (rctx->sg_src == rctx->sg_dst) { ++ dma_unmap_sg(mtk->dev, rctx->sg_dst, rctx->dst_nents, ++ DMA_BIDIRECTIONAL); ++ goto process_tag; ++ } ++ ++ dma_unmap_sg(mtk->dev, rctx->sg_src, rctx->src_nents, ++ DMA_TO_DEVICE); ++ ++ if (rctx->sg_src != reqsrc) ++ mtk_free_sg_copy(len + rctx->authsize, &rctx->sg_src); ++ ++ dma_unmap_sg(mtk->dev, rctx->sg_dst, rctx->dst_nents, ++ DMA_BIDIRECTIONAL); ++ ++ /* SHA tags need conversion from net-to-host */ ++process_tag: ++ if (IS_DECRYPT(flags)) ++ authsize = 0; ++ ++ if (authsize) { ++ if (!IS_HASH_MD5(flags)) { ++ otag = sg_virt(rctx->sg_dst) + len; ++ for (i = 0; i < (authsize / 4); i++) ++ otag[i] = ntohl(otag[i]); ++ } ++ } ++ ++ if (rctx->sg_dst != reqdst) { ++ sg_copy_from_buffer(reqdst, sg_nents(reqdst), ++ sg_virt(rctx->sg_dst), len + authsize); ++ mtk_free_sg_copy(len + rctx->authsize, &rctx->sg_dst); ++ } ++} ++ ++void mtk_handle_result(struct mtk_device *mtk, struct mtk_cipher_reqctx *rctx, ++ u8 *reqiv) ++{ ++ struct mtk_state_pool *saState_pool; ++ ++ if (IS_DMA_IV(rctx->flags)) ++ dma_unmap_single(mtk->dev, rctx->saState_base, rctx->ivsize, ++ DMA_TO_DEVICE); ++ ++ if (!IS_ECB(rctx->flags)) ++ memcpy(reqiv, rctx->saState->stateIv, rctx->ivsize); ++ ++ if ((rctx->saState) && !(IS_DMA_IV(rctx->flags))) { ++ saState_pool = &mtk->ring->saState_pool[rctx->saState_idx]; ++ saState_pool->in_use = false; ++ } ++ ++ if (rctx->saState_ctr) { ++ saState_pool = &mtk->ring->saState_pool[rctx->saState_ctr_idx]; ++ saState_pool->in_use = false; ++ } ++} ++ ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_HMAC) ++/* basically this is set hmac - key */ ++int mtk_authenc_setkey(struct crypto_shash *cshash, struct saRecord_s *sa, ++ const u8 *authkey, unsigned int authkeylen) ++{ ++ int bs = crypto_shash_blocksize(cshash); ++ int ds = crypto_shash_digestsize(cshash); ++ int ss = crypto_shash_statesize(cshash); ++ u8 *ipad, *opad; ++ unsigned int i, err; ++ ++ SHASH_DESC_ON_STACK(shash, cshash); ++ ++ shash->tfm = cshash; ++ ++ /* auth key ++ * ++ * EIP93 can only authenticate with hash of the key ++ * do software shash until EIP93 hash function complete. ++ */ ++ ipad = kcalloc(2, SHA256_BLOCK_SIZE + ss, GFP_KERNEL); ++ if (!ipad) ++ return -ENOMEM; ++ ++ opad = ipad + SHA256_BLOCK_SIZE + ss; ++ ++ if (authkeylen > bs) { ++ err = crypto_shash_digest(shash, authkey, ++ authkeylen, ipad); ++ if (err) ++ return err; ++ ++ authkeylen = ds; ++ } else ++ memcpy(ipad, authkey, authkeylen); ++ ++ memset(ipad + authkeylen, 0, bs - authkeylen); ++ memcpy(opad, ipad, bs); ++ ++ for (i = 0; i < bs; i++) { ++ ipad[i] ^= HMAC_IPAD_VALUE; ++ opad[i] ^= HMAC_OPAD_VALUE; ++ } ++ ++ err = crypto_shash_init(shash) ?: ++ crypto_shash_update(shash, ipad, bs) ?: ++ crypto_shash_export(shash, ipad) ?: ++ crypto_shash_init(shash) ?: ++ crypto_shash_update(shash, opad, bs) ?: ++ crypto_shash_export(shash, opad); ++ ++ if (err) ++ return err; ++ ++ /* add auth key */ ++ memcpy(&sa->saIDigest, ipad, SHA256_DIGEST_SIZE); ++ memcpy(&sa->saODigest, opad, SHA256_DIGEST_SIZE); ++ ++ kfree(ipad); ++ return 0; ++} ++#endif +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/eip93-common.h +@@ -0,0 +1,28 @@ ++/* SPDX-License-Identifier: GPL-2.0 ++ * ++ * Copyright (C) 2019 - 2021 ++ * ++ * Richard van Schagen ++ */ ++ ++#ifndef _EIP93_COMMON_H_ ++#define _EIP93_COMMON_H_ ++ ++#include "eip93-main.h" ++ ++inline int mtk_put_descriptor(struct mtk_device *mtk, ++ struct eip93_descriptor_s *desc); ++ ++inline void *mtk_get_descriptor(struct mtk_device *mtk); ++ ++inline int mtk_get_free_saState(struct mtk_device *mtk); ++ ++void mtk_set_saRecord(struct saRecord_s *saRecord, const unsigned int keylen, ++ const u32 flags); ++ ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_HMAC) ++int mtk_authenc_setkey(struct crypto_shash *cshash, struct saRecord_s *sa, ++ const u8 *authkey, unsigned int authkeylen); ++#endif ++ ++#endif /* _EIP93_COMMON_H_ */ +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/eip93-des.h +@@ -0,0 +1,15 @@ ++/* SPDX-License-Identifier: GPL-2.0 ++ * ++ * Copyright (C) 2019 - 2021 ++ * ++ * Richard van Schagen ++ */ ++#ifndef _EIP93_DES_H_ ++#define _EIP93_DES_H_ ++ ++extern struct mtk_alg_template mtk_alg_ecb_des; ++extern struct mtk_alg_template mtk_alg_cbc_des; ++extern struct mtk_alg_template mtk_alg_ecb_des3_ede; ++extern struct mtk_alg_template mtk_alg_cbc_des3_ede; ++ ++#endif /* _EIP93_DES_H_ */ +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/eip93-main.c +@@ -0,0 +1,464 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2019 - 2021 ++ * ++ * Richard van Schagen ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "eip93-main.h" ++#include "eip93-regs.h" ++#include "eip93-common.h" ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_SKCIPHER) ++#include "eip93-cipher.h" ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) ++#include "eip93-aes.h" ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) ++#include "eip93-des.h" ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AEAD) ++#include "eip93-aead.h" ++#endif ++ ++static struct mtk_alg_template *mtk_algs[] = { ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) ++ &mtk_alg_ecb_des, ++ &mtk_alg_cbc_des, ++ &mtk_alg_ecb_des3_ede, ++ &mtk_alg_cbc_des3_ede, ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) ++ &mtk_alg_ecb_aes, ++ &mtk_alg_cbc_aes, ++ &mtk_alg_ctr_aes, ++ &mtk_alg_rfc3686_aes, ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AEAD) ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) ++ &mtk_alg_authenc_hmac_md5_cbc_des, ++ &mtk_alg_authenc_hmac_sha1_cbc_des, ++ &mtk_alg_authenc_hmac_sha224_cbc_des, ++ &mtk_alg_authenc_hmac_sha256_cbc_des, ++ &mtk_alg_authenc_hmac_md5_cbc_des3_ede, ++ &mtk_alg_authenc_hmac_sha1_cbc_des3_ede, ++ &mtk_alg_authenc_hmac_sha224_cbc_des3_ede, ++ &mtk_alg_authenc_hmac_sha256_cbc_des3_ede, ++#endif ++ &mtk_alg_authenc_hmac_md5_cbc_aes, ++ &mtk_alg_authenc_hmac_sha1_cbc_aes, ++ &mtk_alg_authenc_hmac_sha224_cbc_aes, ++ &mtk_alg_authenc_hmac_sha256_cbc_aes, ++ &mtk_alg_authenc_hmac_md5_rfc3686_aes, ++ &mtk_alg_authenc_hmac_sha1_rfc3686_aes, ++ &mtk_alg_authenc_hmac_sha224_rfc3686_aes, ++ &mtk_alg_authenc_hmac_sha256_rfc3686_aes, ++#endif ++}; ++ ++inline void mtk_irq_disable(struct mtk_device *mtk, u32 mask) ++{ ++ __raw_writel(mask, mtk->base + EIP93_REG_MASK_DISABLE); ++} ++ ++inline void mtk_irq_enable(struct mtk_device *mtk, u32 mask) ++{ ++ __raw_writel(mask, mtk->base + EIP93_REG_MASK_ENABLE); ++} ++ ++inline void mtk_irq_clear(struct mtk_device *mtk, u32 mask) ++{ ++ __raw_writel(mask, mtk->base + EIP93_REG_INT_CLR); ++} ++ ++static void mtk_unregister_algs(unsigned int i) ++{ ++ unsigned int j; ++ ++ for (j = 0; j < i; j++) { ++ switch (mtk_algs[j]->type) { ++ case MTK_ALG_TYPE_SKCIPHER: ++ crypto_unregister_skcipher(&mtk_algs[j]->alg.skcipher); ++ break; ++ case MTK_ALG_TYPE_AEAD: ++ crypto_unregister_aead(&mtk_algs[j]->alg.aead); ++ break; ++ } ++ } ++} ++ ++static int mtk_register_algs(struct mtk_device *mtk) ++{ ++ unsigned int i; ++ int err = 0; ++ ++ for (i = 0; i < ARRAY_SIZE(mtk_algs); i++) { ++ mtk_algs[i]->mtk = mtk; ++ ++ switch (mtk_algs[i]->type) { ++ case MTK_ALG_TYPE_SKCIPHER: ++ err = crypto_register_skcipher(&mtk_algs[i]->alg.skcipher); ++ break; ++ case MTK_ALG_TYPE_AEAD: ++ err = crypto_register_aead(&mtk_algs[i]->alg.aead); ++ break; ++ } ++ if (err) ++ goto fail; ++ } ++ ++ return 0; ++ ++fail: ++ mtk_unregister_algs(i); ++ ++ return err; ++} ++ ++static void mtk_handle_result_descriptor(struct mtk_device *mtk) ++{ ++ struct crypto_async_request *async; ++ struct eip93_descriptor_s *rdesc; ++ bool last_entry; ++ u32 flags; ++ int handled, ready, err; ++ union peCrtlStat_w done1; ++ union peLength_w done2; ++ ++get_more: ++ handled = 0; ++ ++ ready = readl(mtk->base + EIP93_REG_PE_RD_COUNT) & GENMASK(10, 0); ++ ++ if (!ready) { ++ mtk_irq_clear(mtk, EIP93_INT_PE_RDRTHRESH_REQ); ++ mtk_irq_enable(mtk, EIP93_INT_PE_RDRTHRESH_REQ); ++ return; ++ } ++ ++ last_entry = false; ++ ++ while (ready) { ++ rdesc = mtk_get_descriptor(mtk); ++ if (IS_ERR(rdesc)) { ++ dev_err(mtk->dev, "Ndesc: %d nreq: %d\n", ++ handled, ready); ++ err = -EIO; ++ break; ++ } ++ /* make sure DMA is finished writing */ ++ do { ++ done1.word = READ_ONCE(rdesc->peCrtlStat.word); ++ done2.word = READ_ONCE(rdesc->peLength.word); ++ } while ((!done1.bits.peReady) || (!done2.bits.peReady)); ++ ++ err = rdesc->peCrtlStat.bits.errStatus; ++ ++ flags = rdesc->userId; ++ async = (struct crypto_async_request *)rdesc->arc4Addr; ++ ++ writel(1, mtk->base + EIP93_REG_PE_RD_COUNT); ++ mtk_irq_clear(mtk, EIP93_INT_PE_RDRTHRESH_REQ); ++ ++ handled++; ++ ready--; ++ ++ if (flags & MTK_DESC_LAST) { ++ last_entry = true; ++ break; ++ } ++ } ++ ++ if (!last_entry) ++ goto get_more; ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_SKCIPHER) ++ if (flags & MTK_DESC_SKCIPHER) ++ mtk_skcipher_handle_result(async, err); ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AEAD) ++ if (flags & MTK_DESC_AEAD) ++ mtk_aead_handle_result(async, err); ++#endif ++ goto get_more; ++} ++ ++static void mtk_done_task(unsigned long data) ++{ ++ struct mtk_device *mtk = (struct mtk_device *)data; ++ ++ mtk_handle_result_descriptor(mtk); ++} ++ ++static irqreturn_t mtk_irq_handler(int irq, void *dev_id) ++{ ++ struct mtk_device *mtk = (struct mtk_device *)dev_id; ++ u32 irq_status; ++ ++ irq_status = readl(mtk->base + EIP93_REG_INT_MASK_STAT); ++ ++ if (irq_status & EIP93_INT_PE_RDRTHRESH_REQ) { ++ mtk_irq_disable(mtk, EIP93_INT_PE_RDRTHRESH_REQ); ++ tasklet_schedule(&mtk->ring->done_task); ++ return IRQ_HANDLED; ++ } ++ ++ mtk_irq_clear(mtk, irq_status); ++ if (irq_status) ++ mtk_irq_disable(mtk, irq_status); ++ ++ return IRQ_NONE; ++} ++ ++static void mtk_initialize(struct mtk_device *mtk) ++{ ++ union peConfig_w peConfig; ++ union peEndianCfg_w peEndianCfg; ++ union peIntCfg_w peIntCfg; ++ union peClockCfg_w peClockCfg; ++ union peBufThresh_w peBufThresh; ++ union peRingThresh_w peRingThresh; ++ ++ /* Reset Engine and setup Mode */ ++ peConfig.word = 0; ++ peConfig.bits.resetPE = 1; ++ peConfig.bits.resetRing = 1; ++ peConfig.bits.peMode = 3; ++ peConfig.bits.enCDRupdate = 1; ++ ++ writel(peConfig.word, mtk->base + EIP93_REG_PE_CONFIG); ++ ++ udelay(10); ++ ++ peConfig.bits.resetPE = 0; ++ peConfig.bits.resetRing = 0; ++ ++ writel(peConfig.word, mtk->base + EIP93_REG_PE_CONFIG); ++ ++ /* Initialize the BYTE_ORDER_CFG register */ ++ peEndianCfg.word = 0; ++ writel(peEndianCfg.word, mtk->base + EIP93_REG_PE_ENDIAN_CONFIG); ++ ++ /* Initialize the INT_CFG register */ ++ peIntCfg.word = 0; ++ writel(peIntCfg.word, mtk->base + EIP93_REG_INT_CFG); ++ ++ /* Config Clocks */ ++ peClockCfg.word = 0; ++ peClockCfg.bits.enPEclk = 1; ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) ++ peClockCfg.bits.enDESclk = 1; ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) ++ peClockCfg.bits.enAESclk = 1; ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_HMAC) ++ peClockCfg.bits.enHASHclk = 1; ++#endif ++ writel(peClockCfg.word, mtk->base + EIP93_REG_PE_CLOCK_CTRL); ++ ++ /* Config DMA thresholds */ ++ peBufThresh.word = 0; ++ peBufThresh.bits.inputBuffer = 128; ++ peBufThresh.bits.outputBuffer = 128; ++ ++ writel(peBufThresh.word, mtk->base + EIP93_REG_PE_BUF_THRESH); ++ ++ /* Clear/ack all interrupts before disable all */ ++ mtk_irq_clear(mtk, 0xFFFFFFFF); ++ mtk_irq_disable(mtk, 0xFFFFFFFF); ++ ++ /* Config Ring Threshold */ ++ peRingThresh.word = 0; ++ peRingThresh.bits.CDRThresh = MTK_RING_SIZE - MTK_RING_BUSY; ++ peRingThresh.bits.RDRThresh = 0; ++ peRingThresh.bits.RDTimeout = 5; ++ peRingThresh.bits.enTimeout = 1; ++ ++ writel(peRingThresh.word, mtk->base + EIP93_REG_PE_RING_THRESH); ++} ++ ++static void mtk_desc_free(struct mtk_device *mtk) ++{ ++ writel(0, mtk->base + EIP93_REG_PE_RING_CONFIG); ++ writel(0, mtk->base + EIP93_REG_PE_CDR_BASE); ++ writel(0, mtk->base + EIP93_REG_PE_RDR_BASE); ++} ++ ++static int mtk_set_ring(struct mtk_device *mtk, struct mtk_desc_ring *ring, ++ int Offset) ++{ ++ ring->offset = Offset; ++ ring->base = dmam_alloc_coherent(mtk->dev, Offset * MTK_RING_SIZE, ++ &ring->base_dma, GFP_KERNEL); ++ if (!ring->base) ++ return -ENOMEM; ++ ++ ring->write = ring->base; ++ ring->base_end = ring->base + Offset * (MTK_RING_SIZE - 1); ++ ring->read = ring->base; ++ ++ return 0; ++} ++ ++static int mtk_desc_init(struct mtk_device *mtk) ++{ ++ struct mtk_state_pool *saState_pool; ++ struct mtk_desc_ring *cdr = &mtk->ring->cdr; ++ struct mtk_desc_ring *rdr = &mtk->ring->rdr; ++ union peRingCfg_w peRingCfg; ++ int RingOffset, err, i; ++ ++ RingOffset = sizeof(struct eip93_descriptor_s); ++ ++ err = mtk_set_ring(mtk, cdr, RingOffset); ++ if (err) ++ return err; ++ ++ err = mtk_set_ring(mtk, rdr, RingOffset); ++ if (err) ++ return err; ++ ++ writel((u32)cdr->base_dma, mtk->base + EIP93_REG_PE_CDR_BASE); ++ writel((u32)rdr->base_dma, mtk->base + EIP93_REG_PE_RDR_BASE); ++ ++ peRingCfg.word = 0; ++ peRingCfg.bits.ringSize = MTK_RING_SIZE - 1; ++ peRingCfg.bits.ringOffset = RingOffset / 4; ++ ++ writel(peRingCfg.word, mtk->base + EIP93_REG_PE_RING_CONFIG); ++ ++ atomic_set(&mtk->ring->free, MTK_RING_SIZE - 1); ++ /* Create State record DMA pool */ ++ RingOffset = sizeof(struct saState_s); ++ mtk->ring->saState = dmam_alloc_coherent(mtk->dev, ++ RingOffset * MTK_RING_SIZE, ++ &mtk->ring->saState_dma, GFP_KERNEL); ++ if (!mtk->ring->saState) ++ return -ENOMEM; ++ ++ mtk->ring->saState_pool = devm_kcalloc(mtk->dev, 1, ++ sizeof(struct mtk_state_pool) * MTK_RING_SIZE, ++ GFP_KERNEL); ++ ++ for (i = 0; i < MTK_RING_SIZE; i++) { ++ saState_pool = &mtk->ring->saState_pool[i]; ++ saState_pool->base = mtk->ring->saState + (i * RingOffset); ++ saState_pool->base_dma = mtk->ring->saState_dma + (i * RingOffset); ++ saState_pool->in_use = false; ++ } ++ ++ return 0; ++} ++ ++static void mtk_cleanup(struct mtk_device *mtk) ++{ ++ tasklet_kill(&mtk->ring->done_task); ++ ++ /* Clear/ack all interrupts before disable all */ ++ mtk_irq_clear(mtk, 0xFFFFFFFF); ++ mtk_irq_disable(mtk, 0xFFFFFFFF); ++ ++ writel(0, mtk->base + EIP93_REG_PE_CLOCK_CTRL); ++ ++ mtk_desc_free(mtk); ++} ++ ++static int mtk_crypto_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct mtk_device *mtk; ++ int err; ++ ++ mtk = devm_kzalloc(dev, sizeof(*mtk), GFP_KERNEL); ++ if (!mtk) ++ return -ENOMEM; ++ ++ mtk->dev = dev; ++ platform_set_drvdata(pdev, mtk); ++ ++ mtk->base = devm_platform_ioremap_resource(pdev, 0); ++ ++ if (IS_ERR(mtk->base)) ++ return PTR_ERR(mtk->base); ++ ++ mtk->irq = platform_get_irq(pdev, 0); ++ ++ if (mtk->irq < 0) ++ return mtk->irq; ++ ++ err = devm_request_threaded_irq(mtk->dev, mtk->irq, mtk_irq_handler, ++ NULL, IRQF_ONESHOT, ++ dev_name(mtk->dev), mtk); ++ ++ mtk->ring = devm_kcalloc(mtk->dev, 1, sizeof(*mtk->ring), GFP_KERNEL); ++ ++ if (!mtk->ring) ++ return -ENOMEM; ++ ++ err = mtk_desc_init(mtk); ++ if (err) ++ return err; ++ ++ tasklet_init(&mtk->ring->done_task, mtk_done_task, (unsigned long)mtk); ++ ++ spin_lock_init(&mtk->ring->read_lock); ++ spin_lock_init(&mtk->ring->write_lock); ++ ++ mtk_initialize(mtk); ++ ++ /* Init. finished, enable RDR interupt */ ++ mtk_irq_enable(mtk, EIP93_INT_PE_RDRTHRESH_REQ); ++ ++ err = mtk_register_algs(mtk); ++ if (err) { ++ mtk_cleanup(mtk); ++ return err; ++ } ++ ++ dev_info(mtk->dev, "EIP93 Crypto Engine Initialized."); ++ ++ return 0; ++} ++ ++static void mtk_crypto_remove(struct platform_device *pdev) ++{ ++ struct mtk_device *mtk = platform_get_drvdata(pdev); ++ ++ mtk_unregister_algs(ARRAY_SIZE(mtk_algs)); ++ mtk_cleanup(mtk); ++ dev_info(mtk->dev, "EIP93 removed.\n"); ++} ++ ++#if defined(CONFIG_OF) ++static const struct of_device_id mtk_crypto_of_match[] = { ++ { .compatible = "mediatek,mtk-eip93", }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, mtk_crypto_of_match); ++#endif ++ ++static struct platform_driver mtk_crypto_driver = { ++ .probe = mtk_crypto_probe, ++ .remove_new = mtk_crypto_remove, ++ .driver = { ++ .name = "mtk-eip93", ++ .of_match_table = of_match_ptr(mtk_crypto_of_match), ++ }, ++}; ++module_platform_driver(mtk_crypto_driver); ++ ++MODULE_AUTHOR("Richard van Schagen "); ++MODULE_ALIAS("platform:" KBUILD_MODNAME); ++MODULE_DESCRIPTION("Mediatek EIP-93 crypto engine driver"); ++MODULE_LICENSE("GPL v2"); +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/eip93-main.h +@@ -0,0 +1,146 @@ ++/* SPDX-License-Identifier: GPL-2.0 ++ * ++ * Copyright (C) 2019 - 2021 ++ * ++ * Richard van Schagen ++ */ ++#ifndef _EIP93_MAIN_H_ ++#define _EIP93_MAIN_H_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define MTK_RING_SIZE 512 ++#define MTK_RING_BUSY 32 ++#define MTK_CRA_PRIORITY 1500 ++ ++/* cipher algorithms */ ++#define MTK_ALG_DES BIT(0) ++#define MTK_ALG_3DES BIT(1) ++#define MTK_ALG_AES BIT(2) ++#define MTK_ALG_MASK GENMASK(2, 0) ++/* hash and hmac algorithms */ ++#define MTK_HASH_MD5 BIT(3) ++#define MTK_HASH_SHA1 BIT(4) ++#define MTK_HASH_SHA224 BIT(5) ++#define MTK_HASH_SHA256 BIT(6) ++#define MTK_HASH_HMAC BIT(7) ++#define MTK_HASH_MASK GENMASK(6, 3) ++/* cipher modes */ ++#define MTK_MODE_CBC BIT(8) ++#define MTK_MODE_ECB BIT(9) ++#define MTK_MODE_CTR BIT(10) ++#define MTK_MODE_RFC3686 BIT(11) ++#define MTK_MODE_MASK GENMASK(10, 8) ++ ++/* cipher encryption/decryption operations */ ++#define MTK_ENCRYPT BIT(12) ++#define MTK_DECRYPT BIT(13) ++ ++#define MTK_BUSY BIT(14) ++ ++/* descriptor flags */ ++#define MTK_DESC_ASYNC BIT(31) ++#define MTK_DESC_SKCIPHER BIT(30) ++#define MTK_DESC_AEAD BIT(29) ++#define MTK_DESC_AHASH BIT(28) ++#define MTK_DESC_PRNG BIT(27) ++#define MTK_DESC_FAKE_HMAC BIT(26) ++#define MTK_DESC_LAST BIT(25) ++#define MTK_DESC_FINISH BIT(24) ++#define MTK_DESC_IPSEC BIT(23) ++#define MTK_DESC_DMA_IV BIT(22) ++ ++#define IS_DES(flags) (flags & MTK_ALG_DES) ++#define IS_3DES(flags) (flags & MTK_ALG_3DES) ++#define IS_AES(flags) (flags & MTK_ALG_AES) ++ ++#define IS_HASH_MD5(flags) (flags & MTK_HASH_MD5) ++#define IS_HASH_SHA1(flags) (flags & MTK_HASH_SHA1) ++#define IS_HASH_SHA224(flags) (flags & MTK_HASH_SHA224) ++#define IS_HASH_SHA256(flags) (flags & MTK_HASH_SHA256) ++#define IS_HMAC(flags) (flags & MTK_HASH_HMAC) ++ ++#define IS_CBC(mode) (mode & MTK_MODE_CBC) ++#define IS_ECB(mode) (mode & MTK_MODE_ECB) ++#define IS_CTR(mode) (mode & MTK_MODE_CTR) ++#define IS_RFC3686(mode) (mode & MTK_MODE_RFC3686) ++ ++#define IS_BUSY(flags) (flags & MTK_BUSY) ++#define IS_DMA_IV(flags) (flags & MTK_DESC_DMA_IV) ++ ++#define IS_ENCRYPT(dir) (dir & MTK_ENCRYPT) ++#define IS_DECRYPT(dir) (dir & MTK_DECRYPT) ++ ++#define IS_CIPHER(flags) (flags & (MTK_ALG_DES || \ ++ MTK_ALG_3DES || \ ++ MTK_ALG_AES)) ++ ++#define IS_HASH(flags) (flags & (MTK_HASH_MD5 || \ ++ MTK_HASH_SHA1 || \ ++ MTK_HASH_SHA224 || \ ++ MTK_HASH_SHA256)) ++ ++/** ++ * struct mtk_device - crypto engine device structure ++ */ ++struct mtk_device { ++ void __iomem *base; ++ struct device *dev; ++ struct clk *clk; ++ int irq; ++ struct mtk_ring *ring; ++ struct mtk_state_pool *saState_pool; ++}; ++ ++struct mtk_desc_ring { ++ void *base; ++ void *base_end; ++ dma_addr_t base_dma; ++ /* write and read pointers */ ++ void *read; ++ void *write; ++ /* descriptor element offset */ ++ u32 offset; ++}; ++ ++struct mtk_state_pool { ++ void *base; ++ dma_addr_t base_dma; ++ bool in_use; ++}; ++ ++struct mtk_ring { ++ struct tasklet_struct done_task; ++ /* command/result rings */ ++ struct mtk_desc_ring cdr; ++ struct mtk_desc_ring rdr; ++ spinlock_t write_lock; ++ spinlock_t read_lock; ++ atomic_t free; ++ /* saState */ ++ struct mtk_state_pool *saState_pool; ++ void *saState; ++ dma_addr_t saState_dma; ++}; ++ ++enum mtk_alg_type { ++ MTK_ALG_TYPE_AEAD, ++ MTK_ALG_TYPE_SKCIPHER, ++}; ++ ++struct mtk_alg_template { ++ struct mtk_device *mtk; ++ enum mtk_alg_type type; ++ u32 flags; ++ union { ++ struct aead_alg aead; ++ struct skcipher_alg skcipher; ++ } alg; ++}; ++ ++#endif /* _EIP93_MAIN_H_ */ +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/eip93-regs.h +@@ -0,0 +1,382 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Copyright (C) 2019 - 2021 ++ * ++ * Richard van Schagen ++ */ ++#ifndef REG_EIP93_H ++#define REG_EIP93_H ++ ++#define EIP93_REG_WIDTH 4 ++/*----------------------------------------------------------------------------- ++ * Register Map ++ */ ++#define DESP_BASE 0x0000000 ++#define EIP93_REG_PE_CTRL_STAT ((DESP_BASE)+(0x00 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_SOURCE_ADDR ((DESP_BASE)+(0x01 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_DEST_ADDR ((DESP_BASE)+(0x02 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_SA_ADDR ((DESP_BASE)+(0x03 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_ADDR ((DESP_BASE)+(0x04 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_USER_ID ((DESP_BASE)+(0x06 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_LENGTH ((DESP_BASE)+(0x07 * EIP93_REG_WIDTH)) ++ ++//PACKET ENGINE RING configuration registers ++#define PE_RNG_BASE 0x0000080 ++ ++#define EIP93_REG_PE_CDR_BASE ((PE_RNG_BASE)+(0x00 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_RDR_BASE ((PE_RNG_BASE)+(0x01 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_RING_CONFIG ((PE_RNG_BASE)+(0x02 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_RING_THRESH ((PE_RNG_BASE)+(0x03 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_CD_COUNT ((PE_RNG_BASE)+(0x04 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_RD_COUNT ((PE_RNG_BASE)+(0x05 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_RING_RW_PNTR ((PE_RNG_BASE)+(0x06 * EIP93_REG_WIDTH)) ++ ++//PACKET ENGINE configuration registers ++#define PE_CFG_BASE 0x0000100 ++#define EIP93_REG_PE_CONFIG ((PE_CFG_BASE)+(0x00 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_STATUS ((PE_CFG_BASE)+(0x01 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_BUF_THRESH ((PE_CFG_BASE)+(0x03 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_INBUF_COUNT ((PE_CFG_BASE)+(0x04 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_OUTBUF_COUNT ((PE_CFG_BASE)+(0x05 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_BUF_RW_PNTR ((PE_CFG_BASE)+(0x06 * EIP93_REG_WIDTH)) ++ ++//PACKET ENGINE endian config ++#define EN_CFG_BASE 0x00001CC ++#define EIP93_REG_PE_ENDIAN_CONFIG ((EN_CFG_BASE)+(0x00 * EIP93_REG_WIDTH)) ++ ++//EIP93 CLOCK control registers ++#define CLOCK_BASE 0x01E8 ++#define EIP93_REG_PE_CLOCK_CTRL ((CLOCK_BASE)+(0x00 * EIP93_REG_WIDTH)) ++ ++//EIP93 Device Option and Revision Register ++#define REV_BASE 0x01F4 ++#define EIP93_REG_PE_OPTION_1 ((REV_BASE)+(0x00 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_OPTION_0 ((REV_BASE)+(0x01 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_REVISION ((REV_BASE)+(0x02 * EIP93_REG_WIDTH)) ++ ++//EIP93 Interrupt Control Register ++#define INT_BASE 0x0200 ++#define EIP93_REG_INT_UNMASK_STAT ((INT_BASE)+(0x00 * EIP93_REG_WIDTH)) ++#define EIP93_REG_INT_MASK_STAT ((INT_BASE)+(0x01 * EIP93_REG_WIDTH)) ++#define EIP93_REG_INT_CLR ((INT_BASE)+(0x01 * EIP93_REG_WIDTH)) ++#define EIP93_REG_INT_MASK ((INT_BASE)+(0x02 * EIP93_REG_WIDTH)) ++#define EIP93_REG_INT_CFG ((INT_BASE)+(0x03 * EIP93_REG_WIDTH)) ++#define EIP93_REG_MASK_ENABLE ((INT_BASE)+(0X04 * EIP93_REG_WIDTH)) ++#define EIP93_REG_MASK_DISABLE ((INT_BASE)+(0X05 * EIP93_REG_WIDTH)) ++ ++//EIP93 SA Record register ++#define SA_BASE 0x0400 ++#define EIP93_REG_SA_CMD_0 ((SA_BASE)+(0x00 * EIP93_REG_WIDTH)) ++#define EIP93_REG_SA_CMD_1 ((SA_BASE)+(0x01 * EIP93_REG_WIDTH)) ++ ++//#define EIP93_REG_SA_READY ((SA_BASE)+(31 * EIP93_REG_WIDTH)) ++ ++//State save register ++#define STATE_BASE 0x0500 ++#define EIP93_REG_STATE_IV_0 ((STATE_BASE)+(0x00 * EIP93_REG_WIDTH)) ++#define EIP93_REG_STATE_IV_1 ((STATE_BASE)+(0x01 * EIP93_REG_WIDTH)) ++ ++#define EIP93_PE_ARC4STATE_BASEADDR_REG 0x0700 ++ ++//RAM buffer start address ++#define EIP93_INPUT_BUFFER 0x0800 ++#define EIP93_OUTPUT_BUFFER 0x0800 ++ ++//EIP93 PRNG Configuration Register ++#define PRNG_BASE 0x0300 ++#define EIP93_REG_PRNG_STAT ((PRNG_BASE)+(0x00 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_CTRL ((PRNG_BASE)+(0x01 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_SEED_0 ((PRNG_BASE)+(0x02 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_SEED_1 ((PRNG_BASE)+(0x03 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_SEED_2 ((PRNG_BASE)+(0x04 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_SEED_3 ((PRNG_BASE)+(0x05 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_KEY_0 ((PRNG_BASE)+(0x06 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_KEY_1 ((PRNG_BASE)+(0x07 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_KEY_2 ((PRNG_BASE)+(0x08 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_KEY_3 ((PRNG_BASE)+(0x09 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_RES_0 ((PRNG_BASE)+(0x0A * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_RES_1 ((PRNG_BASE)+(0x0B * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_RES_2 ((PRNG_BASE)+(0x0C * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_RES_3 ((PRNG_BASE)+(0x0D * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_LFSR_0 ((PRNG_BASE)+(0x0E * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_LFSR_1 ((PRNG_BASE)+(0x0F * EIP93_REG_WIDTH)) ++ ++/*----------------------------------------------------------------------------- ++ * Constants & masks ++ */ ++ ++#define EIP93_SUPPORTED_INTERRUPTS_MASK 0xffff7f00 ++#define EIP93_PRNG_DT_TEXT_LOWERHALF 0xDEAD ++#define EIP93_PRNG_DT_TEXT_UPPERHALF 0xC0DE ++#define EIP93_10BITS_MASK 0X3FF ++#define EIP93_12BITS_MASK 0XFFF ++#define EIP93_4BITS_MASK 0X04 ++#define EIP93_20BITS_MASK 0xFFFFF ++ ++#define EIP93_MIN_DESC_DONE_COUNT 0 ++#define EIP93_MAX_DESC_DONE_COUNT 15 ++ ++#define EIP93_MIN_DESC_PENDING_COUNT 0 ++#define EIP93_MAX_DESC_PENDING_COUNT 1023 ++ ++#define EIP93_MIN_TIMEOUT_COUNT 0 ++#define EIP93_MAX_TIMEOUT_COUNT 15 ++ ++#define EIP93_MIN_PE_INPUT_THRESHOLD 1 ++#define EIP93_MAX_PE_INPUT_THRESHOLD 511 ++ ++#define EIP93_MIN_PE_OUTPUT_THRESHOLD 1 ++#define EIP93_MAX_PE_OUTPUT_THRESHOLD 432 ++ ++#define EIP93_MIN_PE_RING_SIZE 1 ++#define EIP93_MAX_PE_RING_SIZE 1023 ++ ++#define EIP93_MIN_PE_DESCRIPTOR_SIZE 7 ++#define EIP93_MAX_PE_DESCRIPTOR_SIZE 15 ++ ++//3DES keys,seed,known data and its result ++#define EIP93_KEY_0 0x133b3454 ++#define EIP93_KEY_1 0x5e5b890b ++#define EIP93_KEY_2 0x5eb30757 ++#define EIP93_KEY_3 0x93ab15f7 ++#define EIP93_SEED_0 0x62c4bf5e ++#define EIP93_SEED_1 0x972667c8 ++#define EIP93_SEED_2 0x6345bf67 ++#define EIP93_SEED_3 0xcb3482bf ++#define EIP93_LFSR_0 0xDEADC0DE ++#define EIP93_LFSR_1 0xBEEFF00D ++ ++/*----------------------------------------------------------------------------- ++ * EIP93 device initialization specifics ++ */ ++ ++/*---------------------------------------------------------------------------- ++ * Byte Order Reversal Mechanisms Supported in EIP93 ++ * EIP93_BO_REVERSE_HALF_WORD : reverse the byte order within a half-word ++ * EIP93_BO_REVERSE_WORD : reverse the byte order within a word ++ * EIP93_BO_REVERSE_DUAL_WORD : reverse the byte order within a dual-word ++ * EIP93_BO_REVERSE_QUAD_WORD : reverse the byte order within a quad-word ++ */ ++enum EIP93_Byte_Order_Value_t { ++ EIP93_BO_REVERSE_HALF_WORD = 1, ++ EIP93_BO_REVERSE_WORD = 2, ++ EIP93_BO_REVERSE_DUAL_WORD = 4, ++ EIP93_BO_REVERSE_QUAD_WORD = 8, ++}; ++ ++/*---------------------------------------------------------------------------- ++ * Byte Order Reversal Mechanisms Supported in EIP93 for Target Data ++ * EIP93_BO_REVERSE_HALF_WORD : reverse the byte order within a half-word ++ * EIP93_BO_REVERSE_WORD : reverse the byte order within a word ++ */ ++enum EIP93_Byte_Order_Value_TD_t { ++ EIP93_BO_REVERSE_HALF_WORD_TD = 1, ++ EIP93_BO_REVERSE_WORD_TD = 2, ++}; ++ ++// BYTE_ORDER_CFG register values ++#define EIP93_BYTE_ORDER_PD EIP93_BO_REVERSE_WORD ++#define EIP93_BYTE_ORDER_SA EIP93_BO_REVERSE_WORD ++#define EIP93_BYTE_ORDER_DATA EIP93_BO_REVERSE_WORD ++#define EIP93_BYTE_ORDER_TD EIP93_BO_REVERSE_WORD_TD ++ ++// INT_CFG register values ++#define EIP93_INT_HOST_OUTPUT_TYPE 0 ++#define EIP93_INT_PULSE_CLEAR 0 ++ ++/* ++ * Interrupts of EIP93 ++ */ ++ ++enum EIP93_InterruptSource_t { ++ EIP93_INT_PE_CDRTHRESH_REQ = BIT(0), ++ EIP93_INT_PE_RDRTHRESH_REQ = BIT(1), ++ EIP93_INT_PE_OPERATION_DONE = BIT(9), ++ EIP93_INT_PE_INBUFTHRESH_REQ = BIT(10), ++ EIP93_INT_PE_OUTBURTHRSH_REQ = BIT(11), ++ EIP93_INT_PE_PRNG_IRQ = BIT(12), ++ EIP93_INT_PE_ERR_REG = BIT(13), ++ EIP93_INT_PE_RD_DONE_IRQ = BIT(16), ++}; ++ ++union peConfig_w { ++ u32 word; ++ struct { ++ u32 resetPE :1; ++ u32 resetRing :1; ++ u32 reserved :6; ++ u32 peMode :2; ++ u32 enCDRupdate :1; ++ u32 reserved2 :5; ++ u32 swapCDRD :1; ++ u32 swapSA :1; ++ u32 swapData :1; ++ u32 reserved3 :13; ++ } bits; ++} __packed; ++ ++union peEndianCfg_w { ++ u32 word; ++ struct { ++ u32 masterByteSwap :8; ++ u32 reserved :8; ++ u32 targetByteSwap :8; ++ u32 reserved2 :8; ++ } bits; ++} __packed; ++ ++union peIntCfg_w { ++ u32 word; ++ struct { ++ u32 PulseClear :1; ++ u32 IntType :1; ++ u32 reserved :30; ++ } bits; ++} __packed; ++ ++union peClockCfg_w { ++ u32 word; ++ struct { ++ u32 enPEclk :1; ++ u32 enDESclk :1; ++ u32 enAESclk :1; ++ u32 reserved :1; ++ u32 enHASHclk :1; ++ u32 reserved2 :27; ++ } bits; ++} __packed; ++ ++union peBufThresh_w { ++ u32 word; ++ struct { ++ u32 inputBuffer :8; ++ u32 reserved :8; ++ u32 outputBuffer :8; ++ u32 reserved2 :8; ++ } bits; ++} __packed; ++ ++union peRingThresh_w { ++ u32 word; ++ struct { ++ u32 CDRThresh :10; ++ u32 reserved :6; ++ u32 RDRThresh :10; ++ u32 RDTimeout :4; ++ u32 reserved2 :1; ++ u32 enTimeout :1; ++ } bits; ++} __packed; ++ ++union peRingCfg_w { ++ u32 word; ++ struct { ++ u32 ringSize :10; ++ u32 reserved :6; ++ u32 ringOffset :8; ++ u32 reserved2 :8; ++ } bits; ++} __packed; ++ ++union saCmd0 { ++ u32 word; ++ struct { ++ u32 opCode :3; ++ u32 direction :1; ++ u32 opGroup :2; ++ u32 padType :2; ++ u32 cipher :4; ++ u32 hash :4; ++ u32 reserved2 :1; ++ u32 scPad :1; ++ u32 extPad :1; ++ u32 hdrProc :1; ++ u32 digestLength :4; ++ u32 ivSource :2; ++ u32 hashSource :2; ++ u32 saveIv :1; ++ u32 saveHash :1; ++ u32 reserved1 :2; ++ } bits; ++} __packed; ++ ++union saCmd1 { ++ u32 word; ++ struct { ++ u32 copyDigest :1; ++ u32 copyHeader :1; ++ u32 copyPayload :1; ++ u32 copyPad :1; ++ u32 reserved4 :4; ++ u32 cipherMode :2; ++ u32 reserved3 :1; ++ u32 sslMac :1; ++ u32 hmac :1; ++ u32 byteOffset :1; ++ u32 reserved2 :2; ++ u32 hashCryptOffset :8; ++ u32 aesKeyLen :3; ++ u32 reserved1 :1; ++ u32 aesDecKey :1; ++ u32 seqNumCheck :1; ++ u32 reserved0 :2; ++ } bits; ++} __packed; ++ ++struct saRecord_s { ++ union saCmd0 saCmd0; ++ union saCmd1 saCmd1; ++ u32 saKey[8]; ++ u32 saIDigest[8]; ++ u32 saODigest[8]; ++ u32 saSpi; ++ u32 saSeqNum[2]; ++ u32 saSeqNumMask[2]; ++ u32 saNonce; ++} __packed; ++ ++struct saState_s { ++ u32 stateIv[4]; ++ u32 stateByteCnt[2]; ++ u32 stateIDigest[8]; ++} __packed; ++ ++union peCrtlStat_w { ++ u32 word; ++ struct { ++ u32 hostReady :1; ++ u32 peReady :1; ++ u32 reserved :1; ++ u32 initArc4 :1; ++ u32 hashFinal :1; ++ u32 haltMode :1; ++ u32 prngMode :2; ++ u32 padValue :8; ++ u32 errStatus :8; ++ u32 padCrtlStat :8; ++ } bits; ++} __packed; ++ ++union peLength_w { ++ u32 word; ++ struct { ++ u32 length :20; ++ u32 reserved :2; ++ u32 hostReady :1; ++ u32 peReady :1; ++ u32 byPass :8; ++ } bits; ++} __packed; ++ ++struct eip93_descriptor_s { ++ union peCrtlStat_w peCrtlStat; ++ u32 srcAddr; ++ u32 dstAddr; ++ u32 saAddr; ++ u32 stateAddr; ++ u32 arc4Addr; ++ u32 userId; ++ union peLength_w peLength; ++} __packed; ++ ++#endif +--- a/drivers/crypto/Kconfig ++++ b/drivers/crypto/Kconfig +@@ -852,4 +852,6 @@ config CRYPTO_DEV_SA2UL + source "drivers/crypto/aspeed/Kconfig" + source "drivers/crypto/starfive/Kconfig" + ++source "drivers/crypto/mtk-eip93/Kconfig" ++ + endif # CRYPTO_HW +--- a/drivers/crypto/Makefile ++++ b/drivers/crypto/Makefile +@@ -52,3 +52,4 @@ obj-y += hisilicon/ + obj-$(CONFIG_CRYPTO_DEV_AMLOGIC_GXL) += amlogic/ + obj-y += intel/ + obj-y += starfive/ ++obj-$(CONFIG_CRYPTO_DEV_EIP93) += mtk-eip93/ diff --git a/target/linux/ramips/patches-6.12/870-Input-sx951x-add-Semtech-SX9512-SX9513-driver.patch b/target/linux/ramips/patches-6.12/870-Input-sx951x-add-Semtech-SX9512-SX9513-driver.patch new file mode 100644 index 0000000000..8c2f9074b5 --- /dev/null +++ b/target/linux/ramips/patches-6.12/870-Input-sx951x-add-Semtech-SX9512-SX9513-driver.patch @@ -0,0 +1,550 @@ +From ba92c0187006e2a6eae9573a569d275b0bd31732 Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Fri, 2 May 2025 23:04:27 +0200 +Subject: [PATCH] Input sx951x: add Semtech SX9512/SX9513 driver + +The Semtech SX9512/SX9513 is a family of capacitive touch-keyboard +controllers. + +All chips offer 8 channel touch sensitive inputs with one LED driver per +output channel. + +The also SX9512 supports proximity detection which is currently not +supported with the driver. + +This chip can be found on the Genexis Pulse EX400 repeater platform. + +Link: https://www.mouser.com/datasheet/2/761/SEMTS05226_1-2575172.pdf +Link: https://www.spinics.net/lists/kernel/msg5669349.html + +Signed-off-by: David Bauer +--- + drivers/input/keyboard/Kconfig | 11 + + drivers/input/keyboard/Makefile | 1 + + drivers/input/keyboard/sx951x.c | 490 ++++++++++++++++++++++++++++++++ + 3 files changed, 502 insertions(+) + create mode 100644 drivers/input/keyboard/sx951x.c + +--- a/drivers/input/keyboard/Kconfig ++++ b/drivers/input/keyboard/Kconfig +@@ -604,6 +604,17 @@ config KEYBOARD_SUNKBD + To compile this driver as a module, choose M here: the + module will be called sunkbd. + ++config KEYBOARD_SX951X ++ tristate "Semtech SX951X capacitive touch controller" ++ depends on OF && I2C ++ select REGMAP_I2C ++ help ++ Say Y here to enable the Semtech SX9512/SX9153 capacitive ++ touch controller driver. ++ ++ To compile this driver as a module, choose M here: the ++ module will be called sx951x. ++ + config KEYBOARD_SH_KEYSC + tristate "SuperH KEYSC keypad support" + depends on ARCH_SHMOBILE || COMPILE_TEST +--- a/drivers/input/keyboard/Makefile ++++ b/drivers/input/keyboard/Makefile +@@ -65,6 +65,7 @@ obj-$(CONFIG_KEYBOARD_STOWAWAY) += stow + obj-$(CONFIG_KEYBOARD_ST_KEYSCAN) += st-keyscan.o + obj-$(CONFIG_KEYBOARD_SUN4I_LRADC) += sun4i-lradc-keys.o + obj-$(CONFIG_KEYBOARD_SUNKBD) += sunkbd.o ++obj-$(CONFIG_KEYBOARD_SX951X) += sx951x.o + obj-$(CONFIG_KEYBOARD_TC3589X) += tc3589x-keypad.o + obj-$(CONFIG_KEYBOARD_TEGRA) += tegra-kbc.o + obj-$(CONFIG_KEYBOARD_TM2_TOUCHKEY) += tm2-touchkey.o +--- /dev/null ++++ b/drivers/input/keyboard/sx951x.c +@@ -0,0 +1,490 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++/* ++ * Input driver for Semtech SX9512/SX9513 capacitive touch sensors. ++ * ++ * The difference between SX9512 and SX9513 is the presence of proximity ++ * sensing capabilities on the SX9512. ++ * ++ * SX951xB is the identical chip but with a different I2C address. ++ * ++ * (c) 2025 David Bauer ++ */ ++ ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ ++ /* Generic properties */ ++#define SX951X_I2C_ADDRESS 0x2b ++#define SX951XB_I2C_ADDRESS_ 0x2d ++#define SX951X_NUM_CHANNELS 8 ++#define SX951X_POLL_INTERVAL 100 ++ ++/* Registers*/ ++#define SX951X_REG_IRQ_SRC 0x00 ++#define SX951X_REG_TOUCH_STATUS 0x01 ++#define SX951X_REG_PROXIMITY_STATUS 0x02 ++#define SX951X_REG_COMPENSATION_STATUS 0x03 ++#define SX951X_REG_IRQ_NVM_CTRL 0x04 ++#define SX951X_REG_SPO2_MODE_CTRL 0x07 ++#define SX951X_REG_PWR_KEY_CTRL 0x08 ++#define SX951X_REG_IRQ_MASK 0x09 ++ ++/* LED registers */ ++#define SX951X_REG_LED_MAP_ENG1 0x0c ++#define SX951X_REG_LED_MAP_ENG2 0x0d ++#define SX951X_REG_LED_PWM_FREQ 0x0e ++#define SX951X_REG_LED_MODE 0x0f ++#define SX951X_REG_LED_IDLE 0x10 ++#define SX951X_REG_LED_OFF_DELAY 0x11 ++#define SX951X_REG_LED_ON_ENG1 0x12 ++#define SX951X_REG_LED_FADE_ENG1 0x13 ++#define SX951X_REG_LED_ON_ENG2 0x14 ++#define SX951X_REG_LED_FADE_ENG2 0x15 ++#define SX951X_REG_LED_POWER_IDLE 0x16 ++#define SX951X_REG_LED_POWER_ON 0x17 ++#define SX951X_REG_LED_POWER_OFF 0x18 ++#define SX951X_REG_LED_POWER_FADE 0x19 ++#define SX951X_REG_LED_POWER_ON_PULSE 0x1a ++#define SX951X_REG_LED_POWER_MODE 0x1b ++ ++/* Capacitive touch sensing registers*/ ++#define SX951X_REG_CAP_SENSE_ENABLE 0x1e ++ ++#define SX951X_REG_CAP_SENSE_RANGE(x) (0x1f + (x)) ++#define SX951X_REG_CAP_SENSE_RANGE_CIN_DELTA_MASK GENMASK(1, 0) ++ ++#define SX951X_REG_CAP_SENSE_THRESH(x) (0x28 + (x)) ++#define SX951X_REG_CAP_SENSE_THRESH_ALL 0x30 ++ ++#define SX951X_REG_CAP_SENSE_OP 0x31 ++#define SX951X_REG_CAP_SENSE_MODE 0x32 ++#define SX951X_REG_CAP_SENSE_DEBOUNCE 0x33 ++ ++/* Reset register*/ ++#define SX951X_REG_SOFT_RESET 0xff ++ ++/* Default properties (keys)*/ ++#define SX951X_KEY_DEFAULT_CIN_DELTA 0x03 ++#define SX951X_KEY_DEFAULT_SENSE_THRESHOLD 0x04 ++ ++struct sx951x_key_data { ++ u32 cin_delta; ++ u32 sense_threshold; ++}; ++ ++struct sx951x_led { ++#ifdef CONFIG_LEDS_CLASS ++ struct led_classdev cdev; ++ struct sx951x_priv *priv; ++ ++ u32 reg; ++ bool registered; ++#endif ++}; ++ ++struct sx951x_priv { ++ struct regmap *regmap; ++ struct device *dev; ++ struct input_dev *idev; ++ const struct sx951x_hw_data *hw; ++ ++ struct sx951x_led leds[SX951X_NUM_CHANNELS]; ++ ++ /* device-config */ ++ u32 poll_interval; ++ ++ /* key-config */ ++ u32 keycodes[SX951X_NUM_CHANNELS]; ++ struct sx951x_key_data key_data[SX951X_NUM_CHANNELS]; ++}; ++ ++struct sx951x_hw_data { ++ bool has_proximity_sensing; ++}; ++ ++static const struct reg_default sx951x_reg_defaults[] = { ++ { SX951X_REG_LED_MAP_ENG1, 0x00 }, ++ { SX951X_REG_LED_MAP_ENG2, 0x00 }, ++ { SX951X_REG_LED_PWM_FREQ, 0x10 }, ++ { SX951X_REG_LED_IDLE, 0xff }, ++ { SX951X_REG_LED_ON_ENG1, 0xff }, ++ { SX951X_REG_LED_ON_ENG2, 0xff }, ++ { SX951X_REG_LED_POWER_IDLE, 0xff }, ++ { SX951X_REG_LED_POWER_ON, 0xff }, ++ { SX951X_REG_CAP_SENSE_ENABLE, 0x00 }, ++ { SX951X_REG_CAP_SENSE_RANGE(0), 0x40 }, ++ { SX951X_REG_CAP_SENSE_RANGE(1), 0x40 }, ++ { SX951X_REG_CAP_SENSE_RANGE(2), 0x40 }, ++ { SX951X_REG_CAP_SENSE_RANGE(3), 0x40 }, ++ { SX951X_REG_CAP_SENSE_RANGE(4), 0x40 }, ++ { SX951X_REG_CAP_SENSE_RANGE(5), 0x40 }, ++ { SX951X_REG_CAP_SENSE_RANGE(6), 0x40 }, ++ { SX951X_REG_CAP_SENSE_RANGE(7), 0x40 }, ++ { SX951X_REG_CAP_SENSE_THRESH(0), 0x0f }, ++ { SX951X_REG_CAP_SENSE_THRESH(1), 0x0f }, ++ { SX951X_REG_CAP_SENSE_THRESH(2), 0x0f }, ++ { SX951X_REG_CAP_SENSE_THRESH(3), 0x0f }, ++ { SX951X_REG_CAP_SENSE_THRESH(4), 0x0f }, ++ { SX951X_REG_CAP_SENSE_THRESH(5), 0x0f }, ++ { SX951X_REG_CAP_SENSE_THRESH(6), 0x0f }, ++ { SX951X_REG_CAP_SENSE_THRESH(7), 0x0f }, ++ { SX951X_REG_CAP_SENSE_THRESH_ALL, 0x0f }, ++ { SX951X_REG_CAP_SENSE_OP, 0x14 }, ++ { SX951X_REG_CAP_SENSE_MODE, 0x70 }, ++ { SX951X_REG_CAP_SENSE_DEBOUNCE, 0xff }, ++}; ++ ++static bool sx951x_volatile_reg(struct device *dev, unsigned int reg) ++{ ++ switch (reg) { ++ case SX951X_REG_TOUCH_STATUS: ++ return true; ++ default: ++ return false; ++ } ++} ++ ++static const struct regmap_config sx951x_regmap_config = { ++ .reg_bits = 8, ++ .val_bits = 8, ++ ++ .max_register = SX951X_REG_SOFT_RESET, ++ ++ .reg_defaults = sx951x_reg_defaults, ++ .num_reg_defaults = ARRAY_SIZE(sx951x_reg_defaults), ++ ++ .cache_type = REGCACHE_MAPLE, ++ .volatile_reg = sx951x_volatile_reg, ++}; ++ ++#ifdef CONFIG_LEDS_CLASS ++static int sx951x_led_set(struct led_classdev *cdev, enum led_brightness value) ++{ ++ struct sx951x_led *led = container_of(cdev, struct sx951x_led, cdev); ++ struct sx951x_priv *priv = led->priv; ++ ++ return regmap_update_bits(priv->regmap, ++ SX951X_REG_LED_MAP_ENG2, ++ BIT(led->reg), ++ value ? BIT(led->reg) : 0); ++} ++ ++static int sx951x_led_init(struct sx951x_priv *priv, ++ struct device_node *channel_node, u32 reg) ++{ ++ struct device_node *led_node; ++ struct sx951x_led *led = &priv->leds[reg]; ++ struct led_init_data init_data = {}; ++ int error; ++ ++ if (led->registered) { ++ dev_err(priv->dev, ++ "LED %d already registered\n", reg); ++ return -EINVAL; ++ } ++ ++ led_node = of_get_child_by_name(channel_node, "led"); ++ if (!led_node) { ++ /* No LED */ ++ return 0; ++ } ++ ++ led->cdev.flags = 0; ++ led->cdev.brightness_set_blocking = sx951x_led_set; ++ led->cdev.max_brightness = 1; ++ led->cdev.brightness = LED_OFF; ++ ++ init_data.default_label = of_get_property(led_node, "label", NULL); ++ init_data.fwnode = of_fwnode_handle(led_node); ++ ++ led->reg = reg; ++ led->priv = priv; ++ ++ error = devm_led_classdev_register_ext(priv->dev, &led->cdev, &init_data); ++ if (error) ++ return error; ++ ++ return 0; ++} ++#endif ++ ++static void sx951x_poll(struct input_dev *input) ++{ ++ struct sx951x_priv *priv = input_get_drvdata(input); ++ struct device *dev = priv->dev; ++ unsigned int val; ++ int error; ++ int i; ++ ++ error = regmap_read(priv->regmap, SX951X_REG_TOUCH_STATUS, &val); ++ if (error) { ++ dev_err(dev, "Failed to read touch status: %d\n", error); ++ return; ++ } ++ ++ for (i = 0; i < SX951X_NUM_CHANNELS; i++) { ++ if (priv->keycodes[i] == KEY_RESERVED) ++ continue; ++ ++ input_report_key(input, priv->keycodes[i], !!(val & BIT(i))); ++ input_sync(input); ++ } ++} ++ ++static int sx951x_channel_init(struct sx951x_priv *priv, struct device_node *of_node, ++ u32 chan_idx) ++{ ++ struct sx951x_key_data *key_data; ++ struct device *dev = priv->dev; ++ int error; ++ ++ key_data = &priv->key_data[chan_idx]; ++ ++ /* Defaults */ ++ key_data->cin_delta = SX951X_KEY_DEFAULT_CIN_DELTA; ++ key_data->sense_threshold = SX951X_KEY_DEFAULT_SENSE_THRESHOLD; ++ ++ error = of_property_read_u32(of_node, "linux,keycodes", ++ &priv->keycodes[chan_idx]); ++ if (error) { ++ /* Not configured */ ++ return 0; ++ } ++ ++ error = of_property_read_u32(of_node, "semtech,cin-delta", ++ &key_data->cin_delta); ++ if (key_data->cin_delta > 0x03) { ++ dev_err(dev, "Failed to read cin-delta for channel %d: %d\n", ++ chan_idx, error); ++ return error; ++ } ++ ++ error = of_property_read_u32(of_node, "semtech,sense-threshold", ++ &key_data->sense_threshold); ++ if (key_data->sense_threshold > 0xff) { ++ dev_err(dev, "Failed to read sense-threshold for channel %d: %d\n", ++ chan_idx, error); ++ return error; ++ } ++ ++ error = regmap_update_bits(priv->regmap, ++ SX951X_REG_CAP_SENSE_RANGE(chan_idx), ++ SX951X_REG_CAP_SENSE_RANGE_CIN_DELTA_MASK, ++ key_data->cin_delta); ++ ++ if (error) { ++ dev_err(dev, "Failed to set cin-delta for channel %d: %d\n", ++ chan_idx, error); ++ return error; ++ } ++ ++ error = regmap_write(priv->regmap, ++ SX951X_REG_CAP_SENSE_THRESH(chan_idx), ++ key_data->sense_threshold); ++ if (error) { ++ dev_err(dev, "Failed to set sense-threshold for channel %d: %d\n", ++ chan_idx, error); ++ return error; ++ } ++ ++ return 0; ++} ++ ++static int sx951x_channels_init(struct sx951x_priv *priv) ++{ ++ struct device *dev = priv->dev; ++ unsigned int channels = 0; ++ int error; ++ u32 reg; ++ ++ for_each_child_of_node_scoped(dev->of_node, child) { ++ error = of_property_read_u32(child, "reg", ®); ++ if (error != 0 || reg >= SX951X_NUM_CHANNELS) { ++ dev_err(dev, "Invalid channel %d\n", reg); ++ return -EINVAL; ++ } ++ ++ priv->keycodes[reg] = KEY_RESERVED; ++ ++ error = sx951x_channel_init(priv, child, reg); ++ if (error) { ++ dev_err(dev, "Failed to initialize channel %d: %d\n", ++ reg, error); ++ return error; ++ } ++ ++ if (priv->keycodes[reg] != KEY_RESERVED) ++ channels |= BIT(reg); ++ ++#ifdef CONFIG_LEDS_CLASS ++ error = sx951x_led_init(priv, child, reg); ++ if (error) { ++ dev_err(dev, "Failed to initialize LED %d: %d\n", ++ reg, error); ++ return error; ++ } ++#endif ++ } ++ ++ /* Enable sensing on channels with keycode configured */ ++ error = regmap_write(priv->regmap, ++ SX951X_REG_CAP_SENSE_ENABLE, ++ channels); ++ ++ return 0; ++} ++ ++static int sx951x_input_init(struct sx951x_priv *priv) ++{ ++ struct device *dev = priv->dev; ++ int i, error; ++ ++ priv->idev = devm_input_allocate_device(dev); ++ if (!priv->idev) ++ return -ENOMEM; ++ ++ priv->idev->name = "SX9512/SX9513 capacitive touch sensor"; ++ priv->idev->id.bustype = BUS_I2C; ++ __set_bit(EV_KEY, priv->idev->evbit); ++ ++ for (i = 0; i < SX951X_NUM_CHANNELS; i++) ++ __set_bit(priv->keycodes[i], priv->idev->keybit); ++ ++ __clear_bit(KEY_RESERVED, priv->idev->keybit); ++ ++ priv->idev->keycode = priv->keycodes; ++ priv->idev->keycodesize = sizeof(priv->keycodes[0]); ++ priv->idev->keycodemax = SX951X_NUM_CHANNELS; ++ ++ input_set_drvdata(priv->idev, priv); ++ ++ error = input_setup_polling(priv->idev, sx951x_poll); ++ if (error) { ++ dev_err(dev, "Unable to set up polling: %d\n", error); ++ return error; ++ } ++ ++ input_set_poll_interval(priv->idev, priv->poll_interval); ++ ++ error = input_register_device(priv->idev); ++ if (error) { ++ dev_err(dev, "Unable to register polled device: %d\n", ++ error); ++ return error; ++ } ++ ++ return 0; ++} ++ ++static int sx951x_probe(struct i2c_client *i2c_client) ++{ ++ const struct i2c_device_id *id; ++ const struct sx951x_hw_data *hw; ++ struct device *dev = &i2c_client->dev; ++ struct sx951x_priv *priv; ++ int error; ++ ++ if (i2c_client->addr != SX951X_I2C_ADDRESS && ++ i2c_client->addr != SX951XB_I2C_ADDRESS_) { ++ dev_err(dev, "Invalid I2C address: 0x%02x\n", ++ i2c_client->addr); ++ return -ENODEV; ++ } ++ ++ id = i2c_client_get_device_id(i2c_client); ++ hw = i2c_get_match_data(i2c_client); ++ if (!id || !hw) { ++ dev_err(dev, "Invalid device configuration\n"); ++ return -EINVAL; ++ } ++ ++ priv = devm_kzalloc(dev, ++ sizeof(struct sx951x_priv), ++ GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ priv->dev = dev; ++ priv->hw = hw; ++ ++ priv->regmap = devm_regmap_init_i2c(i2c_client, &sx951x_regmap_config); ++ if (IS_ERR(priv->regmap)) ++ return PTR_ERR(priv->regmap); ++ ++ /* Parse device configuration */ ++ if (of_property_read_u32(dev->of_node, "poll-interval", ++ &priv->poll_interval)) ++ priv->poll_interval = SX951X_POLL_INTERVAL; ++ ++ /* Register LED and input channels */ ++ error = sx951x_channels_init(priv); ++ if (error) { ++ dev_err(dev, "Failed to initialize channels: %d\n", error); ++ return error; ++ } ++ ++ /* Register input device */ ++ error = sx951x_input_init(priv); ++ if (error) { ++ dev_err(dev, "Failed to register input device: %d\n", error); ++ return error; ++ } ++ ++ return 0; ++} ++ ++static void sx951x_remove(struct i2c_client *i2c_client) ++{ ++ struct sx951x_priv *priv = i2c_get_clientdata(i2c_client); ++ ++ /* Disable sensing */ ++ regmap_write(priv->regmap, SX951X_REG_CAP_SENSE_ENABLE, 0x00); ++ ++ /* Turn off all LEDs */ ++ regmap_write(priv->regmap, SX951X_REG_LED_MAP_ENG2, 0x00); ++} ++ ++static const struct sx951x_hw_data sx9512_hw_data = { ++ .has_proximity_sensing = true, ++}; ++ ++static const struct sx951x_hw_data sx9513_hw_data = { ++ .has_proximity_sensing = false, ++}; ++ ++static const struct of_device_id sx951x_dt_ids[] = { ++ { .compatible = "semtech,sx9512", .data = &sx9512_hw_data }, ++ { .compatible = "semtech,sx9513", .data = &sx9513_hw_data }, ++ { } ++}; ++MODULE_DEVICE_TABLE(of, sx951x_dt_ids); ++ ++static const struct i2c_device_id sx951x_i2c_ids[] = { ++ { "sx9512", (kernel_ulong_t)&sx9512_hw_data }, ++ { "sx9513", (kernel_ulong_t)&sx9513_hw_data }, ++ { } ++}; ++MODULE_DEVICE_TABLE(i2c, sx951x_i2c_ids); ++ ++static struct i2c_driver sx951x_i2c_driver = { ++ .driver = { ++ .name = "sx951x", ++ .of_match_table = sx951x_dt_ids, ++ }, ++ .id_table = sx951x_i2c_ids, ++ .probe = sx951x_probe, ++ .remove = sx951x_remove, ++}; ++ ++module_i2c_driver(sx951x_i2c_driver); ++ ++MODULE_DESCRIPTION("Semtech SX9512/SX9513 driver"); ++MODULE_AUTHOR("David Bauer "); ++MODULE_LICENSE("GPL"); diff --git a/target/linux/ramips/patches-6.12/900-pci-rt2880-static-pcibios_init.patch b/target/linux/ramips/patches-6.12/900-pci-rt2880-static-pcibios_init.patch new file mode 100644 index 0000000000..a6c6d00a92 --- /dev/null +++ b/target/linux/ramips/patches-6.12/900-pci-rt2880-static-pcibios_init.patch @@ -0,0 +1,29 @@ +From 6688b218552c6fd3178b40d7d106bf732caec3aa Mon Sep 17 00:00:00 2001 +From: Mieczyslaw Nalewaj +Date: Sat, 28 Dec 2024 18:09:17 +0100 +Subject: [PATCH] pci-rt2880: static pcibios_init + +Fixes error: +arch/mips/pci/pci-rt2880.c:267:12: error: no previous prototype for 'pcibios_init' [-Werror=missing-prototypes] + 267 | int __init pcibios_init(void) + | ^~~~~~~~~~~~ +cc1: all warnings being treated as errors +make[8]: *** [scripts/Makefile.build:229: arch/mips/pci/pci-rt2880.o] Error 1 +make[7]: *** [scripts/Makefile.build:478: arch/mips/pci] Error 2 + +Signed-off-by: Mieczyslaw Nalewaj +--- + arch/mips/pci/pci-rt2880.c | 7 +++++++ + 1 file changed, 7 insertions(+) + +--- a/arch/mips/pci/pci-rt2880.c ++++ b/arch/mips/pci/pci-rt2880.c +@@ -264,7 +264,7 @@ static struct platform_driver rt288x_pci + }, + }; + +-int __init pcibios_init(void) ++static int __init pcibios_init(void) + { + int ret = platform_driver_register(&rt288x_pci_driver); + diff --git a/target/linux/ramips/patches-6.12/931-mips-ralink-add-missing-include.patch b/target/linux/ramips/patches-6.12/931-mips-ralink-add-missing-include.patch new file mode 100644 index 0000000000..710423b8e5 --- /dev/null +++ b/target/linux/ramips/patches-6.12/931-mips-ralink-add-missing-include.patch @@ -0,0 +1,25 @@ +From: Mieczyslaw Nalewaj +Date: Mon, 18 Nov 2024 21:28:05 +0100 +Subject: mips: ralink: add missing include + +Missing headers causes an error on kernel 6.12: +arch/mips/ralink/irq.c:86:5: error: no previous prototype for 'get_c0_perfcount_int' [-Werror=missing-prototypes] + 86 | int get_c0_perfcount_int(void) + | ^~~~~~~~~~~~~~~~~~~~ +arch/mips/ralink/irq.c:92:14: error: no previous prototype for 'get_c0_compare_int' [-Werror=missing-prototypes] + 92 | unsigned int get_c0_compare_int(void) + | ^~~~~~~~~~~~~~~~~~ +cc1: all warnings being treated as errors + +Signed-off-by: Mieczyslaw Nalewaj +--- +--- a/arch/mips/ralink/irq.c ++++ b/arch/mips/ralink/irq.c +@@ -15,6 +15,7 @@ + + #include + #include ++#include + + #include "common.h" + diff --git a/target/linux/ramips/patches-6.12/932-MIPS-Stop-secondary-CPUs-before-platform-restart-hal.patch b/target/linux/ramips/patches-6.12/932-MIPS-Stop-secondary-CPUs-before-platform-restart-hal.patch new file mode 100644 index 0000000000..144c95bd25 --- /dev/null +++ b/target/linux/ramips/patches-6.12/932-MIPS-Stop-secondary-CPUs-before-platform-restart-hal.patch @@ -0,0 +1,67 @@ +From 641e36faf86bcd9b6dc2cd4a6d6e3fc604ee6397 Mon Sep 17 00:00:00 2001 +From: Rany Hany +Date: Tue, 31 Mar 2026 17:46:35 +0300 +Subject: [PATCH 1/3] MIPS: Stop secondary CPUs before platform + restart/halt/poweroff + +smp_send_stop() was placed after the platform restart, halt, and +power-off callbacks. These callbacks never return, so smp_send_stop() +was dead code and secondary CPUs were never stopped before the system +reset. Move smp_send_stop() before the callbacks. + +Signed-off-by: Rany Hany +--- + arch/mips/kernel/reset.c | 19 +++++++++++-------- + 1 file changed, 11 insertions(+), 8 deletions(-) + +--- a/arch/mips/kernel/reset.c ++++ b/arch/mips/kernel/reset.c +@@ -87,13 +87,14 @@ static void machine_hang(void) + + void machine_restart(char *command) + { +- if (_machine_restart) +- _machine_restart(command); +- + #ifdef CONFIG_SMP + preempt_disable(); + smp_send_stop(); + #endif ++ ++ if (_machine_restart) ++ _machine_restart(command); ++ + do_kernel_restart(command); + mdelay(1000); + pr_emerg("Reboot failed -- System halted\n"); +@@ -102,23 +103,25 @@ void machine_restart(char *command) + + void machine_halt(void) + { +- if (_machine_halt) +- _machine_halt(); +- + #ifdef CONFIG_SMP + preempt_disable(); + smp_send_stop(); + #endif ++ ++ if (_machine_halt) ++ _machine_halt(); ++ + machine_hang(); + } + + void machine_power_off(void) + { +- do_kernel_power_off(); +- + #ifdef CONFIG_SMP + preempt_disable(); + smp_send_stop(); + #endif ++ ++ do_kernel_power_off(); ++ + machine_hang(); + } diff --git a/target/linux/ramips/patches-6.12/933-MIPS-SMP-Wait-for-secondary-CPUs-to-stop-in-smp_send.patch b/target/linux/ramips/patches-6.12/933-MIPS-SMP-Wait-for-secondary-CPUs-to-stop-in-smp_send.patch new file mode 100644 index 0000000000..74adbbefe9 --- /dev/null +++ b/target/linux/ramips/patches-6.12/933-MIPS-SMP-Wait-for-secondary-CPUs-to-stop-in-smp_send.patch @@ -0,0 +1,36 @@ +From 251cd7607a3dcc578b249d2a685db99d7da73975 Mon Sep 17 00:00:00 2001 +From: Rany Hany +Date: Tue, 31 Mar 2026 18:07:36 +0300 +Subject: [PATCH 2/3] MIPS: SMP: Wait for secondary CPUs to stop in + smp_send_stop() + +smp_send_stop() returns immediately without waiting. + +Wait up to one second for secondary CPUs to mark themselves offline +before returning, similar to what ARM and ARM64 already do. + +Signed-off-by: Rany Hany +--- + arch/mips/kernel/smp.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +--- a/arch/mips/kernel/smp.c ++++ b/arch/mips/kernel/smp.c +@@ -416,7 +416,17 @@ static void stop_this_cpu(void *dummy) + + void smp_send_stop(void) + { ++ unsigned long timeout; ++ + smp_call_function(stop_this_cpu, NULL, 0); ++ ++ /* Wait up to 1s for other CPUs to stop */ ++ timeout = USEC_PER_SEC; ++ while (num_online_cpus() > 1 && timeout--) ++ udelay(1); ++ ++ if (num_online_cpus() > 1) ++ pr_warn("SMP: failed to stop secondary CPUs\n"); + } + + void __init smp_cpus_done(unsigned int max_cpus) diff --git a/target/linux/ramips/patches-6.12/934-MIPS-SMP-Properly-stop-secondary-CPUs-for-restart.patch b/target/linux/ramips/patches-6.12/934-MIPS-SMP-Properly-stop-secondary-CPUs-for-restart.patch new file mode 100644 index 0000000000..2587592139 --- /dev/null +++ b/target/linux/ramips/patches-6.12/934-MIPS-SMP-Properly-stop-secondary-CPUs-for-restart.patch @@ -0,0 +1,104 @@ +From de332bdaf33c09be03c05c0681beae1276ccbcc2 Mon Sep 17 00:00:00 2001 +From: Rany Hany +Date: Tue, 31 Mar 2026 20:29:53 +0300 +Subject: [PATCH 3/3] MIPS: SMP: Properly stop secondary CPUs for restart + +MT7621 deadlocks in the platform restart callback unless the other +CPUs are stopped by taking other cores out of coherence and clocking +them off, while halting sibling TCs on the restarting core. + +This fixes restart deadlocks on MT7621, although the exact reason +why this is required is still unclear. + +Signed-off-by: Rany Hany +--- + arch/mips/kernel/smp.c | 54 +++++++++++++++++++++++++++++++++++++++++- + 1 file changed, 53 insertions(+), 1 deletion(-) + +--- a/arch/mips/kernel/smp.c ++++ b/arch/mips/kernel/smp.c +@@ -32,6 +32,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -402,6 +403,8 @@ asmlinkage void start_secondary(void) + cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); + } + ++static atomic_t core_stop_count[NR_CPUS]; ++ + static void stop_this_cpu(void *dummy) + { + /* +@@ -411,13 +414,66 @@ static void stop_this_cpu(void *dummy) + set_cpu_online(smp_processor_id(), false); + calculate_cpu_foreign_map(); + local_irq_disable(); +- while (1); ++ ++ if (mips_cm_present() && r4k_blast_dcache) { ++ unsigned int core = cpu_core(¤t_cpu_data); ++ ++ if (atomic_dec_and_test(&core_stop_count[core])) { ++ /* Flush data cache */ ++ r4k_blast_dcache(); ++ __sync(); ++ ++ if (mips_cm_revision() < CM_REV_CM3) { ++ /* Restrict coherence to own core first */ ++ write_gcr_cl_coherence(1 << core); ++ read_gcr_cl_coherence(); ++ __sync(); ++ } ++ ++ /* Disable coherence */ ++ write_gcr_cl_coherence(0); ++ read_gcr_cl_coherence(); ++ ++ /* Gate the core clock */ ++ if (mips_cpc_present()) ++ write_cpc_cl_cmd(CPC_Cx_CMD_CLOCKOFF); ++ } ++ } ++ ++ if (cpu_has_mipsmt) { ++ /* The last active VPE on the core will gate the core clock ++ * and all other remaining VPEs will halt this TC instead. ++ * ++ * Note that on systems without CPC, this will be the ++ * only way to shutdown the CPU. ++ */ ++ write_c0_tchalt(TCHALT_H); ++ instruction_hazard(); ++ } ++ ++ while (1) ++ cpu_relax(); + } + + void smp_send_stop(void) + { ++ static unsigned long stop_in_progress; + unsigned long timeout; + ++ if (test_and_set_bit(0, &stop_in_progress)) ++ return; ++ ++ if (mips_cm_present()) { ++ unsigned int cpu; ++ ++ for_each_online_cpu(cpu) { ++ unsigned int core; ++ ++ core = cpu_core(&cpu_data[cpu]); ++ atomic_inc(&core_stop_count[core]); ++ } ++ } ++ + smp_call_function(stop_this_cpu, NULL, 0); + + /* Wait up to 1s for other CPUs to stop */ diff --git a/target/linux/ramips/rt288x/config-6.12 b/target/linux/ramips/rt288x/config-6.12 new file mode 100644 index 0000000000..505edfc337 --- /dev/null +++ b/target/linux/ramips/rt288x/config-6.12 @@ -0,0 +1,210 @@ +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_BLK_MQ_PCI=y +CONFIG_CEVT_R4K=y +CONFIG_CLK_MTMIPS=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="rootfstype=squashfs,jffs2" +CONFIG_CMDLINE_BOOL=y +# CONFIG_CMDLINE_OVERRIDE is not set +CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_DIEI=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_CPU_MIPSR2=y +CONFIG_CPU_MITIGATIONS=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CPU_SUPPORTS_MSA=y +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_GF128MUL=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DMA_NEED_SYNC=y +CONFIG_DMA_NONCOHERENT=y +# CONFIG_DTB_RT2880_EVAL is not set +CONFIG_DTB_RT_NONE=y +CONFIG_DTC=y +CONFIG_EARLY_PRINTK=y +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_FIXED_PHY=y +CONFIG_FORCE_NR_CPUS=y +CONFIG_FS_IOMAP=y +CONFIG_FUNCTION_ALIGNMENT=0 +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GLOB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_RALINK=y +CONFIG_HARDWARE_WATCHPOINTS=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IP17XX_PHY=y +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_INTC=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_AUTO_PFN_OFFSET=y +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_L1_CACHE_SHIFT=4 +CONFIG_MIPS_L1_CACHE_SHIFT_4=y +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MIPS_SPRAM=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y +CONFIG_MODULES_USE_ELF_REL=y +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y +CONFIG_MTD_SPLIT_LZMA_FW=y +CONFIG_MTD_SPLIT_UIMAGE_FW=y +CONFIG_MTD_SPLIT_WRGG_FW=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NET_EGRESS=y +CONFIG_NET_INGRESS=y +CONFIG_NET_RALINK_MDIO=y +CONFIG_NET_RALINK_MDIO_RT2880=y +CONFIG_NET_RALINK_RT2880=y +CONFIG_NET_RALINK_SOC=y +CONFIG_NET_SELFTESTS=y +# CONFIG_NET_SWITCHDEV is not set +CONFIG_NET_VENDOR_RALINK=y +CONFIG_NET_XGRESS=y +CONFIG_NLS=m +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NVMEM=y +CONFIG_NVMEM_LAYOUTS=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PAGE_POOL=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLIB_LEDS=y +# CONFIG_PHY_MT7621_PCI is not set +# CONFIG_PHY_RALINK_USB is not set +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_AW9523 is not set +CONFIG_PINCTRL_MTK_MTMIPS=y +CONFIG_PINCTRL_RT2880=y +# CONFIG_PINCTRL_SINGLE is not set +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_RALINK=y +CONFIG_RALINK_WDT=y +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RESET_CONTROLLER=y +CONFIG_SERIAL_8250_RT288X=y +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SOC_BUS=y +# CONFIG_SOC_MT7620 is not set +# CONFIG_SOC_MT7621 is not set +CONFIG_SOC_RT288X=y +# CONFIG_SOC_RT305X is not set +# CONFIG_SOC_RT3883 is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +# CONFIG_SPI_MT7621 is not set +CONFIG_SPI_RT2880=y +# CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU is not set +CONFIG_SQUASHFS_COMPILE_DECOMP_SINGLE=y +CONFIG_SQUASHFS_DECOMP_SINGLE=y +CONFIG_SWCONFIG=y +CONFIG_SWPHY=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_MIPS32_R2=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_SYS_SUPPORTS_MIPS16=y +CONFIG_SYS_SUPPORTS_ZBOOT=y +CONFIG_TARGET_ISA_REV=2 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TINY_SRCU=y +CONFIG_USB=m +CONFIG_USB_COMMON=m +CONFIG_USB_EHCI_HCD=m +CONFIG_USB_EHCI_HCD_PLATFORM=m +CONFIG_USB_OHCI_HCD=m +CONFIG_USB_OHCI_HCD_PLATFORM=m +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_WATCHDOG_CORE=y +CONFIG_ZBOOT_LOAD_ADDRESS=0x0 diff --git a/target/linux/ramips/rt305x/config-6.12 b/target/linux/ramips/rt305x/config-6.12 new file mode 100644 index 0000000000..4a8d2cd829 --- /dev/null +++ b/target/linux/ramips/rt305x/config-6.12 @@ -0,0 +1,205 @@ +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_CEVT_R4K=y +CONFIG_CEVT_SYSTICK_QUIRK=y +CONFIG_CLKSRC_MMIO=y +CONFIG_CLK_MTMIPS=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="rootfstype=squashfs,jffs2" +CONFIG_CMDLINE_BOOL=y +# CONFIG_CMDLINE_OVERRIDE is not set +CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_DIEI=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_CPU_MIPSR2=y +CONFIG_CPU_MITIGATIONS=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CPU_SUPPORTS_MSA=y +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_GF128MUL=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_PINCTRL=y +CONFIG_DMA_NEED_SYNC=y +CONFIG_DMA_NONCOHERENT=y +# CONFIG_DTB_RT305X_EVAL is not set +CONFIG_DTB_RT_NONE=y +CONFIG_DTC=y +CONFIG_EARLY_PRINTK=y +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_FIXED_PHY=y +CONFIG_FORCE_NR_CPUS=y +CONFIG_FS_IOMAP=y +CONFIG_FUNCTION_ALIGNMENT=0 +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GLOB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_RALINK=y +CONFIG_GPIO_WATCHDOG=y +# CONFIG_GPIO_WATCHDOG_ARCH_INITCALL is not set +CONFIG_HARDWARE_WATCHPOINTS=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_INTC=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_L1_CACHE_SHIFT=5 +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MIPS_SPRAM=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y +CONFIG_MODULES_USE_ELF_REL=y +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y +CONFIG_MTD_SPLIT_JIMAGE_FW=y +CONFIG_MTD_SPLIT_SEAMA_FW=y +CONFIG_MTD_SPLIT_UIMAGE_FW=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NET_EGRESS=y +CONFIG_NET_INGRESS=y +CONFIG_NET_RALINK_ESW_RT3050=y +CONFIG_NET_RALINK_RT3050=y +CONFIG_NET_RALINK_SOC=y +CONFIG_NET_SELFTESTS=y +# CONFIG_NET_SWITCHDEV is not set +CONFIG_NET_VENDOR_RALINK=y +CONFIG_NET_XGRESS=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NVMEM=y +CONFIG_NVMEM_LAYOUTS=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PAGE_POOL=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLIB_LEDS=y +# CONFIG_PHY_MT7621_PCI is not set +CONFIG_PHY_RALINK_USB=y +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_AW9523 is not set +CONFIG_PINCTRL_MTK_MTMIPS=y +CONFIG_PINCTRL_RT305X=y +# CONFIG_PINCTRL_SINGLE is not set +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_RALINK=y +# CONFIG_RALINK_ILL_ACC is not set +CONFIG_RALINK_TIMER=y +CONFIG_RALINK_WDT=y +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RESET_CONTROLLER=y +CONFIG_SERIAL_8250_RT288X=y +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SOC_BUS=y +# CONFIG_SOC_MT7620 is not set +# CONFIG_SOC_MT7621 is not set +# CONFIG_SOC_RT288X is not set +CONFIG_SOC_RT305X=y +# CONFIG_SOC_RT3883 is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +# CONFIG_SPI_MT7621 is not set +CONFIG_SPI_RT2880=y +# CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU is not set +CONFIG_SQUASHFS_COMPILE_DECOMP_SINGLE=y +CONFIG_SQUASHFS_DECOMP_SINGLE=y +CONFIG_SWCONFIG=y +CONFIG_SWPHY=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_MIPS32_R2=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_SYS_SUPPORTS_MIPS16=y +CONFIG_SYS_SUPPORTS_ZBOOT=y +CONFIG_TARGET_ISA_REV=2 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TINY_SRCU=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_WATCHDOG_CORE=y +CONFIG_ZBOOT_LOAD_ADDRESS=0x0 diff --git a/target/linux/ramips/rt3883/config-6.12 b/target/linux/ramips/rt3883/config-6.12 new file mode 100644 index 0000000000..67eea9ab8c --- /dev/null +++ b/target/linux/ramips/rt3883/config-6.12 @@ -0,0 +1,205 @@ +CONFIG_AR8216_PHY=y +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_BLK_MQ_PCI=y +CONFIG_CEVT_R4K=y +CONFIG_CLK_MTMIPS=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="rootfstype=squashfs,jffs2" +CONFIG_CMDLINE_BOOL=y +# CONFIG_CMDLINE_OVERRIDE is not set +CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_DIEI=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_CPU_MIPSR2=y +CONFIG_CPU_MITIGATIONS=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CPU_SUPPORTS_MSA=y +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_GF128MUL=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_PINCTRL=y +CONFIG_DMA_NEED_SYNC=y +CONFIG_DMA_NONCOHERENT=y +# CONFIG_DTB_RT3883_EVAL is not set +CONFIG_DTB_RT_NONE=y +CONFIG_DTC=y +CONFIG_EARLY_PRINTK=y +CONFIG_ETHERNET_PACKET_MANGLE=y +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_FIXED_PHY=y +CONFIG_FORCE_NR_CPUS=y +CONFIG_FS_IOMAP=y +CONFIG_FUNCTION_ALIGNMENT=0 +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GLOB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_RALINK=y +CONFIG_HARDWARE_WATCHPOINTS=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_INTC=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_L1_CACHE_SHIFT=5 +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MIPS_SPRAM=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y +CONFIG_MODULES_USE_ELF_REL=y +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y +CONFIG_MTD_SPLIT_SEAMA_FW=y +CONFIG_MTD_SPLIT_UIMAGE_FW=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NET_EGRESS=y +CONFIG_NET_INGRESS=y +CONFIG_NET_RALINK_MDIO=y +CONFIG_NET_RALINK_MDIO_RT2880=y +CONFIG_NET_RALINK_RT3883=y +CONFIG_NET_RALINK_SOC=y +CONFIG_NET_SELFTESTS=y +# CONFIG_NET_SWITCHDEV is not set +CONFIG_NET_VENDOR_RALINK=y +CONFIG_NET_XGRESS=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NVMEM=y +CONFIG_NVMEM_LAYOUTS=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PAGE_POOL=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLIB_LEDS=y +# CONFIG_PHY_MT7621_PCI is not set +CONFIG_PHY_RALINK_USB=y +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_AW9523 is not set +CONFIG_PINCTRL_MTK_MTMIPS=y +CONFIG_PINCTRL_RT3883=y +# CONFIG_PINCTRL_SINGLE is not set +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_RALINK=y +CONFIG_RALINK_WDT=y +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RTL8366_SMI=y +CONFIG_RTL8367B_PHY=y +CONFIG_RTL8367_PHY=y +CONFIG_SERIAL_8250_RT288X=y +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SOC_BUS=y +# CONFIG_SOC_MT7620 is not set +# CONFIG_SOC_MT7621 is not set +# CONFIG_SOC_RT288X is not set +# CONFIG_SOC_RT305X is not set +CONFIG_SOC_RT3883=y +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +# CONFIG_SPI_MT7621 is not set +CONFIG_SPI_RT2880=y +# CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU is not set +CONFIG_SQUASHFS_COMPILE_DECOMP_SINGLE=y +CONFIG_SQUASHFS_DECOMP_SINGLE=y +CONFIG_SWCONFIG=y +CONFIG_SWPHY=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_MIPS32_R2=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_SYS_SUPPORTS_MIPS16=y +CONFIG_SYS_SUPPORTS_ZBOOT=y +CONFIG_TARGET_ISA_REV=2 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TINY_SRCU=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_WATCHDOG_CORE=y +CONFIG_ZBOOT_LOAD_ADDRESS=0x0 From 628f46ccb191631a27dee3aafc2922c21b5d1e79 Mon Sep 17 00:00:00 2001 From: Mieczyslaw Nalewaj Date: Mon, 5 Jan 2026 19:35:51 +0100 Subject: [PATCH 59/78] ramips: 6.18: update kernel symbols Remove symbols no longer present in version 6.18, add new 6.18 kernel symbols. Signed-off-by: Mieczyslaw Nalewaj Link: https://github.com/openwrt/openwrt/pull/21418 Signed-off-by: Robert Marko --- target/linux/ramips/mt7620/config-6.18 | 6 ++---- target/linux/ramips/mt7621/config-6.18 | 9 ++++----- target/linux/ramips/mt76x8/config-6.18 | 6 ++---- target/linux/ramips/rt288x/config-6.18 | 6 ++---- target/linux/ramips/rt305x/config-6.18 | 5 ++--- target/linux/ramips/rt3883/config-6.18 | 6 ++---- 6 files changed, 14 insertions(+), 24 deletions(-) diff --git a/target/linux/ramips/mt7620/config-6.18 b/target/linux/ramips/mt7620/config-6.18 index e1dbbf013c..08833b8427 100644 --- a/target/linux/ramips/mt7620/config-6.18 +++ b/target/linux/ramips/mt7620/config-6.18 @@ -5,7 +5,6 @@ CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_ARCH_MMAP_RND_BITS_MAX=15 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_BLK_MQ_PCI=y CONFIG_CEVT_R4K=y CONFIG_CEVT_SYSTICK_QUIRK=y CONFIG_CLKSRC_MMIO=y @@ -34,10 +33,11 @@ CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y CONFIG_CPU_SUPPORTS_HIGHMEM=y CONFIG_CPU_SUPPORTS_MSA=y CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_SIG2=y CONFIG_CSRC_R4K=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_PINCTRL=y @@ -105,8 +105,6 @@ CONFIG_LIBFDT=y CONFIG_LOCK_DEBUGGING_SUPPORT=y CONFIG_MARVELL_PHY=y CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y CONFIG_MFD_SYSCON=y CONFIG_MIGRATION=y CONFIG_MIPS=y diff --git a/target/linux/ramips/mt7621/config-6.18 b/target/linux/ramips/mt7621/config-6.18 index 3d8fe345c2..5334552228 100644 --- a/target/linux/ramips/mt7621/config-6.18 +++ b/target/linux/ramips/mt7621/config-6.18 @@ -5,7 +5,6 @@ CONFIG_ARCH_MMAP_RND_BITS_MAX=15 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_AT803X_PHY=y -CONFIG_BLK_MQ_PCI=y CONFIG_BOARD_SCACHE=y CONFIG_CEVT_R4K=y CONFIG_CLKSRC_MIPS_GIC=y @@ -43,11 +42,12 @@ CONFIG_CRC16=y CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_HASH_INFO=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_SIG2=y CONFIG_CRYPTO_ZSTD=y CONFIG_CSRC_R4K=y CONFIG_DEBUG_INFO=y @@ -63,6 +63,7 @@ CONFIG_FUNCTION_ALIGNMENT=0 CONFIG_FWNODE_MDIO=y CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_FW_LOADER_SYSFS=y +CONFIG_GENERIC_ALLOCATOR=y CONFIG_GENERIC_ATOMIC64=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CMOS_UPDATE=y @@ -117,8 +118,6 @@ CONFIG_LOCK_DEBUGGING_SUPPORT=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y CONFIG_MEDIATEK_GE_PHY=y CONFIG_MFD_SYSCON=y CONFIG_MIGRATION=y @@ -249,6 +248,7 @@ CONFIG_RANDSTRUCT_NONE=y CONFIG_RATIONAL=y CONFIG_REGMAP=y CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_IRQ=y CONFIG_REGMAP_MMIO=y CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y @@ -295,7 +295,6 @@ CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y CONFIG_SYS_SUPPORTS_MIPS16=y CONFIG_SYS_SUPPORTS_MIPS_CPS=y CONFIG_SYS_SUPPORTS_MULTITHREADING=y -CONFIG_SYS_SUPPORTS_SCHED_SMT=y CONFIG_SYS_SUPPORTS_SMP=y CONFIG_SYS_SUPPORTS_ZBOOT=y CONFIG_TARGET_ISA_REV=2 diff --git a/target/linux/ramips/mt76x8/config-6.18 b/target/linux/ramips/mt76x8/config-6.18 index 68854319b9..8504ba20ed 100644 --- a/target/linux/ramips/mt76x8/config-6.18 +++ b/target/linux/ramips/mt76x8/config-6.18 @@ -4,7 +4,6 @@ CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_ARCH_MMAP_RND_BITS_MAX=15 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_BLK_MQ_PCI=y CONFIG_CEVT_R4K=y CONFIG_CLK_MTMIPS=y CONFIG_CLONE_BACKWARDS=y @@ -31,10 +30,11 @@ CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y CONFIG_CPU_SUPPORTS_HIGHMEM=y CONFIG_CPU_SUPPORTS_MSA=y CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_SIG2=y CONFIG_CSRC_R4K=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_PINCTRL=y @@ -98,8 +98,6 @@ CONFIG_IRQ_WORK=y CONFIG_LIBFDT=y CONFIG_LOCK_DEBUGGING_SUPPORT=y CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y CONFIG_MFD_SYSCON=y CONFIG_MIGRATION=y CONFIG_MIPS=y diff --git a/target/linux/ramips/rt288x/config-6.18 b/target/linux/ramips/rt288x/config-6.18 index 505edfc337..295ca07b2b 100644 --- a/target/linux/ramips/rt288x/config-6.18 +++ b/target/linux/ramips/rt288x/config-6.18 @@ -4,7 +4,6 @@ CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_ARCH_MMAP_RND_BITS_MAX=15 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_BLK_MQ_PCI=y CONFIG_CEVT_R4K=y CONFIG_CLK_MTMIPS=y CONFIG_CLONE_BACKWARDS=y @@ -30,10 +29,11 @@ CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y CONFIG_CPU_SUPPORTS_HIGHMEM=y CONFIG_CPU_SUPPORTS_MSA=y CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_SIG2=y CONFIG_CSRC_R4K=y CONFIG_DEBUG_INFO=y CONFIG_DMA_NEED_SYNC=y @@ -92,8 +92,6 @@ CONFIG_IRQ_WORK=y CONFIG_LIBFDT=y CONFIG_LOCK_DEBUGGING_SUPPORT=y CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y CONFIG_MFD_SYSCON=y CONFIG_MIGRATION=y CONFIG_MIPS=y diff --git a/target/linux/ramips/rt305x/config-6.18 b/target/linux/ramips/rt305x/config-6.18 index 4a8d2cd829..0192bce8fa 100644 --- a/target/linux/ramips/rt305x/config-6.18 +++ b/target/linux/ramips/rt305x/config-6.18 @@ -31,10 +31,11 @@ CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y CONFIG_CPU_SUPPORTS_HIGHMEM=y CONFIG_CPU_SUPPORTS_MSA=y CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_SIG2=y CONFIG_CSRC_R4K=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_PINCTRL=y @@ -95,8 +96,6 @@ CONFIG_IRQ_WORK=y CONFIG_LIBFDT=y CONFIG_LOCK_DEBUGGING_SUPPORT=y CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y CONFIG_MFD_SYSCON=y CONFIG_MIGRATION=y CONFIG_MIPS=y diff --git a/target/linux/ramips/rt3883/config-6.18 b/target/linux/ramips/rt3883/config-6.18 index 67eea9ab8c..0085cb203c 100644 --- a/target/linux/ramips/rt3883/config-6.18 +++ b/target/linux/ramips/rt3883/config-6.18 @@ -5,7 +5,6 @@ CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_ARCH_MMAP_RND_BITS_MAX=15 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_BLK_MQ_PCI=y CONFIG_CEVT_R4K=y CONFIG_CLK_MTMIPS=y CONFIG_CLONE_BACKWARDS=y @@ -31,10 +30,11 @@ CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y CONFIG_CPU_SUPPORTS_HIGHMEM=y CONFIG_CPU_SUPPORTS_MSA=y CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_SIG2=y CONFIG_CSRC_R4K=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_PINCTRL=y @@ -94,8 +94,6 @@ CONFIG_IRQ_WORK=y CONFIG_LIBFDT=y CONFIG_LOCK_DEBUGGING_SUPPORT=y CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y CONFIG_MFD_SYSCON=y CONFIG_MIGRATION=y CONFIG_MIPS=y From 7429b5a8d6cb1d1e1d6800949b358981b8fcc1ec Mon Sep 17 00:00:00 2001 From: Mieczyslaw Nalewaj Date: Mon, 6 Apr 2026 09:41:38 +0200 Subject: [PATCH 60/78] ramips: 6.18: remove obsolete patches Remove obsolete patches already included in kernel 6.18. - 001-v6.13-clocksource-drivers-ralink-Add-Ralink-System-Tick-Co.patch[1] - 002-03-v6.13-clk-ralink-mtmips-add-mmc-related-clocks-for-SoCs-MT.patch[2] - 003-v6.13-mmc-mtk-sd-Implement-Host-Software-Queue-for-eMMC.patch[3] - 004-v6.15-dt-bindings-clock-add-clock-definitions-for-Ralink-S.patch[4] - 860-ramips-add-eip93-driver.patch[5] - 900-pci-rt2880-static-pcibios_init.patch[6] - 931-mips-ralink-add-missing-include.patch[7] [1] https://web.git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-6.18.y&id=cd5375610baadd3a0842a9e83ca502684f938be8 [2] https://web.git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-6.18.y&id=198675bbc03d437fb80a35d781ad13d622d0ff68 [3] https://web.git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-6.18.y&id=7e9ddd7d45897b15a64c4a3c88f2f7909bf49749 [4] https://web.git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-6.18.y&id=adb2424d0d05506c2f36fcba66101d34f7409e45 [5] https://web.git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-6.18.y&id=9739f5f93b7806a684713ba42e6ed2d1df7c8100 [6] https://web.git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-6.18.y&id=de94259d064814b7eacd6d1f4b26e934eed02590 [7] https://web.git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-6.18.y&id=f13e645e15f1a4a33f0709844dac1a962b335b16 Signed-off-by: Mieczyslaw Nalewaj Link: https://github.com/openwrt/openwrt/pull/21418 Signed-off-by: Robert Marko --- ...ers-ralink-Add-Ralink-System-Tick-Co.patch | 384 -- ...s-add-mmc-related-clocks-for-SoCs-MT.patch | 101 - ...plement-Host-Software-Queue-for-eMMC.patch | 188 - ...k-add-clock-definitions-for-Ralink-S.patch | 188 - .../860-ramips-add-eip93-driver.patch | 3273 ----------------- .../900-pci-rt2880-static-pcibios_init.patch | 29 - .../931-mips-ralink-add-missing-include.patch | 25 - 7 files changed, 4188 deletions(-) delete mode 100644 target/linux/ramips/patches-6.18/001-v6.13-clocksource-drivers-ralink-Add-Ralink-System-Tick-Co.patch delete mode 100644 target/linux/ramips/patches-6.18/002-03-v6.13-clk-ralink-mtmips-add-mmc-related-clocks-for-SoCs-MT.patch delete mode 100644 target/linux/ramips/patches-6.18/003-v6.13-mmc-mtk-sd-Implement-Host-Software-Queue-for-eMMC.patch delete mode 100644 target/linux/ramips/patches-6.18/004-v6.15-dt-bindings-clock-add-clock-definitions-for-Ralink-S.patch delete mode 100644 target/linux/ramips/patches-6.18/860-ramips-add-eip93-driver.patch delete mode 100644 target/linux/ramips/patches-6.18/900-pci-rt2880-static-pcibios_init.patch delete mode 100644 target/linux/ramips/patches-6.18/931-mips-ralink-add-missing-include.patch diff --git a/target/linux/ramips/patches-6.18/001-v6.13-clocksource-drivers-ralink-Add-Ralink-System-Tick-Co.patch b/target/linux/ramips/patches-6.18/001-v6.13-clocksource-drivers-ralink-Add-Ralink-System-Tick-Co.patch deleted file mode 100644 index 48ca016212..0000000000 --- a/target/linux/ramips/patches-6.18/001-v6.13-clocksource-drivers-ralink-Add-Ralink-System-Tick-Co.patch +++ /dev/null @@ -1,384 +0,0 @@ -From 57cbfd333c9d65bfab1a06b49c75536ee28dc2ce Mon Sep 17 00:00:00 2001 -From: Sergio Paracuellos -Date: Mon, 28 Oct 2024 21:36:43 +0100 -Subject: clocksource/drivers/ralink: Add Ralink System Tick Counter driver - -System Tick Counter is present on Ralink SoCs RT3352 and MT7620. This -driver has been in 'arch/mips/ralink' directory since the beggining of -Ralink architecture support. However, it can be moved into a more proper -place in 'drivers/clocksource'. Hence add it here adding also support for -compile test targets and reducing LOC in architecture code folder. - -Signed-off-by: Sergio Paracuellos -Link: https://lore.kernel.org/r/20241028203643.191268-2-sergio.paracuellos@gmail.com -Signed-off-by: Daniel Lezcano ---- - arch/mips/ralink/Kconfig | 7 -- - arch/mips/ralink/Makefile | 2 - - arch/mips/ralink/cevt-rt3352.c | 153 ------------------------------------- - drivers/clocksource/Kconfig | 9 +++ - drivers/clocksource/Makefile | 1 + - drivers/clocksource/timer-ralink.c | 150 ++++++++++++++++++++++++++++++++++++ - 6 files changed, 160 insertions(+), 162 deletions(-) - delete mode 100644 arch/mips/ralink/cevt-rt3352.c - create mode 100644 drivers/clocksource/timer-ralink.c - ---- a/arch/mips/ralink/Kconfig -+++ b/arch/mips/ralink/Kconfig -@@ -1,13 +1,6 @@ - # SPDX-License-Identifier: GPL-2.0 - if RALINK - --config CLKEVT_RT3352 -- bool -- depends on SOC_RT305X || SOC_MT7620 -- default y -- select TIMER_OF -- select CLKSRC_MMIO -- - config RALINK_ILL_ACC - bool - depends on SOC_RT305X ---- a/arch/mips/ralink/Makefile -+++ b/arch/mips/ralink/Makefile -@@ -10,8 +10,6 @@ ifndef CONFIG_MIPS_GIC - obj-y += clk.o timer.o - endif - --obj-$(CONFIG_CLKEVT_RT3352) += cevt-rt3352.o -- - obj-$(CONFIG_RALINK_ILL_ACC) += ill_acc.o - - obj-$(CONFIG_IRQ_INTC) += irq.o ---- a/arch/mips/ralink/cevt-rt3352.c -+++ /dev/null -@@ -1,153 +0,0 @@ --/* -- * This file is subject to the terms and conditions of the GNU General Public -- * License. See the file "COPYING" in the main directory of this archive -- * for more details. -- * -- * Copyright (C) 2013 by John Crispin -- */ -- --#include --#include --#include --#include --#include --#include --#include --#include --#include -- --#include -- --#define SYSTICK_FREQ (50 * 1000) -- --#define SYSTICK_CONFIG 0x00 --#define SYSTICK_COMPARE 0x04 --#define SYSTICK_COUNT 0x08 -- --/* route systick irq to mips irq 7 instead of the r4k-timer */ --#define CFG_EXT_STK_EN 0x2 --/* enable the counter */ --#define CFG_CNT_EN 0x1 -- --struct systick_device { -- void __iomem *membase; -- struct clock_event_device dev; -- int irq_requested; -- int freq_scale; --}; -- --static int systick_set_oneshot(struct clock_event_device *evt); --static int systick_shutdown(struct clock_event_device *evt); -- --static int systick_next_event(unsigned long delta, -- struct clock_event_device *evt) --{ -- struct systick_device *sdev; -- u32 count; -- -- sdev = container_of(evt, struct systick_device, dev); -- count = ioread32(sdev->membase + SYSTICK_COUNT); -- count = (count + delta) % SYSTICK_FREQ; -- iowrite32(count, sdev->membase + SYSTICK_COMPARE); -- -- return 0; --} -- --static void systick_event_handler(struct clock_event_device *dev) --{ -- /* noting to do here */ --} -- --static irqreturn_t systick_interrupt(int irq, void *dev_id) --{ -- struct clock_event_device *dev = (struct clock_event_device *) dev_id; -- -- dev->event_handler(dev); -- -- return IRQ_HANDLED; --} -- --static struct systick_device systick = { -- .dev = { -- /* -- * cevt-r4k uses 300, make sure systick -- * gets used if available -- */ -- .rating = 310, -- .features = CLOCK_EVT_FEAT_ONESHOT, -- .set_next_event = systick_next_event, -- .set_state_shutdown = systick_shutdown, -- .set_state_oneshot = systick_set_oneshot, -- .event_handler = systick_event_handler, -- }, --}; -- --static int systick_shutdown(struct clock_event_device *evt) --{ -- struct systick_device *sdev; -- -- sdev = container_of(evt, struct systick_device, dev); -- -- if (sdev->irq_requested) -- free_irq(systick.dev.irq, &systick.dev); -- sdev->irq_requested = 0; -- iowrite32(0, systick.membase + SYSTICK_CONFIG); -- -- return 0; --} -- --static int systick_set_oneshot(struct clock_event_device *evt) --{ -- const char *name = systick.dev.name; -- struct systick_device *sdev; -- int irq = systick.dev.irq; -- -- sdev = container_of(evt, struct systick_device, dev); -- -- if (!sdev->irq_requested) { -- if (request_irq(irq, systick_interrupt, -- IRQF_PERCPU | IRQF_TIMER, name, &systick.dev)) -- pr_err("Failed to request irq %d (%s)\n", irq, name); -- } -- sdev->irq_requested = 1; -- iowrite32(CFG_EXT_STK_EN | CFG_CNT_EN, -- systick.membase + SYSTICK_CONFIG); -- -- return 0; --} -- --static int __init ralink_systick_init(struct device_node *np) --{ -- int ret; -- -- systick.membase = of_iomap(np, 0); -- if (!systick.membase) -- return -ENXIO; -- -- systick.dev.name = np->name; -- clockevents_calc_mult_shift(&systick.dev, SYSTICK_FREQ, 60); -- systick.dev.max_delta_ns = clockevent_delta2ns(0x7fff, &systick.dev); -- systick.dev.max_delta_ticks = 0x7fff; -- systick.dev.min_delta_ns = clockevent_delta2ns(0x3, &systick.dev); -- systick.dev.min_delta_ticks = 0x3; -- systick.dev.irq = irq_of_parse_and_map(np, 0); -- if (!systick.dev.irq) { -- pr_err("%pOFn: request_irq failed", np); -- return -EINVAL; -- } -- -- ret = clocksource_mmio_init(systick.membase + SYSTICK_COUNT, np->name, -- SYSTICK_FREQ, 301, 16, -- clocksource_mmio_readl_up); -- if (ret) -- return ret; -- -- clockevents_register_device(&systick.dev); -- -- pr_info("%pOFn: running - mult: %d, shift: %d\n", -- np, systick.dev.mult, systick.dev.shift); -- -- return 0; --} -- --TIMER_OF_DECLARE(systick, "ralink,cevt-systick", ralink_systick_init); ---- a/drivers/clocksource/Kconfig -+++ b/drivers/clocksource/Kconfig -@@ -755,4 +755,13 @@ config EP93XX_TIMER - Enables support for the Cirrus Logic timer block - EP93XX. - -+config RALINK_TIMER -+ bool "Ralink System Tick Counter" -+ depends on SOC_RT305X || SOC_MT7620 || COMPILE_TEST -+ select CLKSRC_MMIO -+ select TIMER_OF -+ help -+ Enables support for system tick counter present on -+ Ralink SoCs RT3352 and MT7620. -+ - endmenu ---- a/drivers/clocksource/Makefile -+++ b/drivers/clocksource/Makefile -@@ -91,3 +91,4 @@ obj-$(CONFIG_GOLDFISH_TIMER) += timer-g - obj-$(CONFIG_GXP_TIMER) += timer-gxp.o - obj-$(CONFIG_CLKSRC_LOONGSON1_PWM) += timer-loongson1-pwm.o - obj-$(CONFIG_EP93XX_TIMER) += timer-ep93xx.o -+obj-$(CONFIG_RALINK_TIMER) += timer-ralink.o ---- /dev/null -+++ b/drivers/clocksource/timer-ralink.c -@@ -0,0 +1,150 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Ralink System Tick Counter driver present on RT3352 and MT7620 SoCs. -+ * -+ * Copyright (C) 2013 by John Crispin -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define SYSTICK_FREQ (50 * 1000) -+ -+#define SYSTICK_CONFIG 0x00 -+#define SYSTICK_COMPARE 0x04 -+#define SYSTICK_COUNT 0x08 -+ -+/* route systick irq to mips irq 7 instead of the r4k-timer */ -+#define CFG_EXT_STK_EN 0x2 -+/* enable the counter */ -+#define CFG_CNT_EN 0x1 -+ -+struct systick_device { -+ void __iomem *membase; -+ struct clock_event_device dev; -+ int irq_requested; -+ int freq_scale; -+}; -+ -+static int systick_set_oneshot(struct clock_event_device *evt); -+static int systick_shutdown(struct clock_event_device *evt); -+ -+static int systick_next_event(unsigned long delta, -+ struct clock_event_device *evt) -+{ -+ struct systick_device *sdev; -+ u32 count; -+ -+ sdev = container_of(evt, struct systick_device, dev); -+ count = ioread32(sdev->membase + SYSTICK_COUNT); -+ count = (count + delta) % SYSTICK_FREQ; -+ iowrite32(count, sdev->membase + SYSTICK_COMPARE); -+ -+ return 0; -+} -+ -+static void systick_event_handler(struct clock_event_device *dev) -+{ -+ /* noting to do here */ -+} -+ -+static irqreturn_t systick_interrupt(int irq, void *dev_id) -+{ -+ struct clock_event_device *dev = (struct clock_event_device *)dev_id; -+ -+ dev->event_handler(dev); -+ -+ return IRQ_HANDLED; -+} -+ -+static struct systick_device systick = { -+ .dev = { -+ /* -+ * cevt-r4k uses 300, make sure systick -+ * gets used if available -+ */ -+ .rating = 310, -+ .features = CLOCK_EVT_FEAT_ONESHOT, -+ .set_next_event = systick_next_event, -+ .set_state_shutdown = systick_shutdown, -+ .set_state_oneshot = systick_set_oneshot, -+ .event_handler = systick_event_handler, -+ }, -+}; -+ -+static int systick_shutdown(struct clock_event_device *evt) -+{ -+ struct systick_device *sdev; -+ -+ sdev = container_of(evt, struct systick_device, dev); -+ -+ if (sdev->irq_requested) -+ free_irq(systick.dev.irq, &systick.dev); -+ sdev->irq_requested = 0; -+ iowrite32(0, systick.membase + SYSTICK_CONFIG); -+ -+ return 0; -+} -+ -+static int systick_set_oneshot(struct clock_event_device *evt) -+{ -+ const char *name = systick.dev.name; -+ struct systick_device *sdev; -+ int irq = systick.dev.irq; -+ -+ sdev = container_of(evt, struct systick_device, dev); -+ -+ if (!sdev->irq_requested) { -+ if (request_irq(irq, systick_interrupt, -+ IRQF_PERCPU | IRQF_TIMER, name, &systick.dev)) -+ pr_err("Failed to request irq %d (%s)\n", irq, name); -+ } -+ sdev->irq_requested = 1; -+ iowrite32(CFG_EXT_STK_EN | CFG_CNT_EN, -+ systick.membase + SYSTICK_CONFIG); -+ -+ return 0; -+} -+ -+static int __init ralink_systick_init(struct device_node *np) -+{ -+ int ret; -+ -+ systick.membase = of_iomap(np, 0); -+ if (!systick.membase) -+ return -ENXIO; -+ -+ systick.dev.name = np->name; -+ clockevents_calc_mult_shift(&systick.dev, SYSTICK_FREQ, 60); -+ systick.dev.max_delta_ns = clockevent_delta2ns(0x7fff, &systick.dev); -+ systick.dev.max_delta_ticks = 0x7fff; -+ systick.dev.min_delta_ns = clockevent_delta2ns(0x3, &systick.dev); -+ systick.dev.min_delta_ticks = 0x3; -+ systick.dev.irq = irq_of_parse_and_map(np, 0); -+ if (!systick.dev.irq) { -+ pr_err("%pOFn: request_irq failed", np); -+ return -EINVAL; -+ } -+ -+ ret = clocksource_mmio_init(systick.membase + SYSTICK_COUNT, np->name, -+ SYSTICK_FREQ, 301, 16, -+ clocksource_mmio_readl_up); -+ if (ret) -+ return ret; -+ -+ clockevents_register_device(&systick.dev); -+ -+ pr_info("%pOFn: running - mult: %d, shift: %d\n", -+ np, systick.dev.mult, systick.dev.shift); -+ -+ return 0; -+} -+ -+TIMER_OF_DECLARE(systick, "ralink,cevt-systick", ralink_systick_init); diff --git a/target/linux/ramips/patches-6.18/002-03-v6.13-clk-ralink-mtmips-add-mmc-related-clocks-for-SoCs-MT.patch b/target/linux/ramips/patches-6.18/002-03-v6.13-clk-ralink-mtmips-add-mmc-related-clocks-for-SoCs-MT.patch deleted file mode 100644 index 076cda246e..0000000000 --- a/target/linux/ramips/patches-6.18/002-03-v6.13-clk-ralink-mtmips-add-mmc-related-clocks-for-SoCs-MT.patch +++ /dev/null @@ -1,101 +0,0 @@ -From 198675bbc03d437fb80a35d781ad13d622d0ff68 Mon Sep 17 00:00:00 2001 -From: Sergio Paracuellos -Date: Tue, 10 Sep 2024 06:40:24 +0200 -Subject: [PATCH 3/3] clk: ralink: mtmips: add mmc related clocks for SoCs - MT7620, MT7628 and MT7688 - -Original architecture clock code from where this driver was derived did not -include nothing related to mmc clocks. OpenWRT people started to use mtk-sd -upstream driver recently and they were forced to use a dts 'fixed-clock' -node with 48 MHz clock: -- https://github.com/openwrt/openwrt/pull/15896 -The proper thing to do to avoid that is to add the mmc related clocks to the -driver to avoid a dts with fixed clocks nodes. The minimal documentation in -the mt7620 programming guide says that there is a BBP_PLL clock of 480 MHz -derived from the 40 MHz XTAL and from there a clock divider by ten produces -the desired SDHC clock of 48 MHz for the mmc. Hence add a fixed clock 'bbppll' -and factor clock 'sdhc' ten divider child to properly set the 'mmc' peripheral -clock with the desired 48 Mhz rate. - -Signed-off-by: Sergio Paracuellos -Link: https://lore.kernel.org/r/20240910044024.120009-4-sergio.paracuellos@gmail.com -Signed-off-by: Stephen Boyd ---- - drivers/clk/ralink/clk-mtmips.c | 30 +++++++++++++++++++++++------- - 1 file changed, 23 insertions(+), 7 deletions(-) - ---- a/drivers/clk/ralink/clk-mtmips.c -+++ b/drivers/clk/ralink/clk-mtmips.c -@@ -207,6 +207,7 @@ static struct mtmips_clk mt7620_pherip_c - { CLK_PERIPH("10000b00.spi", "bus") }, - { CLK_PERIPH("10000b40.spi", "bus") }, - { CLK_PERIPH("10000c00.uartlite", "periph") }, -+ { CLK_PERIPH("10130000.mmc", "sdhc") }, - { CLK_PERIPH("10180000.wmac", "xtal") } - }; - -@@ -220,6 +221,7 @@ static struct mtmips_clk mt76x8_pherip_c - { CLK_PERIPH("10000c00.uart0", "periph") }, - { CLK_PERIPH("10000d00.uart1", "periph") }, - { CLK_PERIPH("10000e00.uart2", "periph") }, -+ { CLK_PERIPH("10130000.mmc", "sdhc") }, - { CLK_PERIPH("10300000.wmac", "xtal") } - }; - -@@ -271,8 +273,13 @@ static struct mtmips_clk_fixed rt3352_fi - CLK_FIXED("periph", "xtal", 40000000) - }; - -+static struct mtmips_clk_fixed mt7620_fixed_clocks[] = { -+ CLK_FIXED("bbppll", "xtal", 480000000) -+}; -+ - static struct mtmips_clk_fixed mt76x8_fixed_clocks[] = { -- CLK_FIXED("pcmi2s", "xtal", 480000000), -+ CLK_FIXED("bbppll", "xtal", 480000000), -+ CLK_FIXED("pcmi2s", "bbppll", 480000000), - CLK_FIXED("periph", "xtal", 40000000) - }; - -@@ -327,6 +334,15 @@ static struct mtmips_clk_factor rt305x_f - CLK_FACTOR("bus", "cpu", 1, 3) - }; - -+static struct mtmips_clk_factor mt7620_factor_clocks[] = { -+ CLK_FACTOR("sdhc", "bbppll", 1, 10) -+}; -+ -+static struct mtmips_clk_factor mt76x8_factor_clocks[] = { -+ CLK_FACTOR("bus", "cpu", 1, 3), -+ CLK_FACTOR("sdhc", "bbppll", 1, 10) -+}; -+ - static int mtmips_register_factor_clocks(struct clk_hw_onecell_data *clk_data, - struct mtmips_clk_priv *priv) - { -@@ -810,10 +826,10 @@ static const struct mtmips_clk_data rt53 - static const struct mtmips_clk_data mt7620_clk_data = { - .clk_base = mt7620_clks_base, - .num_clk_base = ARRAY_SIZE(mt7620_clks_base), -- .clk_fixed = NULL, -- .num_clk_fixed = 0, -- .clk_factor = NULL, -- .num_clk_factor = 0, -+ .clk_fixed = mt7620_fixed_clocks, -+ .num_clk_fixed = ARRAY_SIZE(mt7620_fixed_clocks), -+ .clk_factor = mt7620_factor_clocks, -+ .num_clk_factor = ARRAY_SIZE(mt7620_factor_clocks), - .clk_periph = mt7620_pherip_clks, - .num_clk_periph = ARRAY_SIZE(mt7620_pherip_clks), - }; -@@ -823,8 +839,8 @@ static const struct mtmips_clk_data mt76 - .num_clk_base = ARRAY_SIZE(mt76x8_clks_base), - .clk_fixed = mt76x8_fixed_clocks, - .num_clk_fixed = ARRAY_SIZE(mt76x8_fixed_clocks), -- .clk_factor = rt305x_factor_clocks, -- .num_clk_factor = ARRAY_SIZE(rt305x_factor_clocks), -+ .clk_factor = mt76x8_factor_clocks, -+ .num_clk_factor = ARRAY_SIZE(mt76x8_factor_clocks), - .clk_periph = mt76x8_pherip_clks, - .num_clk_periph = ARRAY_SIZE(mt76x8_pherip_clks), - }; diff --git a/target/linux/ramips/patches-6.18/003-v6.13-mmc-mtk-sd-Implement-Host-Software-Queue-for-eMMC.patch b/target/linux/ramips/patches-6.18/003-v6.13-mmc-mtk-sd-Implement-Host-Software-Queue-for-eMMC.patch deleted file mode 100644 index de09b680ea..0000000000 --- a/target/linux/ramips/patches-6.18/003-v6.13-mmc-mtk-sd-Implement-Host-Software-Queue-for-eMMC.patch +++ /dev/null @@ -1,188 +0,0 @@ -From 7e9ddd7d45897b15a64c4a3c88f2f7909bf49749 Mon Sep 17 00:00:00 2001 -From: AngeloGioacchino Del Regno -Date: Mon, 30 Sep 2024 11:01:56 +0200 -Subject: [PATCH] mmc: mtk-sd: Implement Host Software Queue for eMMC and SD - Card - -Add support for Host Software Queue (HSQ) and enable it when the -controller instance does not have Command Queue Engine HW support. - -It was chosen to enable HSQ only for eMMC and SD/MicroSD cards -and not for SDIO as performance improvements are seen only for -the former. - -Performance was measured with a SanDisk Extreme Ultra A2 MicroSD -card in a MediaTek MT8195T Acer Chromebook Spin 513 (CP513-2H), -by running FIO (bs=4k) on an ArchLinux userspace. - -.... Summarizing .... -Random read: +24.28% IOPS, +24.29% BW -Sequential read: +3.14% IOPS, +3.49% BW -Random RW (avg): +50.53% IOPS, +50.68% BW - -Below, more data from the benchmarks. - -Before: - - Random read: IOPS=1643, BW=6574KiB/s - bw ( KiB/s): min= 4578, max= 7440, per=99.95%, avg=6571.55, stdev=74.16, samples=953 - iops : min= 1144, max= 1860, avg=1642.14, stdev=18.54, samples=953 - lat (msec) : 100=0.01%, 250=0.12%, 500=0.38%, 750=97.89%, 1000=1.44%, 2000=0.16% - - Sequential read: IOPS=19.1k, BW=74.4MiB/s - bw ( KiB/s): min=12288, max=118483, per=100.00%, avg=76293.38, stdev=1971.42, samples=956 - iops : min= 3072, max=29620, avg=19072.14, stdev=492.87, samples=956 - lat (msec) : 4=0.01%, 10=0.01%, 20=0.21%, 50=23.95%, 100=75.67%, 250=0.05%, 500=0.03%, 750=0.08% - - Random R/W: read: IOPS=282, BW=1129KiB/s (1156kB/s) write: IOPS=284, BW=1136KiB/s - read bw ( KiB/s): min= 31, max= 3496, per=100.00%, avg=1703.67, stdev=155.42, samples=630 - read iops : min= 7, max= 873, avg=425.22, stdev=38.85, samples=630 - wri bw ( KiB/s): min= 31, max= 3443, per=100.00%, avg=1674.27, stdev=164.23, samples=644 - wri iops : min= 7, max= 860, avg=417.87, stdev=41.03, samples=644 - lat (msec) : 250=0.13%, 500=0.44%, 750=0.84%, 1000=22.29%, 2000=74.01%, >=2000=2.30% - -After: - - Random read: IOPS=2042, BW=8171KiB/s - bw ( KiB/s): min= 4907, max= 9072, per=99.94%, avg=8166.80, stdev=93.77, samples=954 - iops : min= 1226, max= 2268, avg=2040.78, stdev=23.41, samples=954 - lat (msec) : 100=0.03%, 250=0.13%, 500=52.88%, 750=46.64%, 1000=0.32% - - Sequential read: IOPS=19.7k, BW=77.0MiB/s - bw ( KiB/s): min=67980, max=94248, per=100.00%, avg=78894.27, stdev=1475.07, samples=956 - iops : min=16994, max=23562, avg=19722.45, stdev=368.76, samples=956 - lat (msec) : 4=0.01%, 10=0.01%, 20=0.05%, 50=28.78%, 100=71.14%, 250=0.01%, 500=0.02% - - Random R/W: read: IOPS=424, BW=1699KiB/s write: IOPS=428, BW=1714KiB/s - read bw ( KiB/s): min= 228, max= 2856, per=100.00%, avg=1796.60, stdev=112.59, samples=901 - read iops : min= 54, max= 712, avg=447.81, stdev=28.21, samples=901 - wri bw ( KiB/s): min= 28, max= 2904, per=100.00%, avg=1780.11, stdev=128.27, samples=916 - wri iops : min= 4, max= 724, avg=443.69, stdev=32.14, samples=916 - -Signed-off-by: AngeloGioacchino Del Regno -Link: https://lore.kernel.org/r/20240930090156.33537-1-angelogioacchino.delregno@collabora.com -Signed-off-by: Ulf Hansson ---- - drivers/mmc/host/Kconfig | 1 + - drivers/mmc/host/mtk-sd.c | 49 +++++++++++++++++++++++++++++++++++++-- - 2 files changed, 48 insertions(+), 2 deletions(-) - ---- a/drivers/mmc/host/Kconfig -+++ b/drivers/mmc/host/Kconfig -@@ -1009,6 +1009,7 @@ config MMC_MTK - depends on COMMON_CLK - select REGULATOR - select MMC_CQHCI -+ select MMC_HSQ - help - This selects the MediaTek(R) Secure digital and Multimedia card Interface. - If you have a machine with a integrated SD/MMC card reader, say Y or M here. ---- a/drivers/mmc/host/mtk-sd.c -+++ b/drivers/mmc/host/mtk-sd.c -@@ -33,6 +33,7 @@ - #include - - #include "cqhci.h" -+#include "mmc_hsq.h" - - #define MAX_BD_NUM 1024 - #define MSDC_NR_CLOCKS 3 -@@ -475,6 +476,7 @@ struct msdc_host { - bool hs400_tuning; /* hs400 mode online tuning */ - bool internal_cd; /* Use internal card-detect logic */ - bool cqhci; /* support eMMC hw cmdq */ -+ bool hsq_en; /* Host Software Queue is enabled */ - struct msdc_save_para save_para; /* used when gate HCLK */ - struct msdc_tune_para def_tune_para; /* default tune setting */ - struct msdc_tune_para saved_tune_para; /* tune result of CMD21/CMD19 */ -@@ -1171,7 +1173,9 @@ static void msdc_track_cmd_data(struct m - - static void msdc_request_done(struct msdc_host *host, struct mmc_request *mrq) - { -+ struct mmc_host *mmc = mmc_from_priv(host); - unsigned long flags; -+ bool hsq_req_done; - - /* - * No need check the return value of cancel_delayed_work, as only ONE -@@ -1179,6 +1183,27 @@ static void msdc_request_done(struct msd - */ - cancel_delayed_work(&host->req_timeout); - -+ /* -+ * If the request was handled from Host Software Queue, there's almost -+ * nothing to do here, and we also don't need to reset mrq as any race -+ * condition would not have any room to happen, since HSQ stores the -+ * "scheduled" mrqs in an internal array of mrq slots anyway. -+ * However, if the controller experienced an error, we still want to -+ * reset it as soon as possible. -+ * -+ * Note that non-HSQ requests will still be happening at times, even -+ * though it is enabled, and that's what is going to reset host->mrq. -+ * Also, msdc_unprepare_data() is going to be called by HSQ when needed -+ * as HSQ request finalization will eventually call the .post_req() -+ * callback of this driver which, in turn, unprepares the data. -+ */ -+ hsq_req_done = host->hsq_en ? mmc_hsq_finalize_request(mmc, mrq) : false; -+ if (hsq_req_done) { -+ if (host->error) -+ msdc_reset_hw(host); -+ return; -+ } -+ - spin_lock_irqsave(&host->lock, flags); - host->mrq = NULL; - spin_unlock_irqrestore(&host->lock, flags); -@@ -1188,7 +1213,7 @@ static void msdc_request_done(struct msd - msdc_unprepare_data(host, mrq->data); - if (host->error) - msdc_reset_hw(host); -- mmc_request_done(mmc_from_priv(host), mrq); -+ mmc_request_done(mmc, mrq); - if (host->dev_comp->recheck_sdio_irq) - msdc_recheck_sdio_irq(host); - } -@@ -1348,7 +1373,7 @@ static void msdc_ops_request(struct mmc_ - struct msdc_host *host = mmc_priv(mmc); - - host->error = 0; -- WARN_ON(host->mrq); -+ WARN_ON(!host->hsq_en && host->mrq); - host->mrq = mrq; - - if (mrq->data) { -@@ -2925,6 +2950,19 @@ static int msdc_drv_probe(struct platfor - mmc->max_seg_size = 64 * 1024; - /* Reduce CIT to 0x40 that corresponds to 2.35us */ - msdc_cqe_cit_cal(host, 2350); -+ } else if (mmc->caps2 & MMC_CAP2_NO_SDIO) { -+ /* Use HSQ on eMMC/SD (but not on SDIO) if HW CQE not supported */ -+ struct mmc_hsq *hsq = devm_kzalloc(&pdev->dev, sizeof(*hsq), GFP_KERNEL); -+ if (!hsq) { -+ ret = -ENOMEM; -+ goto release; -+ } -+ -+ ret = mmc_hsq_init(hsq, mmc); -+ if (ret) -+ goto release; -+ -+ host->hsq_en = true; - } - - ret = devm_request_irq(&pdev->dev, host->irq, msdc_irq, -@@ -3050,6 +3088,9 @@ static int __maybe_unused msdc_runtime_s - struct mmc_host *mmc = dev_get_drvdata(dev); - struct msdc_host *host = mmc_priv(mmc); - -+ if (host->hsq_en) -+ mmc_hsq_suspend(mmc); -+ - msdc_save_reg(host); - - if (sdio_irq_claimed(mmc)) { -@@ -3080,6 +3121,10 @@ static int __maybe_unused msdc_runtime_r - pinctrl_select_state(host->pinctrl, host->pins_uhs); - enable_irq(host->irq); - } -+ -+ if (host->hsq_en) -+ mmc_hsq_resume(mmc); -+ - return 0; - } - diff --git a/target/linux/ramips/patches-6.18/004-v6.15-dt-bindings-clock-add-clock-definitions-for-Ralink-S.patch b/target/linux/ramips/patches-6.18/004-v6.15-dt-bindings-clock-add-clock-definitions-for-Ralink-S.patch deleted file mode 100644 index 2697234667..0000000000 --- a/target/linux/ramips/patches-6.18/004-v6.15-dt-bindings-clock-add-clock-definitions-for-Ralink-S.patch +++ /dev/null @@ -1,188 +0,0 @@ -From adb2424d0d05506c2f36fcba66101d34f7409e45 Mon Sep 17 00:00:00 2001 -From: Sergio Paracuellos -Date: Mon, 20 Jan 2025 10:21:41 +0100 -Subject: [PATCH] dt-bindings: clock: add clock definitions for Ralink SoCs - -Add clock missing definitions for RT2880, RT305X, RT3352, RT3383, RT5350, -MT7620 and MT76X8 Ralink SoCs. Update bindings to clarify clock depending -on these new introduced constants so consumer nodes can easily use the -correct one in DTS files matching properly what is being used in driver -code (clock IDs are implicitly used there). - -Signed-off-by: Sergio Paracuellos -Reviewed-by: Krzysztof Kozlowski -Acked-by: Stephen Boyd -Signed-off-by: Thomas Bogendoerfer ---- - .../bindings/clock/mediatek,mtmips-sysc.yaml | 11 +- - .../dt-bindings/clock/mediatek,mtmips-sysc.h | 130 ++++++++++++++++++ - 2 files changed, 140 insertions(+), 1 deletion(-) - create mode 100644 include/dt-bindings/clock/mediatek,mtmips-sysc.h - ---- a/Documentation/devicetree/bindings/clock/mediatek,mtmips-sysc.yaml -+++ b/Documentation/devicetree/bindings/clock/mediatek,mtmips-sysc.yaml -@@ -18,6 +18,12 @@ description: | - These SoCs have an XTAL from where the cpu clock is - provided as well as derived clocks for the bus and the peripherals. - -+ Each clock is assigned an identifier and client nodes use this identifier -+ to specify the clock which they consume. -+ -+ All these identifiers could be found in: -+ [1]: . -+ - properties: - compatible: - items: -@@ -38,7 +44,8 @@ properties: - - '#clock-cells': - description: -- The first cell indicates the clock number. -+ The first cell indicates the clock number, see [1] for available -+ clocks. - const: 1 - - '#reset-cells': -@@ -56,6 +63,8 @@ additionalProperties: false - - examples: - - | -+ #include -+ - syscon@0 { - compatible = "ralink,rt5350-sysc", "syscon"; - reg = <0x0 0x100>; ---- /dev/null -+++ b/include/dt-bindings/clock/mediatek,mtmips-sysc.h -@@ -0,0 +1,130 @@ -+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ -+/* -+ * Author: Sergio Paracuellos -+ */ -+ -+#ifndef _DT_BINDINGS_CLK_MTMIPS_H -+#define _DT_BINDINGS_CLK_MTMIPS_H -+ -+/* Ralink RT-2880 clocks */ -+ -+#define RT2880_CLK_XTAL 0 -+#define RT2880_CLK_CPU 1 -+#define RT2880_CLK_BUS 2 -+#define RT2880_CLK_TIMER 3 -+#define RT2880_CLK_WATCHDOG 4 -+#define RT2880_CLK_UART 5 -+#define RT2880_CLK_I2C 6 -+#define RT2880_CLK_UARTLITE 7 -+#define RT2880_CLK_ETHERNET 8 -+#define RT2880_CLK_WMAC 9 -+ -+/* Ralink RT-305X clocks */ -+ -+#define RT305X_CLK_XTAL 0 -+#define RT305X_CLK_CPU 1 -+#define RT305X_CLK_BUS 2 -+#define RT305X_CLK_TIMER 3 -+#define RT305X_CLK_WATCHDOG 4 -+#define RT305X_CLK_UART 5 -+#define RT305X_CLK_I2C 6 -+#define RT305X_CLK_I2S 7 -+#define RT305X_CLK_SPI1 8 -+#define RT305X_CLK_SPI2 9 -+#define RT305X_CLK_UARTLITE 10 -+#define RT305X_CLK_ETHERNET 11 -+#define RT305X_CLK_WMAC 12 -+ -+/* Ralink RT-3352 clocks */ -+ -+#define RT3352_CLK_XTAL 0 -+#define RT3352_CLK_CPU 1 -+#define RT3352_CLK_PERIPH 2 -+#define RT3352_CLK_BUS 3 -+#define RT3352_CLK_TIMER 4 -+#define RT3352_CLK_WATCHDOG 5 -+#define RT3352_CLK_UART 6 -+#define RT3352_CLK_I2C 7 -+#define RT3352_CLK_I2S 8 -+#define RT3352_CLK_SPI1 9 -+#define RT3352_CLK_SPI2 10 -+#define RT3352_CLK_UARTLITE 11 -+#define RT3352_CLK_ETHERNET 12 -+#define RT3352_CLK_WMAC 13 -+ -+/* Ralink RT-3883 clocks */ -+ -+#define RT3883_CLK_XTAL 0 -+#define RT3883_CLK_CPU 1 -+#define RT3883_CLK_BUS 2 -+#define RT3883_CLK_PERIPH 3 -+#define RT3883_CLK_TIMER 4 -+#define RT3883_CLK_WATCHDOG 5 -+#define RT3883_CLK_UART 6 -+#define RT3883_CLK_I2C 7 -+#define RT3883_CLK_I2S 8 -+#define RT3883_CLK_SPI1 9 -+#define RT3883_CLK_SPI2 10 -+#define RT3883_CLK_UARTLITE 11 -+#define RT3883_CLK_ETHERNET 12 -+#define RT3883_CLK_WMAC 13 -+ -+/* Ralink RT-5350 clocks */ -+ -+#define RT5350_CLK_XTAL 0 -+#define RT5350_CLK_CPU 1 -+#define RT5350_CLK_BUS 2 -+#define RT5350_CLK_PERIPH 3 -+#define RT5350_CLK_TIMER 4 -+#define RT5350_CLK_WATCHDOG 5 -+#define RT5350_CLK_UART 6 -+#define RT5350_CLK_I2C 7 -+#define RT5350_CLK_I2S 8 -+#define RT5350_CLK_SPI1 9 -+#define RT5350_CLK_SPI2 10 -+#define RT5350_CLK_UARTLITE 11 -+#define RT5350_CLK_ETHERNET 12 -+#define RT5350_CLK_WMAC 13 -+ -+/* Ralink MT-7620 clocks */ -+ -+#define MT7620_CLK_XTAL 0 -+#define MT7620_CLK_PLL 1 -+#define MT7620_CLK_CPU 2 -+#define MT7620_CLK_PERIPH 3 -+#define MT7620_CLK_BUS 4 -+#define MT7620_CLK_BBPPLL 5 -+#define MT7620_CLK_SDHC 6 -+#define MT7620_CLK_TIMER 7 -+#define MT7620_CLK_WATCHDOG 8 -+#define MT7620_CLK_UART 9 -+#define MT7620_CLK_I2C 10 -+#define MT7620_CLK_I2S 11 -+#define MT7620_CLK_SPI1 12 -+#define MT7620_CLK_SPI2 13 -+#define MT7620_CLK_UARTLITE 14 -+#define MT7620_CLK_MMC 15 -+#define MT7620_CLK_WMAC 16 -+ -+/* Ralink MT-76X8 clocks */ -+ -+#define MT76X8_CLK_XTAL 0 -+#define MT76X8_CLK_CPU 1 -+#define MT76X8_CLK_BBPPLL 2 -+#define MT76X8_CLK_PCMI2S 3 -+#define MT76X8_CLK_PERIPH 4 -+#define MT76X8_CLK_BUS 5 -+#define MT76X8_CLK_SDHC 6 -+#define MT76X8_CLK_TIMER 7 -+#define MT76X8_CLK_WATCHDOG 8 -+#define MT76X8_CLK_I2C 9 -+#define MT76X8_CLK_I2S 10 -+#define MT76X8_CLK_SPI1 11 -+#define MT76X8_CLK_SPI2 12 -+#define MT76X8_CLK_UART0 13 -+#define MT76X8_CLK_UART1 14 -+#define MT76X8_CLK_UART2 15 -+#define MT76X8_CLK_MMC 16 -+#define MT76X8_CLK_WMAC 17 -+ -+#endif /* _DT_BINDINGS_CLK_MTMIPS_H */ diff --git a/target/linux/ramips/patches-6.18/860-ramips-add-eip93-driver.patch b/target/linux/ramips/patches-6.18/860-ramips-add-eip93-driver.patch deleted file mode 100644 index f41063845f..0000000000 --- a/target/linux/ramips/patches-6.18/860-ramips-add-eip93-driver.patch +++ /dev/null @@ -1,3273 +0,0 @@ ---- /dev/null -+++ b/drivers/crypto/mtk-eip93/Kconfig -@@ -0,0 +1,64 @@ -+# SPDX-License-Identifier: GPL-2.0 -+config CRYPTO_DEV_EIP93_SKCIPHER -+ tristate -+ -+config CRYPTO_DEV_EIP93_HMAC -+ tristate -+ -+config CRYPTO_DEV_EIP93 -+ tristate "Support for EIP93 crypto HW accelerators" -+ depends on SOC_MT7621 || COMPILE_TEST -+ help -+ EIP93 have various crypto HW accelerators. Select this if -+ you want to use the EIP93 modules for any of the crypto algorithms. -+ -+if CRYPTO_DEV_EIP93 -+ -+config CRYPTO_DEV_EIP93_AES -+ bool "Register AES algorithm implementations with the Crypto API" -+ default y -+ select CRYPTO_DEV_EIP93_SKCIPHER -+ select CRYPTO_LIB_AES -+ select CRYPTO_SKCIPHER -+ help -+ Selecting this will offload AES - ECB, CBC and CTR crypto -+ to the EIP-93 crypto engine. -+ -+config CRYPTO_DEV_EIP93_DES -+ bool "Register legacy DES / 3DES algorithm with the Crypto API" -+ default y -+ select CRYPTO_DEV_EIP93_SKCIPHER -+ select CRYPTO_LIB_DES -+ select CRYPTO_SKCIPHER -+ help -+ Selecting this will offload DES and 3DES ECB and CBC -+ crypto to the EIP-93 crypto engine. -+ -+config CRYPTO_DEV_EIP93_AEAD -+ bool "Register AEAD algorithm with the Crypto API" -+ default y -+ select CRYPTO_DEV_EIP93_HMAC -+ select CRYPTO_AEAD -+ select CRYPTO_AUTHENC -+ select CRYPTO_MD5 -+ select CRYPTO_SHA1 -+ select CRYPTO_SHA256 -+ help -+ Selecting this will offload AEAD authenc(hmac(x), cipher(y)) -+ crypto to the EIP-93 crypto engine. -+ -+config CRYPTO_DEV_EIP93_GENERIC_SW_MAX_LEN -+ int "Max skcipher software fallback length" -+ default 256 -+ help -+ Max length of crypt request which -+ will fallback to software crypt of skcipher *except* AES-128. -+ -+config CRYPTO_DEV_EIP93_AES_128_SW_MAX_LEN -+ int "Max AES-128 skcipher software fallback length" -+ default 512 -+ help -+ Max length of crypt request which -+ will fallback to software crypt of AES-128 skcipher. -+ -+endif ---- /dev/null -+++ b/drivers/crypto/mtk-eip93/Makefile -@@ -0,0 +1,7 @@ -+obj-$(CONFIG_CRYPTO_DEV_EIP93) += crypto-hw-eip93.o -+ -+crypto-hw-eip93-y += eip93-main.o eip93-common.o -+ -+crypto-hw-eip93-$(CONFIG_CRYPTO_DEV_EIP93_SKCIPHER) += eip93-cipher.o -+crypto-hw-eip93-$(CONFIG_CRYPTO_DEV_EIP93_AEAD) += eip93-aead.o -+ ---- /dev/null -+++ b/drivers/crypto/mtk-eip93/eip93-aead.c -@@ -0,0 +1,768 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2019 - 2021 -+ * -+ * Richard van Schagen -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) -+#include -+#endif -+ -+#include -+#include -+ -+#include "eip93-aead.h" -+#include "eip93-cipher.h" -+#include "eip93-common.h" -+#include "eip93-regs.h" -+ -+void mtk_aead_handle_result(struct crypto_async_request *async, int err) -+{ -+ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(async->tfm); -+ struct mtk_device *mtk = ctx->mtk; -+ struct aead_request *req = aead_request_cast(async); -+ struct mtk_cipher_reqctx *rctx = aead_request_ctx(req); -+ -+ mtk_unmap_dma(mtk, rctx, req->src, req->dst); -+ mtk_handle_result(mtk, rctx, req->iv); -+ -+ if (err == 1) -+ err = -EBADMSG; -+ /* let software handle anti-replay errors */ -+ if (err == 4) -+ err = 0; -+ -+ aead_request_complete(req, err); -+} -+ -+static int mtk_aead_send_req(struct crypto_async_request *async) -+{ -+ struct aead_request *req = aead_request_cast(async); -+ struct mtk_cipher_reqctx *rctx = aead_request_ctx(req); -+ int err; -+ -+ err = check_valid_request(rctx); -+ if (err) { -+ aead_request_complete(req, err); -+ return err; -+ } -+ -+ return mtk_send_req(async, req->iv, rctx); -+} -+ -+/* Crypto aead API functions */ -+static int mtk_aead_cra_init(struct crypto_tfm *tfm) -+{ -+ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(tfm); -+ struct mtk_alg_template *tmpl = container_of(tfm->__crt_alg, -+ struct mtk_alg_template, alg.aead.base); -+ u32 flags = tmpl->flags; -+ char *alg_base; -+ -+ crypto_aead_set_reqsize(__crypto_aead_cast(tfm), -+ sizeof(struct mtk_cipher_reqctx)); -+ -+ ctx->mtk = tmpl->mtk; -+ ctx->in_first = true; -+ ctx->out_first = true; -+ -+ ctx->sa_in = kzalloc(sizeof(struct saRecord_s), GFP_KERNEL); -+ if (!ctx->sa_in) -+ return -ENOMEM; -+ -+ ctx->sa_base_in = dma_map_single(ctx->mtk->dev, ctx->sa_in, -+ sizeof(struct saRecord_s), DMA_TO_DEVICE); -+ -+ ctx->sa_out = kzalloc(sizeof(struct saRecord_s), GFP_KERNEL); -+ if (!ctx->sa_out) -+ return -ENOMEM; -+ -+ ctx->sa_base_out = dma_map_single(ctx->mtk->dev, ctx->sa_out, -+ sizeof(struct saRecord_s), DMA_TO_DEVICE); -+ -+ /* software workaround for now */ -+ if (IS_HASH_MD5(flags)) -+ alg_base = "md5"; -+ if (IS_HASH_SHA1(flags)) -+ alg_base = "sha1"; -+ if (IS_HASH_SHA224(flags)) -+ alg_base = "sha224"; -+ if (IS_HASH_SHA256(flags)) -+ alg_base = "sha256"; -+ -+ ctx->shash = crypto_alloc_shash(alg_base, 0, CRYPTO_ALG_NEED_FALLBACK); -+ -+ if (IS_ERR(ctx->shash)) { -+ dev_err(ctx->mtk->dev, "base driver %s could not be loaded.\n", -+ alg_base); -+ return PTR_ERR(ctx->shash); -+ } -+ -+ return 0; -+} -+ -+static void mtk_aead_cra_exit(struct crypto_tfm *tfm) -+{ -+ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(tfm); -+ -+ if (ctx->shash) -+ crypto_free_shash(ctx->shash); -+ -+ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_in, -+ sizeof(struct saRecord_s), DMA_TO_DEVICE); -+ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_out, -+ sizeof(struct saRecord_s), DMA_TO_DEVICE); -+ kfree(ctx->sa_in); -+ kfree(ctx->sa_out); -+} -+ -+static int mtk_aead_setkey(struct crypto_aead *ctfm, const u8 *key, -+ unsigned int len) -+{ -+ struct crypto_tfm *tfm = crypto_aead_tfm(ctfm); -+ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(tfm); -+ struct mtk_alg_template *tmpl = container_of(tfm->__crt_alg, -+ struct mtk_alg_template, alg.skcipher.base); -+ u32 flags = tmpl->flags; -+ u32 nonce = 0; -+ struct crypto_authenc_keys keys; -+ struct crypto_aes_ctx aes; -+ struct saRecord_s *saRecord = ctx->sa_out; -+ int sa_size = sizeof(struct saRecord_s); -+ int err = -EINVAL; -+ -+ -+ if (crypto_authenc_extractkeys(&keys, key, len)) -+ return err; -+ -+ if (IS_RFC3686(flags)) { -+ if (keys.enckeylen < CTR_RFC3686_NONCE_SIZE) -+ return err; -+ -+ keys.enckeylen -= CTR_RFC3686_NONCE_SIZE; -+ memcpy(&nonce, keys.enckey + keys.enckeylen, -+ CTR_RFC3686_NONCE_SIZE); -+ } -+ -+ switch ((flags & MTK_ALG_MASK)) { -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) -+ case MTK_ALG_DES: -+ err = verify_aead_des_key(ctfm, keys.enckey, keys.enckeylen); -+ break; -+ case MTK_ALG_3DES: -+ if (keys.enckeylen != DES3_EDE_KEY_SIZE) -+ return -EINVAL; -+ -+ err = verify_aead_des3_key(ctfm, keys.enckey, keys.enckeylen); -+ break; -+#endif -+ case MTK_ALG_AES: -+ err = aes_expandkey(&aes, keys.enckey, keys.enckeylen); -+ } -+ if (err) -+ return err; -+ -+ ctx->blksize = crypto_aead_blocksize(ctfm); -+ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_in, sa_size, -+ DMA_TO_DEVICE); -+ -+ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_out, sa_size, -+ DMA_TO_DEVICE); -+ /* Encryption key */ -+ mtk_set_saRecord(saRecord, keys.enckeylen, flags); -+ saRecord->saCmd0.bits.opCode = 1; -+ saRecord->saCmd0.bits.digestLength = ctx->authsize >> 2; -+ -+ memcpy(saRecord->saKey, keys.enckey, keys.enckeylen); -+ ctx->saNonce = nonce; -+ saRecord->saNonce = nonce; -+ -+ /* authentication key */ -+ err = mtk_authenc_setkey(ctx->shash, saRecord, keys.authkey, -+ keys.authkeylen); -+ -+ saRecord->saCmd0.bits.direction = 0; -+ memcpy(ctx->sa_in, saRecord, sa_size); -+ ctx->sa_in->saCmd0.bits.direction = 1; -+ ctx->sa_in->saCmd1.bits.copyDigest = 0; -+ -+ ctx->sa_base_out = dma_map_single(ctx->mtk->dev, ctx->sa_out, sa_size, -+ DMA_TO_DEVICE); -+ ctx->sa_base_in = dma_map_single(ctx->mtk->dev, ctx->sa_in, sa_size, -+ DMA_TO_DEVICE); -+ ctx->in_first = true; -+ ctx->out_first = true; -+ -+ return err; -+} -+ -+static int mtk_aead_setauthsize(struct crypto_aead *ctfm, -+ unsigned int authsize) -+{ -+ struct crypto_tfm *tfm = crypto_aead_tfm(ctfm); -+ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(tfm); -+ -+ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_in, -+ sizeof(struct saRecord_s), DMA_TO_DEVICE); -+ -+ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_out, -+ sizeof(struct saRecord_s), DMA_TO_DEVICE); -+ -+ ctx->authsize = authsize; -+ ctx->sa_in->saCmd0.bits.digestLength = ctx->authsize >> 2; -+ ctx->sa_out->saCmd0.bits.digestLength = ctx->authsize >> 2; -+ -+ ctx->sa_base_out = dma_map_single(ctx->mtk->dev, ctx->sa_out, -+ sizeof(struct saRecord_s), DMA_TO_DEVICE); -+ ctx->sa_base_in = dma_map_single(ctx->mtk->dev, ctx->sa_in, -+ sizeof(struct saRecord_s), DMA_TO_DEVICE); -+ return 0; -+} -+ -+static void mtk_aead_setassoc(struct mtk_crypto_ctx *ctx, -+ struct aead_request *req, bool in) -+{ -+ struct saRecord_s *saRecord; -+ -+ if (in) { -+ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_in, -+ sizeof(struct saRecord_s), DMA_TO_DEVICE); -+ saRecord = ctx->sa_in; -+ saRecord->saCmd1.bits.hashCryptOffset = req->assoclen >> 2; -+ -+ ctx->sa_base_in = dma_map_single(ctx->mtk->dev, ctx->sa_in, -+ sizeof(struct saRecord_s), DMA_TO_DEVICE); -+ ctx->assoclen_in = req->assoclen; -+ } else { -+ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_out, -+ sizeof(struct saRecord_s), DMA_TO_DEVICE); -+ saRecord = ctx->sa_out; -+ saRecord->saCmd1.bits.hashCryptOffset = req->assoclen >> 2; -+ -+ ctx->sa_base_out = dma_map_single(ctx->mtk->dev, ctx->sa_out, -+ sizeof(struct saRecord_s), DMA_TO_DEVICE); -+ ctx->assoclen_out = req->assoclen; -+ } -+} -+ -+static int mtk_aead_crypt(struct aead_request *req) -+{ -+ struct mtk_cipher_reqctx *rctx = aead_request_ctx(req); -+ struct crypto_async_request *async = &req->base; -+ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(req->base.tfm); -+ struct crypto_aead *aead = crypto_aead_reqtfm(req); -+ -+ rctx->textsize = req->cryptlen; -+ rctx->blksize = ctx->blksize; -+ rctx->assoclen = req->assoclen; -+ rctx->authsize = ctx->authsize; -+ rctx->sg_src = req->src; -+ rctx->sg_dst = req->dst; -+ rctx->ivsize = crypto_aead_ivsize(aead); -+ rctx->flags |= MTK_DESC_AEAD; -+ -+ if IS_DECRYPT(rctx->flags) -+ rctx->textsize -= rctx->authsize; -+ -+ return mtk_aead_send_req(async); -+} -+ -+static int mtk_aead_encrypt(struct aead_request *req) -+{ -+ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(req->base.tfm); -+ struct mtk_cipher_reqctx *rctx = aead_request_ctx(req); -+ struct mtk_alg_template *tmpl = container_of(req->base.tfm->__crt_alg, -+ struct mtk_alg_template, alg.aead.base); -+ -+ rctx->flags = tmpl->flags; -+ rctx->flags |= MTK_ENCRYPT; -+ if (ctx->out_first) { -+ mtk_aead_setassoc(ctx, req, false); -+ ctx->out_first = false; -+ } -+ -+ if (req->assoclen != ctx->assoclen_out) { -+ dev_err(ctx->mtk->dev, "Request AAD length error\n"); -+ return -EINVAL; -+ } -+ -+ rctx->saRecord_base = ctx->sa_base_out; -+ -+ return mtk_aead_crypt(req); -+} -+ -+static int mtk_aead_decrypt(struct aead_request *req) -+{ -+ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(req->base.tfm); -+ struct mtk_cipher_reqctx *rctx = aead_request_ctx(req); -+ struct mtk_alg_template *tmpl = container_of(req->base.tfm->__crt_alg, -+ struct mtk_alg_template, alg.aead.base); -+ -+ rctx->flags = tmpl->flags; -+ rctx->flags |= MTK_DECRYPT; -+ if (ctx->in_first) { -+ mtk_aead_setassoc(ctx, req, true); -+ ctx->in_first = false; -+ } -+ -+ if (req->assoclen != ctx->assoclen_in) { -+ dev_err(ctx->mtk->dev, "Request AAD length error\n"); -+ return -EINVAL; -+ } -+ -+ rctx->saRecord_base = ctx->sa_base_in; -+ -+ return mtk_aead_crypt(req); -+} -+ -+/* Available authenc algorithms in this module */ -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) -+struct mtk_alg_template mtk_alg_authenc_hmac_md5_cbc_aes = { -+ .type = MTK_ALG_TYPE_AEAD, -+ .flags = MTK_HASH_HMAC | MTK_HASH_MD5 | MTK_MODE_CBC | MTK_ALG_AES, -+ .alg.aead = { -+ .setkey = mtk_aead_setkey, -+ .encrypt = mtk_aead_encrypt, -+ .decrypt = mtk_aead_decrypt, -+ .ivsize = AES_BLOCK_SIZE, -+ .setauthsize = mtk_aead_setauthsize, -+ .maxauthsize = MD5_DIGEST_SIZE, -+ .base = { -+ .cra_name = "authenc(hmac(md5),cbc(aes))", -+ .cra_driver_name = -+ "authenc(hmac(md5-eip93), cbc(aes-eip93))", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = AES_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0, -+ .cra_init = mtk_aead_cra_init, -+ .cra_exit = mtk_aead_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+ -+struct mtk_alg_template mtk_alg_authenc_hmac_sha1_cbc_aes = { -+ .type = MTK_ALG_TYPE_AEAD, -+ .flags = MTK_HASH_HMAC | MTK_HASH_SHA1 | MTK_MODE_CBC | MTK_ALG_AES, -+ .alg.aead = { -+ .setkey = mtk_aead_setkey, -+ .encrypt = mtk_aead_encrypt, -+ .decrypt = mtk_aead_decrypt, -+ .ivsize = AES_BLOCK_SIZE, -+ .setauthsize = mtk_aead_setauthsize, -+ .maxauthsize = SHA1_DIGEST_SIZE, -+ .base = { -+ .cra_name = "authenc(hmac(sha1),cbc(aes))", -+ .cra_driver_name = -+ "authenc(hmac(sha1-eip93),cbc(aes-eip93))", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = AES_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0, -+ .cra_init = mtk_aead_cra_init, -+ .cra_exit = mtk_aead_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+ -+struct mtk_alg_template mtk_alg_authenc_hmac_sha224_cbc_aes = { -+ .type = MTK_ALG_TYPE_AEAD, -+ .flags = MTK_HASH_HMAC | MTK_HASH_SHA224 | MTK_MODE_CBC | MTK_ALG_AES, -+ .alg.aead = { -+ .setkey = mtk_aead_setkey, -+ .encrypt = mtk_aead_encrypt, -+ .decrypt = mtk_aead_decrypt, -+ .ivsize = AES_BLOCK_SIZE, -+ .setauthsize = mtk_aead_setauthsize, -+ .maxauthsize = SHA224_DIGEST_SIZE, -+ .base = { -+ .cra_name = "authenc(hmac(sha224),cbc(aes))", -+ .cra_driver_name = -+ "authenc(hmac(sha224-eip93),cbc(aes-eip93))", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = AES_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0, -+ .cra_init = mtk_aead_cra_init, -+ .cra_exit = mtk_aead_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+ -+struct mtk_alg_template mtk_alg_authenc_hmac_sha256_cbc_aes = { -+ .type = MTK_ALG_TYPE_AEAD, -+ .flags = MTK_HASH_HMAC | MTK_HASH_SHA256 | MTK_MODE_CBC | MTK_ALG_AES, -+ .alg.aead = { -+ .setkey = mtk_aead_setkey, -+ .encrypt = mtk_aead_encrypt, -+ .decrypt = mtk_aead_decrypt, -+ .ivsize = AES_BLOCK_SIZE, -+ .setauthsize = mtk_aead_setauthsize, -+ .maxauthsize = SHA256_DIGEST_SIZE, -+ .base = { -+ .cra_name = "authenc(hmac(sha256),cbc(aes))", -+ .cra_driver_name = -+ "authenc(hmac(sha256-eip93),cbc(aes-eip93))", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = AES_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0, -+ .cra_init = mtk_aead_cra_init, -+ .cra_exit = mtk_aead_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+ -+struct mtk_alg_template mtk_alg_authenc_hmac_md5_rfc3686_aes = { -+ .type = MTK_ALG_TYPE_AEAD, -+ .flags = MTK_HASH_HMAC | MTK_HASH_MD5 | -+ MTK_MODE_CTR | MTK_MODE_RFC3686 | MTK_ALG_AES, -+ .alg.aead = { -+ .setkey = mtk_aead_setkey, -+ .encrypt = mtk_aead_encrypt, -+ .decrypt = mtk_aead_decrypt, -+ .ivsize = CTR_RFC3686_IV_SIZE, -+ .setauthsize = mtk_aead_setauthsize, -+ .maxauthsize = MD5_DIGEST_SIZE, -+ .base = { -+ .cra_name = "authenc(hmac(md5),rfc3686(ctr(aes)))", -+ .cra_driver_name = -+ "authenc(hmac(md5-eip93),rfc3686(ctr(aes-eip93)))", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = 1, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0, -+ .cra_init = mtk_aead_cra_init, -+ .cra_exit = mtk_aead_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+ -+struct mtk_alg_template mtk_alg_authenc_hmac_sha1_rfc3686_aes = { -+ .type = MTK_ALG_TYPE_AEAD, -+ .flags = MTK_HASH_HMAC | MTK_HASH_SHA1 | -+ MTK_MODE_CTR | MTK_MODE_RFC3686 | MTK_ALG_AES, -+ .alg.aead = { -+ .setkey = mtk_aead_setkey, -+ .encrypt = mtk_aead_encrypt, -+ .decrypt = mtk_aead_decrypt, -+ .ivsize = CTR_RFC3686_IV_SIZE, -+ .setauthsize = mtk_aead_setauthsize, -+ .maxauthsize = SHA1_DIGEST_SIZE, -+ .base = { -+ .cra_name = "authenc(hmac(sha1),rfc3686(ctr(aes)))", -+ .cra_driver_name = -+ "authenc(hmac(sha1-eip93),rfc3686(ctr(aes-eip93)))", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = 1, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0, -+ .cra_init = mtk_aead_cra_init, -+ .cra_exit = mtk_aead_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+ -+struct mtk_alg_template mtk_alg_authenc_hmac_sha224_rfc3686_aes = { -+ .type = MTK_ALG_TYPE_AEAD, -+ .flags = MTK_HASH_HMAC | MTK_HASH_SHA224 | -+ MTK_MODE_CTR | MTK_MODE_RFC3686 | MTK_ALG_AES, -+ .alg.aead = { -+ .setkey = mtk_aead_setkey, -+ .encrypt = mtk_aead_encrypt, -+ .decrypt = mtk_aead_decrypt, -+ .ivsize = CTR_RFC3686_IV_SIZE, -+ .setauthsize = mtk_aead_setauthsize, -+ .maxauthsize = SHA224_DIGEST_SIZE, -+ .base = { -+ .cra_name = "authenc(hmac(sha224),rfc3686(ctr(aes)))", -+ .cra_driver_name = -+ "authenc(hmac(sha224-eip93),rfc3686(ctr(aes-eip93)))", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = 1, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0, -+ .cra_init = mtk_aead_cra_init, -+ .cra_exit = mtk_aead_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+ -+struct mtk_alg_template mtk_alg_authenc_hmac_sha256_rfc3686_aes = { -+ .type = MTK_ALG_TYPE_AEAD, -+ .flags = MTK_HASH_HMAC | MTK_HASH_SHA256 | -+ MTK_MODE_CTR | MTK_MODE_RFC3686 | MTK_ALG_AES, -+ .alg.aead = { -+ .setkey = mtk_aead_setkey, -+ .encrypt = mtk_aead_encrypt, -+ .decrypt = mtk_aead_decrypt, -+ .ivsize = CTR_RFC3686_IV_SIZE, -+ .setauthsize = mtk_aead_setauthsize, -+ .maxauthsize = SHA256_DIGEST_SIZE, -+ .base = { -+ .cra_name = "authenc(hmac(sha256),rfc3686(ctr(aes)))", -+ .cra_driver_name = -+ "authenc(hmac(sha256-eip93),rfc3686(ctr(aes-eip93)))", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = 1, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0, -+ .cra_init = mtk_aead_cra_init, -+ .cra_exit = mtk_aead_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+#endif -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) -+struct mtk_alg_template mtk_alg_authenc_hmac_md5_cbc_des = { -+ .type = MTK_ALG_TYPE_AEAD, -+ .flags = MTK_HASH_HMAC | MTK_HASH_MD5 | MTK_MODE_CBC | MTK_ALG_DES, -+ .alg.aead = { -+ .setkey = mtk_aead_setkey, -+ .encrypt = mtk_aead_encrypt, -+ .decrypt = mtk_aead_decrypt, -+ .ivsize = DES_BLOCK_SIZE, -+ .setauthsize = mtk_aead_setauthsize, -+ .maxauthsize = MD5_DIGEST_SIZE, -+ .base = { -+ .cra_name = "authenc(hmac(md5),cbc(des))", -+ .cra_driver_name = -+ "authenc(hmac(md5-eip93),cbc(des-eip93))", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = DES_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0, -+ .cra_init = mtk_aead_cra_init, -+ .cra_exit = mtk_aead_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+ -+struct mtk_alg_template mtk_alg_authenc_hmac_sha1_cbc_des = { -+ .type = MTK_ALG_TYPE_AEAD, -+ .flags = MTK_HASH_HMAC | MTK_HASH_SHA1 | MTK_MODE_CBC | MTK_ALG_DES, -+ .alg.aead = { -+ .setkey = mtk_aead_setkey, -+ .encrypt = mtk_aead_encrypt, -+ .decrypt = mtk_aead_decrypt, -+ .ivsize = DES_BLOCK_SIZE, -+ .setauthsize = mtk_aead_setauthsize, -+ .maxauthsize = SHA1_DIGEST_SIZE, -+ .base = { -+ .cra_name = "authenc(hmac(sha1),cbc(des))", -+ .cra_driver_name = -+ "authenc(hmac(sha1-eip93),cbc(des-eip93))", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = DES_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0, -+ .cra_init = mtk_aead_cra_init, -+ .cra_exit = mtk_aead_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+ -+struct mtk_alg_template mtk_alg_authenc_hmac_sha224_cbc_des = { -+ .type = MTK_ALG_TYPE_AEAD, -+ .flags = MTK_HASH_HMAC | MTK_HASH_SHA224 | MTK_MODE_CBC | MTK_ALG_DES, -+ .alg.aead = { -+ .setkey = mtk_aead_setkey, -+ .encrypt = mtk_aead_encrypt, -+ .decrypt = mtk_aead_decrypt, -+ .ivsize = DES_BLOCK_SIZE, -+ .setauthsize = mtk_aead_setauthsize, -+ .maxauthsize = SHA224_DIGEST_SIZE, -+ .base = { -+ .cra_name = "authenc(hmac(sha224),cbc(des))", -+ .cra_driver_name = -+ "authenc(hmac(sha224-eip93),cbc(des-eip93))", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = DES_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0, -+ .cra_init = mtk_aead_cra_init, -+ .cra_exit = mtk_aead_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+ -+struct mtk_alg_template mtk_alg_authenc_hmac_sha256_cbc_des = { -+ .type = MTK_ALG_TYPE_AEAD, -+ .flags = MTK_HASH_HMAC | MTK_HASH_SHA256 | MTK_MODE_CBC | MTK_ALG_DES, -+ .alg.aead = { -+ .setkey = mtk_aead_setkey, -+ .encrypt = mtk_aead_encrypt, -+ .decrypt = mtk_aead_decrypt, -+ .ivsize = DES_BLOCK_SIZE, -+ .setauthsize = mtk_aead_setauthsize, -+ .maxauthsize = SHA256_DIGEST_SIZE, -+ .base = { -+ .cra_name = "authenc(hmac(sha256),cbc(des))", -+ .cra_driver_name = -+ "authenc(hmac(sha256-eip93),cbc(des-eip93))", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = DES_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0, -+ .cra_init = mtk_aead_cra_init, -+ .cra_exit = mtk_aead_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+ -+struct mtk_alg_template mtk_alg_authenc_hmac_md5_cbc_des3_ede = { -+ .type = MTK_ALG_TYPE_AEAD, -+ .flags = MTK_HASH_HMAC | MTK_HASH_MD5 | MTK_MODE_CBC | MTK_ALG_3DES, -+ .alg.aead = { -+ .setkey = mtk_aead_setkey, -+ .encrypt = mtk_aead_encrypt, -+ .decrypt = mtk_aead_decrypt, -+ .ivsize = DES3_EDE_BLOCK_SIZE, -+ .setauthsize = mtk_aead_setauthsize, -+ .maxauthsize = MD5_DIGEST_SIZE, -+ .base = { -+ .cra_name = "authenc(hmac(md5),cbc(des3_ede))", -+ .cra_driver_name = -+ "authenc(hmac(md5-eip93),cbc(des3_ede-eip93))", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = DES3_EDE_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0x0, -+ .cra_init = mtk_aead_cra_init, -+ .cra_exit = mtk_aead_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+ -+struct mtk_alg_template mtk_alg_authenc_hmac_sha1_cbc_des3_ede = { -+ .type = MTK_ALG_TYPE_AEAD, -+ .flags = MTK_HASH_HMAC | MTK_HASH_SHA1 | MTK_MODE_CBC | MTK_ALG_3DES, -+ .alg.aead = { -+ .setkey = mtk_aead_setkey, -+ .encrypt = mtk_aead_encrypt, -+ .decrypt = mtk_aead_decrypt, -+ .ivsize = DES3_EDE_BLOCK_SIZE, -+ .setauthsize = mtk_aead_setauthsize, -+ .maxauthsize = SHA1_DIGEST_SIZE, -+ .base = { -+ .cra_name = "authenc(hmac(sha1),cbc(des3_ede))", -+ .cra_driver_name = -+ "authenc(hmac(sha1-eip93),cbc(des3_ede-eip93))", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = DES3_EDE_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0x0, -+ .cra_init = mtk_aead_cra_init, -+ .cra_exit = mtk_aead_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+ -+struct mtk_alg_template mtk_alg_authenc_hmac_sha224_cbc_des3_ede = { -+ .type = MTK_ALG_TYPE_AEAD, -+ .flags = MTK_HASH_HMAC | MTK_HASH_SHA224 | MTK_MODE_CBC | MTK_ALG_3DES, -+ .alg.aead = { -+ .setkey = mtk_aead_setkey, -+ .encrypt = mtk_aead_encrypt, -+ .decrypt = mtk_aead_decrypt, -+ .ivsize = DES3_EDE_BLOCK_SIZE, -+ .setauthsize = mtk_aead_setauthsize, -+ .maxauthsize = SHA224_DIGEST_SIZE, -+ .base = { -+ .cra_name = "authenc(hmac(sha224),cbc(des3_ede))", -+ .cra_driver_name = -+ "authenc(hmac(sha224-eip93),cbc(des3_ede-eip93))", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = DES3_EDE_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0x0, -+ .cra_init = mtk_aead_cra_init, -+ .cra_exit = mtk_aead_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+ -+struct mtk_alg_template mtk_alg_authenc_hmac_sha256_cbc_des3_ede = { -+ .type = MTK_ALG_TYPE_AEAD, -+ .flags = MTK_HASH_HMAC | MTK_HASH_SHA256 | MTK_MODE_CBC | MTK_ALG_3DES, -+ .alg.aead = { -+ .setkey = mtk_aead_setkey, -+ .encrypt = mtk_aead_encrypt, -+ .decrypt = mtk_aead_decrypt, -+ .ivsize = DES3_EDE_BLOCK_SIZE, -+ .setauthsize = mtk_aead_setauthsize, -+ .maxauthsize = SHA256_DIGEST_SIZE, -+ .base = { -+ .cra_name = "authenc(hmac(sha256),cbc(des3_ede))", -+ .cra_driver_name = -+ "authenc(hmac(sha256-eip93),cbc(des3_ede-eip93))", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = DES3_EDE_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0x0, -+ .cra_init = mtk_aead_cra_init, -+ .cra_exit = mtk_aead_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+#endif ---- /dev/null -+++ b/drivers/crypto/mtk-eip93/eip93-aead.h -@@ -0,0 +1,31 @@ -+/* SPDX-License-Identifier: GPL-2.0 -+ * -+ * Copyright (C) 2019 - 2021 -+ * -+ * Richard van Schagen -+ */ -+#ifndef _EIP93_AEAD_H_ -+#define _EIP93_AEAD_H_ -+ -+extern struct mtk_alg_template mtk_alg_authenc_hmac_md5_cbc_aes; -+extern struct mtk_alg_template mtk_alg_authenc_hmac_sha1_cbc_aes; -+extern struct mtk_alg_template mtk_alg_authenc_hmac_sha224_cbc_aes; -+extern struct mtk_alg_template mtk_alg_authenc_hmac_sha256_cbc_aes; -+extern struct mtk_alg_template mtk_alg_authenc_hmac_md5_rfc3686_aes; -+extern struct mtk_alg_template mtk_alg_authenc_hmac_sha1_rfc3686_aes; -+extern struct mtk_alg_template mtk_alg_authenc_hmac_sha224_rfc3686_aes; -+extern struct mtk_alg_template mtk_alg_authenc_hmac_sha256_rfc3686_aes; -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) -+extern struct mtk_alg_template mtk_alg_authenc_hmac_md5_cbc_des; -+extern struct mtk_alg_template mtk_alg_authenc_hmac_sha1_cbc_des; -+extern struct mtk_alg_template mtk_alg_authenc_hmac_sha224_cbc_des; -+extern struct mtk_alg_template mtk_alg_authenc_hmac_sha256_cbc_des; -+extern struct mtk_alg_template mtk_alg_authenc_hmac_md5_cbc_des3_ede; -+extern struct mtk_alg_template mtk_alg_authenc_hmac_sha1_cbc_des3_ede; -+extern struct mtk_alg_template mtk_alg_authenc_hmac_sha224_cbc_des3_ede; -+extern struct mtk_alg_template mtk_alg_authenc_hmac_sha256_cbc_des3_ede; -+#endif -+ -+void mtk_aead_handle_result(struct crypto_async_request *async, int err); -+ -+#endif /* _EIP93_AEAD_H_ */ ---- /dev/null -+++ b/drivers/crypto/mtk-eip93/eip93-aes.h -@@ -0,0 +1,15 @@ -+/* SPDX-License-Identifier: GPL-2.0 -+ * -+ * Copyright (C) 2019 - 2021 -+ * -+ * Richard van Schagen -+ */ -+#ifndef _EIP93_AES_H_ -+#define _EIP93_AES_H_ -+ -+extern struct mtk_alg_template mtk_alg_ecb_aes; -+extern struct mtk_alg_template mtk_alg_cbc_aes; -+extern struct mtk_alg_template mtk_alg_ctr_aes; -+extern struct mtk_alg_template mtk_alg_rfc3686_aes; -+ -+#endif /* _EIP93_AES_H_ */ ---- /dev/null -+++ b/drivers/crypto/mtk-eip93/eip93-cipher.c -@@ -0,0 +1,483 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2019 - 2021 -+ * -+ * Richard van Schagen -+ */ -+ -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) -+#include -+#include -+#endif -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) -+#include -+#endif -+#include -+ -+#include "eip93-cipher.h" -+#include "eip93-common.h" -+#include "eip93-regs.h" -+ -+void mtk_skcipher_handle_result(struct crypto_async_request *async, int err) -+{ -+ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(async->tfm); -+ struct mtk_device *mtk = ctx->mtk; -+ struct skcipher_request *req = skcipher_request_cast(async); -+ struct mtk_cipher_reqctx *rctx = skcipher_request_ctx(req); -+ -+ mtk_unmap_dma(mtk, rctx, req->src, req->dst); -+ mtk_handle_result(mtk, rctx, req->iv); -+ -+ skcipher_request_complete(req, err); -+} -+ -+static inline bool mtk_skcipher_is_fallback(const struct crypto_tfm *tfm, -+ u32 flags) -+{ -+ return (tfm->__crt_alg->cra_flags & CRYPTO_ALG_NEED_FALLBACK) && -+ !IS_RFC3686(flags); -+} -+ -+static int mtk_skcipher_send_req(struct crypto_async_request *async) -+{ -+ struct skcipher_request *req = skcipher_request_cast(async); -+ struct mtk_cipher_reqctx *rctx = skcipher_request_ctx(req); -+ int err; -+ -+ err = check_valid_request(rctx); -+ -+ if (err) { -+ skcipher_request_complete(req, err); -+ return err; -+ } -+ -+ return mtk_send_req(async, req->iv, rctx); -+} -+ -+/* Crypto skcipher API functions */ -+static int mtk_skcipher_cra_init(struct crypto_tfm *tfm) -+{ -+ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(tfm); -+ struct mtk_alg_template *tmpl = container_of(tfm->__crt_alg, -+ struct mtk_alg_template, alg.skcipher.base); -+ bool fallback = mtk_skcipher_is_fallback(tfm, tmpl->flags); -+ -+ if (fallback) { -+ ctx->fallback = crypto_alloc_skcipher( -+ crypto_tfm_alg_name(tfm), 0, CRYPTO_ALG_NEED_FALLBACK); -+ if (IS_ERR(ctx->fallback)) -+ return PTR_ERR(ctx->fallback); -+ } -+ -+ crypto_skcipher_set_reqsize( -+ __crypto_skcipher_cast(tfm), -+ sizeof(struct mtk_cipher_reqctx) + -+ (fallback ? crypto_skcipher_reqsize(ctx->fallback) : -+ 0)); -+ -+ ctx->mtk = tmpl->mtk; -+ -+ ctx->sa_in = kzalloc(sizeof(struct saRecord_s), GFP_KERNEL); -+ if (!ctx->sa_in) -+ return -ENOMEM; -+ -+ ctx->sa_base_in = dma_map_single(ctx->mtk->dev, ctx->sa_in, -+ sizeof(struct saRecord_s), DMA_TO_DEVICE); -+ -+ ctx->sa_out = kzalloc(sizeof(struct saRecord_s), GFP_KERNEL); -+ if (!ctx->sa_out) -+ return -ENOMEM; -+ -+ ctx->sa_base_out = dma_map_single(ctx->mtk->dev, ctx->sa_out, -+ sizeof(struct saRecord_s), DMA_TO_DEVICE); -+ return 0; -+} -+ -+static void mtk_skcipher_cra_exit(struct crypto_tfm *tfm) -+{ -+ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(tfm); -+ -+ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_in, -+ sizeof(struct saRecord_s), DMA_TO_DEVICE); -+ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_out, -+ sizeof(struct saRecord_s), DMA_TO_DEVICE); -+ kfree(ctx->sa_in); -+ kfree(ctx->sa_out); -+ -+ crypto_free_skcipher(ctx->fallback); -+} -+ -+static int mtk_skcipher_setkey(struct crypto_skcipher *ctfm, const u8 *key, -+ unsigned int len) -+{ -+ struct crypto_tfm *tfm = crypto_skcipher_tfm(ctfm); -+ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(tfm); -+ struct mtk_alg_template *tmpl = container_of(tfm->__crt_alg, -+ struct mtk_alg_template, alg.skcipher.base); -+ struct saRecord_s *saRecord = ctx->sa_out; -+ u32 flags = tmpl->flags; -+ u32 nonce = 0; -+ unsigned int keylen = len; -+ int sa_size = sizeof(struct saRecord_s); -+ int err = -EINVAL; -+ -+ if (!key || !keylen) -+ return err; -+ -+ ctx->keylen = keylen; -+ -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) -+ if (IS_RFC3686(flags)) { -+ if (len < CTR_RFC3686_NONCE_SIZE) -+ return err; -+ -+ keylen = len - CTR_RFC3686_NONCE_SIZE; -+ memcpy(&nonce, key + keylen, CTR_RFC3686_NONCE_SIZE); -+ } -+#endif -+ -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) -+ if (flags & MTK_ALG_DES) { -+ ctx->blksize = DES_BLOCK_SIZE; -+ err = verify_skcipher_des_key(ctfm, key); -+ } -+ if (flags & MTK_ALG_3DES) { -+ ctx->blksize = DES3_EDE_BLOCK_SIZE; -+ err = verify_skcipher_des3_key(ctfm, key); -+ } -+#endif -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) -+ if (flags & MTK_ALG_AES) { -+ struct crypto_aes_ctx aes; -+ bool fallback = mtk_skcipher_is_fallback(tfm, flags); -+ -+ if (fallback && !IS_RFC3686(flags)) { -+ err = crypto_skcipher_setkey(ctx->fallback, key, -+ keylen); -+ if (err) -+ return err; -+ } -+ -+ ctx->blksize = AES_BLOCK_SIZE; -+ err = aes_expandkey(&aes, key, keylen); -+ } -+#endif -+ if (err) -+ return err; -+ -+ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_in, sa_size, -+ DMA_TO_DEVICE); -+ -+ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_out, sa_size, -+ DMA_TO_DEVICE); -+ -+ mtk_set_saRecord(saRecord, keylen, flags); -+ -+ memcpy(saRecord->saKey, key, keylen); -+ ctx->saNonce = nonce; -+ saRecord->saNonce = nonce; -+ saRecord->saCmd0.bits.direction = 0; -+ -+ memcpy(ctx->sa_in, saRecord, sa_size); -+ ctx->sa_in->saCmd0.bits.direction = 1; -+ -+ ctx->sa_base_out = dma_map_single(ctx->mtk->dev, ctx->sa_out, sa_size, -+ DMA_TO_DEVICE); -+ -+ ctx->sa_base_in = dma_map_single(ctx->mtk->dev, ctx->sa_in, sa_size, -+ DMA_TO_DEVICE); -+ return err; -+} -+ -+static int mtk_skcipher_crypt(struct skcipher_request *req, bool encrypt) -+{ -+ struct mtk_cipher_reqctx *rctx = skcipher_request_ctx(req); -+ struct crypto_async_request *async = &req->base; -+ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(req->base.tfm); -+ struct crypto_skcipher *skcipher = crypto_skcipher_reqtfm(req); -+ bool fallback = mtk_skcipher_is_fallback(req->base.tfm, rctx->flags); -+ -+ if (!req->cryptlen) -+ return 0; -+ -+ /* -+ * ECB and CBC algorithms require message lengths to be -+ * multiples of block size. -+ */ -+ if (IS_ECB(rctx->flags) || IS_CBC(rctx->flags)) -+ if (!IS_ALIGNED(req->cryptlen, -+ crypto_skcipher_blocksize(skcipher))) -+ return -EINVAL; -+ -+ if (fallback && -+ req->cryptlen <= (AES_KEYSIZE_128 ? -+ CONFIG_CRYPTO_DEV_EIP93_AES_128_SW_MAX_LEN : -+ CONFIG_CRYPTO_DEV_EIP93_GENERIC_SW_MAX_LEN)) { -+ skcipher_request_set_tfm(&rctx->fallback_req, ctx->fallback); -+ skcipher_request_set_callback(&rctx->fallback_req, -+ req->base.flags, -+ req->base.complete, -+ req->base.data); -+ skcipher_request_set_crypt(&rctx->fallback_req, req->src, -+ req->dst, req->cryptlen, req->iv); -+ return encrypt ? crypto_skcipher_encrypt(&rctx->fallback_req) : -+ crypto_skcipher_decrypt(&rctx->fallback_req); -+ } -+ -+ rctx->assoclen = 0; -+ rctx->textsize = req->cryptlen; -+ rctx->authsize = 0; -+ rctx->sg_src = req->src; -+ rctx->sg_dst = req->dst; -+ rctx->ivsize = crypto_skcipher_ivsize(skcipher); -+ rctx->blksize = ctx->blksize; -+ rctx->flags |= MTK_DESC_SKCIPHER; -+ if (!IS_ECB(rctx->flags)) -+ rctx->flags |= MTK_DESC_DMA_IV; -+ -+ return mtk_skcipher_send_req(async); -+} -+ -+static int mtk_skcipher_encrypt(struct skcipher_request *req) -+{ -+ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(req->base.tfm); -+ struct mtk_cipher_reqctx *rctx = skcipher_request_ctx(req); -+ struct mtk_alg_template *tmpl = container_of(req->base.tfm->__crt_alg, -+ struct mtk_alg_template, alg.skcipher.base); -+ -+ rctx->flags = tmpl->flags; -+ rctx->flags |= MTK_ENCRYPT; -+ rctx->saRecord_base = ctx->sa_base_out; -+ -+ return mtk_skcipher_crypt(req, true); -+} -+ -+static int mtk_skcipher_decrypt(struct skcipher_request *req) -+{ -+ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(req->base.tfm); -+ struct mtk_cipher_reqctx *rctx = skcipher_request_ctx(req); -+ struct mtk_alg_template *tmpl = container_of(req->base.tfm->__crt_alg, -+ struct mtk_alg_template, alg.skcipher.base); -+ -+ rctx->flags = tmpl->flags; -+ rctx->flags |= MTK_DECRYPT; -+ rctx->saRecord_base = ctx->sa_base_in; -+ -+ return mtk_skcipher_crypt(req, false); -+} -+ -+/* Available algorithms in this module */ -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) -+struct mtk_alg_template mtk_alg_ecb_aes = { -+ .type = MTK_ALG_TYPE_SKCIPHER, -+ .flags = MTK_MODE_ECB | MTK_ALG_AES, -+ .alg.skcipher = { -+ .setkey = mtk_skcipher_setkey, -+ .encrypt = mtk_skcipher_encrypt, -+ .decrypt = mtk_skcipher_decrypt, -+ .min_keysize = AES_MIN_KEY_SIZE, -+ .max_keysize = AES_MAX_KEY_SIZE, -+ .ivsize = 0, -+ .base = { -+ .cra_name = "ecb(aes)", -+ .cra_driver_name = "ecb(aes-eip93)", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_NEED_FALLBACK | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = AES_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0xf, -+ .cra_init = mtk_skcipher_cra_init, -+ .cra_exit = mtk_skcipher_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+ -+struct mtk_alg_template mtk_alg_cbc_aes = { -+ .type = MTK_ALG_TYPE_SKCIPHER, -+ .flags = MTK_MODE_CBC | MTK_ALG_AES, -+ .alg.skcipher = { -+ .setkey = mtk_skcipher_setkey, -+ .encrypt = mtk_skcipher_encrypt, -+ .decrypt = mtk_skcipher_decrypt, -+ .min_keysize = AES_MIN_KEY_SIZE, -+ .max_keysize = AES_MAX_KEY_SIZE, -+ .ivsize = AES_BLOCK_SIZE, -+ .base = { -+ .cra_name = "cbc(aes)", -+ .cra_driver_name = "cbc(aes-eip93)", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_NEED_FALLBACK | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = AES_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0xf, -+ .cra_init = mtk_skcipher_cra_init, -+ .cra_exit = mtk_skcipher_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+ -+struct mtk_alg_template mtk_alg_ctr_aes = { -+ .type = MTK_ALG_TYPE_SKCIPHER, -+ .flags = MTK_MODE_CTR | MTK_ALG_AES, -+ .alg.skcipher = { -+ .setkey = mtk_skcipher_setkey, -+ .encrypt = mtk_skcipher_encrypt, -+ .decrypt = mtk_skcipher_decrypt, -+ .min_keysize = AES_MIN_KEY_SIZE, -+ .max_keysize = AES_MAX_KEY_SIZE, -+ .ivsize = AES_BLOCK_SIZE, -+ .base = { -+ .cra_name = "ctr(aes)", -+ .cra_driver_name = "ctr(aes-eip93)", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_NEED_FALLBACK | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = 1, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0xf, -+ .cra_init = mtk_skcipher_cra_init, -+ .cra_exit = mtk_skcipher_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+ -+struct mtk_alg_template mtk_alg_rfc3686_aes = { -+ .type = MTK_ALG_TYPE_SKCIPHER, -+ .flags = MTK_MODE_CTR | MTK_MODE_RFC3686 | MTK_ALG_AES, -+ .alg.skcipher = { -+ .setkey = mtk_skcipher_setkey, -+ .encrypt = mtk_skcipher_encrypt, -+ .decrypt = mtk_skcipher_decrypt, -+ .min_keysize = AES_MIN_KEY_SIZE + CTR_RFC3686_NONCE_SIZE, -+ .max_keysize = AES_MAX_KEY_SIZE + CTR_RFC3686_NONCE_SIZE, -+ .ivsize = CTR_RFC3686_IV_SIZE, -+ .base = { -+ .cra_name = "rfc3686(ctr(aes))", -+ .cra_driver_name = "rfc3686(ctr(aes-eip93))", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_NEED_FALLBACK | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = 1, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0xf, -+ .cra_init = mtk_skcipher_cra_init, -+ .cra_exit = mtk_skcipher_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+#endif -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) -+struct mtk_alg_template mtk_alg_ecb_des = { -+ .type = MTK_ALG_TYPE_SKCIPHER, -+ .flags = MTK_MODE_ECB | MTK_ALG_DES, -+ .alg.skcipher = { -+ .setkey = mtk_skcipher_setkey, -+ .encrypt = mtk_skcipher_encrypt, -+ .decrypt = mtk_skcipher_decrypt, -+ .min_keysize = DES_KEY_SIZE, -+ .max_keysize = DES_KEY_SIZE, -+ .ivsize = 0, -+ .base = { -+ .cra_name = "ecb(des)", -+ .cra_driver_name = "ebc(des-eip93)", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = DES_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0, -+ .cra_init = mtk_skcipher_cra_init, -+ .cra_exit = mtk_skcipher_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+ -+struct mtk_alg_template mtk_alg_cbc_des = { -+ .type = MTK_ALG_TYPE_SKCIPHER, -+ .flags = MTK_MODE_CBC | MTK_ALG_DES, -+ .alg.skcipher = { -+ .setkey = mtk_skcipher_setkey, -+ .encrypt = mtk_skcipher_encrypt, -+ .decrypt = mtk_skcipher_decrypt, -+ .min_keysize = DES_KEY_SIZE, -+ .max_keysize = DES_KEY_SIZE, -+ .ivsize = DES_BLOCK_SIZE, -+ .base = { -+ .cra_name = "cbc(des)", -+ .cra_driver_name = "cbc(des-eip93)", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = DES_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0, -+ .cra_init = mtk_skcipher_cra_init, -+ .cra_exit = mtk_skcipher_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+ -+struct mtk_alg_template mtk_alg_ecb_des3_ede = { -+ .type = MTK_ALG_TYPE_SKCIPHER, -+ .flags = MTK_MODE_ECB | MTK_ALG_3DES, -+ .alg.skcipher = { -+ .setkey = mtk_skcipher_setkey, -+ .encrypt = mtk_skcipher_encrypt, -+ .decrypt = mtk_skcipher_decrypt, -+ .min_keysize = DES3_EDE_KEY_SIZE, -+ .max_keysize = DES3_EDE_KEY_SIZE, -+ .ivsize = 0, -+ .base = { -+ .cra_name = "ecb(des3_ede)", -+ .cra_driver_name = "ecb(des3_ede-eip93)", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = DES3_EDE_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0, -+ .cra_init = mtk_skcipher_cra_init, -+ .cra_exit = mtk_skcipher_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+ -+struct mtk_alg_template mtk_alg_cbc_des3_ede = { -+ .type = MTK_ALG_TYPE_SKCIPHER, -+ .flags = MTK_MODE_CBC | MTK_ALG_3DES, -+ .alg.skcipher = { -+ .setkey = mtk_skcipher_setkey, -+ .encrypt = mtk_skcipher_encrypt, -+ .decrypt = mtk_skcipher_decrypt, -+ .min_keysize = DES3_EDE_KEY_SIZE, -+ .max_keysize = DES3_EDE_KEY_SIZE, -+ .ivsize = DES3_EDE_BLOCK_SIZE, -+ .base = { -+ .cra_name = "cbc(des3_ede)", -+ .cra_driver_name = "cbc(des3_ede-eip93)", -+ .cra_priority = MTK_CRA_PRIORITY, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_KERN_DRIVER_ONLY, -+ .cra_blocksize = DES3_EDE_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), -+ .cra_alignmask = 0, -+ .cra_init = mtk_skcipher_cra_init, -+ .cra_exit = mtk_skcipher_cra_exit, -+ .cra_module = THIS_MODULE, -+ }, -+ }, -+}; -+#endif ---- /dev/null -+++ b/drivers/crypto/mtk-eip93/eip93-cipher.h -@@ -0,0 +1,66 @@ -+/* SPDX-License-Identifier: GPL-2.0 -+ * -+ * Copyright (C) 2019 - 2021 -+ * -+ * Richard van Schagen -+ */ -+#ifndef _EIP93_CIPHER_H_ -+#define _EIP93_CIPHER_H_ -+ -+#include "eip93-main.h" -+ -+struct mtk_crypto_ctx { -+ struct mtk_device *mtk; -+ struct saRecord_s *sa_in; -+ dma_addr_t sa_base_in; -+ struct saRecord_s *sa_out; -+ dma_addr_t sa_base_out; -+ uint32_t saNonce; -+ int blksize; -+ /* AEAD specific */ -+ unsigned int authsize; -+ unsigned int assoclen_in; -+ unsigned int assoclen_out; -+ bool in_first; -+ bool out_first; -+ struct crypto_shash *shash; -+ unsigned int keylen; -+ struct crypto_skcipher *fallback; -+}; -+ -+struct mtk_cipher_reqctx { -+ unsigned long flags; -+ unsigned int blksize; -+ unsigned int ivsize; -+ unsigned int textsize; -+ unsigned int assoclen; -+ unsigned int authsize; -+ dma_addr_t saRecord_base; -+ struct saState_s *saState; -+ dma_addr_t saState_base; -+ uint32_t saState_idx; -+ struct eip93_descriptor_s *cdesc; -+ struct scatterlist *sg_src; -+ struct scatterlist *sg_dst; -+ int src_nents; -+ int dst_nents; -+ struct saState_s *saState_ctr; -+ dma_addr_t saState_base_ctr; -+ uint32_t saState_ctr_idx; -+ struct skcipher_request fallback_req; // keep at the end -+}; -+ -+int check_valid_request(struct mtk_cipher_reqctx *rctx); -+ -+void mtk_unmap_dma(struct mtk_device *mtk, struct mtk_cipher_reqctx *rctx, -+ struct scatterlist *reqsrc, struct scatterlist *reqdst); -+ -+void mtk_skcipher_handle_result(struct crypto_async_request *async, int err); -+ -+int mtk_send_req(struct crypto_async_request *async, -+ const u8 *reqiv, struct mtk_cipher_reqctx *rctx); -+ -+void mtk_handle_result(struct mtk_device *mtk, struct mtk_cipher_reqctx *rctx, -+ u8 *reqiv); -+ -+#endif /* _EIP93_CIPHER_H_ */ ---- /dev/null -+++ b/drivers/crypto/mtk-eip93/eip93-common.c -@@ -0,0 +1,749 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2019 - 2021 -+ * -+ * Richard van Schagen -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "eip93-cipher.h" -+#include "eip93-common.h" -+#include "eip93-main.h" -+#include "eip93-regs.h" -+ -+inline void *mtk_ring_next_wptr(struct mtk_device *mtk, -+ struct mtk_desc_ring *ring) -+{ -+ void *ptr = ring->write; -+ -+ if ((ring->write == ring->read - ring->offset) || -+ (ring->read == ring->base && ring->write == ring->base_end)) -+ return ERR_PTR(-ENOMEM); -+ -+ if (ring->write == ring->base_end) -+ ring->write = ring->base; -+ else -+ ring->write += ring->offset; -+ -+ return ptr; -+} -+ -+inline void *mtk_ring_next_rptr(struct mtk_device *mtk, -+ struct mtk_desc_ring *ring) -+{ -+ void *ptr = ring->read; -+ -+ if (ring->write == ring->read) -+ return ERR_PTR(-ENOENT); -+ -+ if (ring->read == ring->base_end) -+ ring->read = ring->base; -+ else -+ ring->read += ring->offset; -+ -+ return ptr; -+} -+ -+inline int mtk_put_descriptor(struct mtk_device *mtk, -+ struct eip93_descriptor_s *desc) -+{ -+ struct eip93_descriptor_s *cdesc; -+ struct eip93_descriptor_s *rdesc; -+ unsigned long irqflags; -+ -+ spin_lock_irqsave(&mtk->ring->write_lock, irqflags); -+ -+ rdesc = mtk_ring_next_wptr(mtk, &mtk->ring->rdr); -+ -+ if (IS_ERR(rdesc)) { -+ spin_unlock_irqrestore(&mtk->ring->write_lock, irqflags); -+ return -ENOENT; -+ } -+ -+ cdesc = mtk_ring_next_wptr(mtk, &mtk->ring->cdr); -+ -+ if (IS_ERR(cdesc)) { -+ spin_unlock_irqrestore(&mtk->ring->write_lock, irqflags); -+ return -ENOENT; -+ } -+ -+ memset(rdesc, 0, sizeof(struct eip93_descriptor_s)); -+ memcpy(cdesc, desc, sizeof(struct eip93_descriptor_s)); -+ -+ atomic_dec(&mtk->ring->free); -+ spin_unlock_irqrestore(&mtk->ring->write_lock, irqflags); -+ -+ return 0; -+} -+ -+inline void *mtk_get_descriptor(struct mtk_device *mtk) -+{ -+ struct eip93_descriptor_s *cdesc; -+ void *ptr; -+ unsigned long irqflags; -+ -+ spin_lock_irqsave(&mtk->ring->read_lock, irqflags); -+ -+ cdesc = mtk_ring_next_rptr(mtk, &mtk->ring->cdr); -+ -+ if (IS_ERR(cdesc)) { -+ spin_unlock_irqrestore(&mtk->ring->read_lock, irqflags); -+ return ERR_PTR(-ENOENT); -+ } -+ -+ memset(cdesc, 0, sizeof(struct eip93_descriptor_s)); -+ -+ ptr = mtk_ring_next_rptr(mtk, &mtk->ring->rdr); -+ if (IS_ERR(ptr)) { -+ spin_unlock_irqrestore(&mtk->ring->read_lock, irqflags); -+ return ERR_PTR(-ENOENT); -+ } -+ -+ atomic_inc(&mtk->ring->free); -+ spin_unlock_irqrestore(&mtk->ring->read_lock, irqflags); -+ -+ return ptr; -+} -+ -+inline int mtk_get_free_saState(struct mtk_device *mtk) -+{ -+ struct mtk_state_pool *saState_pool; -+ int i; -+ -+ for (i = 0; i < MTK_RING_SIZE; i++) { -+ saState_pool = &mtk->ring->saState_pool[i]; -+ if (saState_pool->in_use == false) { -+ saState_pool->in_use = true; -+ return i; -+ } -+ -+ } -+ -+ return -ENOENT; -+} -+ -+static inline void mtk_free_sg_copy(const int len, struct scatterlist **sg) -+{ -+ if (!*sg || !len) -+ return; -+ -+ free_pages((unsigned long)sg_virt(*sg), get_order(len)); -+ kfree(*sg); -+ *sg = NULL; -+} -+ -+static inline int mtk_make_sg_copy(struct scatterlist *src, -+ struct scatterlist **dst, -+ const uint32_t len, const bool copy) -+{ -+ void *pages; -+ -+ *dst = kmalloc(sizeof(**dst), GFP_KERNEL); -+ if (!*dst) -+ return -ENOMEM; -+ -+ -+ pages = (void *)__get_free_pages(GFP_KERNEL | GFP_DMA, -+ get_order(len)); -+ -+ if (!pages) { -+ kfree(*dst); -+ *dst = NULL; -+ return -ENOMEM; -+ } -+ -+ sg_init_table(*dst, 1); -+ sg_set_buf(*dst, pages, len); -+ -+ /* copy only as requested */ -+ if (copy) -+ sg_copy_to_buffer(src, sg_nents(src), pages, len); -+ -+ return 0; -+} -+ -+static inline bool mtk_is_sg_aligned(struct scatterlist *sg, u32 len, -+ const int blksize) -+{ -+ int nents; -+ -+ for (nents = 0; sg; sg = sg_next(sg), ++nents) { -+ if (!IS_ALIGNED(sg->offset, 4)) -+ return false; -+ -+ if (len <= sg->length) { -+ if (!IS_ALIGNED(len, blksize)) -+ return false; -+ -+ return true; -+ } -+ -+ if (!IS_ALIGNED(sg->length, blksize)) -+ return false; -+ -+ len -= sg->length; -+ } -+ return false; -+} -+ -+int check_valid_request(struct mtk_cipher_reqctx *rctx) -+{ -+ struct scatterlist *src = rctx->sg_src; -+ struct scatterlist *dst = rctx->sg_dst; -+ uint32_t src_nents, dst_nents; -+ u32 textsize = rctx->textsize; -+ u32 authsize = rctx->authsize; -+ u32 blksize = rctx->blksize; -+ u32 totlen_src = rctx->assoclen + rctx->textsize; -+ u32 totlen_dst = rctx->assoclen + rctx->textsize; -+ u32 copy_len; -+ bool src_align, dst_align; -+ int err = -EINVAL; -+ -+ if (!IS_CTR(rctx->flags)) { -+ if (!IS_ALIGNED(textsize, blksize)) -+ return err; -+ } -+ -+ if (authsize) { -+ if (IS_ENCRYPT(rctx->flags)) -+ totlen_dst += authsize; -+ else -+ totlen_src += authsize; -+ } -+ -+ src_nents = sg_nents_for_len(src, totlen_src); -+ dst_nents = sg_nents_for_len(dst, totlen_dst); -+ -+ if (src == dst) { -+ src_nents = max(src_nents, dst_nents); -+ dst_nents = src_nents; -+ if (unlikely((totlen_src || totlen_dst) && (src_nents <= 0))) -+ return err; -+ -+ } else { -+ if (unlikely(totlen_src && (src_nents <= 0))) -+ return err; -+ -+ if (unlikely(totlen_dst && (dst_nents <= 0))) -+ return err; -+ } -+ -+ if (authsize) { -+ if (dst_nents == 1 && src_nents == 1) { -+ src_align = mtk_is_sg_aligned(src, totlen_src, blksize); -+ if (src == dst) -+ dst_align = src_align; -+ else -+ dst_align = mtk_is_sg_aligned(dst, -+ totlen_dst, blksize); -+ } else { -+ src_align = false; -+ dst_align = false; -+ } -+ } else { -+ src_align = mtk_is_sg_aligned(src, totlen_src, blksize); -+ if (src == dst) -+ dst_align = src_align; -+ else -+ dst_align = mtk_is_sg_aligned(dst, totlen_dst, blksize); -+ } -+ -+ copy_len = max(totlen_src, totlen_dst); -+ if (!src_align) { -+ err = mtk_make_sg_copy(src, &rctx->sg_src, copy_len, true); -+ if (err) -+ return err; -+ } -+ -+ if (!dst_align) { -+ err = mtk_make_sg_copy(dst, &rctx->sg_dst, copy_len, false); -+ if (err) -+ return err; -+ } -+ -+ rctx->src_nents = sg_nents_for_len(rctx->sg_src, totlen_src); -+ rctx->dst_nents = sg_nents_for_len(rctx->sg_dst, totlen_dst); -+ -+ return 0; -+} -+/* -+ * Set saRecord function: -+ * Even saRecord is set to "0", keep " = 0" for readability. -+ */ -+void mtk_set_saRecord(struct saRecord_s *saRecord, const unsigned int keylen, -+ const u32 flags) -+{ -+ saRecord->saCmd0.bits.ivSource = 2; -+ if (IS_ECB(flags)) -+ saRecord->saCmd0.bits.saveIv = 0; -+ else -+ saRecord->saCmd0.bits.saveIv = 1; -+ -+ saRecord->saCmd0.bits.opGroup = 0; -+ saRecord->saCmd0.bits.opCode = 0; -+ -+ switch ((flags & MTK_ALG_MASK)) { -+ case MTK_ALG_AES: -+ saRecord->saCmd0.bits.cipher = 3; -+ saRecord->saCmd1.bits.aesKeyLen = keylen >> 3; -+ break; -+ case MTK_ALG_3DES: -+ saRecord->saCmd0.bits.cipher = 1; -+ break; -+ case MTK_ALG_DES: -+ saRecord->saCmd0.bits.cipher = 0; -+ break; -+ default: -+ saRecord->saCmd0.bits.cipher = 15; -+ } -+ -+ switch ((flags & MTK_HASH_MASK)) { -+ case MTK_HASH_SHA256: -+ saRecord->saCmd0.bits.hash = 3; -+ break; -+ case MTK_HASH_SHA224: -+ saRecord->saCmd0.bits.hash = 2; -+ break; -+ case MTK_HASH_SHA1: -+ saRecord->saCmd0.bits.hash = 1; -+ break; -+ case MTK_HASH_MD5: -+ saRecord->saCmd0.bits.hash = 0; -+ break; -+ default: -+ saRecord->saCmd0.bits.hash = 15; -+ } -+ -+ saRecord->saCmd0.bits.hdrProc = 0; -+ saRecord->saCmd0.bits.padType = 3; -+ saRecord->saCmd0.bits.extPad = 0; -+ saRecord->saCmd0.bits.scPad = 0; -+ -+ switch ((flags & MTK_MODE_MASK)) { -+ case MTK_MODE_CBC: -+ saRecord->saCmd1.bits.cipherMode = 1; -+ break; -+ case MTK_MODE_CTR: -+ saRecord->saCmd1.bits.cipherMode = 2; -+ break; -+ case MTK_MODE_ECB: -+ saRecord->saCmd1.bits.cipherMode = 0; -+ break; -+ } -+ -+ saRecord->saCmd1.bits.byteOffset = 0; -+ saRecord->saCmd1.bits.hashCryptOffset = 0; -+ saRecord->saCmd0.bits.digestLength = 0; -+ saRecord->saCmd1.bits.copyPayload = 0; -+ -+ if (IS_HMAC(flags)) { -+ saRecord->saCmd1.bits.hmac = 1; -+ saRecord->saCmd1.bits.copyDigest = 1; -+ saRecord->saCmd1.bits.copyHeader = 1; -+ } else { -+ saRecord->saCmd1.bits.hmac = 0; -+ saRecord->saCmd1.bits.copyDigest = 0; -+ saRecord->saCmd1.bits.copyHeader = 0; -+ } -+ -+ saRecord->saCmd1.bits.seqNumCheck = 0; -+ saRecord->saSpi = 0x0; -+ saRecord->saSeqNumMask[0] = 0xFFFFFFFF; -+ saRecord->saSeqNumMask[1] = 0x0; -+} -+ -+/* -+ * Poor mans Scatter/gather function: -+ * Create a Descriptor for every segment to avoid copying buffers. -+ * For performance better to wait for hardware to perform multiple DMA -+ * -+ */ -+static inline int mtk_scatter_combine(struct mtk_device *mtk, -+ struct mtk_cipher_reqctx *rctx, -+ u32 datalen, u32 split, int offsetin) -+{ -+ struct eip93_descriptor_s *cdesc = rctx->cdesc; -+ struct scatterlist *sgsrc = rctx->sg_src; -+ struct scatterlist *sgdst = rctx->sg_dst; -+ unsigned int remainin = sg_dma_len(sgsrc); -+ unsigned int remainout = sg_dma_len(sgdst); -+ dma_addr_t saddr = sg_dma_address(sgsrc); -+ dma_addr_t daddr = sg_dma_address(sgdst); -+ dma_addr_t stateAddr; -+ u32 srcAddr, dstAddr, len, n; -+ bool nextin = false; -+ bool nextout = false; -+ int offsetout = 0; -+ int ndesc_cdr = 0, err; -+ -+ if (IS_ECB(rctx->flags)) -+ rctx->saState_base = 0; -+ -+ if (split < datalen) { -+ stateAddr = rctx->saState_base_ctr; -+ n = split; -+ } else { -+ stateAddr = rctx->saState_base; -+ n = datalen; -+ } -+ -+ do { -+ if (nextin) { -+ sgsrc = sg_next(sgsrc); -+ remainin = sg_dma_len(sgsrc); -+ if (remainin == 0) -+ continue; -+ -+ saddr = sg_dma_address(sgsrc); -+ offsetin = 0; -+ nextin = false; -+ } -+ -+ if (nextout) { -+ sgdst = sg_next(sgdst); -+ remainout = sg_dma_len(sgdst); -+ if (remainout == 0) -+ continue; -+ -+ daddr = sg_dma_address(sgdst); -+ offsetout = 0; -+ nextout = false; -+ } -+ srcAddr = saddr + offsetin; -+ dstAddr = daddr + offsetout; -+ -+ if (remainin == remainout) { -+ len = remainin; -+ if (len > n) { -+ len = n; -+ remainin -= n; -+ remainout -= n; -+ offsetin += n; -+ offsetout += n; -+ } else { -+ nextin = true; -+ nextout = true; -+ } -+ } else if (remainin < remainout) { -+ len = remainin; -+ if (len > n) { -+ len = n; -+ remainin -= n; -+ remainout -= n; -+ offsetin += n; -+ offsetout += n; -+ } else { -+ offsetout += len; -+ remainout -= len; -+ nextin = true; -+ } -+ } else { -+ len = remainout; -+ if (len > n) { -+ len = n; -+ remainin -= n; -+ remainout -= n; -+ offsetin += n; -+ offsetout += n; -+ } else { -+ offsetin += len; -+ remainin -= len; -+ nextout = true; -+ } -+ } -+ n -= len; -+ -+ cdesc->srcAddr = srcAddr; -+ cdesc->dstAddr = dstAddr; -+ cdesc->stateAddr = stateAddr; -+ cdesc->peLength.bits.peReady = 0; -+ cdesc->peLength.bits.byPass = 0; -+ cdesc->peLength.bits.length = len; -+ cdesc->peLength.bits.hostReady = 1; -+ -+ if (n == 0) { -+ n = datalen - split; -+ split = datalen; -+ stateAddr = rctx->saState_base; -+ } -+ -+ if (n == 0) -+ cdesc->userId |= MTK_DESC_LAST; -+ -+ /* Loop - Delay - No need to rollback -+ * Maybe refine by slowing down at MTK_RING_BUSY -+ */ -+again: -+ err = mtk_put_descriptor(mtk, cdesc); -+ if (err) { -+ udelay(500); -+ goto again; -+ } -+ /* Writing new descriptor count starts DMA action */ -+ writel(1, mtk->base + EIP93_REG_PE_CD_COUNT); -+ -+ ndesc_cdr++; -+ } while (n); -+ -+ return -EINPROGRESS; -+} -+ -+int mtk_send_req(struct crypto_async_request *async, -+ const u8 *reqiv, struct mtk_cipher_reqctx *rctx) -+{ -+ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(async->tfm); -+ struct mtk_device *mtk = ctx->mtk; -+ struct scatterlist *src = rctx->sg_src; -+ struct scatterlist *dst = rctx->sg_dst; -+ struct saState_s *saState; -+ struct mtk_state_pool *saState_pool; -+ struct eip93_descriptor_s cdesc; -+ u32 flags = rctx->flags; -+ int idx; -+ int offsetin = 0, err = -ENOMEM; -+ u32 datalen = rctx->assoclen + rctx->textsize; -+ u32 split = datalen; -+ u32 start, end, ctr, blocks; -+ u32 iv[AES_BLOCK_SIZE / sizeof(u32)]; -+ -+ rctx->saState_ctr = NULL; -+ rctx->saState = NULL; -+ -+ if (IS_ECB(flags)) -+ goto skip_iv; -+ -+ memcpy(iv, reqiv, rctx->ivsize); -+ -+ if (!IS_ALIGNED((u32)reqiv, rctx->ivsize) || IS_RFC3686(flags)) { -+ rctx->flags &= ~MTK_DESC_DMA_IV; -+ flags = rctx->flags; -+ } -+ -+ if (IS_DMA_IV(flags)) { -+ rctx->saState = (void *)reqiv; -+ } else { -+ idx = mtk_get_free_saState(mtk); -+ if (idx < 0) -+ goto send_err; -+ saState_pool = &mtk->ring->saState_pool[idx]; -+ rctx->saState_idx = idx; -+ rctx->saState = saState_pool->base; -+ rctx->saState_base = saState_pool->base_dma; -+ memcpy(rctx->saState->stateIv, iv, rctx->ivsize); -+ } -+ -+ saState = rctx->saState; -+ -+ if (IS_RFC3686(flags)) { -+ saState->stateIv[0] = ctx->saNonce; -+ saState->stateIv[1] = iv[0]; -+ saState->stateIv[2] = iv[1]; -+ saState->stateIv[3] = cpu_to_be32(1); -+ } else if (!IS_HMAC(flags) && IS_CTR(flags)) { -+ /* Compute data length. */ -+ blocks = DIV_ROUND_UP(rctx->textsize, AES_BLOCK_SIZE); -+ ctr = be32_to_cpu(iv[3]); -+ /* Check 32bit counter overflow. */ -+ start = ctr; -+ end = start + blocks - 1; -+ if (end < start) { -+ split = AES_BLOCK_SIZE * -start; -+ /* -+ * Increment the counter manually to cope with -+ * the hardware counter overflow. -+ */ -+ iv[3] = 0xffffffff; -+ crypto_inc((u8 *)iv, AES_BLOCK_SIZE); -+ idx = mtk_get_free_saState(mtk); -+ if (idx < 0) -+ goto free_state; -+ saState_pool = &mtk->ring->saState_pool[idx]; -+ rctx->saState_ctr_idx = idx; -+ rctx->saState_ctr = saState_pool->base; -+ rctx->saState_base_ctr = saState_pool->base_dma; -+ -+ memcpy(rctx->saState_ctr->stateIv, reqiv, rctx->ivsize); -+ memcpy(saState->stateIv, iv, rctx->ivsize); -+ } -+ } -+ -+ if (IS_DMA_IV(flags)) { -+ rctx->saState_base = dma_map_single(mtk->dev, (void *)reqiv, -+ rctx->ivsize, DMA_TO_DEVICE); -+ if (dma_mapping_error(mtk->dev, rctx->saState_base)) -+ goto free_state; -+ } -+skip_iv: -+ cdesc.peCrtlStat.bits.hostReady = 1; -+ cdesc.peCrtlStat.bits.prngMode = 0; -+ cdesc.peCrtlStat.bits.hashFinal = 0; -+ cdesc.peCrtlStat.bits.padCrtlStat = 0; -+ cdesc.peCrtlStat.bits.peReady = 0; -+ cdesc.saAddr = rctx->saRecord_base; -+ cdesc.arc4Addr = (uint32_t)async; -+ cdesc.userId = flags; -+ rctx->cdesc = &cdesc; -+ -+ /* map DMA_BIDIRECTIONAL to invalidate cache on destination -+ * implies __dma_cache_wback_inv -+ */ -+ dma_map_sg(mtk->dev, dst, rctx->dst_nents, DMA_BIDIRECTIONAL); -+ if (src != dst) -+ dma_map_sg(mtk->dev, src, rctx->src_nents, DMA_TO_DEVICE); -+ -+ err = mtk_scatter_combine(mtk, rctx, datalen, split, offsetin); -+ -+ return err; -+ -+free_state: -+ if (rctx->saState) { -+ saState_pool = &mtk->ring->saState_pool[rctx->saState_idx]; -+ saState_pool->in_use = false; -+ } -+ -+ if (rctx->saState_ctr) { -+ saState_pool = &mtk->ring->saState_pool[rctx->saState_ctr_idx]; -+ saState_pool->in_use = false; -+ } -+send_err: -+ return err; -+} -+ -+void mtk_unmap_dma(struct mtk_device *mtk, struct mtk_cipher_reqctx *rctx, -+ struct scatterlist *reqsrc, struct scatterlist *reqdst) -+{ -+ u32 len = rctx->assoclen + rctx->textsize; -+ u32 authsize = rctx->authsize; -+ u32 flags = rctx->flags; -+ u32 *otag; -+ int i; -+ -+ if (rctx->sg_src == rctx->sg_dst) { -+ dma_unmap_sg(mtk->dev, rctx->sg_dst, rctx->dst_nents, -+ DMA_BIDIRECTIONAL); -+ goto process_tag; -+ } -+ -+ dma_unmap_sg(mtk->dev, rctx->sg_src, rctx->src_nents, -+ DMA_TO_DEVICE); -+ -+ if (rctx->sg_src != reqsrc) -+ mtk_free_sg_copy(len + rctx->authsize, &rctx->sg_src); -+ -+ dma_unmap_sg(mtk->dev, rctx->sg_dst, rctx->dst_nents, -+ DMA_BIDIRECTIONAL); -+ -+ /* SHA tags need conversion from net-to-host */ -+process_tag: -+ if (IS_DECRYPT(flags)) -+ authsize = 0; -+ -+ if (authsize) { -+ if (!IS_HASH_MD5(flags)) { -+ otag = sg_virt(rctx->sg_dst) + len; -+ for (i = 0; i < (authsize / 4); i++) -+ otag[i] = ntohl(otag[i]); -+ } -+ } -+ -+ if (rctx->sg_dst != reqdst) { -+ sg_copy_from_buffer(reqdst, sg_nents(reqdst), -+ sg_virt(rctx->sg_dst), len + authsize); -+ mtk_free_sg_copy(len + rctx->authsize, &rctx->sg_dst); -+ } -+} -+ -+void mtk_handle_result(struct mtk_device *mtk, struct mtk_cipher_reqctx *rctx, -+ u8 *reqiv) -+{ -+ struct mtk_state_pool *saState_pool; -+ -+ if (IS_DMA_IV(rctx->flags)) -+ dma_unmap_single(mtk->dev, rctx->saState_base, rctx->ivsize, -+ DMA_TO_DEVICE); -+ -+ if (!IS_ECB(rctx->flags)) -+ memcpy(reqiv, rctx->saState->stateIv, rctx->ivsize); -+ -+ if ((rctx->saState) && !(IS_DMA_IV(rctx->flags))) { -+ saState_pool = &mtk->ring->saState_pool[rctx->saState_idx]; -+ saState_pool->in_use = false; -+ } -+ -+ if (rctx->saState_ctr) { -+ saState_pool = &mtk->ring->saState_pool[rctx->saState_ctr_idx]; -+ saState_pool->in_use = false; -+ } -+} -+ -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_HMAC) -+/* basically this is set hmac - key */ -+int mtk_authenc_setkey(struct crypto_shash *cshash, struct saRecord_s *sa, -+ const u8 *authkey, unsigned int authkeylen) -+{ -+ int bs = crypto_shash_blocksize(cshash); -+ int ds = crypto_shash_digestsize(cshash); -+ int ss = crypto_shash_statesize(cshash); -+ u8 *ipad, *opad; -+ unsigned int i, err; -+ -+ SHASH_DESC_ON_STACK(shash, cshash); -+ -+ shash->tfm = cshash; -+ -+ /* auth key -+ * -+ * EIP93 can only authenticate with hash of the key -+ * do software shash until EIP93 hash function complete. -+ */ -+ ipad = kcalloc(2, SHA256_BLOCK_SIZE + ss, GFP_KERNEL); -+ if (!ipad) -+ return -ENOMEM; -+ -+ opad = ipad + SHA256_BLOCK_SIZE + ss; -+ -+ if (authkeylen > bs) { -+ err = crypto_shash_digest(shash, authkey, -+ authkeylen, ipad); -+ if (err) -+ return err; -+ -+ authkeylen = ds; -+ } else -+ memcpy(ipad, authkey, authkeylen); -+ -+ memset(ipad + authkeylen, 0, bs - authkeylen); -+ memcpy(opad, ipad, bs); -+ -+ for (i = 0; i < bs; i++) { -+ ipad[i] ^= HMAC_IPAD_VALUE; -+ opad[i] ^= HMAC_OPAD_VALUE; -+ } -+ -+ err = crypto_shash_init(shash) ?: -+ crypto_shash_update(shash, ipad, bs) ?: -+ crypto_shash_export(shash, ipad) ?: -+ crypto_shash_init(shash) ?: -+ crypto_shash_update(shash, opad, bs) ?: -+ crypto_shash_export(shash, opad); -+ -+ if (err) -+ return err; -+ -+ /* add auth key */ -+ memcpy(&sa->saIDigest, ipad, SHA256_DIGEST_SIZE); -+ memcpy(&sa->saODigest, opad, SHA256_DIGEST_SIZE); -+ -+ kfree(ipad); -+ return 0; -+} -+#endif ---- /dev/null -+++ b/drivers/crypto/mtk-eip93/eip93-common.h -@@ -0,0 +1,28 @@ -+/* SPDX-License-Identifier: GPL-2.0 -+ * -+ * Copyright (C) 2019 - 2021 -+ * -+ * Richard van Schagen -+ */ -+ -+#ifndef _EIP93_COMMON_H_ -+#define _EIP93_COMMON_H_ -+ -+#include "eip93-main.h" -+ -+inline int mtk_put_descriptor(struct mtk_device *mtk, -+ struct eip93_descriptor_s *desc); -+ -+inline void *mtk_get_descriptor(struct mtk_device *mtk); -+ -+inline int mtk_get_free_saState(struct mtk_device *mtk); -+ -+void mtk_set_saRecord(struct saRecord_s *saRecord, const unsigned int keylen, -+ const u32 flags); -+ -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_HMAC) -+int mtk_authenc_setkey(struct crypto_shash *cshash, struct saRecord_s *sa, -+ const u8 *authkey, unsigned int authkeylen); -+#endif -+ -+#endif /* _EIP93_COMMON_H_ */ ---- /dev/null -+++ b/drivers/crypto/mtk-eip93/eip93-des.h -@@ -0,0 +1,15 @@ -+/* SPDX-License-Identifier: GPL-2.0 -+ * -+ * Copyright (C) 2019 - 2021 -+ * -+ * Richard van Schagen -+ */ -+#ifndef _EIP93_DES_H_ -+#define _EIP93_DES_H_ -+ -+extern struct mtk_alg_template mtk_alg_ecb_des; -+extern struct mtk_alg_template mtk_alg_cbc_des; -+extern struct mtk_alg_template mtk_alg_ecb_des3_ede; -+extern struct mtk_alg_template mtk_alg_cbc_des3_ede; -+ -+#endif /* _EIP93_DES_H_ */ ---- /dev/null -+++ b/drivers/crypto/mtk-eip93/eip93-main.c -@@ -0,0 +1,464 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2019 - 2021 -+ * -+ * Richard van Schagen -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "eip93-main.h" -+#include "eip93-regs.h" -+#include "eip93-common.h" -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_SKCIPHER) -+#include "eip93-cipher.h" -+#endif -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) -+#include "eip93-aes.h" -+#endif -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) -+#include "eip93-des.h" -+#endif -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AEAD) -+#include "eip93-aead.h" -+#endif -+ -+static struct mtk_alg_template *mtk_algs[] = { -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) -+ &mtk_alg_ecb_des, -+ &mtk_alg_cbc_des, -+ &mtk_alg_ecb_des3_ede, -+ &mtk_alg_cbc_des3_ede, -+#endif -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) -+ &mtk_alg_ecb_aes, -+ &mtk_alg_cbc_aes, -+ &mtk_alg_ctr_aes, -+ &mtk_alg_rfc3686_aes, -+#endif -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AEAD) -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) -+ &mtk_alg_authenc_hmac_md5_cbc_des, -+ &mtk_alg_authenc_hmac_sha1_cbc_des, -+ &mtk_alg_authenc_hmac_sha224_cbc_des, -+ &mtk_alg_authenc_hmac_sha256_cbc_des, -+ &mtk_alg_authenc_hmac_md5_cbc_des3_ede, -+ &mtk_alg_authenc_hmac_sha1_cbc_des3_ede, -+ &mtk_alg_authenc_hmac_sha224_cbc_des3_ede, -+ &mtk_alg_authenc_hmac_sha256_cbc_des3_ede, -+#endif -+ &mtk_alg_authenc_hmac_md5_cbc_aes, -+ &mtk_alg_authenc_hmac_sha1_cbc_aes, -+ &mtk_alg_authenc_hmac_sha224_cbc_aes, -+ &mtk_alg_authenc_hmac_sha256_cbc_aes, -+ &mtk_alg_authenc_hmac_md5_rfc3686_aes, -+ &mtk_alg_authenc_hmac_sha1_rfc3686_aes, -+ &mtk_alg_authenc_hmac_sha224_rfc3686_aes, -+ &mtk_alg_authenc_hmac_sha256_rfc3686_aes, -+#endif -+}; -+ -+inline void mtk_irq_disable(struct mtk_device *mtk, u32 mask) -+{ -+ __raw_writel(mask, mtk->base + EIP93_REG_MASK_DISABLE); -+} -+ -+inline void mtk_irq_enable(struct mtk_device *mtk, u32 mask) -+{ -+ __raw_writel(mask, mtk->base + EIP93_REG_MASK_ENABLE); -+} -+ -+inline void mtk_irq_clear(struct mtk_device *mtk, u32 mask) -+{ -+ __raw_writel(mask, mtk->base + EIP93_REG_INT_CLR); -+} -+ -+static void mtk_unregister_algs(unsigned int i) -+{ -+ unsigned int j; -+ -+ for (j = 0; j < i; j++) { -+ switch (mtk_algs[j]->type) { -+ case MTK_ALG_TYPE_SKCIPHER: -+ crypto_unregister_skcipher(&mtk_algs[j]->alg.skcipher); -+ break; -+ case MTK_ALG_TYPE_AEAD: -+ crypto_unregister_aead(&mtk_algs[j]->alg.aead); -+ break; -+ } -+ } -+} -+ -+static int mtk_register_algs(struct mtk_device *mtk) -+{ -+ unsigned int i; -+ int err = 0; -+ -+ for (i = 0; i < ARRAY_SIZE(mtk_algs); i++) { -+ mtk_algs[i]->mtk = mtk; -+ -+ switch (mtk_algs[i]->type) { -+ case MTK_ALG_TYPE_SKCIPHER: -+ err = crypto_register_skcipher(&mtk_algs[i]->alg.skcipher); -+ break; -+ case MTK_ALG_TYPE_AEAD: -+ err = crypto_register_aead(&mtk_algs[i]->alg.aead); -+ break; -+ } -+ if (err) -+ goto fail; -+ } -+ -+ return 0; -+ -+fail: -+ mtk_unregister_algs(i); -+ -+ return err; -+} -+ -+static void mtk_handle_result_descriptor(struct mtk_device *mtk) -+{ -+ struct crypto_async_request *async; -+ struct eip93_descriptor_s *rdesc; -+ bool last_entry; -+ u32 flags; -+ int handled, ready, err; -+ union peCrtlStat_w done1; -+ union peLength_w done2; -+ -+get_more: -+ handled = 0; -+ -+ ready = readl(mtk->base + EIP93_REG_PE_RD_COUNT) & GENMASK(10, 0); -+ -+ if (!ready) { -+ mtk_irq_clear(mtk, EIP93_INT_PE_RDRTHRESH_REQ); -+ mtk_irq_enable(mtk, EIP93_INT_PE_RDRTHRESH_REQ); -+ return; -+ } -+ -+ last_entry = false; -+ -+ while (ready) { -+ rdesc = mtk_get_descriptor(mtk); -+ if (IS_ERR(rdesc)) { -+ dev_err(mtk->dev, "Ndesc: %d nreq: %d\n", -+ handled, ready); -+ err = -EIO; -+ break; -+ } -+ /* make sure DMA is finished writing */ -+ do { -+ done1.word = READ_ONCE(rdesc->peCrtlStat.word); -+ done2.word = READ_ONCE(rdesc->peLength.word); -+ } while ((!done1.bits.peReady) || (!done2.bits.peReady)); -+ -+ err = rdesc->peCrtlStat.bits.errStatus; -+ -+ flags = rdesc->userId; -+ async = (struct crypto_async_request *)rdesc->arc4Addr; -+ -+ writel(1, mtk->base + EIP93_REG_PE_RD_COUNT); -+ mtk_irq_clear(mtk, EIP93_INT_PE_RDRTHRESH_REQ); -+ -+ handled++; -+ ready--; -+ -+ if (flags & MTK_DESC_LAST) { -+ last_entry = true; -+ break; -+ } -+ } -+ -+ if (!last_entry) -+ goto get_more; -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_SKCIPHER) -+ if (flags & MTK_DESC_SKCIPHER) -+ mtk_skcipher_handle_result(async, err); -+#endif -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AEAD) -+ if (flags & MTK_DESC_AEAD) -+ mtk_aead_handle_result(async, err); -+#endif -+ goto get_more; -+} -+ -+static void mtk_done_task(unsigned long data) -+{ -+ struct mtk_device *mtk = (struct mtk_device *)data; -+ -+ mtk_handle_result_descriptor(mtk); -+} -+ -+static irqreturn_t mtk_irq_handler(int irq, void *dev_id) -+{ -+ struct mtk_device *mtk = (struct mtk_device *)dev_id; -+ u32 irq_status; -+ -+ irq_status = readl(mtk->base + EIP93_REG_INT_MASK_STAT); -+ -+ if (irq_status & EIP93_INT_PE_RDRTHRESH_REQ) { -+ mtk_irq_disable(mtk, EIP93_INT_PE_RDRTHRESH_REQ); -+ tasklet_schedule(&mtk->ring->done_task); -+ return IRQ_HANDLED; -+ } -+ -+ mtk_irq_clear(mtk, irq_status); -+ if (irq_status) -+ mtk_irq_disable(mtk, irq_status); -+ -+ return IRQ_NONE; -+} -+ -+static void mtk_initialize(struct mtk_device *mtk) -+{ -+ union peConfig_w peConfig; -+ union peEndianCfg_w peEndianCfg; -+ union peIntCfg_w peIntCfg; -+ union peClockCfg_w peClockCfg; -+ union peBufThresh_w peBufThresh; -+ union peRingThresh_w peRingThresh; -+ -+ /* Reset Engine and setup Mode */ -+ peConfig.word = 0; -+ peConfig.bits.resetPE = 1; -+ peConfig.bits.resetRing = 1; -+ peConfig.bits.peMode = 3; -+ peConfig.bits.enCDRupdate = 1; -+ -+ writel(peConfig.word, mtk->base + EIP93_REG_PE_CONFIG); -+ -+ udelay(10); -+ -+ peConfig.bits.resetPE = 0; -+ peConfig.bits.resetRing = 0; -+ -+ writel(peConfig.word, mtk->base + EIP93_REG_PE_CONFIG); -+ -+ /* Initialize the BYTE_ORDER_CFG register */ -+ peEndianCfg.word = 0; -+ writel(peEndianCfg.word, mtk->base + EIP93_REG_PE_ENDIAN_CONFIG); -+ -+ /* Initialize the INT_CFG register */ -+ peIntCfg.word = 0; -+ writel(peIntCfg.word, mtk->base + EIP93_REG_INT_CFG); -+ -+ /* Config Clocks */ -+ peClockCfg.word = 0; -+ peClockCfg.bits.enPEclk = 1; -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) -+ peClockCfg.bits.enDESclk = 1; -+#endif -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) -+ peClockCfg.bits.enAESclk = 1; -+#endif -+#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_HMAC) -+ peClockCfg.bits.enHASHclk = 1; -+#endif -+ writel(peClockCfg.word, mtk->base + EIP93_REG_PE_CLOCK_CTRL); -+ -+ /* Config DMA thresholds */ -+ peBufThresh.word = 0; -+ peBufThresh.bits.inputBuffer = 128; -+ peBufThresh.bits.outputBuffer = 128; -+ -+ writel(peBufThresh.word, mtk->base + EIP93_REG_PE_BUF_THRESH); -+ -+ /* Clear/ack all interrupts before disable all */ -+ mtk_irq_clear(mtk, 0xFFFFFFFF); -+ mtk_irq_disable(mtk, 0xFFFFFFFF); -+ -+ /* Config Ring Threshold */ -+ peRingThresh.word = 0; -+ peRingThresh.bits.CDRThresh = MTK_RING_SIZE - MTK_RING_BUSY; -+ peRingThresh.bits.RDRThresh = 0; -+ peRingThresh.bits.RDTimeout = 5; -+ peRingThresh.bits.enTimeout = 1; -+ -+ writel(peRingThresh.word, mtk->base + EIP93_REG_PE_RING_THRESH); -+} -+ -+static void mtk_desc_free(struct mtk_device *mtk) -+{ -+ writel(0, mtk->base + EIP93_REG_PE_RING_CONFIG); -+ writel(0, mtk->base + EIP93_REG_PE_CDR_BASE); -+ writel(0, mtk->base + EIP93_REG_PE_RDR_BASE); -+} -+ -+static int mtk_set_ring(struct mtk_device *mtk, struct mtk_desc_ring *ring, -+ int Offset) -+{ -+ ring->offset = Offset; -+ ring->base = dmam_alloc_coherent(mtk->dev, Offset * MTK_RING_SIZE, -+ &ring->base_dma, GFP_KERNEL); -+ if (!ring->base) -+ return -ENOMEM; -+ -+ ring->write = ring->base; -+ ring->base_end = ring->base + Offset * (MTK_RING_SIZE - 1); -+ ring->read = ring->base; -+ -+ return 0; -+} -+ -+static int mtk_desc_init(struct mtk_device *mtk) -+{ -+ struct mtk_state_pool *saState_pool; -+ struct mtk_desc_ring *cdr = &mtk->ring->cdr; -+ struct mtk_desc_ring *rdr = &mtk->ring->rdr; -+ union peRingCfg_w peRingCfg; -+ int RingOffset, err, i; -+ -+ RingOffset = sizeof(struct eip93_descriptor_s); -+ -+ err = mtk_set_ring(mtk, cdr, RingOffset); -+ if (err) -+ return err; -+ -+ err = mtk_set_ring(mtk, rdr, RingOffset); -+ if (err) -+ return err; -+ -+ writel((u32)cdr->base_dma, mtk->base + EIP93_REG_PE_CDR_BASE); -+ writel((u32)rdr->base_dma, mtk->base + EIP93_REG_PE_RDR_BASE); -+ -+ peRingCfg.word = 0; -+ peRingCfg.bits.ringSize = MTK_RING_SIZE - 1; -+ peRingCfg.bits.ringOffset = RingOffset / 4; -+ -+ writel(peRingCfg.word, mtk->base + EIP93_REG_PE_RING_CONFIG); -+ -+ atomic_set(&mtk->ring->free, MTK_RING_SIZE - 1); -+ /* Create State record DMA pool */ -+ RingOffset = sizeof(struct saState_s); -+ mtk->ring->saState = dmam_alloc_coherent(mtk->dev, -+ RingOffset * MTK_RING_SIZE, -+ &mtk->ring->saState_dma, GFP_KERNEL); -+ if (!mtk->ring->saState) -+ return -ENOMEM; -+ -+ mtk->ring->saState_pool = devm_kcalloc(mtk->dev, 1, -+ sizeof(struct mtk_state_pool) * MTK_RING_SIZE, -+ GFP_KERNEL); -+ -+ for (i = 0; i < MTK_RING_SIZE; i++) { -+ saState_pool = &mtk->ring->saState_pool[i]; -+ saState_pool->base = mtk->ring->saState + (i * RingOffset); -+ saState_pool->base_dma = mtk->ring->saState_dma + (i * RingOffset); -+ saState_pool->in_use = false; -+ } -+ -+ return 0; -+} -+ -+static void mtk_cleanup(struct mtk_device *mtk) -+{ -+ tasklet_kill(&mtk->ring->done_task); -+ -+ /* Clear/ack all interrupts before disable all */ -+ mtk_irq_clear(mtk, 0xFFFFFFFF); -+ mtk_irq_disable(mtk, 0xFFFFFFFF); -+ -+ writel(0, mtk->base + EIP93_REG_PE_CLOCK_CTRL); -+ -+ mtk_desc_free(mtk); -+} -+ -+static int mtk_crypto_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct mtk_device *mtk; -+ int err; -+ -+ mtk = devm_kzalloc(dev, sizeof(*mtk), GFP_KERNEL); -+ if (!mtk) -+ return -ENOMEM; -+ -+ mtk->dev = dev; -+ platform_set_drvdata(pdev, mtk); -+ -+ mtk->base = devm_platform_ioremap_resource(pdev, 0); -+ -+ if (IS_ERR(mtk->base)) -+ return PTR_ERR(mtk->base); -+ -+ mtk->irq = platform_get_irq(pdev, 0); -+ -+ if (mtk->irq < 0) -+ return mtk->irq; -+ -+ err = devm_request_threaded_irq(mtk->dev, mtk->irq, mtk_irq_handler, -+ NULL, IRQF_ONESHOT, -+ dev_name(mtk->dev), mtk); -+ -+ mtk->ring = devm_kcalloc(mtk->dev, 1, sizeof(*mtk->ring), GFP_KERNEL); -+ -+ if (!mtk->ring) -+ return -ENOMEM; -+ -+ err = mtk_desc_init(mtk); -+ if (err) -+ return err; -+ -+ tasklet_init(&mtk->ring->done_task, mtk_done_task, (unsigned long)mtk); -+ -+ spin_lock_init(&mtk->ring->read_lock); -+ spin_lock_init(&mtk->ring->write_lock); -+ -+ mtk_initialize(mtk); -+ -+ /* Init. finished, enable RDR interupt */ -+ mtk_irq_enable(mtk, EIP93_INT_PE_RDRTHRESH_REQ); -+ -+ err = mtk_register_algs(mtk); -+ if (err) { -+ mtk_cleanup(mtk); -+ return err; -+ } -+ -+ dev_info(mtk->dev, "EIP93 Crypto Engine Initialized."); -+ -+ return 0; -+} -+ -+static void mtk_crypto_remove(struct platform_device *pdev) -+{ -+ struct mtk_device *mtk = platform_get_drvdata(pdev); -+ -+ mtk_unregister_algs(ARRAY_SIZE(mtk_algs)); -+ mtk_cleanup(mtk); -+ dev_info(mtk->dev, "EIP93 removed.\n"); -+} -+ -+#if defined(CONFIG_OF) -+static const struct of_device_id mtk_crypto_of_match[] = { -+ { .compatible = "mediatek,mtk-eip93", }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, mtk_crypto_of_match); -+#endif -+ -+static struct platform_driver mtk_crypto_driver = { -+ .probe = mtk_crypto_probe, -+ .remove_new = mtk_crypto_remove, -+ .driver = { -+ .name = "mtk-eip93", -+ .of_match_table = of_match_ptr(mtk_crypto_of_match), -+ }, -+}; -+module_platform_driver(mtk_crypto_driver); -+ -+MODULE_AUTHOR("Richard van Schagen "); -+MODULE_ALIAS("platform:" KBUILD_MODNAME); -+MODULE_DESCRIPTION("Mediatek EIP-93 crypto engine driver"); -+MODULE_LICENSE("GPL v2"); ---- /dev/null -+++ b/drivers/crypto/mtk-eip93/eip93-main.h -@@ -0,0 +1,146 @@ -+/* SPDX-License-Identifier: GPL-2.0 -+ * -+ * Copyright (C) 2019 - 2021 -+ * -+ * Richard van Schagen -+ */ -+#ifndef _EIP93_MAIN_H_ -+#define _EIP93_MAIN_H_ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define MTK_RING_SIZE 512 -+#define MTK_RING_BUSY 32 -+#define MTK_CRA_PRIORITY 1500 -+ -+/* cipher algorithms */ -+#define MTK_ALG_DES BIT(0) -+#define MTK_ALG_3DES BIT(1) -+#define MTK_ALG_AES BIT(2) -+#define MTK_ALG_MASK GENMASK(2, 0) -+/* hash and hmac algorithms */ -+#define MTK_HASH_MD5 BIT(3) -+#define MTK_HASH_SHA1 BIT(4) -+#define MTK_HASH_SHA224 BIT(5) -+#define MTK_HASH_SHA256 BIT(6) -+#define MTK_HASH_HMAC BIT(7) -+#define MTK_HASH_MASK GENMASK(6, 3) -+/* cipher modes */ -+#define MTK_MODE_CBC BIT(8) -+#define MTK_MODE_ECB BIT(9) -+#define MTK_MODE_CTR BIT(10) -+#define MTK_MODE_RFC3686 BIT(11) -+#define MTK_MODE_MASK GENMASK(10, 8) -+ -+/* cipher encryption/decryption operations */ -+#define MTK_ENCRYPT BIT(12) -+#define MTK_DECRYPT BIT(13) -+ -+#define MTK_BUSY BIT(14) -+ -+/* descriptor flags */ -+#define MTK_DESC_ASYNC BIT(31) -+#define MTK_DESC_SKCIPHER BIT(30) -+#define MTK_DESC_AEAD BIT(29) -+#define MTK_DESC_AHASH BIT(28) -+#define MTK_DESC_PRNG BIT(27) -+#define MTK_DESC_FAKE_HMAC BIT(26) -+#define MTK_DESC_LAST BIT(25) -+#define MTK_DESC_FINISH BIT(24) -+#define MTK_DESC_IPSEC BIT(23) -+#define MTK_DESC_DMA_IV BIT(22) -+ -+#define IS_DES(flags) (flags & MTK_ALG_DES) -+#define IS_3DES(flags) (flags & MTK_ALG_3DES) -+#define IS_AES(flags) (flags & MTK_ALG_AES) -+ -+#define IS_HASH_MD5(flags) (flags & MTK_HASH_MD5) -+#define IS_HASH_SHA1(flags) (flags & MTK_HASH_SHA1) -+#define IS_HASH_SHA224(flags) (flags & MTK_HASH_SHA224) -+#define IS_HASH_SHA256(flags) (flags & MTK_HASH_SHA256) -+#define IS_HMAC(flags) (flags & MTK_HASH_HMAC) -+ -+#define IS_CBC(mode) (mode & MTK_MODE_CBC) -+#define IS_ECB(mode) (mode & MTK_MODE_ECB) -+#define IS_CTR(mode) (mode & MTK_MODE_CTR) -+#define IS_RFC3686(mode) (mode & MTK_MODE_RFC3686) -+ -+#define IS_BUSY(flags) (flags & MTK_BUSY) -+#define IS_DMA_IV(flags) (flags & MTK_DESC_DMA_IV) -+ -+#define IS_ENCRYPT(dir) (dir & MTK_ENCRYPT) -+#define IS_DECRYPT(dir) (dir & MTK_DECRYPT) -+ -+#define IS_CIPHER(flags) (flags & (MTK_ALG_DES || \ -+ MTK_ALG_3DES || \ -+ MTK_ALG_AES)) -+ -+#define IS_HASH(flags) (flags & (MTK_HASH_MD5 || \ -+ MTK_HASH_SHA1 || \ -+ MTK_HASH_SHA224 || \ -+ MTK_HASH_SHA256)) -+ -+/** -+ * struct mtk_device - crypto engine device structure -+ */ -+struct mtk_device { -+ void __iomem *base; -+ struct device *dev; -+ struct clk *clk; -+ int irq; -+ struct mtk_ring *ring; -+ struct mtk_state_pool *saState_pool; -+}; -+ -+struct mtk_desc_ring { -+ void *base; -+ void *base_end; -+ dma_addr_t base_dma; -+ /* write and read pointers */ -+ void *read; -+ void *write; -+ /* descriptor element offset */ -+ u32 offset; -+}; -+ -+struct mtk_state_pool { -+ void *base; -+ dma_addr_t base_dma; -+ bool in_use; -+}; -+ -+struct mtk_ring { -+ struct tasklet_struct done_task; -+ /* command/result rings */ -+ struct mtk_desc_ring cdr; -+ struct mtk_desc_ring rdr; -+ spinlock_t write_lock; -+ spinlock_t read_lock; -+ atomic_t free; -+ /* saState */ -+ struct mtk_state_pool *saState_pool; -+ void *saState; -+ dma_addr_t saState_dma; -+}; -+ -+enum mtk_alg_type { -+ MTK_ALG_TYPE_AEAD, -+ MTK_ALG_TYPE_SKCIPHER, -+}; -+ -+struct mtk_alg_template { -+ struct mtk_device *mtk; -+ enum mtk_alg_type type; -+ u32 flags; -+ union { -+ struct aead_alg aead; -+ struct skcipher_alg skcipher; -+ } alg; -+}; -+ -+#endif /* _EIP93_MAIN_H_ */ ---- /dev/null -+++ b/drivers/crypto/mtk-eip93/eip93-regs.h -@@ -0,0 +1,382 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2019 - 2021 -+ * -+ * Richard van Schagen -+ */ -+#ifndef REG_EIP93_H -+#define REG_EIP93_H -+ -+#define EIP93_REG_WIDTH 4 -+/*----------------------------------------------------------------------------- -+ * Register Map -+ */ -+#define DESP_BASE 0x0000000 -+#define EIP93_REG_PE_CTRL_STAT ((DESP_BASE)+(0x00 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PE_SOURCE_ADDR ((DESP_BASE)+(0x01 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PE_DEST_ADDR ((DESP_BASE)+(0x02 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PE_SA_ADDR ((DESP_BASE)+(0x03 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PE_ADDR ((DESP_BASE)+(0x04 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PE_USER_ID ((DESP_BASE)+(0x06 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PE_LENGTH ((DESP_BASE)+(0x07 * EIP93_REG_WIDTH)) -+ -+//PACKET ENGINE RING configuration registers -+#define PE_RNG_BASE 0x0000080 -+ -+#define EIP93_REG_PE_CDR_BASE ((PE_RNG_BASE)+(0x00 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PE_RDR_BASE ((PE_RNG_BASE)+(0x01 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PE_RING_CONFIG ((PE_RNG_BASE)+(0x02 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PE_RING_THRESH ((PE_RNG_BASE)+(0x03 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PE_CD_COUNT ((PE_RNG_BASE)+(0x04 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PE_RD_COUNT ((PE_RNG_BASE)+(0x05 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PE_RING_RW_PNTR ((PE_RNG_BASE)+(0x06 * EIP93_REG_WIDTH)) -+ -+//PACKET ENGINE configuration registers -+#define PE_CFG_BASE 0x0000100 -+#define EIP93_REG_PE_CONFIG ((PE_CFG_BASE)+(0x00 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PE_STATUS ((PE_CFG_BASE)+(0x01 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PE_BUF_THRESH ((PE_CFG_BASE)+(0x03 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PE_INBUF_COUNT ((PE_CFG_BASE)+(0x04 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PE_OUTBUF_COUNT ((PE_CFG_BASE)+(0x05 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PE_BUF_RW_PNTR ((PE_CFG_BASE)+(0x06 * EIP93_REG_WIDTH)) -+ -+//PACKET ENGINE endian config -+#define EN_CFG_BASE 0x00001CC -+#define EIP93_REG_PE_ENDIAN_CONFIG ((EN_CFG_BASE)+(0x00 * EIP93_REG_WIDTH)) -+ -+//EIP93 CLOCK control registers -+#define CLOCK_BASE 0x01E8 -+#define EIP93_REG_PE_CLOCK_CTRL ((CLOCK_BASE)+(0x00 * EIP93_REG_WIDTH)) -+ -+//EIP93 Device Option and Revision Register -+#define REV_BASE 0x01F4 -+#define EIP93_REG_PE_OPTION_1 ((REV_BASE)+(0x00 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PE_OPTION_0 ((REV_BASE)+(0x01 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PE_REVISION ((REV_BASE)+(0x02 * EIP93_REG_WIDTH)) -+ -+//EIP93 Interrupt Control Register -+#define INT_BASE 0x0200 -+#define EIP93_REG_INT_UNMASK_STAT ((INT_BASE)+(0x00 * EIP93_REG_WIDTH)) -+#define EIP93_REG_INT_MASK_STAT ((INT_BASE)+(0x01 * EIP93_REG_WIDTH)) -+#define EIP93_REG_INT_CLR ((INT_BASE)+(0x01 * EIP93_REG_WIDTH)) -+#define EIP93_REG_INT_MASK ((INT_BASE)+(0x02 * EIP93_REG_WIDTH)) -+#define EIP93_REG_INT_CFG ((INT_BASE)+(0x03 * EIP93_REG_WIDTH)) -+#define EIP93_REG_MASK_ENABLE ((INT_BASE)+(0X04 * EIP93_REG_WIDTH)) -+#define EIP93_REG_MASK_DISABLE ((INT_BASE)+(0X05 * EIP93_REG_WIDTH)) -+ -+//EIP93 SA Record register -+#define SA_BASE 0x0400 -+#define EIP93_REG_SA_CMD_0 ((SA_BASE)+(0x00 * EIP93_REG_WIDTH)) -+#define EIP93_REG_SA_CMD_1 ((SA_BASE)+(0x01 * EIP93_REG_WIDTH)) -+ -+//#define EIP93_REG_SA_READY ((SA_BASE)+(31 * EIP93_REG_WIDTH)) -+ -+//State save register -+#define STATE_BASE 0x0500 -+#define EIP93_REG_STATE_IV_0 ((STATE_BASE)+(0x00 * EIP93_REG_WIDTH)) -+#define EIP93_REG_STATE_IV_1 ((STATE_BASE)+(0x01 * EIP93_REG_WIDTH)) -+ -+#define EIP93_PE_ARC4STATE_BASEADDR_REG 0x0700 -+ -+//RAM buffer start address -+#define EIP93_INPUT_BUFFER 0x0800 -+#define EIP93_OUTPUT_BUFFER 0x0800 -+ -+//EIP93 PRNG Configuration Register -+#define PRNG_BASE 0x0300 -+#define EIP93_REG_PRNG_STAT ((PRNG_BASE)+(0x00 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PRNG_CTRL ((PRNG_BASE)+(0x01 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PRNG_SEED_0 ((PRNG_BASE)+(0x02 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PRNG_SEED_1 ((PRNG_BASE)+(0x03 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PRNG_SEED_2 ((PRNG_BASE)+(0x04 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PRNG_SEED_3 ((PRNG_BASE)+(0x05 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PRNG_KEY_0 ((PRNG_BASE)+(0x06 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PRNG_KEY_1 ((PRNG_BASE)+(0x07 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PRNG_KEY_2 ((PRNG_BASE)+(0x08 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PRNG_KEY_3 ((PRNG_BASE)+(0x09 * EIP93_REG_WIDTH)) -+#define EIP93_REG_PRNG_RES_0 ((PRNG_BASE)+(0x0A * EIP93_REG_WIDTH)) -+#define EIP93_REG_PRNG_RES_1 ((PRNG_BASE)+(0x0B * EIP93_REG_WIDTH)) -+#define EIP93_REG_PRNG_RES_2 ((PRNG_BASE)+(0x0C * EIP93_REG_WIDTH)) -+#define EIP93_REG_PRNG_RES_3 ((PRNG_BASE)+(0x0D * EIP93_REG_WIDTH)) -+#define EIP93_REG_PRNG_LFSR_0 ((PRNG_BASE)+(0x0E * EIP93_REG_WIDTH)) -+#define EIP93_REG_PRNG_LFSR_1 ((PRNG_BASE)+(0x0F * EIP93_REG_WIDTH)) -+ -+/*----------------------------------------------------------------------------- -+ * Constants & masks -+ */ -+ -+#define EIP93_SUPPORTED_INTERRUPTS_MASK 0xffff7f00 -+#define EIP93_PRNG_DT_TEXT_LOWERHALF 0xDEAD -+#define EIP93_PRNG_DT_TEXT_UPPERHALF 0xC0DE -+#define EIP93_10BITS_MASK 0X3FF -+#define EIP93_12BITS_MASK 0XFFF -+#define EIP93_4BITS_MASK 0X04 -+#define EIP93_20BITS_MASK 0xFFFFF -+ -+#define EIP93_MIN_DESC_DONE_COUNT 0 -+#define EIP93_MAX_DESC_DONE_COUNT 15 -+ -+#define EIP93_MIN_DESC_PENDING_COUNT 0 -+#define EIP93_MAX_DESC_PENDING_COUNT 1023 -+ -+#define EIP93_MIN_TIMEOUT_COUNT 0 -+#define EIP93_MAX_TIMEOUT_COUNT 15 -+ -+#define EIP93_MIN_PE_INPUT_THRESHOLD 1 -+#define EIP93_MAX_PE_INPUT_THRESHOLD 511 -+ -+#define EIP93_MIN_PE_OUTPUT_THRESHOLD 1 -+#define EIP93_MAX_PE_OUTPUT_THRESHOLD 432 -+ -+#define EIP93_MIN_PE_RING_SIZE 1 -+#define EIP93_MAX_PE_RING_SIZE 1023 -+ -+#define EIP93_MIN_PE_DESCRIPTOR_SIZE 7 -+#define EIP93_MAX_PE_DESCRIPTOR_SIZE 15 -+ -+//3DES keys,seed,known data and its result -+#define EIP93_KEY_0 0x133b3454 -+#define EIP93_KEY_1 0x5e5b890b -+#define EIP93_KEY_2 0x5eb30757 -+#define EIP93_KEY_3 0x93ab15f7 -+#define EIP93_SEED_0 0x62c4bf5e -+#define EIP93_SEED_1 0x972667c8 -+#define EIP93_SEED_2 0x6345bf67 -+#define EIP93_SEED_3 0xcb3482bf -+#define EIP93_LFSR_0 0xDEADC0DE -+#define EIP93_LFSR_1 0xBEEFF00D -+ -+/*----------------------------------------------------------------------------- -+ * EIP93 device initialization specifics -+ */ -+ -+/*---------------------------------------------------------------------------- -+ * Byte Order Reversal Mechanisms Supported in EIP93 -+ * EIP93_BO_REVERSE_HALF_WORD : reverse the byte order within a half-word -+ * EIP93_BO_REVERSE_WORD : reverse the byte order within a word -+ * EIP93_BO_REVERSE_DUAL_WORD : reverse the byte order within a dual-word -+ * EIP93_BO_REVERSE_QUAD_WORD : reverse the byte order within a quad-word -+ */ -+enum EIP93_Byte_Order_Value_t { -+ EIP93_BO_REVERSE_HALF_WORD = 1, -+ EIP93_BO_REVERSE_WORD = 2, -+ EIP93_BO_REVERSE_DUAL_WORD = 4, -+ EIP93_BO_REVERSE_QUAD_WORD = 8, -+}; -+ -+/*---------------------------------------------------------------------------- -+ * Byte Order Reversal Mechanisms Supported in EIP93 for Target Data -+ * EIP93_BO_REVERSE_HALF_WORD : reverse the byte order within a half-word -+ * EIP93_BO_REVERSE_WORD : reverse the byte order within a word -+ */ -+enum EIP93_Byte_Order_Value_TD_t { -+ EIP93_BO_REVERSE_HALF_WORD_TD = 1, -+ EIP93_BO_REVERSE_WORD_TD = 2, -+}; -+ -+// BYTE_ORDER_CFG register values -+#define EIP93_BYTE_ORDER_PD EIP93_BO_REVERSE_WORD -+#define EIP93_BYTE_ORDER_SA EIP93_BO_REVERSE_WORD -+#define EIP93_BYTE_ORDER_DATA EIP93_BO_REVERSE_WORD -+#define EIP93_BYTE_ORDER_TD EIP93_BO_REVERSE_WORD_TD -+ -+// INT_CFG register values -+#define EIP93_INT_HOST_OUTPUT_TYPE 0 -+#define EIP93_INT_PULSE_CLEAR 0 -+ -+/* -+ * Interrupts of EIP93 -+ */ -+ -+enum EIP93_InterruptSource_t { -+ EIP93_INT_PE_CDRTHRESH_REQ = BIT(0), -+ EIP93_INT_PE_RDRTHRESH_REQ = BIT(1), -+ EIP93_INT_PE_OPERATION_DONE = BIT(9), -+ EIP93_INT_PE_INBUFTHRESH_REQ = BIT(10), -+ EIP93_INT_PE_OUTBURTHRSH_REQ = BIT(11), -+ EIP93_INT_PE_PRNG_IRQ = BIT(12), -+ EIP93_INT_PE_ERR_REG = BIT(13), -+ EIP93_INT_PE_RD_DONE_IRQ = BIT(16), -+}; -+ -+union peConfig_w { -+ u32 word; -+ struct { -+ u32 resetPE :1; -+ u32 resetRing :1; -+ u32 reserved :6; -+ u32 peMode :2; -+ u32 enCDRupdate :1; -+ u32 reserved2 :5; -+ u32 swapCDRD :1; -+ u32 swapSA :1; -+ u32 swapData :1; -+ u32 reserved3 :13; -+ } bits; -+} __packed; -+ -+union peEndianCfg_w { -+ u32 word; -+ struct { -+ u32 masterByteSwap :8; -+ u32 reserved :8; -+ u32 targetByteSwap :8; -+ u32 reserved2 :8; -+ } bits; -+} __packed; -+ -+union peIntCfg_w { -+ u32 word; -+ struct { -+ u32 PulseClear :1; -+ u32 IntType :1; -+ u32 reserved :30; -+ } bits; -+} __packed; -+ -+union peClockCfg_w { -+ u32 word; -+ struct { -+ u32 enPEclk :1; -+ u32 enDESclk :1; -+ u32 enAESclk :1; -+ u32 reserved :1; -+ u32 enHASHclk :1; -+ u32 reserved2 :27; -+ } bits; -+} __packed; -+ -+union peBufThresh_w { -+ u32 word; -+ struct { -+ u32 inputBuffer :8; -+ u32 reserved :8; -+ u32 outputBuffer :8; -+ u32 reserved2 :8; -+ } bits; -+} __packed; -+ -+union peRingThresh_w { -+ u32 word; -+ struct { -+ u32 CDRThresh :10; -+ u32 reserved :6; -+ u32 RDRThresh :10; -+ u32 RDTimeout :4; -+ u32 reserved2 :1; -+ u32 enTimeout :1; -+ } bits; -+} __packed; -+ -+union peRingCfg_w { -+ u32 word; -+ struct { -+ u32 ringSize :10; -+ u32 reserved :6; -+ u32 ringOffset :8; -+ u32 reserved2 :8; -+ } bits; -+} __packed; -+ -+union saCmd0 { -+ u32 word; -+ struct { -+ u32 opCode :3; -+ u32 direction :1; -+ u32 opGroup :2; -+ u32 padType :2; -+ u32 cipher :4; -+ u32 hash :4; -+ u32 reserved2 :1; -+ u32 scPad :1; -+ u32 extPad :1; -+ u32 hdrProc :1; -+ u32 digestLength :4; -+ u32 ivSource :2; -+ u32 hashSource :2; -+ u32 saveIv :1; -+ u32 saveHash :1; -+ u32 reserved1 :2; -+ } bits; -+} __packed; -+ -+union saCmd1 { -+ u32 word; -+ struct { -+ u32 copyDigest :1; -+ u32 copyHeader :1; -+ u32 copyPayload :1; -+ u32 copyPad :1; -+ u32 reserved4 :4; -+ u32 cipherMode :2; -+ u32 reserved3 :1; -+ u32 sslMac :1; -+ u32 hmac :1; -+ u32 byteOffset :1; -+ u32 reserved2 :2; -+ u32 hashCryptOffset :8; -+ u32 aesKeyLen :3; -+ u32 reserved1 :1; -+ u32 aesDecKey :1; -+ u32 seqNumCheck :1; -+ u32 reserved0 :2; -+ } bits; -+} __packed; -+ -+struct saRecord_s { -+ union saCmd0 saCmd0; -+ union saCmd1 saCmd1; -+ u32 saKey[8]; -+ u32 saIDigest[8]; -+ u32 saODigest[8]; -+ u32 saSpi; -+ u32 saSeqNum[2]; -+ u32 saSeqNumMask[2]; -+ u32 saNonce; -+} __packed; -+ -+struct saState_s { -+ u32 stateIv[4]; -+ u32 stateByteCnt[2]; -+ u32 stateIDigest[8]; -+} __packed; -+ -+union peCrtlStat_w { -+ u32 word; -+ struct { -+ u32 hostReady :1; -+ u32 peReady :1; -+ u32 reserved :1; -+ u32 initArc4 :1; -+ u32 hashFinal :1; -+ u32 haltMode :1; -+ u32 prngMode :2; -+ u32 padValue :8; -+ u32 errStatus :8; -+ u32 padCrtlStat :8; -+ } bits; -+} __packed; -+ -+union peLength_w { -+ u32 word; -+ struct { -+ u32 length :20; -+ u32 reserved :2; -+ u32 hostReady :1; -+ u32 peReady :1; -+ u32 byPass :8; -+ } bits; -+} __packed; -+ -+struct eip93_descriptor_s { -+ union peCrtlStat_w peCrtlStat; -+ u32 srcAddr; -+ u32 dstAddr; -+ u32 saAddr; -+ u32 stateAddr; -+ u32 arc4Addr; -+ u32 userId; -+ union peLength_w peLength; -+} __packed; -+ -+#endif ---- a/drivers/crypto/Kconfig -+++ b/drivers/crypto/Kconfig -@@ -852,4 +852,6 @@ config CRYPTO_DEV_SA2UL - source "drivers/crypto/aspeed/Kconfig" - source "drivers/crypto/starfive/Kconfig" - -+source "drivers/crypto/mtk-eip93/Kconfig" -+ - endif # CRYPTO_HW ---- a/drivers/crypto/Makefile -+++ b/drivers/crypto/Makefile -@@ -52,3 +52,4 @@ obj-y += hisilicon/ - obj-$(CONFIG_CRYPTO_DEV_AMLOGIC_GXL) += amlogic/ - obj-y += intel/ - obj-y += starfive/ -+obj-$(CONFIG_CRYPTO_DEV_EIP93) += mtk-eip93/ diff --git a/target/linux/ramips/patches-6.18/900-pci-rt2880-static-pcibios_init.patch b/target/linux/ramips/patches-6.18/900-pci-rt2880-static-pcibios_init.patch deleted file mode 100644 index a6c6d00a92..0000000000 --- a/target/linux/ramips/patches-6.18/900-pci-rt2880-static-pcibios_init.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 6688b218552c6fd3178b40d7d106bf732caec3aa Mon Sep 17 00:00:00 2001 -From: Mieczyslaw Nalewaj -Date: Sat, 28 Dec 2024 18:09:17 +0100 -Subject: [PATCH] pci-rt2880: static pcibios_init - -Fixes error: -arch/mips/pci/pci-rt2880.c:267:12: error: no previous prototype for 'pcibios_init' [-Werror=missing-prototypes] - 267 | int __init pcibios_init(void) - | ^~~~~~~~~~~~ -cc1: all warnings being treated as errors -make[8]: *** [scripts/Makefile.build:229: arch/mips/pci/pci-rt2880.o] Error 1 -make[7]: *** [scripts/Makefile.build:478: arch/mips/pci] Error 2 - -Signed-off-by: Mieczyslaw Nalewaj ---- - arch/mips/pci/pci-rt2880.c | 7 +++++++ - 1 file changed, 7 insertions(+) - ---- a/arch/mips/pci/pci-rt2880.c -+++ b/arch/mips/pci/pci-rt2880.c -@@ -264,7 +264,7 @@ static struct platform_driver rt288x_pci - }, - }; - --int __init pcibios_init(void) -+static int __init pcibios_init(void) - { - int ret = platform_driver_register(&rt288x_pci_driver); - diff --git a/target/linux/ramips/patches-6.18/931-mips-ralink-add-missing-include.patch b/target/linux/ramips/patches-6.18/931-mips-ralink-add-missing-include.patch deleted file mode 100644 index 710423b8e5..0000000000 --- a/target/linux/ramips/patches-6.18/931-mips-ralink-add-missing-include.patch +++ /dev/null @@ -1,25 +0,0 @@ -From: Mieczyslaw Nalewaj -Date: Mon, 18 Nov 2024 21:28:05 +0100 -Subject: mips: ralink: add missing include - -Missing headers causes an error on kernel 6.12: -arch/mips/ralink/irq.c:86:5: error: no previous prototype for 'get_c0_perfcount_int' [-Werror=missing-prototypes] - 86 | int get_c0_perfcount_int(void) - | ^~~~~~~~~~~~~~~~~~~~ -arch/mips/ralink/irq.c:92:14: error: no previous prototype for 'get_c0_compare_int' [-Werror=missing-prototypes] - 92 | unsigned int get_c0_compare_int(void) - | ^~~~~~~~~~~~~~~~~~ -cc1: all warnings being treated as errors - -Signed-off-by: Mieczyslaw Nalewaj ---- ---- a/arch/mips/ralink/irq.c -+++ b/arch/mips/ralink/irq.c -@@ -15,6 +15,7 @@ - - #include - #include -+#include - - #include "common.h" - From 69a437102046ddc6f0ab8184dec15adcd3137aed Mon Sep 17 00:00:00 2001 From: Mieczyslaw Nalewaj Date: Tue, 6 Jan 2026 11:00:39 +0100 Subject: [PATCH 61/78] ramips: 6.18: manually rebuild patches Manually rebuild patches: - 102-01-pwm-mediatek-set-mt7628-pwm45_fixup-flag-to-false.patch - 102-02-pwm-mediatek-correct-mt7628-clock-source-setting.patch - 312-MIPS-ralink-add-cpu-frequency-scaling.patch - 810-uvc-add-iPassion-iP2970-support.patch - 821-SPI-ralink-add-Ralink-SoC-spi-driver.patch - 831-01-mmc-mtk-sd-add-tuning-parameters-for-legacy-MIPS-MT7.patch - 831-02-mmc-mtk-sd-disable-auto-CMD23-support-for-mt7620.patch - 835-asoc-add-mt7620-support.patch Signed-off-by: Mieczyslaw Nalewaj Link: https://github.com/openwrt/openwrt/pull/21418 Signed-off-by: Robert Marko --- ...set-mt7628-pwm45_fixup-flag-to-false.patch | 6 +-- ...-correct-mt7628-clock-source-setting.patch | 34 +++++++------- ...IPS-ralink-add-cpu-frequency-scaling.patch | 17 +++++-- .../810-uvc-add-iPassion-iP2970-support.patch | 20 ++++---- ...SPI-ralink-add-Ralink-SoC-spi-driver.patch | 10 ++-- ...uning-parameters-for-legacy-MIPS-MT7.patch | 14 +++--- ...isable-auto-CMD23-support-for-mt7620.patch | 46 +++++++++---------- .../835-asoc-add-mt7620-support.patch | 24 +++++----- 8 files changed, 90 insertions(+), 81 deletions(-) diff --git a/target/linux/ramips/patches-6.18/102-01-pwm-mediatek-set-mt7628-pwm45_fixup-flag-to-false.patch b/target/linux/ramips/patches-6.18/102-01-pwm-mediatek-set-mt7628-pwm45_fixup-flag-to-false.patch index 130b877737..4f3892e3f4 100644 --- a/target/linux/ramips/patches-6.18/102-01-pwm-mediatek-set-mt7628-pwm45_fixup-flag-to-false.patch +++ b/target/linux/ramips/patches-6.18/102-01-pwm-mediatek-set-mt7628-pwm45_fixup-flag-to-false.patch @@ -14,12 +14,12 @@ Signed-off-by: Shiji Yang --- a/drivers/pwm/pwm-mediatek.c +++ b/drivers/pwm/pwm-mediatek.c -@@ -324,7 +324,7 @@ static const struct pwm_mediatek_of_data +@@ -458,7 +458,7 @@ static const struct pwm_mediatek_of_data static const struct pwm_mediatek_of_data mt7628_pwm_data = { .num_pwms = 4, - .pwm45_fixup = true, + .pwm45_fixup = false, - .has_ck_26m_sel = false, - .reg_offset = mtk_pwm_reg_offset_v1, + .chanreg_base = 0x10, + .chanreg_width = 0x40, }; diff --git a/target/linux/ramips/patches-6.18/102-02-pwm-mediatek-correct-mt7628-clock-source-setting.patch b/target/linux/ramips/patches-6.18/102-02-pwm-mediatek-correct-mt7628-clock-source-setting.patch index 498eb7fc63..bfa8382ae3 100644 --- a/target/linux/ramips/patches-6.18/102-02-pwm-mediatek-correct-mt7628-clock-source-setting.patch +++ b/target/linux/ramips/patches-6.18/102-02-pwm-mediatek-correct-mt7628-clock-source-setting.patch @@ -16,34 +16,34 @@ Signed-off-by: Shiji Yang --- a/drivers/pwm/pwm-mediatek.c +++ b/drivers/pwm/pwm-mediatek.c -@@ -21,6 +21,8 @@ +@@ -22,6 +22,8 @@ /* PWM registers and bits definitions */ #define PWMCON 0x00 +#define PWMCON_CLKSEL BIT(3) +#define PWMCON_OLD_PWM_MODE BIT(15) + #define PWMCON_CLKDIV GENMASK(2, 0) #define PWMHDUR 0x04 #define PWMLDUR 0x08 - #define PWMGDUR 0x0c -@@ -35,6 +37,7 @@ +@@ -38,6 +40,7 @@ struct pwm_mediatek_of_data { unsigned int num_pwms; + bool clksel_fixup; bool pwm45_fixup; - bool has_ck_26m_sel; - const unsigned int *reg_offset; -@@ -141,6 +144,7 @@ static int pwm_mediatek_config(struct pw - struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip); - u32 clkdiv = 0, cnt_period, cnt_duty, reg_width = PWMDWIDTH, - reg_thres = PWMTHRES; + u16 pwm_ck_26m_sel_reg; + unsigned int chanreg_base; +@@ -162,6 +165,7 @@ static int pwm_mediatek_config(struct pw + u32 clkdiv, enable; + u32 reg_width = PWMDWIDTH, reg_thres = PWMTHRES; + u64 cnt_period, cnt_duty; + u32 con_val; unsigned long clk_rate; - u64 resolution; int ret; -@@ -191,7 +195,12 @@ static int pwm_mediatek_config(struct pw - cnt_duty = DIV_ROUND_CLOSEST_ULL((u64)duty_ns * 1000, resolution); +@@ -218,7 +222,12 @@ static int pwm_mediatek_config(struct pw + reg_thres = PWM45THRES_FIXUP; + } - pwm_mediatek_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | clkdiv); + con_val = PWMCON_OLD_PWM_MODE | clkdiv; @@ -52,14 +52,14 @@ Signed-off-by: Shiji Yang + con_val |= PWMCON_CLKSEL; + + pwm_mediatek_writel(pc, pwm->hwpwm, PWMCON, con_val); - pwm_mediatek_writel(pc, pwm->hwpwm, reg_width, cnt_period - 1); + pwm_mediatek_writel(pc, pwm->hwpwm, reg_width, cnt_period); - if (cnt_duty) { -@@ -324,6 +333,7 @@ static const struct pwm_mediatek_of_data + if (enable) { +@@ -458,6 +467,7 @@ static const struct pwm_mediatek_of_data static const struct pwm_mediatek_of_data mt7628_pwm_data = { .num_pwms = 4, + .clksel_fixup = true, .pwm45_fixup = false, - .has_ck_26m_sel = false, - .reg_offset = mtk_pwm_reg_offset_v1, + .chanreg_base = 0x10, + .chanreg_width = 0x40, diff --git a/target/linux/ramips/patches-6.18/312-MIPS-ralink-add-cpu-frequency-scaling.patch b/target/linux/ramips/patches-6.18/312-MIPS-ralink-add-cpu-frequency-scaling.patch index 6acdfff837..047fe0a648 100644 --- a/target/linux/ramips/patches-6.18/312-MIPS-ralink-add-cpu-frequency-scaling.patch +++ b/target/linux/ramips/patches-6.18/312-MIPS-ralink-add-cpu-frequency-scaling.patch @@ -139,7 +139,7 @@ Signed-off-by: John Crispin return 0; } -@@ -113,33 +161,46 @@ static int systick_set_oneshot(struct cl +@@ -113,20 +161,37 @@ static int systick_set_oneshot(struct cl return 0; } @@ -150,7 +150,7 @@ Signed-off-by: John Crispin + static int __init ralink_systick_init(struct device_node *np) { -- int ret; + int ret; + const struct of_device_id *match; + int rating = 200; @@ -183,14 +183,15 @@ Signed-off-by: John Crispin systick.dev.irq = irq_of_parse_and_map(np, 0); if (!systick.dev.irq) { pr_err("%pOFn: request_irq failed", np); - return -EINVAL; +@@ -134,21 +199,16 @@ static int __init ralink_systick_init(st + goto err_iounmap; } - ret = clocksource_mmio_init(systick.membase + SYSTICK_COUNT, np->name, - SYSTICK_FREQ, 301, 16, - clocksource_mmio_readl_up); - if (ret) -- return ret; +- goto err_free_irq; - - clockevents_register_device(&systick.dev); + systick.dev.name = np->name; @@ -200,3 +201,11 @@ Signed-off-by: John Crispin pr_info("%pOFn: running - mult: %d, shift: %d\n", np, systick.dev.mult, systick.dev.shift); + + return 0; + +-err_free_irq: +- irq_dispose_mapping(systick.dev.irq); + err_iounmap: + iounmap(systick.membase); + return ret; diff --git a/target/linux/ramips/patches-6.18/810-uvc-add-iPassion-iP2970-support.patch b/target/linux/ramips/patches-6.18/810-uvc-add-iPassion-iP2970-support.patch index fe918d5697..dc95864c28 100644 --- a/target/linux/ramips/patches-6.18/810-uvc-add-iPassion-iP2970-support.patch +++ b/target/linux/ramips/patches-6.18/810-uvc-add-iPassion-iP2970-support.patch @@ -13,7 +13,7 @@ Signed-off-by: John Crispin --- a/drivers/media/usb/uvc/uvc_driver.c +++ b/drivers/media/usb/uvc/uvc_driver.c -@@ -3229,6 +3229,18 @@ static const struct usb_device_id uvc_id +@@ -3248,6 +3248,18 @@ static const struct usb_device_id uvc_id .bInterfaceSubClass = 1, .bInterfaceProtocol = 0, .driver_info = UVC_INFO_META(V4L2_META_FMT_D4XX) }, @@ -34,7 +34,7 @@ Signed-off-by: John Crispin { USB_INTERFACE_INFO(USB_CLASS_VIDEO, 1, UVC_PC_PROTOCOL_15) }, --- a/drivers/media/usb/uvc/uvc_status.c +++ b/drivers/media/usb/uvc/uvc_status.c -@@ -228,6 +228,7 @@ static void uvc_status_complete(struct u +@@ -229,6 +229,7 @@ static void uvc_status_complete(struct u if (uvc_event_control(urb, dev->status, len)) /* The URB will be resubmitted in work context. */ return; @@ -42,7 +42,7 @@ Signed-off-by: John Crispin break; } -@@ -274,6 +275,7 @@ int uvc_status_init(struct uvc_device *d +@@ -275,6 +276,7 @@ int uvc_status_init(struct uvc_device *d } pipe = usb_rcvintpipe(dev->udev, ep->desc.bEndpointAddress); @@ -64,7 +64,7 @@ Signed-off-by: John Crispin #include #include -@@ -1353,9 +1358,149 @@ static void uvc_video_decode_data(struct +@@ -1344,9 +1349,149 @@ static void uvc_video_decode_data(struct uvc_urb->async_operations++; } @@ -214,7 +214,7 @@ Signed-off-by: John Crispin /* Mark the buffer as done if the EOF marker is set. */ if (data[1] & UVC_STREAM_EOF && buf->bytesused != 0) { uvc_dbg(stream->dev, FRAME, "Frame complete (EOF found)\n"); -@@ -1938,6 +2083,8 @@ static int uvc_init_video_isoc(struct uv +@@ -1890,6 +2035,8 @@ static int uvc_init_video_isoc(struct uv if (npackets == 0) return -ENOMEM; @@ -225,16 +225,16 @@ Signed-off-by: John Crispin for_each_uvc_urb(uvc_urb, stream) { --- a/drivers/media/usb/uvc/uvcvideo.h +++ b/drivers/media/usb/uvc/uvcvideo.h -@@ -79,6 +79,8 @@ - #define UVC_QUIRK_DISABLE_AUTOSUSPEND 0x00008000 +@@ -81,6 +81,8 @@ #define UVC_QUIRK_INVALID_DEVICE_SOF 0x00010000 #define UVC_QUIRK_MJPEG_NO_EOF 0x00020000 -+#define UVC_QUIRK_MOTION 0x00040000 -+#define UVC_QUIRK_SINGLE_ISO 0x00080000 + #define UVC_QUIRK_MSXU_META 0x00040000 ++#define UVC_QUIRK_MOTION 0x00080000 ++#define UVC_QUIRK_SINGLE_ISO 0x00100000 /* Format flags */ #define UVC_FMT_FLAG_COMPRESSED 0x00000001 -@@ -598,6 +600,7 @@ struct uvc_device { +@@ -614,6 +616,7 @@ struct uvc_device { struct input_dev *input; char input_phys[64]; diff --git a/target/linux/ramips/patches-6.18/821-SPI-ralink-add-Ralink-SoC-spi-driver.patch b/target/linux/ramips/patches-6.18/821-SPI-ralink-add-Ralink-SoC-spi-driver.patch index ab33f8cb21..ea7e74d0b7 100644 --- a/target/linux/ramips/patches-6.18/821-SPI-ralink-add-Ralink-SoC-spi-driver.patch +++ b/target/linux/ramips/patches-6.18/821-SPI-ralink-add-Ralink-SoC-spi-driver.patch @@ -16,7 +16,7 @@ Acked-by: John Crispin --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig -@@ -932,6 +932,12 @@ config SPI_QCOM_GENI +@@ -999,6 +999,12 @@ config SPI_QCOM_GENI This driver can also be built as a module. If so, the module will be called spi-geni-qcom. @@ -31,14 +31,14 @@ Acked-by: John Crispin depends on (PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST) --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile -@@ -122,6 +122,7 @@ obj-$(CONFIG_SPI_RB4XX) += spi-rb4xx.o - obj-$(CONFIG_MACH_REALTEK_RTL) += spi-realtek-rtl.o +@@ -128,6 +128,7 @@ obj-$(CONFIG_MACH_REALTEK_RTL) += spi-r + obj-$(CONFIG_SPI_REALTEK_SNAND) += spi-realtek-rtl-snand.o obj-$(CONFIG_SPI_RPCIF) += spi-rpc-if.o obj-$(CONFIG_SPI_RSPI) += spi-rspi.o +obj-$(CONFIG_SPI_RT2880) += spi-rt2880.o + obj-$(CONFIG_SPI_RZV2H_RSPI) += spi-rzv2h-rspi.o obj-$(CONFIG_SPI_RZV2M_CSI) += spi-rzv2m-csi.o obj-$(CONFIG_SPI_S3C64XX) += spi-s3c64xx.o - obj-$(CONFIG_SPI_SC18IS602) += spi-sc18is602.o --- /dev/null +++ b/drivers/spi/spi-rt2880.c @@ -0,0 +1,473 @@ @@ -464,7 +464,7 @@ Acked-by: John Crispin + if (IS_ERR(clk)) + return dev_err_probe(dev, PTR_ERR(clk), "unable to get SYS clock"); + -+ master = devm_spi_alloc_master(dev, sizeof(*rs)); ++ master = devm_spi_alloc_host(dev, sizeof(*rs)); + if (!master) { + dev_err(dev, "master allocation failed\n"); + return -ENOMEM; diff --git a/target/linux/ramips/patches-6.18/831-01-mmc-mtk-sd-add-tuning-parameters-for-legacy-MIPS-MT7.patch b/target/linux/ramips/patches-6.18/831-01-mmc-mtk-sd-add-tuning-parameters-for-legacy-MIPS-MT7.patch index e7d353a13d..9146184da1 100644 --- a/target/linux/ramips/patches-6.18/831-01-mmc-mtk-sd-add-tuning-parameters-for-legacy-MIPS-MT7.patch +++ b/target/linux/ramips/patches-6.18/831-01-mmc-mtk-sd-add-tuning-parameters-for-legacy-MIPS-MT7.patch @@ -16,7 +16,7 @@ Signed-off-by: Shiji Yang --- a/drivers/mmc/host/mtk-sd.c +++ b/drivers/mmc/host/mtk-sd.c -@@ -75,8 +75,13 @@ +@@ -77,8 +77,13 @@ #define MSDC_PATCH_BIT 0xb0 #define MSDC_PATCH_BIT1 0xb4 #define MSDC_PATCH_BIT2 0xb8 @@ -30,15 +30,15 @@ Signed-off-by: Shiji Yang #define PAD_DS_TUNE 0x188 #define PAD_CMD_TUNE 0x18c #define EMMC51_CFG0 0x204 -@@ -408,6 +413,7 @@ struct mtk_mmc_compatible { - bool enhance_rx; - bool support_64g; +@@ -448,6 +453,7 @@ struct mtk_mmc_compatible { bool use_internal_cd; + bool support_new_tx; + bool support_new_rx; + bool mips_mt762x; }; struct msdc_tune_para { -@@ -547,6 +553,7 @@ static const struct mtk_mmc_compatible m +@@ -589,6 +595,7 @@ static const struct mtk_mmc_compatible m .stop_clk_fix = false, .enhance_rx = false, .use_internal_cd = true, @@ -46,7 +46,7 @@ Signed-off-by: Shiji Yang }; static const struct mtk_mmc_compatible mt7622_compat = { -@@ -975,7 +982,12 @@ static void msdc_set_mclk(struct msdc_ho +@@ -1083,7 +1090,12 @@ static void msdc_set_mclk(struct msdc_ho * mmc_select_hs400() will drop to 50Mhz and High speed mode, * tune result of hs200/200Mhz is not suitable for 50Mhz */ @@ -60,7 +60,7 @@ Signed-off-by: Shiji Yang writel(host->def_tune_para.iocon, host->base + MSDC_IOCON); if (host->top_base) { writel(host->def_tune_para.emmc_top_control, -@@ -1856,6 +1868,18 @@ static void msdc_init_hw(struct msdc_hos +@@ -2032,6 +2044,18 @@ static void msdc_init_hw(struct msdc_hos MSDC_PAD_TUNE_RXDLYSEL); } diff --git a/target/linux/ramips/patches-6.18/831-02-mmc-mtk-sd-disable-auto-CMD23-support-for-mt7620.patch b/target/linux/ramips/patches-6.18/831-02-mmc-mtk-sd-disable-auto-CMD23-support-for-mt7620.patch index b9d25dff84..9b458f3949 100644 --- a/target/linux/ramips/patches-6.18/831-02-mmc-mtk-sd-disable-auto-CMD23-support-for-mt7620.patch +++ b/target/linux/ramips/patches-6.18/831-02-mmc-mtk-sd-disable-auto-CMD23-support-for-mt7620.patch @@ -28,15 +28,15 @@ Signed-off-by: Shiji Yang --- a/drivers/mmc/host/mtk-sd.c +++ b/drivers/mmc/host/mtk-sd.c -@@ -412,6 +412,7 @@ struct mtk_mmc_compatible { - bool stop_clk_fix; +@@ -450,6 +450,7 @@ struct mtk_mmc_compatible { + u8 pop_en_cnt; bool enhance_rx; bool support_64g; + bool support_cmd23; bool use_internal_cd; - bool mips_mt762x; - }; -@@ -501,6 +502,7 @@ static const struct mtk_mmc_compatible m + bool support_new_tx; + bool support_new_rx; +@@ -541,6 +542,7 @@ static const struct mtk_mmc_compatible m .stop_clk_fix = false, .enhance_rx = false, .support_64g = false, @@ -44,23 +44,23 @@ Signed-off-by: Shiji Yang }; static const struct mtk_mmc_compatible mt2712_compat = { -@@ -514,6 +516,7 @@ static const struct mtk_mmc_compatible m - .stop_clk_fix = true, +@@ -555,6 +557,7 @@ static const struct mtk_mmc_compatible m + .stop_dly_sel = 3, .enhance_rx = true, .support_64g = true, + .support_cmd23 = true, }; static const struct mtk_mmc_compatible mt6779_compat = { -@@ -527,6 +530,7 @@ static const struct mtk_mmc_compatible m - .stop_clk_fix = true, +@@ -569,6 +572,7 @@ static const struct mtk_mmc_compatible m + .stop_dly_sel = 3, .enhance_rx = true, .support_64g = true, + .support_cmd23 = true, }; static const struct mtk_mmc_compatible mt6795_compat = { -@@ -540,6 +544,7 @@ static const struct mtk_mmc_compatible m +@@ -582,6 +586,7 @@ static const struct mtk_mmc_compatible m .stop_clk_fix = false, .enhance_rx = false, .support_64g = false, @@ -68,7 +68,7 @@ Signed-off-by: Shiji Yang }; static const struct mtk_mmc_compatible mt7620_compat = { -@@ -552,6 +557,7 @@ static const struct mtk_mmc_compatible m +@@ -594,6 +599,7 @@ static const struct mtk_mmc_compatible m .busy_check = false, .stop_clk_fix = false, .enhance_rx = false, @@ -76,23 +76,23 @@ Signed-off-by: Shiji Yang .use_internal_cd = true, .mips_mt762x = true, }; -@@ -567,6 +573,7 @@ static const struct mtk_mmc_compatible m - .stop_clk_fix = true, +@@ -610,6 +616,7 @@ static const struct mtk_mmc_compatible m + .stop_dly_sel = 3, .enhance_rx = true, .support_64g = false, + .support_cmd23 = true, }; static const struct mtk_mmc_compatible mt7986_compat = { -@@ -580,6 +587,7 @@ static const struct mtk_mmc_compatible m - .stop_clk_fix = true, +@@ -625,6 +632,7 @@ static const struct mtk_mmc_compatible m + .stop_dly_sel = 3, .enhance_rx = true, .support_64g = true, + .support_cmd23 = true, }; static const struct mtk_mmc_compatible mt8135_compat = { -@@ -593,6 +601,7 @@ static const struct mtk_mmc_compatible m +@@ -638,6 +646,7 @@ static const struct mtk_mmc_compatible m .stop_clk_fix = false, .enhance_rx = false, .support_64g = false, @@ -100,7 +100,7 @@ Signed-off-by: Shiji Yang }; static const struct mtk_mmc_compatible mt8173_compat = { -@@ -606,6 +615,7 @@ static const struct mtk_mmc_compatible m +@@ -651,6 +660,7 @@ static const struct mtk_mmc_compatible m .stop_clk_fix = false, .enhance_rx = false, .support_64g = false, @@ -108,23 +108,23 @@ Signed-off-by: Shiji Yang }; static const struct mtk_mmc_compatible mt8183_compat = { -@@ -619,6 +629,7 @@ static const struct mtk_mmc_compatible m - .stop_clk_fix = true, +@@ -666,6 +676,7 @@ static const struct mtk_mmc_compatible m + .stop_dly_sel = 3, .enhance_rx = true, .support_64g = true, + .support_cmd23 = true, }; static const struct mtk_mmc_compatible mt8516_compat = { -@@ -630,6 +641,7 @@ static const struct mtk_mmc_compatible m - .data_tune = true, +@@ -678,6 +689,7 @@ static const struct mtk_mmc_compatible m .busy_check = true, .stop_clk_fix = true, + .stop_dly_sel = 3, + .support_cmd23 = true, }; - static const struct of_device_id msdc_of_ids[] = { -@@ -2913,7 +2925,9 @@ static int msdc_drv_probe(struct platfor + static const struct mtk_mmc_compatible mt8196_compat = { +@@ -3095,7 +3107,9 @@ static int msdc_drv_probe(struct platfor if (mmc->caps & MMC_CAP_SDIO_IRQ) mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD; diff --git a/target/linux/ramips/patches-6.18/835-asoc-add-mt7620-support.patch b/target/linux/ramips/patches-6.18/835-asoc-add-mt7620-support.patch index d4027c904a..d366c8302a 100644 --- a/target/linux/ramips/patches-6.18/835-asoc-add-mt7620-support.patch +++ b/target/linux/ramips/patches-6.18/835-asoc-add-mt7620-support.patch @@ -19,23 +19,23 @@ Signed-off-by: John Crispin --- a/sound/soc/Kconfig +++ b/sound/soc/Kconfig -@@ -107,6 +107,7 @@ source "sound/soc/mxs/Kconfig" - source "sound/soc/pxa/Kconfig" +@@ -125,6 +125,7 @@ source "sound/soc/pxa/Kconfig" source "sound/soc/qcom/Kconfig" + source "sound/soc/renesas/Kconfig" source "sound/soc/rockchip/Kconfig" +source "sound/soc/ralink/Kconfig" source "sound/soc/samsung/Kconfig" - source "sound/soc/sh/Kconfig" - source "sound/soc/sof/Kconfig" + source "sound/soc/sdca/Kconfig" + source "sound/soc/spear/Kconfig" --- a/sound/soc/Makefile +++ b/sound/soc/Makefile -@@ -60,6 +60,7 @@ obj-$(CONFIG_SND_SOC) += kirkwood/ - obj-$(CONFIG_SND_SOC) += pxa/ +@@ -67,6 +67,7 @@ obj-$(CONFIG_SND_SOC) += pxa/ obj-$(CONFIG_SND_SOC) += qcom/ + obj-$(CONFIG_SND_SOC) += renesas/ obj-$(CONFIG_SND_SOC) += rockchip/ +obj-$(CONFIG_SND_SOC) += ralink/ obj-$(CONFIG_SND_SOC) += samsung/ - obj-$(CONFIG_SND_SOC) += sh/ + obj-$(CONFIG_SND_SOC) += sdca/ obj-$(CONFIG_SND_SOC) += sof/ --- /dev/null +++ b/sound/soc/ralink/Kconfig @@ -234,7 +234,7 @@ Signed-off-by: John Crispin + + /* disable clock at slave mode */ + if ((i2s->fmt & SND_SOC_DAIFMT_MASTER_MASK) == -+ SND_SOC_DAIFMT_CBM_CFM) { ++ SND_SOC_DAIFMT_CBP_CFP) { + regmap_update_bits(i2s->regmap, I2S_REG_CFG0, + I2S_REG_CFG0_CLK_DIS, + I2S_REG_CFG0_CLK_DIS); @@ -266,7 +266,7 @@ Signed-off-by: John Crispin + + /* disable clock at slave mode */ + if ((i2s->fmt & SND_SOC_DAIFMT_MASTER_MASK) == -+ SND_SOC_DAIFMT_CBM_CFM) { ++ SND_SOC_DAIFMT_CBP_CFP) { + regmap_update_bits(i2s->regmap, I2S_REG_DIVCMP, + I2S_REG_DIVCMP_CLKEN, 0); + return 0; @@ -303,13 +303,13 @@ Signed-off-by: John Crispin + + /* set master/slave audio interface */ + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { -+ case SND_SOC_DAIFMT_CBM_CFM: ++ case SND_SOC_DAIFMT_CBP_CFP: + if (i2s->flags & RALINK_FLAGS_TXONLY) + cfg0 |= I2S_REG_CFG0_SLAVE_EN; + else + cfg0 |= I2S_REG_CFG0_SLAVE; + break; -+ case SND_SOC_DAIFMT_CBS_CFS: ++ case SND_SOC_DAIFMT_CBC_CFC: + break; + default: + return -EINVAL; @@ -969,7 +969,7 @@ Signed-off-by: John Crispin + +static struct platform_driver ralink_i2s_driver = { + .probe = ralink_i2s_probe, -+ .remove_new = ralink_i2s_remove, ++ .remove = ralink_i2s_remove, + .driver = { + .name = DRV_NAME, + .of_match_table = ralink_i2s_match_table, From b57038804a4d5027f8418d76a3ccf81e71e4dd5d Mon Sep 17 00:00:00 2001 From: Mieczyslaw Nalewaj Date: Tue, 6 Jan 2026 11:20:21 +0100 Subject: [PATCH 62/78] ramips: 6.18: update 831-03-mmc-mtk-sd patch Update patch 831-03-mmc-mtk-sd-use-default-PATCH_BIT1-2-values-for-mt762.patch to a newer version compatible with kernel 6.18. Signed-off-by: Mieczyslaw Nalewaj Link: https://github.com/openwrt/openwrt/pull/21418 Signed-off-by: Robert Marko --- ...efault-PATCH_BIT1-2-values-for-mt762.patch | 42 +++++++++++-------- 1 file changed, 25 insertions(+), 17 deletions(-) diff --git a/target/linux/ramips/patches-6.18/831-03-mmc-mtk-sd-use-default-PATCH_BIT1-2-values-for-mt762.patch b/target/linux/ramips/patches-6.18/831-03-mmc-mtk-sd-use-default-PATCH_BIT1-2-values-for-mt762.patch index 3142870aee..be705aeb93 100644 --- a/target/linux/ramips/patches-6.18/831-03-mmc-mtk-sd-use-default-PATCH_BIT1-2-values-for-mt762.patch +++ b/target/linux/ramips/patches-6.18/831-03-mmc-mtk-sd-use-default-PATCH_BIT1-2-values-for-mt762.patch @@ -1,30 +1,38 @@ From: Shiji Yang -Date: Sat, 24 May 2025 15:53:26 +0800 +Date: Wed, 18 Jun 2025 22:35:12 +0800 Subject: [PATCH 3/3] mmc: mtk-sd: use default PATCH_BIT1/2 values for mt7620 -The definitions of these two registers seem to be slightly different -from other variants. Use their default values to follow the vendor -SDK driver behaviors. +The register map definitions of these PATCH_BIT registers seem to be +slightly different from other variants. Use their default values to +respect the vendor SDK driver behaviors. Signed-off-by: Shiji Yang --- - drivers/mmc/host/mtk-sd.c | 8 +++++--- - 1 file changed, 5 insertions(+), 3 deletions(-) + drivers/mmc/host/mtk-sd.c | 9 ++++++--- + 1 file changed, 6 insertions(+), 3 deletions(-) --- a/drivers/mmc/host/mtk-sd.c +++ b/drivers/mmc/host/mtk-sd.c -@@ -1804,9 +1804,11 @@ static void msdc_init_hw(struct msdc_hos - } - writel(0, host->base + MSDC_IOCON); - sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_DDLSEL, 0); -- writel(0x403c0046, host->base + MSDC_PATCH_BIT); -- sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1); -- writel(0xffff4089, host->base + MSDC_PATCH_BIT1); +@@ -1955,7 +1955,8 @@ static void msdc_init_hw(struct msdc_hos + val |= FIELD_PREP(MSDC_CKGEN_MSDC_DLY_SEL, 1); + + /* First MSDC_PATCH_BIT setup is done: pull the trigger! */ +- writel(val, host->base + MSDC_PATCH_BIT); ++ if (!host->dev_comp->mips_mt762x) ++ writel(val, host->base + MSDC_PATCH_BIT); + + /* Set wr data, crc status, cmd response turnaround period for UHS104 */ + pb1_val = FIELD_PREP(MSDC_PB1_WRDAT_CRC_TACNTR, 1); +@@ -2018,8 +2019,10 @@ static void msdc_init_hw(struct msdc_hos + pb2_val |= MSDC_PB2_SUPPORT_64G; + + /* Patch Bit 1/2 setup is done: pull the trigger! */ +- writel(pb1_val, host->base + MSDC_PATCH_BIT1); +- writel(pb2_val, host->base + MSDC_PATCH_BIT2); + if (!host->dev_comp->mips_mt762x) { -+ writel(0x403c0046, host->base + MSDC_PATCH_BIT); -+ sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1); -+ writel(0xffff4089, host->base + MSDC_PATCH_BIT1); ++ writel(pb1_val, host->base + MSDC_PATCH_BIT1); ++ writel(pb2_val, host->base + MSDC_PATCH_BIT2); + } sdr_set_bits(host->base + EMMC50_CFG0, EMMC50_CFG_CFCSTS_SEL); - if (host->dev_comp->stop_clk_fix) { + if (host->dev_comp->data_tune) { From 6b1da2b9b3c8e6e5c619955002f0f7c551d178ce Mon Sep 17 00:00:00 2001 From: Mieczyslaw Nalewaj Date: Tue, 6 Jan 2026 11:10:22 +0100 Subject: [PATCH 63/78] ramips: 6.18: update 802-GPIO-MIPS-ralink patch Replace previous bgpio_init usage with a full gpio_chip registration so the driver integrates cleanly with the kernel GPIO core. Add drivers/gpio/gpio-ralink.c implementing a gpio_chip with: - get/set, direction_input/direction_output, get_direction - get_multiple/set_multiple to support efficient multi-bit ops - DT handling for determining ngpios (reads "ngpios" or falls back to gpio-ranges) - MAX_NGPIOS cap and safe defaults Signed-off-by: Mieczyslaw Nalewaj Link: https://github.com/openwrt/openwrt/pull/21418 Signed-off-by: Robert Marko --- ...alink-add-gpio-driver-for-ralink-SoC.patch | 110 ++++++++++++++++-- 1 file changed, 98 insertions(+), 12 deletions(-) diff --git a/target/linux/ramips/patches-6.18/802-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch b/target/linux/ramips/patches-6.18/802-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch index 971f39f8d8..75892d4c8c 100644 --- a/target/linux/ramips/patches-6.18/802-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch +++ b/target/linux/ramips/patches-6.18/802-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch @@ -15,7 +15,7 @@ Signed-off-by: John Crispin --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig -@@ -555,6 +555,14 @@ config GPIO_PXA +@@ -583,6 +583,14 @@ config GPIO_PXA help Say yes here to support the PXA GPIO device. @@ -32,9 +32,9 @@ Signed-off-by: John Crispin depends on ARCH_RENESAS || COMPILE_TEST --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile -@@ -136,6 +136,7 @@ obj-$(CONFIG_GPIO_PISOSR) += gpio-pisos - obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o +@@ -147,6 +147,7 @@ obj-$(CONFIG_GPIO_PL061) += gpio-pl061. obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio-pmic-eic-sprd.o + obj-$(CONFIG_GPIO_POLARFIRE_SOC) += gpio-mpfs.o obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o +obj-$(CONFIG_GPIO_RALINK) += gpio-ralink.o obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o @@ -42,7 +42,7 @@ Signed-off-by: John Crispin obj-$(CONFIG_GPIO_RCAR) += gpio-rcar.o --- /dev/null +++ b/drivers/gpio/gpio-ralink.c -@@ -0,0 +1,230 @@ +@@ -0,0 +1,316 @@ +/* + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published @@ -60,6 +60,8 @@ Signed-off-by: John Crispin +#include +#include + ++#define MAX_NGPIOS 95 ++ +enum ralink_gpio_reg { + GPIO_REG_INT = 0, + GPIO_REG_EDGE, @@ -182,11 +184,77 @@ Signed-off-by: John Crispin + GPIOCHIP_IRQ_RESOURCE_HELPERS, +}; + ++static int ralink_get_direction(struct gpio_chip *gc, unsigned offset) ++{ ++ struct ralink_gpio_chip *rg = gpiochip_get_data(gc); ++ ++ return !(rt_gpio_r32(rg, GPIO_REG_DIR) & BIT(offset)); ++} ++ ++static int ralink_direction_input(struct gpio_chip *gc, unsigned offset) ++{ ++ struct ralink_gpio_chip *rg = gpiochip_get_data(gc); ++ u32 val = rt_gpio_r32(rg, GPIO_REG_DIR); ++ rt_gpio_w32(rg, GPIO_REG_DIR, val & ~BIT(offset)); ++ ++ return 0; ++} ++ ++static int ralink_direction_output(struct gpio_chip *gc, unsigned offset, int val) ++{ ++ struct ralink_gpio_chip *rg = gpiochip_get_data(gc); ++ rt_gpio_w32(rg, val ? GPIO_REG_SET : GPIO_REG_RESET, BIT(offset)); ++ rt_gpio_w32(rg, GPIO_REG_DIR, rt_gpio_r32(rg, GPIO_REG_DIR) | BIT(offset)); ++ ++ return 0; ++} ++ ++static int ralink_get(struct gpio_chip *gc, unsigned offset) ++{ ++ struct ralink_gpio_chip *rg = gpiochip_get_data(gc); ++ ++ return !!(rt_gpio_r32(rg, GPIO_REG_DATA) & BIT(offset)); ++} ++ ++static int ralink_set(struct gpio_chip *gc, unsigned offset, int val) ++{ ++ struct ralink_gpio_chip *rg = gpiochip_get_data(gc); ++ rt_gpio_w32(rg, val ? GPIO_REG_SET : GPIO_REG_RESET, BIT(offset)); ++ ++ return 0; ++} ++ ++static int ralink_set_multiple(struct gpio_chip *gc, unsigned long *mask, ++ unsigned long *bits) ++{ ++ struct ralink_gpio_chip *rg = gpiochip_get_data(gc); ++ unsigned long set = *mask & *bits; ++ unsigned long reset = *mask & ~*bits; ++ ++ if (set) ++ rt_gpio_w32(rg, GPIO_REG_SET, set); ++ if (reset) ++ rt_gpio_w32(rg, GPIO_REG_RESET, reset); ++ ++ return 0; ++} ++ ++static int ralink_get_multiple(struct gpio_chip *gc, unsigned long *mask, ++ unsigned long *bits) ++{ ++ struct ralink_gpio_chip *rg = gpiochip_get_data(gc); ++ *bits = rt_gpio_r32(rg, GPIO_REG_DATA) & *mask; ++ ++ return 0; ++} ++ +static int ralink_gpio_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; + struct ralink_gpio_chip *rg; ++ struct of_phandle_args args; ++ u32 ngpios = 0; + int ret; + + rg = devm_kzalloc(dev, sizeof(struct ralink_gpio_chip), GFP_KERNEL); @@ -203,16 +271,34 @@ Signed-off-by: John Crispin + return -EINVAL; + } + ++ if (of_property_read_u32(np, "ngpios", &ngpios) < 0) ++ ngpios = 0; ++ ++ if (ngpios == 0) { ++ if (of_parse_phandle_with_args(np, "gpio-ranges", "#gpio-cells", 0, &args) == 0) { ++ if (args.args_count > 0) ++ ngpios = args.args[args.args_count - 1]; ++ of_node_put(args.np); ++ } ++ } ++ ++ if (ngpios == 0 || ngpios > MAX_NGPIOS) ++ ngpios = MAX_NGPIOS; ++ + spin_lock_init(&rg->lock); + -+ ret = bgpio_init(&rg->chip, dev, 4, -+ rg->membase + rg->regs[GPIO_REG_DATA], -+ rg->membase + rg->regs[GPIO_REG_SET], -+ rg->membase + rg->regs[GPIO_REG_RESET], -+ rg->membase + rg->regs[GPIO_REG_DIR], -+ NULL, 0); -+ if (ret) -+ return dev_err_probe(dev, ret, "bgpio_init() failed\n"); ++ rg->chip.label = dev_name(dev); ++ rg->chip.parent = dev; ++ rg->chip.owner = THIS_MODULE; ++ rg->chip.base = -1; ++ rg->chip.ngpio = ngpios; ++ rg->chip.get_direction = ralink_get_direction; ++ rg->chip.direction_input = ralink_direction_input; ++ rg->chip.direction_output= ralink_direction_output; ++ rg->chip.get = ralink_get; ++ rg->chip.set = ralink_set; ++ rg->chip.get_multiple = ralink_get_multiple; ++ rg->chip.set_multiple = ralink_set_multiple; + + /* set polarity to low for all lines */ + rt_gpio_w32(rg, GPIO_REG_POL, 0); From eac2a6c404671ef115716aff4fe57cf93423dd4e Mon Sep 17 00:00:00 2001 From: Mieczyslaw Nalewaj Date: Tue, 6 Jan 2026 11:04:07 +0100 Subject: [PATCH 64/78] ramips: 6.18: refresh patches Refreshed patches for ramips/patches-6.18 by running make target/linux/refresh Signed-off-by: Mieczyslaw Nalewaj Link: https://github.com/openwrt/openwrt/pull/21418 Signed-off-by: Robert Marko --- target/linux/ramips/patches-6.18/200-add-ralink-eth.patch | 4 ++-- ...-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch | 2 +- .../315-owrt-hack-fix-mt7688-cache-issue.patch | 2 +- .../patches-6.18/332-mt7620-conditional-stack-align.patch | 2 +- ...05-mtd-spi-nor-Add-support-for-BoHong-bh25q128as.patch | 4 ++-- ...rawnand-add-driver-support-for-MT7621-nand-flash.patch | 4 ++-- .../720-NET-no-auto-carrier-off-support.patch | 6 +++--- .../804-dma-ralink-add-back-gdma-driver.patch | 8 ++++---- .../825-i2c-MIPS-adds-ralink-I2C-driver.patch | 4 ++-- .../830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch | 2 +- .../840-serial-add-ugly-custom-baud-rate-hack.patch | 2 +- ...70-Input-sx951x-add-Semtech-SX9512-SX9513-driver.patch | 2 +- 12 files changed, 21 insertions(+), 21 deletions(-) diff --git a/target/linux/ramips/patches-6.18/200-add-ralink-eth.patch b/target/linux/ramips/patches-6.18/200-add-ralink-eth.patch index da1c5aaa5e..c7b77abf05 100644 --- a/target/linux/ramips/patches-6.18/200-add-ralink-eth.patch +++ b/target/linux/ramips/patches-6.18/200-add-ralink-eth.patch @@ -1,6 +1,6 @@ --- a/drivers/net/ethernet/Kconfig +++ b/drivers/net/ethernet/Kconfig -@@ -175,6 +175,7 @@ source "drivers/net/ethernet/pensando/Kc +@@ -176,6 +176,7 @@ source "drivers/net/ethernet/pensando/Kc source "drivers/net/ethernet/qlogic/Kconfig" source "drivers/net/ethernet/brocade/Kconfig" source "drivers/net/ethernet/qualcomm/Kconfig" @@ -10,7 +10,7 @@ source "drivers/net/ethernet/renesas/Kconfig" --- a/drivers/net/ethernet/Makefile +++ b/drivers/net/ethernet/Makefile -@@ -78,6 +78,7 @@ obj-$(CONFIG_NET_VENDOR_PACKET_ENGINES) +@@ -79,6 +79,7 @@ obj-$(CONFIG_NET_VENDOR_PACKET_ENGINES) obj-$(CONFIG_NET_VENDOR_PASEMI) += pasemi/ obj-$(CONFIG_NET_VENDOR_QLOGIC) += qlogic/ obj-$(CONFIG_NET_VENDOR_QUALCOMM) += qualcomm/ diff --git a/target/linux/ramips/patches-6.18/311-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch b/target/linux/ramips/patches-6.18/311-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch index b13d2b605b..f7256d69ae 100644 --- a/target/linux/ramips/patches-6.18/311-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch +++ b/target/linux/ramips/patches-6.18/311-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch @@ -96,7 +96,7 @@ Signed-off-by: John Crispin } --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig -@@ -754,10 +754,15 @@ config EP93XX_TIMER +@@ -765,10 +765,15 @@ config EP93XX_TIMER help Enables support for the Cirrus Logic timer block EP93XX. diff --git a/target/linux/ramips/patches-6.18/315-owrt-hack-fix-mt7688-cache-issue.patch b/target/linux/ramips/patches-6.18/315-owrt-hack-fix-mt7688-cache-issue.patch index 4bf5f6c33a..5a02f7fd6f 100644 --- a/target/linux/ramips/patches-6.18/315-owrt-hack-fix-mt7688-cache-issue.patch +++ b/target/linux/ramips/patches-6.18/315-owrt-hack-fix-mt7688-cache-issue.patch @@ -18,7 +18,7 @@ Signed-off-by: John Crispin /* * In order to reduce the possibility of kernel panic when failed to -@@ -828,6 +827,7 @@ void __init setup_arch(char **cmdline_p) +@@ -825,6 +824,7 @@ void __init setup_arch(char **cmdline_p) cpu_cache_init(); paging_init(); diff --git a/target/linux/ramips/patches-6.18/332-mt7620-conditional-stack-align.patch b/target/linux/ramips/patches-6.18/332-mt7620-conditional-stack-align.patch index 37b2b19657..6bff40ad90 100644 --- a/target/linux/ramips/patches-6.18/332-mt7620-conditional-stack-align.patch +++ b/target/linux/ramips/patches-6.18/332-mt7620-conditional-stack-align.patch @@ -17,7 +17,7 @@ Signed-off-by: Mieczyslaw Nalewaj --- a/fs/exec.c +++ b/fs/exec.c -@@ -750,8 +750,10 @@ int setup_arg_pages(struct linux_binprm +@@ -632,8 +632,10 @@ int setup_arg_pages(struct linux_binprm mm->arg_start = bprm->p - stack_shift; bprm->p = vma->vm_end - stack_shift; #else diff --git a/target/linux/ramips/patches-6.18/405-mtd-spi-nor-Add-support-for-BoHong-bh25q128as.patch b/target/linux/ramips/patches-6.18/405-mtd-spi-nor-Add-support-for-BoHong-bh25q128as.patch index 2d780878be..ac6ca3954c 100644 --- a/target/linux/ramips/patches-6.18/405-mtd-spi-nor-Add-support-for-BoHong-bh25q128as.patch +++ b/target/linux/ramips/patches-6.18/405-mtd-spi-nor-Add-support-for-BoHong-bh25q128as.patch @@ -59,7 +59,7 @@ Signed-off-by: David Bauer +}; --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c -@@ -1966,6 +1966,7 @@ int spi_nor_sr2_bit7_quad_enable(struct +@@ -1943,6 +1943,7 @@ int spi_nor_sr2_bit7_quad_enable(struct static const struct spi_nor_manufacturer *manufacturers[] = { &spi_nor_atmel, @@ -69,7 +69,7 @@ Signed-off-by: David Bauer &spi_nor_everspin, --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h -@@ -580,6 +580,7 @@ struct sfdp { +@@ -585,6 +585,7 @@ struct sfdp { /* Manufacturer drivers. */ extern const struct spi_nor_manufacturer spi_nor_atmel; diff --git a/target/linux/ramips/patches-6.18/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch b/target/linux/ramips/patches-6.18/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch index 0183199348..4fd8eeb3db 100644 --- a/target/linux/ramips/patches-6.18/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch +++ b/target/linux/ramips/patches-6.18/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch @@ -20,7 +20,7 @@ Signed-off-by: Weijie Gao --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig -@@ -337,6 +337,14 @@ config MTD_NAND_QCOM +@@ -311,6 +311,14 @@ config MTD_NAND_QCOM Enables support for NAND flash chips on SoCs containing the EBI2 NAND controller. This controller is found on IPQ806x SoC. @@ -37,7 +37,7 @@ Signed-off-by: Weijie Gao depends on MTD_NAND_ECC_MEDIATEK --- a/drivers/mtd/nand/raw/Makefile +++ b/drivers/mtd/nand/raw/Makefile -@@ -47,6 +47,7 @@ obj-$(CONFIG_MTD_NAND_SUNXI) += sunxi_n +@@ -46,6 +46,7 @@ obj-$(CONFIG_MTD_NAND_SUNXI) += sunxi_n obj-$(CONFIG_MTD_NAND_HISI504) += hisi504_nand.o obj-$(CONFIG_MTD_NAND_BRCMNAND) += brcmnand/ obj-$(CONFIG_MTD_NAND_QCOM) += qcom_nandc.o diff --git a/target/linux/ramips/patches-6.18/720-NET-no-auto-carrier-off-support.patch b/target/linux/ramips/patches-6.18/720-NET-no-auto-carrier-off-support.patch index f5f9c8e3a4..752a1ec944 100644 --- a/target/linux/ramips/patches-6.18/720-NET-no-auto-carrier-off-support.patch +++ b/target/linux/ramips/patches-6.18/720-NET-no-auto-carrier-off-support.patch @@ -10,7 +10,7 @@ Signed-off-by: John Crispin --- a/drivers/net/phy/phy_device.c +++ b/drivers/net/phy/phy_device.c -@@ -295,7 +295,7 @@ static void phy_link_change(struct phy_d +@@ -257,7 +257,7 @@ static void phy_link_change(struct phy_d if (up) netif_carrier_on(netdev); @@ -21,11 +21,11 @@ Signed-off-by: John Crispin if (phydev->mii_ts && phydev->mii_ts->link_state) --- a/include/linux/phy.h +++ b/include/linux/phy.h -@@ -685,6 +685,7 @@ struct phy_device { +@@ -659,6 +659,7 @@ struct phy_device { unsigned downshifted_rate:1; unsigned is_on_sfp_module:1; unsigned mac_managed_pm:1; + unsigned no_auto_carrier_off:1; unsigned wol_enabled:1; + unsigned is_genphy_driven:1; - unsigned autoneg:1; diff --git a/target/linux/ramips/patches-6.18/804-dma-ralink-add-back-gdma-driver.patch b/target/linux/ramips/patches-6.18/804-dma-ralink-add-back-gdma-driver.patch index 4f39000a5e..e6dda281ed 100644 --- a/target/linux/ramips/patches-6.18/804-dma-ralink-add-back-gdma-driver.patch +++ b/target/linux/ramips/patches-6.18/804-dma-ralink-add-back-gdma-driver.patch @@ -14,9 +14,9 @@ Signed-off-by: Shiji Yang --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig -@@ -564,6 +564,12 @@ config PLX_DMA - These are exposed via extra functions on the switch's - upstream port. Each function exposes one DMA channel. +@@ -580,6 +580,12 @@ config SOPHGO_CV1800B_DMAMUX + series SoCs. + Say Y here if your board have this soc. +config RALINK_GDMA + tristate "RALINK GDMA support" @@ -36,4 +36,4 @@ Signed-off-by: Shiji Yang +obj-$(CONFIG_RALINK_GDMA) += ralink-gdma.o obj-$(CONFIG_RENESAS_DMA) += sh/ obj-$(CONFIG_SF_PDMA) += sf-pdma/ - obj-$(CONFIG_STE_DMA40) += ste_dma40.o ste_dma40_ll.o + obj-$(CONFIG_SOPHGO_CV1800B_DMAMUX) += cv1800b-dmamux.o diff --git a/target/linux/ramips/patches-6.18/825-i2c-MIPS-adds-ralink-I2C-driver.patch b/target/linux/ramips/patches-6.18/825-i2c-MIPS-adds-ralink-I2C-driver.patch index 5bed8ea448..6f630a4a79 100644 --- a/target/linux/ramips/patches-6.18/825-i2c-MIPS-adds-ralink-I2C-driver.patch +++ b/target/linux/ramips/patches-6.18/825-i2c-MIPS-adds-ralink-I2C-driver.patch @@ -45,9 +45,9 @@ Signed-off-by: John Crispin +}; --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig -@@ -1062,6 +1062,11 @@ config I2C_RK3X +@@ -1103,6 +1103,11 @@ config I2C_RTL9300 This driver can also be built as a module. If so, the module will - be called i2c-rk3x. + be called i2c-rtl9300. +config I2C_RALINK + tristate "Ralink I2C Controller" diff --git a/target/linux/ramips/patches-6.18/830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch b/target/linux/ramips/patches-6.18/830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch index c4cf5ddcde..e98dc38c9a 100644 --- a/target/linux/ramips/patches-6.18/830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch +++ b/target/linux/ramips/patches-6.18/830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch @@ -25,7 +25,7 @@ Signed-off-by: John Crispin --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig -@@ -1090,6 +1090,8 @@ config MMC_OWL +@@ -1129,6 +1129,8 @@ config MMC_LOONGSON2 config MMC_SDHCI_EXTERNAL_DMA bool diff --git a/target/linux/ramips/patches-6.18/840-serial-add-ugly-custom-baud-rate-hack.patch b/target/linux/ramips/patches-6.18/840-serial-add-ugly-custom-baud-rate-hack.patch index df360b380f..bed8ff5cd0 100644 --- a/target/linux/ramips/patches-6.18/840-serial-add-ugly-custom-baud-rate-hack.patch +++ b/target/linux/ramips/patches-6.18/840-serial-add-ugly-custom-baud-rate-hack.patch @@ -10,7 +10,7 @@ Signed-off-by: John Crispin --- a/drivers/tty/serial/serial_core.c +++ b/drivers/tty/serial/serial_core.c -@@ -503,6 +503,9 @@ uart_get_baud_rate(struct uart_port *por +@@ -501,6 +501,9 @@ uart_get_baud_rate(struct uart_port *por break; } diff --git a/target/linux/ramips/patches-6.18/870-Input-sx951x-add-Semtech-SX9512-SX9513-driver.patch b/target/linux/ramips/patches-6.18/870-Input-sx951x-add-Semtech-SX9512-SX9513-driver.patch index 8c2f9074b5..b9374bd21e 100644 --- a/target/linux/ramips/patches-6.18/870-Input-sx951x-add-Semtech-SX9512-SX9513-driver.patch +++ b/target/linux/ramips/patches-6.18/870-Input-sx951x-add-Semtech-SX9512-SX9513-driver.patch @@ -27,7 +27,7 @@ Signed-off-by: David Bauer --- a/drivers/input/keyboard/Kconfig +++ b/drivers/input/keyboard/Kconfig -@@ -604,6 +604,17 @@ config KEYBOARD_SUNKBD +@@ -599,6 +599,17 @@ config KEYBOARD_SUNKBD To compile this driver as a module, choose M here: the module will be called sunkbd. From f5c0225a4880eaff85d32d5aa5037c2c5ef6bbe3 Mon Sep 17 00:00:00 2001 From: Mieczyslaw Nalewaj Date: Tue, 6 Jan 2026 11:14:37 +0100 Subject: [PATCH 65/78] ramips: mtk_eth_soc: handle frag_cache on Linux >= 6.13 Fix fe_clean_rx to handle the changed frag_cache layout on newer kernels. For kernels >= 6.13 the fragment cache needs to be converted from its encoded_page value instead of using the old va field. Add an ifdef to use frag_cache.encoded_page & PAGE_MASK and virt_to_page for those kernels, keep the old path for older kernels. Signed-off-by: Mieczyslaw Nalewaj Link: https://github.com/openwrt/openwrt/pull/21418 Signed-off-by: Robert Marko --- .../files/drivers/net/ethernet/ralink/mtk_eth_soc.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.c b/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.c index a67dc145da..f53746eee8 100644 --- a/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.c +++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.c @@ -34,6 +34,7 @@ #include #include #include +#include #include @@ -243,10 +244,18 @@ static void fe_clean_rx(struct fe_priv *priv) ring->rx_dma = NULL; } +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,13,0) + void *vaddr = (void *)(ring->frag_cache.encoded_page & PAGE_MASK); + if (!vaddr) + return; + + page = virt_to_page(vaddr); +#else if (!ring->frag_cache.va) return; page = virt_to_page(ring->frag_cache.va); +#endif __page_frag_cache_drain(page, ring->frag_cache.pagecnt_bias); memset(&ring->frag_cache, 0, sizeof(ring->frag_cache)); } From 10127e220117c0d2838d6c17744e31ccba7d1f39 Mon Sep 17 00:00:00 2001 From: Mieczyslaw Nalewaj Date: Wed, 7 Jan 2026 08:09:29 +0100 Subject: [PATCH 66/78] ramips: mt7621_nand: fix MODULE_DEVICE_TABLE reference The MODULE_DEVICE_TABLE macro was using an incorrect parameter 'match' instead of the actual device table name 'mt7621_nfc_id_table'. This fixes the reference to use the correct symbol name, ensuring proper device table registration for module autoloading. Signed-off-by: Mieczyslaw Nalewaj Link: https://github.com/openwrt/openwrt/pull/21418 Signed-off-by: Robert Marko --- target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c b/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c index 7828d383ab..8d040014d4 100644 --- a/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c +++ b/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c @@ -1327,7 +1327,7 @@ static const struct of_device_id mt7621_nfc_id_table[] = { { .compatible = "mediatek,mt7621-nfc" }, { }, }; -MODULE_DEVICE_TABLE(of, match); +MODULE_DEVICE_TABLE(of, mt7621_nfc_id_table); static struct platform_driver mt7621_nfc_driver = { .probe = mt7621_nfc_probe, From 5d7aa6395e186653abcd60d75002ab60535fea89 Mon Sep 17 00:00:00 2001 From: Mieczyslaw Nalewaj Date: Tue, 6 Jan 2026 10:42:57 +0100 Subject: [PATCH 67/78] ramips: enable 6.18 testing kernel The ramips now supports 6.18 kernel as testing. Signed-off-by: Mieczyslaw Nalewaj Link: https://github.com/openwrt/openwrt/pull/21418 Signed-off-by: Robert Marko --- target/linux/ramips/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/target/linux/ramips/Makefile b/target/linux/ramips/Makefile index 02597e13af..8243d2f139 100644 --- a/target/linux/ramips/Makefile +++ b/target/linux/ramips/Makefile @@ -11,6 +11,7 @@ SUBTARGETS:=mt7620 mt7621 mt76x8 rt288x rt305x rt3883 FEATURES:=squashfs gpio KERNEL_PATCHVER:=6.12 +KERNEL_TESTING_PATCHVER:=6.18 define Target/Description Build firmware images for Ralink RT288x/RT3xxx based boards. From f4440c35b28044daf0024f6ef364c6fd0548e03e Mon Sep 17 00:00:00 2001 From: Nick Hainke Date: Sat, 4 Apr 2026 17:38:48 +0200 Subject: [PATCH 68/78] ethtool: update to 6.19 Version 6.19 - Feb 14, 2026 * Feature: support HW timestamp configuration (--set-hwtimestamp-cfg) * Feature: display HW timestamp source (-T) * Feature: support PLCA notifications (--get/set-plca-cfg) * Feature: add PSE priority management support (--show/set-pse) * Feature: support PSE notifications (--show/set-pse) * Feature: support configuring RSS on IPv6 Flow Label (-n/-N) * Feature: support FEC bit error histograms (--show-fec) * Feature: register dump decoding for TI K3 CPSW and its ALE table (-d) * Fix: fix missing headers in text output * Fix: fix print_string when the value is NULL (-Werror=format-security) * Fix: fix JSON output of SFP diagnostics * Fix: fix duplicated JSON keys in module info * Misc: clarify that symmetric RSS may be on by default (-x/-X) * Misc: add AppStream metainfo file to %files section Link: https://github.com/openwrt/openwrt/pull/22780 Signed-off-by: Nick Hainke --- package/network/utils/ethtool/Makefile | 4 ++-- ...-ethtool-make-building-for-RSS-input-xfrm-optional.patch | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/package/network/utils/ethtool/Makefile b/package/network/utils/ethtool/Makefile index bbd558a27a..77545ca246 100644 --- a/package/network/utils/ethtool/Makefile +++ b/package/network/utils/ethtool/Makefile @@ -8,13 +8,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=ethtool -PKG_VERSION:=6.15 +PKG_VERSION:=6.19 PKG_RELEASE:=1 PKG_MAINTAINER:=Felix Fietkau PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=@KERNEL/software/network/ethtool -PKG_HASH:=9477c365114d910120aaec5336a1d16196c833d8486f7c6da67bedef57880ade +PKG_HASH:=1c2114ab6e0c0d2aa67d699960eb11df4f341e2403139cdf28ae9da858a6025f PKG_LICENSE:=GPL-2.0 PKG_LICENSE_FILES:=COPYING diff --git a/package/network/utils/ethtool/patches/0001-ethtool-make-building-for-RSS-input-xfrm-optional.patch b/package/network/utils/ethtool/patches/0001-ethtool-make-building-for-RSS-input-xfrm-optional.patch index 7bc74ad3bc..814e703265 100644 --- a/package/network/utils/ethtool/patches/0001-ethtool-make-building-for-RSS-input-xfrm-optional.patch +++ b/package/network/utils/ethtool/patches/0001-ethtool-make-building-for-RSS-input-xfrm-optional.patch @@ -37,7 +37,7 @@ Signed-off-by: Daniel Golle [Install the bash-completion script in this directory. @<:@default=yes@:>@]), --- a/ethtool.c +++ b/ethtool.c -@@ -4170,7 +4170,7 @@ static int do_grxfh(struct cmd_context * +@@ -4176,7 +4176,7 @@ static int do_grxfh(struct cmd_context * } if (rss->hfunc) printf(" Unknown hash function: 0x%x\n", rss->hfunc); @@ -46,7 +46,7 @@ Signed-off-by: Daniel Golle printf("RSS input transformation:\n"); printf(" symmetric-xor: %s\n", (rss->input_xfrm & RXH_XFRM_SYM_XOR) ? "on" : "off"); -@@ -4182,6 +4182,7 @@ static int do_grxfh(struct cmd_context * +@@ -4188,6 +4188,7 @@ static int do_grxfh(struct cmd_context * if (rss->input_xfrm) printf(" Unknown bits in RSS input transformation: 0x%x\n", rss->input_xfrm); @@ -54,7 +54,7 @@ Signed-off-by: Daniel Golle out: free(hfuncs); -@@ -4503,7 +4504,15 @@ static int do_srxfh(struct cmd_context * +@@ -4509,7 +4510,15 @@ static int do_srxfh(struct cmd_context * rss->cmd = ETHTOOL_SRSSH; rss->rss_context = rss_context; rss->hfunc = req_hfunc; From 105750c673929ae77946fd1f42bbf75b185fca3a Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Sun, 5 Apr 2026 09:06:23 +0800 Subject: [PATCH 69/78] tools/xz: update to 5.8.3 This includes a fix for (CVE-2026-34743). Release Notes: https://github.com/tukaani-project/xz/releases/tag/v5.8.3 Signed-off-by: Shiji Yang Link: https://github.com/openwrt/openwrt/pull/22790 Signed-off-by: Hauke Mehrtens --- tools/xz/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/xz/Makefile b/tools/xz/Makefile index d17cdb47af..950bff4e1b 100644 --- a/tools/xz/Makefile +++ b/tools/xz/Makefile @@ -7,13 +7,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=xz -PKG_VERSION:=5.8.2 +PKG_VERSION:=5.8.3 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 PKG_SOURCE_URL:=https://github.com/tukaani-project/xz/releases/download/v$(PKG_VERSION) \ @SF/lzmautils \ http://tukaani.org/xz -PKG_HASH:=60345d7c0b9c8d7ffa469e96898c300def3669f5047fc76219b819340839f3d8 +PKG_HASH:=33bf69c0d6c698e83a68f77e6c1f465778e418ca0b3d59860d3ab446f4ac99a6 PKG_CPE_ID:=cpe:/a:tukaani:xz HOST_BUILD_PARALLEL:=1 From 08bf7ef6d21c73a4e2fde690aec63b598aada3c0 Mon Sep 17 00:00:00 2001 From: Eric Fahlgren Date: Sat, 4 Apr 2026 09:52:13 -0700 Subject: [PATCH 70/78] util-linux: add column utility Include the column utility to allow simple formatting of columnar output. Signed-off-by: Eric Fahlgren Link: https://github.com/openwrt/openwrt/pull/22782 Signed-off-by: Hauke Mehrtens --- package/utils/util-linux/Makefile | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/package/utils/util-linux/Makefile b/package/utils/util-linux/Makefile index 62ecd50416..a87c068813 100644 --- a/package/utils/util-linux/Makefile +++ b/package/utils/util-linux/Makefile @@ -199,6 +199,19 @@ define Package/colrm/description standard input. Output is sent to standard output. endef +define Package/column +$(call Package/util-linux/Default) + TITLE:=column formats input into multiple columns + DEPENDS:= +libsmartcols + LICENSE:=LGPL-2.1-or-later + LICENSE_FILES:=Documentation/licenses/COPYING.LGPL-2.1-or-later +endef + +define Package/column/description + The column utility formats its input into multiple columns. Input + can be from a file or standard input and empty lines are ignored. +endef + define Package/dmesg $(call Package/util-linux/Default) TITLE:=print or control the kernel ring buffer @@ -827,6 +840,11 @@ define Package/colrm/install $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/bin/colrm $(1)/usr/bin/ endef +define Package/column/install + $(INSTALL_DIR) $(1)/usr/bin + $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/bin/column $(1)/usr/bin/ +endef + define Package/dmesg/install $(INSTALL_DIR) $(1)/usr/bin $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/bin/dmesg $(1)/usr/bin/ @@ -1038,6 +1056,7 @@ $(eval $(call BuildPackage,blockdev)) $(eval $(call BuildPackage,cal)) $(eval $(call BuildPackage,cfdisk)) $(eval $(call BuildPackage,colrm)) +$(eval $(call BuildPackage,column)) $(eval $(call BuildPackage,dmesg)) $(eval $(call BuildPackage,eject)) $(eval $(call BuildPackage,fdisk)) From f48ef0040b7e4a80283d0775d397b8a3c66b7275 Mon Sep 17 00:00:00 2001 From: Hauke Mehrtens Date: Sun, 5 Apr 2026 01:32:36 +0200 Subject: [PATCH 71/78] mbedtls: update to 3.6.6 This version fixes some security problems: * Client impersonation while resuming a TLS 1.3 session (CVE-2026-34873) * Entropy on Linux can fall back to /dev/urandom (CVE-2026-34871) * PSA random generator cloning (CVE-2026-25835) * Compiler-induced constant-time violations (CVE-2025-66442) * Null pointer dereference when setting a distinguished name (CVE-2026-34874) * Buffer overflow in FFDH public key export (CVE-2026-34875) * FFDH: lack of contributory behaviour due to improper input validation (CVE-2026-34872) * Signature Algorithm Injection (CVE-2026-25834) * CCM multipart finish tag-length validation bypass (CVE-2026-34876) * Risk of insufficient protection of serialized session or context data leading to potential memory safety issues (CVE-2026-34877) * Buffer underflow in x509_inet_pton_ipv6() (CVE-2026-25833) Changelog: https://github.com/Mbed-TLS/mbedtls/releases/tag/mbedtls-3.6.6 Size increases by 470 bytes on aarch64: 343995 bin/packages/aarch64_generic/base/libmbedtls21-3.6.5-r1.apk 344465 bin/packages/aarch64_generic/base/libmbedtls21-3.6.6-r1.apk Link: https://github.com/openwrt/openwrt/pull/22787 Signed-off-by: Hauke Mehrtens --- package/libs/mbedtls/Makefile | 4 ++-- package/libs/mbedtls/patches/100-fix-gcc14-build.patch | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/package/libs/mbedtls/Makefile b/package/libs/mbedtls/Makefile index 15ef843d91..c4b13929f0 100644 --- a/package/libs/mbedtls/Makefile +++ b/package/libs/mbedtls/Makefile @@ -8,13 +8,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=mbedtls -PKG_VERSION:=3.6.5 +PKG_VERSION:=3.6.6 PKG_RELEASE:=1 PKG_BUILD_FLAGS:=no-mips16 gc-sections no-lto PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 PKG_SOURCE_URL=https://github.com/Mbed-TLS/$(PKG_NAME)/releases/download/$(PKG_NAME)-$(PKG_VERSION) -PKG_HASH:=4a11f1777bb95bf4ad96721cac945a26e04bf19f57d905f241fe77ebeddf46d8 +PKG_HASH:=8fb65fae8dcae5840f793c0a334860a411f884cc537ea290ce1c52bb64ca007a PKG_LICENSE:=GPL-2.0-or-later PKG_LICENSE_FILES:=LICENSE diff --git a/package/libs/mbedtls/patches/100-fix-gcc14-build.patch b/package/libs/mbedtls/patches/100-fix-gcc14-build.patch index 656e605814..78240ee9de 100644 --- a/package/libs/mbedtls/patches/100-fix-gcc14-build.patch +++ b/package/libs/mbedtls/patches/100-fix-gcc14-build.patch @@ -1,6 +1,6 @@ --- a/library/common.h +++ b/library/common.h -@@ -199,7 +199,7 @@ static inline void mbedtls_xor(unsigned +@@ -224,7 +224,7 @@ static inline void mbedtls_xor(unsigned uint8x16_t x = veorq_u8(v1, v2); vst1q_u8(r + i, x); } From a9e22459e448fb7522b8b108584d0f794bb58e3b Mon Sep 17 00:00:00 2001 From: Stefan Kalscheuer Date: Fri, 3 Apr 2026 17:15:25 +0200 Subject: [PATCH 72/78] mwlwifi: add patch series for kernel 6.18 compatibility Migrate timer handling (removed in 6.13) and netdev dummy initialization (removed in 6.16) to new methods with guards to not break older kernels. This resolves compilation errors due to missing del_timer_sync(), from_timer() and init_dummy_netdev(). Signed-off-by: Stefan Kalscheuer Link: https://github.com/openwrt/openwrt/pull/22775 Signed-off-by: Hauke Mehrtens --- .../110-fix-timer-handling-kernel-6.13.patch | 43 ++++++++++++ ...my_netdev-with-alloc_netdev_dummy-fo.patch | 66 +++++++++++++++++++ 2 files changed, 109 insertions(+) create mode 100644 package/kernel/mwlwifi/patches/110-fix-timer-handling-kernel-6.13.patch create mode 100644 package/kernel/mwlwifi/patches/111-replace-init_dummy_netdev-with-alloc_netdev_dummy-fo.patch diff --git a/package/kernel/mwlwifi/patches/110-fix-timer-handling-kernel-6.13.patch b/package/kernel/mwlwifi/patches/110-fix-timer-handling-kernel-6.13.patch new file mode 100644 index 0000000000..5f8b34ced0 --- /dev/null +++ b/package/kernel/mwlwifi/patches/110-fix-timer-handling-kernel-6.13.patch @@ -0,0 +1,43 @@ +From 4bdd4f2a21f830e5987b6dbdbadb389b7f0c12bd Mon Sep 17 00:00:00 2001 +From: Stefan Kalscheuer +Date: Fri, 3 Apr 2026 14:17:02 +0200 +Subject: [PATCH] fix timer handling kernel >= 6.13 + +Switch periodic timer shutdown to timer_shutdown_sync() on kernel 6.13 +and newer, as del_timer_sync() is no longer available to use. The new +call prevents re-arming the timer after shutdown which should be desired +behavior in this case. + +Replace from_timer() with timer_container_of() for kernel 6.16. + +Signed-off-by: Stefan Kalscheuer +--- + core.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/core.c ++++ b/core.c +@@ -738,7 +738,11 @@ static irqreturn_t mwl_isr(int irq, void + #ifdef timer_setup + static void timer_routine(struct timer_list *t) + { ++#if LINUX_VERSION_CODE < KERNEL_VERSION(6,16,0) + struct mwl_priv *priv = from_timer(priv, t, period_timer); ++#else ++ struct mwl_priv *priv = timer_container_of(priv, t, period_timer); ++#endif + struct ieee80211_hw *hw = priv->hw; + #else + static void timer_routine(unsigned long data) +@@ -975,7 +979,11 @@ static void mwl_wl_deinit(struct mwl_pri + { + struct ieee80211_hw *hw = priv->hw; + ++#if LINUX_VERSION_CODE < KERNEL_VERSION(6,13,0) + del_timer_sync(&priv->period_timer); ++#else ++ timer_shutdown_sync(&priv->period_timer); ++#endif + + if (priv->irq != -1) { + free_irq(priv->irq, hw); diff --git a/package/kernel/mwlwifi/patches/111-replace-init_dummy_netdev-with-alloc_netdev_dummy-fo.patch b/package/kernel/mwlwifi/patches/111-replace-init_dummy_netdev-with-alloc_netdev_dummy-fo.patch new file mode 100644 index 0000000000..48dae29097 --- /dev/null +++ b/package/kernel/mwlwifi/patches/111-replace-init_dummy_netdev-with-alloc_netdev_dummy-fo.patch @@ -0,0 +1,66 @@ +From 835f385dbf3a47727181e73063a433e5c7113eca Mon Sep 17 00:00:00 2001 +From: Stefan Kalscheuer +Date: Fri, 3 Apr 2026 16:52:44 +0200 +Subject: [PATCH] replace init_dummy_netdev() with alloc_netdev_dummy() for + kernel 6.14+ + +init_dummy_netdev() was removed in kernel 6.14. Un-embed the net_device +from the private struct by converting it into a pointer and use +alloc_netdev_dummy() for initialization of the dummy device. + +Signed-off-by: Stefan Kalscheuer +--- + hif/pcie/dev.h | 4 ++++ + hif/pcie/pcie.c | 17 +++++++++++++++-- + 2 files changed, 19 insertions(+), 2 deletions(-) + +--- a/hif/pcie/dev.h ++++ b/hif/pcie/dev.h +@@ -583,7 +583,11 @@ struct pcie_priv { + struct tasklet_struct tx_task; + struct tasklet_struct tx_done_task; + /* NAPI */ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(6,14,0) + struct net_device napi_dev; ++#else ++ struct net_device *napi_dev; ++#endif + struct napi_struct napi; + struct tasklet_struct rx_task; + unsigned int tx_head_room; +--- a/hif/pcie/pcie.c ++++ b/hif/pcie/pcie.c +@@ -215,9 +215,15 @@ static int pcie_init_8997(struct ieee802 + (void *)pcie_8997_tx_done_task, (unsigned long)hw); + tasklet_disable(&pcie_priv->tx_done_task); + spin_lock_init(&pcie_priv->tx_desc_lock); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(6,15,0) + init_dummy_netdev(&pcie_priv->napi_dev); +- netif_napi_add(&pcie_priv->napi_dev, &pcie_priv->napi, +- pcie_8997_poll_napi); ++ netif_napi_add(&pcie_priv->napi_dev, &pcie_priv->napi, pcie_8997_poll_napi); ++#else ++ pcie_priv->napi_dev = alloc_netdev_dummy(0); ++ if (!pcie_priv->napi_dev) ++ return -ENOMEM; ++ netif_napi_add(pcie_priv->napi_dev, &pcie_priv->napi, pcie_8997_poll_napi); ++#endif + pcie_priv->txq_limit = PCIE_TX_QUEUE_LIMIT; + pcie_priv->txq_wake_threshold = PCIE_TX_WAKE_Q_THRESHOLD; + pcie_priv->recv_limit = PCIE_RECEIVE_LIMIT; +@@ -310,8 +316,15 @@ static int pcie_init_8864(struct ieee802 + tasklet_init(&pcie_priv->tx_done_task, (void *)pcie_8864_tx_done_task, (unsigned long)hw); + tasklet_disable(&pcie_priv->tx_done_task); + spin_lock_init(&pcie_priv->tx_desc_lock); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(6,14,0) + init_dummy_netdev(&pcie_priv->napi_dev); + netif_napi_add(&pcie_priv->napi_dev, &pcie_priv->napi, pcie_8864_poll_napi); ++#else ++ pcie_priv->napi_dev = alloc_netdev_dummy(0); ++ if (!pcie_priv->napi_dev) ++ return -ENOMEM; ++ netif_napi_add(pcie_priv->napi_dev, &pcie_priv->napi, pcie_8864_poll_napi); ++#endif + pcie_priv->txq_limit = PCIE_TX_QUEUE_LIMIT; + pcie_priv->txq_wake_threshold = PCIE_TX_WAKE_Q_THRESHOLD; + pcie_priv->recv_limit = PCIE_RECEIVE_LIMIT; From f4c211f635283f085c88be40e8cddc89f8d79e5e Mon Sep 17 00:00:00 2001 From: Fil Dunsky Date: Mon, 30 Mar 2026 17:07:28 +0300 Subject: [PATCH 73/78] mediatek: add Huasifei WH3000 Pro NAND support This commit adds support for Huasifei WH3000 Pro NAND version. There is an eMMC already supported in OpenWrt. The only difference is NAND chip. This commit adds common .dtsi and separate .dts for eMMC and nand versions. **Huasifei WH3000 Pro NAND** Portable Wi-Fi 6 travel router based on MediaTek MT7981A SoC. MT7981B+MT7976CN+RTL8221B Dual Core 1.3GHZ with 5G modems module and PWM Fan. **Specifications** SoC: Filogic 820 MT7981A (1.3GHz) RAM: DDR4 1GB Flash: 256mb Winbond SPI NAND WiFi: 2.4GHz and 5GHz with 3 antennas Ethernet: 1x WAN (10/100/1000M) 1x LAN (10/100/1000/2500M) USB: 1x USB 3.0 port Two buttons: reset and mode (BTN_0) LEDS: blue, red, blue+red=pink UART: 3.3V, TX, RX, GND / 115200 8N1 M.2 (WWAN) slot **Installation via U-Boot rescue** 1. Set static IP 192.168.1.2 on your computer and default route as 192.168.1.1 2. Connect to the WAN port and hold the reset button while booting the device. 3. Wait for the LED to blink 5 times, and release the reset button. 4. Open U-boot web page on your browser at http://192.168.1.1 5. Select the OpenWRT sysupgrade image, upload it, and start the upgrade. 6. Wait for the router to flash the new firmware. 7. Wait for the router to reboot itself. **Installation via sysupgrade** Just flash sysupgrade file via [LuCI upgrade page](http://192.168.1.1/cgi-bin/luci/admin/system/flash) without saving the settings. **Installation via SSH** Upload the file to the router `/tmp` directory, `ssh root@192.168.1.1` and issue a command: ``` sysupgrade -n /tmp/openwrt-mediatek-filogic-huasifei_wh3000-pro-nand-squashfs-sysupgrade.bin ``` Signed-off-by: Fil Dunsky Link: https://github.com/openwrt/openwrt/pull/22694 Signed-off-by: Hauke Mehrtens --- .../dts/mt7981b-huasifei-wh3000-pro-emmc.dts | 75 +++++++++++++++++++ .../dts/mt7981b-huasifei-wh3000-pro-nand.dts | 73 ++++++++++++++++++ ...o.dts => mt7981b-huasifei-wh3000-pro.dtsi} | 67 +---------------- .../filogic/base-files/etc/board.d/02_network | 3 +- .../base-files/etc/board.d/03_gpio_switches | 3 +- .../base-files/lib/upgrade/platform.sh | 7 +- target/linux/mediatek/image/filogic.mk | 28 ++++++- 7 files changed, 182 insertions(+), 74 deletions(-) create mode 100644 target/linux/mediatek/dts/mt7981b-huasifei-wh3000-pro-emmc.dts create mode 100644 target/linux/mediatek/dts/mt7981b-huasifei-wh3000-pro-nand.dts rename target/linux/mediatek/dts/{mt7981b-huasifei-wh3000-pro.dts => mt7981b-huasifei-wh3000-pro.dtsi} (67%) diff --git a/target/linux/mediatek/dts/mt7981b-huasifei-wh3000-pro-emmc.dts b/target/linux/mediatek/dts/mt7981b-huasifei-wh3000-pro-emmc.dts new file mode 100644 index 0000000000..a52930cb20 --- /dev/null +++ b/target/linux/mediatek/dts/mt7981b-huasifei-wh3000-pro-emmc.dts @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; + +#include "mt7981b-huasifei-wh3000-pro.dtsi" + +/ { + model = "Huasifei WH3000 Pro eMMC"; + compatible = "huasifei,wh3000-pro-emmc", "mediatek,mt7981"; +}; + +&chosen { + bootargs-append = " root=PARTLABEL=rootfs rootwait"; +}; + +&mmc0 { + bus-width = <8>; + cap-mmc-highspeed; + max-frequency = <52000000>; + non-removable; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; + vmmc-supply = <®_3p3v>; + status = "okay"; + + card@0 { + compatible = "mmc-card"; + reg = <0>; + + block { + compatible = "block-device"; + + partitions { + block-partition-factory { + partname = "factory"; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom_factory_0: eeprom@0 { + reg = <0x0 0x1000>; + }; + + macaddr_factory_4: macaddr@4 { + compatible = "mac-base"; + reg = <0x4 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + }; + }; + }; +}; + +&pio { + mmc0_pins_default: mmc0-pins-default { + mux { + function = "flash"; + groups = "emmc_45"; + }; + }; + + mmc0_pins_uhs: mmc0-pins-uhs { + mux { + function = "flash"; + groups = "emmc_45"; + }; + }; +}; diff --git a/target/linux/mediatek/dts/mt7981b-huasifei-wh3000-pro-nand.dts b/target/linux/mediatek/dts/mt7981b-huasifei-wh3000-pro-nand.dts new file mode 100644 index 0000000000..68b463507b --- /dev/null +++ b/target/linux/mediatek/dts/mt7981b-huasifei-wh3000-pro-nand.dts @@ -0,0 +1,73 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; + +#include "mt7981b-huasifei-wh3000-pro.dtsi" + +/ { + model = "Huasifei WH3000 Pro NAND"; + compatible = "huasifei,wh3000-pro-nand", "mediatek,mt7981"; +}; + +&spi0 { + status = "okay"; + + spi_nand: flash@0 { + compatible = "spi-nand"; + reg = <0>; + + spi-max-frequency = <52000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "BL2"; + reg = <0x0 0x100000>; + read-only; + }; + + partition@100000 { + label = "u-boot-env"; + reg = <0x100000 0x80000>; + }; + + partition@180000 { + label = "Factory"; + reg = <0x180000 0x200000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom_factory_0: eeprom@0 { + reg = <0x0 0x1000>; + }; + + macaddr_factory_4: macaddr@4 { + compatible = "mac-base"; + reg = <0x4 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + partition@380000 { + label = "FIP"; + reg = <0x380000 0x200000>; + read-only; + }; + + partition@580000 { + label = "ubi"; + reg = <0x580000 0xe280000>; + }; + }; + }; +}; diff --git a/target/linux/mediatek/dts/mt7981b-huasifei-wh3000-pro.dts b/target/linux/mediatek/dts/mt7981b-huasifei-wh3000-pro.dtsi similarity index 67% rename from target/linux/mediatek/dts/mt7981b-huasifei-wh3000-pro.dts rename to target/linux/mediatek/dts/mt7981b-huasifei-wh3000-pro.dtsi index b8a5a4cc35..a00e9f6c9b 100644 --- a/target/linux/mediatek/dts/mt7981b-huasifei-wh3000-pro.dts +++ b/target/linux/mediatek/dts/mt7981b-huasifei-wh3000-pro.dtsi @@ -9,9 +9,6 @@ #include "mt7981b.dtsi" / { - model = "Huasifei WH3000 Pro"; - compatible = "huasifei,wh3000-pro", "mediatek,mt7981"; - aliases { serial0 = &uart0; led-boot = &led_sys_red; @@ -20,9 +17,8 @@ led-upgrade = &led_sys_blue; }; - chosen { + chosen: chosen { stdout-path = "serial0:115200n8"; - bootargs-append = " root=PARTLABEL=rootfs rootwait"; }; gpio-export { @@ -101,7 +97,7 @@ compatible = "ethernet-phy-ieee802.3-c45"; reg = <1>; reset-assert-us = <100000>; - reset-deassert-us = <100000>; + reset-deassert-us = <221000>; reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>; interrupts = <38 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&pio>; @@ -116,66 +112,7 @@ status = "okay"; }; -&mmc0 { - bus-width = <8>; - cap-mmc-highspeed; - max-frequency = <52000000>; - non-removable; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default", "state_uhs"; - pinctrl-0 = <&mmc0_pins_default>; - pinctrl-1 = <&mmc0_pins_uhs>; - vmmc-supply = <®_3p3v>; - status = "okay"; - - card@0 { - compatible = "mmc-card"; - reg = <0>; - - block { - compatible = "block-device"; - - partitions { - block-partition-factory { - partname = "factory"; - - nvmem-layout { - compatible = "fixed-layout"; - #address-cells = <1>; - #size-cells = <1>; - - eeprom_factory_0: eeprom@0 { - reg = <0x0 0x1000>; - }; - - macaddr_factory_4: macaddr@4 { - compatible = "mac-base"; - reg = <0x4 0x6>; - #nvmem-cell-cells = <1>; - }; - }; - }; - }; - }; - }; -}; - &pio { - mmc0_pins_default: mmc0-pins-default { - mux { - function = "flash"; - groups = "emmc_45"; - }; - }; - - mmc0_pins_uhs: mmc0-pins-uhs { - mux { - function = "flash"; - groups = "emmc_45"; - }; - }; - pwm1_pins: pwm1-pins { mux { function = "pwm"; diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network index e3dc404c97..dccffdba52 100644 --- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network +++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network @@ -125,7 +125,8 @@ mediatek_setup_interfaces() bananapi,bpi-r3-mini|\ edgecore,eap111|\ huasifei,wh3000|\ - huasifei,wh3000-pro) + huasifei,wh3000-pro-emmc|\ + huasifei,wh3000-pro-nand) ucidef_set_interfaces_lan_wan eth0 eth1 ;; bazis,ax3000wm|\ diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/03_gpio_switches b/target/linux/mediatek/filogic/base-files/etc/board.d/03_gpio_switches index 89889967a2..889401bd0e 100644 --- a/target/linux/mediatek/filogic/base-files/etc/board.d/03_gpio_switches +++ b/target/linux/mediatek/filogic/base-files/etc/board.d/03_gpio_switches @@ -5,7 +5,8 @@ board_config_update board=$(board_name) case "$board" in -huasifei,wh3000-pro) +huasifei,wh3000-pro-emmc|\ +huasifei,wh3000-pro-nand) ucidef_add_gpio_switch "modem_power" "Modem power" "modem_power" "0" ;; teltonika,rutc50) diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh index 394e8f6a08..76a99aecdc 100644 --- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh +++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh @@ -139,7 +139,7 @@ platform_do_upgrade() { glinet,gl-x3000|\ glinet,gl-xe3000|\ huasifei,wh3000|\ - huasifei,wh3000-pro|\ + huasifei,wh3000-pro-emmc|\ smartrg,sdg-8612|\ smartrg,sdg-8614|\ smartrg,sdg-8622|\ @@ -164,7 +164,8 @@ platform_do_upgrade() { ;; buffalo,wsr-6000ax8|\ cudy,wr3000h-v1|\ - cudy,wr3000p-v1) + cudy,wr3000p-v1|\ + huasifei,wh3000-pro-nand) CI_UBIPART="ubi" nand_do_upgrade "$1" ;; @@ -369,7 +370,7 @@ platform_copy_config() { glinet,gl-x3000|\ glinet,gl-xe3000|\ huasifei,wh3000|\ - huasifei,wh3000-pro|\ + huasifei,wh3000-pro-emmc|\ jdcloud,re-cp-03|\ nradio,c8-668gl|\ smartrg,sdg-8612|\ diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk index 5961bdd47f..086d2fc477 100644 --- a/target/linux/mediatek/image/filogic.mk +++ b/target/linux/mediatek/image/filogic.mk @@ -1710,18 +1710,38 @@ define Device/huasifei_wh3000 endef TARGET_DEVICES += huasifei_wh3000 -define Device/huasifei_wh3000-pro +define Device/huasifei_wh3000-pro-emmc DEVICE_VENDOR := Huasifei DEVICE_MODEL := WH3000 Pro - DEVICE_DTS := mt7981b-huasifei-wh3000-pro + DEVICE_VARIANT := eMMC + DEVICE_DTS := mt7981b-huasifei-wh3000-pro-emmc DEVICE_DTS_DIR := ../dts - DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware kmod-hwmon-pwmfan kmod-usb3 f2fsck mkf2fs + DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware \ + kmod-hwmon-pwmfan kmod-usb3 f2fsck mkf2fs + SUPPORTED_DEVICES += huasifei,wh3000-pro KERNEL := kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb KERNEL_INITRAMFS := kernel-bin | lzma | \ fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata endef -TARGET_DEVICES += huasifei_wh3000-pro +TARGET_DEVICES += huasifei_wh3000-pro-emmc + +define Device/huasifei_wh3000-pro-nand + DEVICE_VENDOR := Huasifei + DEVICE_MODEL := WH3000 Pro + DEVICE_VARIANT := NAND + DEVICE_DTS := mt7981b-huasifei-wh3000-pro-nand + DEVICE_DTS_DIR := ../dts + UBINIZE_OPTS := -E 5 + BLOCKSIZE := 128k + PAGESIZE := 2048 + IMAGE_SIZE := 229376k + KERNEL_IN_UBI := 1 + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata + DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware \ + kmod-usb3 kmod-hwmon-pwmfan +endef +TARGET_DEVICES += huasifei_wh3000-pro-nand define Device/imou_hx21 DEVICE_VENDOR := Imou From ad90dbd51e8a48bf89d6ab38c3a6586aa4b74479 Mon Sep 17 00:00:00 2001 From: John Audia Date: Sat, 14 Mar 2026 08:19:36 -0400 Subject: [PATCH 74/78] e2fsprogs: update to version 1.47.4 Changelog: https://e2fsprogs.sourceforge.net/e2fsprogs-release.html#1.47.4 Signed-off-by: John Audia Link: https://github.com/openwrt/openwrt/pull/22415 Signed-off-by: Hauke Mehrtens --- package/utils/e2fsprogs/Makefile | 4 ++-- ...onfigure-make-libmagic-optional-and-configurable.patch | 8 ++++---- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/package/utils/e2fsprogs/Makefile b/package/utils/e2fsprogs/Makefile index f5bbe3800b..f7d0ee236e 100644 --- a/package/utils/e2fsprogs/Makefile +++ b/package/utils/e2fsprogs/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=e2fsprogs -PKG_VERSION:=1.47.3 +PKG_VERSION:=1.47.4 PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=@KERNEL/linux/kernel/people/tytso/e2fsprogs/v$(PKG_VERSION)/ -PKG_HASH:=857e6ef800feaa2bb4578fbc810214be5d3c88b072ea53c5384733a965737329 +PKG_HASH:=fd5bf388cbdbe006a3d3b318d983b2948382440acc85a87f1e7d108653e8db0b PKG_LICENSE:=GPL-2.0 PKG_LICENSE_FILES:=NOTICE diff --git a/package/utils/e2fsprogs/patches/010-configure-make-libmagic-optional-and-configurable.patch b/package/utils/e2fsprogs/patches/010-configure-make-libmagic-optional-and-configurable.patch index 9424cceca1..70514d57e9 100644 --- a/package/utils/e2fsprogs/patches/010-configure-make-libmagic-optional-and-configurable.patch +++ b/package/utils/e2fsprogs/patches/010-configure-make-libmagic-optional-and-configurable.patch @@ -18,7 +18,7 @@ Signed-off-by: Christian Marangi --- a/configure +++ b/configure -@@ -931,6 +931,7 @@ enable_rpath +@@ -927,6 +927,7 @@ enable_rpath with_libiconv_prefix with_libintl_prefix enable_largefile @@ -26,7 +26,7 @@ Signed-off-by: Christian Marangi with_libarchive enable_fuse2fs enable_lto -@@ -1650,6 +1651,7 @@ Optional Packages: +@@ -1648,6 +1649,7 @@ Optional Packages: --without-libiconv-prefix don't search for libiconv in includedir and libdir --with-libintl-prefix[=DIR] search for libintl in DIR/include and DIR/lib --without-libintl-prefix don't search for libintl in includedir and libdir @@ -34,7 +34,7 @@ Signed-off-by: Christian Marangi --without-libarchive disable use of libarchive --with-multiarch=ARCH specify the multiarch triplet --with-udev-rules-dir[=DIR] -@@ -13736,7 +13738,155 @@ then : +@@ -14053,7 +14055,155 @@ then : fi @@ -191,7 +191,7 @@ Signed-off-by: Christian Marangi printf %s "checking for magic_file in -lmagic... " >&6; } if test ${ac_cv_lib_magic_magic_file+y} then : -@@ -13774,17 +13924,39 @@ printf "%s\n" "$ac_cv_lib_magic_magic_fi +@@ -14099,17 +14249,39 @@ printf "%s\n" "$ac_cv_lib_magic_magic_fi if test "x$ac_cv_lib_magic_magic_file" = xyes then : MAGIC_LIB=-lmagic From b580beb3fcc3cc15b3a4338e3b75a9c09a82b830 Mon Sep 17 00:00:00 2001 From: John Audia Date: Sat, 14 Mar 2026 08:20:26 -0400 Subject: [PATCH 75/78] tools: e2fsprogs: update to version 1.47.4 Changelog: https://e2fsprogs.sourceforge.net/e2fsprogs-release.html#1.47.4 Signed-off-by: John Audia Link: https://github.com/openwrt/openwrt/pull/22415 Signed-off-by: Hauke Mehrtens --- tools/e2fsprogs/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/e2fsprogs/Makefile b/tools/e2fsprogs/Makefile index f760710c5b..cfcbd0f21f 100644 --- a/tools/e2fsprogs/Makefile +++ b/tools/e2fsprogs/Makefile @@ -9,8 +9,8 @@ include $(TOPDIR)/rules.mk PKG_NAME:=e2fsprogs PKG_CPE_ID:=cpe:/a:e2fsprogs_project:e2fsprogs -PKG_VERSION:=1.47.3 -PKG_HASH:=857e6ef800feaa2bb4578fbc810214be5d3c88b072ea53c5384733a965737329 +PKG_VERSION:=1.47.4 +PKG_HASH:=fd5bf388cbdbe006a3d3b318d983b2948382440acc85a87f1e7d108653e8db0b PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=@KERNEL/linux/kernel/people/tytso/e2fsprogs/v$(PKG_VERSION)/ From d19e522ec7783e22d7d9f794d633966243f198cf Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jonas=20K=C3=B6ppeler?= Date: Wed, 11 Mar 2026 18:14:52 +0100 Subject: [PATCH 76/78] kernel: cake_mq: expose sync_time parameter via debugfs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch enables for the configuration of the sync_time parameter. The value of the sync_time needs to be specified in nanoseconds. The default value is 200us (200 000 ns). This is especially helpful to get feedback from users about suitable values. Once a solid solution is found this patch can be removed. Signed-off-by: Jonas Köppeler Link: https://github.com/openwrt/openwrt/pull/22380 [Add patch to kernel 6.18 too] Signed-off-by: Hauke Mehrtens --- ...cake-configure-sync_time-via-debugfs.patch | 68 +++++++++++++++++++ ...cake-configure-sync_time-via-debugfs.patch | 68 +++++++++++++++++++ 2 files changed, 136 insertions(+) create mode 100644 target/linux/generic/hack-6.12/710-net-sched-sch_cake-configure-sync_time-via-debugfs.patch create mode 100644 target/linux/generic/hack-6.18/710-net-sched-sch_cake-configure-sync_time-via-debugfs.patch diff --git a/target/linux/generic/hack-6.12/710-net-sched-sch_cake-configure-sync_time-via-debugfs.patch b/target/linux/generic/hack-6.12/710-net-sched-sch_cake-configure-sync_time-via-debugfs.patch new file mode 100644 index 0000000000..82a979f596 --- /dev/null +++ b/target/linux/generic/hack-6.12/710-net-sched-sch_cake-configure-sync_time-via-debugfs.patch @@ -0,0 +1,68 @@ +From 4eb720d360d3fc227eedbc76993719e1906c418c Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20K=C3=B6ppeler?= +Date: Wed, 11 Mar 2026 17:42:44 +0100 +Subject: [PATCH] net/sched: sch_cake: configure sync_time via debugfs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Add a debugfs entry for sync_time to allow runtime adjustment of its +value without recompilation. sync_time is specified in nanoseconds; +setting it to 0 triggers synchronization on every packet. + +Signed-off-by: Jonas Köppeler +--- + net/sched/sch_cake.c | 13 +++++++++++-- + 1 file changed, 11 insertions(+), 2 deletion(-) + +--- a/net/sched/sch_cake.c ++++ b/net/sched/sch_cake.c +@@ -71,6 +71,7 @@ + #include + #include + #include ++#include + + #if IS_ENABLED(CONFIG_NF_CONNTRACK) + #include +@@ -81,6 +82,8 @@ + #define CAKE_QUEUES (1024) + #define CAKE_FLOW_MASK 63 + #define CAKE_FLOW_NAT_FLAG 64 ++static u64 g_sync_time_ns = 200*NSEC_PER_USEC; ++static struct dentry *cake_mq_debugfs; + + /* struct cobalt_params - contains codel and blue parameters + * @interval: codel initial drop rate +@@ -2013,7 +2016,7 @@ static struct sk_buff *cake_dequeue(stru + u32 len; + + if (q->config->is_shared && q->rate_ns && +- now - q->last_checked_active >= q->config->sync_time) { ++ now - q->last_checked_active >= g_sync_time_ns) { + struct net_device *dev = qdisc_dev(sch); + struct cake_sched_data *other_priv; + u64 new_rate = q->config->rate_bps; +@@ -3352,8 +3355,13 @@ static int __init cake_module_init(void) + return ret; + + ret = register_qdisc(&cake_mq_qdisc_ops); +- if (ret) ++ if (ret) { + unregister_qdisc(&cake_qdisc_ops); ++ } else { ++ struct dentry *cake_mq_debugfs = debugfs_create_dir("cake_mq", NULL); ++ ++ debugfs_create_u64("sync_time_ns", 0644, cake_mq_debugfs, &g_sync_time_ns); ++ } + + return ret; + } +@@ -3362,6 +3370,7 @@ static void __exit cake_module_exit(void + { + unregister_qdisc(&cake_qdisc_ops); + unregister_qdisc(&cake_mq_qdisc_ops); ++ debugfs_remove_recursive(cake_mq_debugfs); + } + + module_init(cake_module_init) diff --git a/target/linux/generic/hack-6.18/710-net-sched-sch_cake-configure-sync_time-via-debugfs.patch b/target/linux/generic/hack-6.18/710-net-sched-sch_cake-configure-sync_time-via-debugfs.patch new file mode 100644 index 0000000000..c8b046ac66 --- /dev/null +++ b/target/linux/generic/hack-6.18/710-net-sched-sch_cake-configure-sync_time-via-debugfs.patch @@ -0,0 +1,68 @@ +From 4eb720d360d3fc227eedbc76993719e1906c418c Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20K=C3=B6ppeler?= +Date: Wed, 11 Mar 2026 17:42:44 +0100 +Subject: [PATCH] net/sched: sch_cake: configure sync_time via debugfs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Add a debugfs entry for sync_time to allow runtime adjustment of its +value without recompilation. sync_time is specified in nanoseconds; +setting it to 0 triggers synchronization on every packet. + +Signed-off-by: Jonas Köppeler +--- + net/sched/sch_cake.c | 13 +++++++++++-- + 1 file changed, 11 insertions(+), 2 deletion(-) + +--- a/net/sched/sch_cake.c ++++ b/net/sched/sch_cake.c +@@ -71,6 +71,7 @@ + #include + #include + #include ++#include + + #if IS_ENABLED(CONFIG_NF_CONNTRACK) + #include +@@ -81,6 +82,8 @@ + #define CAKE_QUEUES (1024) + #define CAKE_FLOW_MASK 63 + #define CAKE_FLOW_NAT_FLAG 64 ++static u64 g_sync_time_ns = 200*NSEC_PER_USEC; ++static struct dentry *cake_mq_debugfs; + + /* struct cobalt_params - contains codel and blue parameters + * @interval: codel initial drop rate +@@ -2019,7 +2022,7 @@ static struct sk_buff *cake_dequeue(stru + u32 len; + + if (q->config->is_shared && q->rate_ns && +- now - q->last_checked_active >= q->config->sync_time) { ++ now - q->last_checked_active >= g_sync_time_ns) { + struct net_device *dev = qdisc_dev(sch); + struct cake_sched_data *other_priv; + u64 new_rate = q->config->rate_bps; +@@ -3358,8 +3361,13 @@ static int __init cake_module_init(void) + return ret; + + ret = register_qdisc(&cake_mq_qdisc_ops); +- if (ret) ++ if (ret) { + unregister_qdisc(&cake_qdisc_ops); ++ } else { ++ struct dentry *cake_mq_debugfs = debugfs_create_dir("cake_mq", NULL); ++ ++ debugfs_create_u64("sync_time_ns", 0644, cake_mq_debugfs, &g_sync_time_ns); ++ } + + return ret; + } +@@ -3368,6 +3376,7 @@ static void __exit cake_module_exit(void + { + unregister_qdisc(&cake_qdisc_ops); + unregister_qdisc(&cake_mq_qdisc_ops); ++ debugfs_remove_recursive(cake_mq_debugfs); + } + + module_init(cake_module_init) From 81644d0b8624ecc47f10d2c4b946913d8132573e Mon Sep 17 00:00:00 2001 From: Cristian Sloberg Date: Thu, 2 Apr 2026 08:57:09 +0200 Subject: [PATCH 77/78] x86: enable Intel MID serial for Denverton SoCs Enable CONFIG_SERIAL_8250_MID in the generic x86 configuration. This enables hardware serial console access on Intel Atom C3000 (Denverton) platforms, which rely on the High-Speed UART driver. It also benefits other Intel MID platforms across the x86 architecture. Signed-off-by: Cristian Sloberg Link: https://github.com/openwrt/openwrt/pull/22739 Signed-off-by: Hauke Mehrtens --- target/linux/x86/64/config-6.12 | 2 ++ target/linux/x86/64/config-6.18 | 2 ++ 2 files changed, 4 insertions(+) diff --git a/target/linux/x86/64/config-6.12 b/target/linux/x86/64/config-6.12 index 4a1ea15cef..8595eb212b 100644 --- a/target/linux/x86/64/config-6.12 +++ b/target/linux/x86/64/config-6.12 @@ -240,6 +240,7 @@ CONFIG_HOTPLUG_SMT=y CONFIG_HOTPLUG_SPLIT_STARTUP=y CONFIG_HPET=y CONFIG_HPET_MMAP=y +CONFIG_HSU_DMA=y CONFIG_HVC_DRIVER=y CONFIG_HVC_IRQ=y CONFIG_HVC_XEN=y @@ -463,6 +464,7 @@ CONFIG_SENSORS_K8TEMP=y # CONFIG_SENSORS_OXP is not set CONFIG_SENSORS_VIA_CPUTEMP=y CONFIG_SERIAL_8250_DW=y +CONFIG_SERIAL_8250_MID=y CONFIG_SERIAL_8250_PNP=y CONFIG_SMP=y CONFIG_SOCK_RX_QUEUE_MAPPING=y diff --git a/target/linux/x86/64/config-6.18 b/target/linux/x86/64/config-6.18 index 6f17712086..069cae2cb6 100644 --- a/target/linux/x86/64/config-6.18 +++ b/target/linux/x86/64/config-6.18 @@ -242,6 +242,7 @@ CONFIG_HOTPLUG_SMT=y CONFIG_HOTPLUG_SPLIT_STARTUP=y CONFIG_HPET=y CONFIG_HPET_MMAP=y +CONFIG_HSU_DMA=y CONFIG_HUGETLBFS=y CONFIG_HVC_DRIVER=y CONFIG_HVC_IRQ=y @@ -469,6 +470,7 @@ CONFIG_SENSORS_K8TEMP=y # CONFIG_SENSORS_OXP is not set CONFIG_SENSORS_VIA_CPUTEMP=y CONFIG_SERIAL_8250_DW=y +CONFIG_SERIAL_8250_MID=y CONFIG_SERIAL_8250_PNP=y CONFIG_SMP=y CONFIG_SOCK_RX_QUEUE_MAPPING=y From 56be1d153096ed1170210ec5949ede0813e256c0 Mon Sep 17 00:00:00 2001 From: Tan Zien Date: Sat, 4 Apr 2026 05:35:44 +0800 Subject: [PATCH 78/78] kernel: modules: add hinic3 support Add support for Huawei 3rd gen NIC Signed-off-by: Tan Zien Link: https://github.com/openwrt/openwrt/pull/22768 Signed-off-by: Hauke Mehrtens --- package/kernel/linux/modules/netdevices.mk | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/package/kernel/linux/modules/netdevices.mk b/package/kernel/linux/modules/netdevices.mk index 4fe4decdbc..75aa1a1558 100644 --- a/package/kernel/linux/modules/netdevices.mk +++ b/package/kernel/linux/modules/netdevices.mk @@ -2267,6 +2267,23 @@ endef $(eval $(call KernelPackage,hinic)) +define KernelPackage/hinic3 + SUBMENU:=$(NETWORK_DEVICES_MENU) + TITLE:=Huawei 3rd generation network adapters (HINIC3) support + DEPENDS:=@PCI_SUPPORT @TARGET_x86||TARGET_armsr_armv8 @LINUX_6_18 + FILES:=$(LINUX_DIR)/drivers/net/ethernet/huawei/hinic3/hinic3.ko + KCONFIG:=CONFIG_HINIC3 + AUTOLOAD:=$(call AutoProbe,hinic3) +endef + +define KernelPackage/hinic3/description + This driver supports HiNIC 3rd gen Network Adapter (HINIC3). + The driver is supported on X86_64 and ARM64 little endian. +endef + +$(eval $(call KernelPackage,hinic3)) + + define KernelPackage/sfc SUBMENU:=$(NETWORK_DEVICES_MENU) TITLE:=Solarflare SFC9000/SFC9100/EF100-family support