Russell SeniorandRobert Marko
ee771d3dd0
The vendor firmware checks for a bmt header in the last 528 erase blocks of flash. The OpenWrt partition table did not respect that requirement, and therefore the vendor and openwrt chainloader fight over those blocks on every boot, potentially corrupting data stored in UBI blocks there. This commit increases the size of the reserved_bmt partition to avoid that fight. Although the vendor bootloader only seems to touch the final 250 erase blocks[1], the original vendor firmware system partition ended at 0x1be00000[2], so to be conservative, the consensus is to use that as the end of mtd2 (ubi) partition and leave the last 528 blocks for mtd3 (reserved_bmt). From https://openwrt.org/toh/gemtek/mxf-w1700k: [1] OEM bootlog: [ 5.324337] bmt pool size: 250 [2] OEM bootlog: [ 5.478927] 0x000008600000-0x00001be00000 : "system" Adds a compat_version to warn users to re-install to accomodate the shrunken mtd2 ubi partition. Fixed two nits suggested by Claude, zero padding a hex value and removed an extra space. Removed the wildcard setting of compat_version for other boards, as suggested by Robert Marko, set compat_version only for the w1700k. Reported-by: Loïc Yhuel <loic.yhuel@gmail.com> Signed-off-by: Russell Senior <russell@personaltelco.net> Link: https://github.com/openwrt/openwrt/pull/23061 Signed-off-by: Robert Marko <robimarko@gmail.com>
409 lines
7.0 KiB
Devicetree
409 lines
7.0 KiB
Devicetree
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "an7581.dtsi"
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#include "an7581-npu-mt7996.dtsi"
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/ {
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model = "Gemtek W1700K (OpenWrt U-Boot layout)";
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compatible = "gemtek,w1700k-ubi", "airoha,an7581", "airoha,en7581";
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aliases {
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serial0 = &uart1;
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led-boot = &led_status_red;
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led-failsafe = &led_status_blue;
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led-upgrade = &led_status_blue;
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led-running = &led_status_green;
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};
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chosen {
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rootdisk = <&ubi_rootfs>;
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bootargs = "console=ttyS0,115200 earlycon ubi.block=0,fit root=/dev/fit0 rootwait";
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stdout-path = "serial0:115200n8";
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};
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keys {
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compatible = "gpio-keys";
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key-restart {
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label = "reset";
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gpios = <&en7581_pinctrl 0 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_status_green: led-0 {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_STATUS;
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gpios = <&en7581_pinctrl 17 GPIO_ACTIVE_LOW>;
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};
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led_status_blue: led-1 {
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_STATUS;
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gpios = <&en7581_pinctrl 19 GPIO_ACTIVE_LOW>;
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};
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led_status_red: led-2 {
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_STATUS;
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gpios = <&en7581_pinctrl 29 GPIO_ACTIVE_LOW>;
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};
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led_status_white: led-3 {
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color = <LED_COLOR_ID_WHITE>;
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function = LED_FUNCTION_STATUS;
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gpios = <&en7581_pinctrl 20 GPIO_ACTIVE_LOW>;
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};
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led-4 {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_LAN;
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function-enumerator = <3>;
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gpios = <&en7581_pinctrl 9 GPIO_ACTIVE_LOW>;
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};
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led-5 {
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color = <LED_COLOR_ID_YELLOW>;
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function = LED_FUNCTION_LAN;
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function-enumerator = <3>;
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gpios = <&en7581_pinctrl 10 GPIO_ACTIVE_LOW>;
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};
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led-6 {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_LAN;
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function-enumerator = <4>;
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gpios = <&en7581_pinctrl 27 GPIO_ACTIVE_LOW>;
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};
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led-7 {
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color = <LED_COLOR_ID_YELLOW>;
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function = LED_FUNCTION_LAN;
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function-enumerator = <4>;
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gpios = <&en7581_pinctrl 28 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&en7581_pinctrl {
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gpio-ranges = <&en7581_pinctrl 0 13 47>;
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mdio_pins: mdio-pins {
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mux {
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function = "mdio";
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groups = "mdio";
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};
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conf {
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pins = "gpio2";
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output-high;
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};
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};
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pcie0_rst_pins: pcie0-rst-pins {
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conf {
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pins = "pcie_reset0";
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drive-open-drain = <1>;
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};
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};
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pcie2_rst_pins: pcie2-rst-pins {
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conf {
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pins = "pcie_reset2";
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drive-open-drain = <1>;
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};
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};
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/* W1700K does not use the built-in LED controller. Instead, it uses GPIO.
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* The driver fails to probe without gswpX_led0_pins defined, so put a dummy
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* here.
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*/
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gswp1_led0_pins: gswp1-led0-pins {
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mux {
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function = "phy1_led0";
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pins = "gpio33";
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};
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};
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gswp2_led0_pins: gswp2-led0-pins {
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mux {
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function = "phy2_led0";
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pins = "gpio34";
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};
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};
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uart2_pins: uart2-pins {
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mux {
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function = "uart";
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groups = "uart2";
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};
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};
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hsuart_pins: hsuart-pins {
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mux {
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function = "uart";
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groups = "hsuart";
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};
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};
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};
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&snfi {
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status = "okay";
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};
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&spi_nand {
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#address-cells = <1>;
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#size-cells = <1>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "vendor";
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reg = <0x00000000 0x00600000>;
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read-only;
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};
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partition@600000 {
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label = "chainloader";
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reg = <0x00600000 0x00100000>;
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read-only;
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};
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partition@700000 {
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label = "ubi";
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reg = <0x00700000 0x1b700000>;
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compatible = "linux,ubi";
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volumes {
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ubi-volume-ubootenv {
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volname = "ubootenv";
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nvmem-layout {
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compatible = "u-boot,env-redundant-bool";
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};
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};
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ubi-volume-ubootenv2 {
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volname = "ubootenv2";
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nvmem-layout {
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compatible = "u-boot,env-redundant-bool";
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};
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};
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ubi_rootfs: ubi-volume-fit {
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volname = "fit";
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};
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ubi_factory: ubi-volume-factory {
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volname = "factory";
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};
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};
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};
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/* reserved for bad block table */
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reserved_bmt@1be00000 {
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label = "reserved_bmt";
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reg = <0x1be00000 0x04200000>;
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read-only;
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};
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};
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};
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&ubi_factory {
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom: eeprom@0 {
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reg = <0x0 0x1e00>;
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};
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wan_mac: macaddr@5000 {
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reg = <0x5000 0x6>;
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};
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lan_mac: macaddr@6000 {
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compatible = "mac-base";
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reg = <0x6000 0x6>;
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#nvmem-cell-cells = <1>;
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};
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};
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};
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&i2c0 {
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status = "okay";
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hwmon@2e {
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compatible = "nuvoton,nct7802";
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reg = <0x2e>;
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};
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};
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&pcie0 {
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status = "okay";
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airoha,x2-mode;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie0_rst_pins>;
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pcie@0,0 {
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reg = <0x0000 0 0 0 0>;
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device_type = "pci";
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#address-cells = <3>;
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#size-cells = <2>;
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mt7996@0,0 {
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reg = <0x0000 0 0 0 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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nvmem-cells = <&eeprom>;
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nvmem-cell-names = "eeprom";
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airoha,npu = <&npu>;
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airoha,eth = <ð>;
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band@0 {
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/* 2.4 GHz */
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reg = <0>;
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nvmem-cells = <&lan_mac 1>;
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nvmem-cell-names = "mac-address";
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};
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band@1 {
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/* 5 GHz */
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reg = <1>;
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nvmem-cells = <&lan_mac 2>;
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nvmem-cell-names = "mac-address";
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};
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band@2 {
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/* 6 GHz */
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reg = <2>;
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nvmem-cells = <&lan_mac 3>;
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nvmem-cell-names = "mac-address";
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};
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};
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};
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};
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&pcie2 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pcie2_rst_pins>;
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};
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&npu {
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status = "okay";
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};
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ð {
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status = "okay";
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};
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&gdm1 {
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status = "okay";
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nvmem-cells = <&lan_mac 0>;
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nvmem-cell-names = "mac-address";
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};
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&gdm2 {
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status = "okay";
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phy-handle = <&phy8>;
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phy-mode = "usxgmii";
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nvmem-cells = <&wan_mac 0>;
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nvmem-cell-names = "mac-address";
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openwrt,netdev-name = "wan";
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};
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&gdm4 {
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status = "okay";
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phy-handle = <&phy5>;
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phy-mode = "usxgmii";
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nvmem-cells = <&lan_mac 0>;
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nvmem-cell-names = "mac-address";
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openwrt,netdev-name = "lan2";
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};
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&switch {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mdio_pins>;
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mdio {
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phy5: ethernet-phy@5 {
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compatible = "ethernet-phy-ieee802.3-c45";
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reg = <5>;
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reset-gpios = <&en7581_pinctrl 46 GPIO_ACTIVE_LOW>;
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reset-assert-us = <40000>;
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reset-deassert-us = <150000>;
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interrupt-parent = <&en7581_pinctrl>;
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interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
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realtek,pnswap-tx;
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realtek,pnswap-rx;
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};
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phy8: ethernet-phy@8 {
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compatible = "ethernet-phy-ieee802.3-c45";
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reg = <8>;
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reset-gpios = <&en7581_pinctrl 31 GPIO_ACTIVE_LOW>;
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reset-assert-us = <40000>;
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reset-deassert-us = <150000>;
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interrupt-parent = <&en7581_pinctrl>;
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interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
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realtek,pnswap-tx;
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realtek,pnswap-rx;
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};
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};
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};
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&gsw_phy1 {
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status = "okay";
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pinctrl-names = "gbe-led";
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pinctrl-0 = <&gswp1_led0_pins>;
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};
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&gsw_port1 {
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status = "okay";
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label = "lan3";
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};
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&gsw_phy2 {
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status = "okay";
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pinctrl-names = "gbe-led";
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pinctrl-0 = <&gswp2_led0_pins>;
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};
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&gsw_port2 {
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status = "okay";
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label = "lan4";
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};
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&uart2 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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};
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&hsuart3 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&hsuart_pins>;
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};
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