65 lines
2.5 KiB
Diff
65 lines
2.5 KiB
Diff
From git@z Thu Jan 1 00:00:00 1970
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Subject: [PATCH v13 1/35] dt-bindings: phy: rockchip-usbdp: add improved
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ports scheme
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From: Sebastian Reichel <sebastian.reichel@collabora.com>
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Date: Tue, 14 Jul 2026 21:26:02 +0200
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Message-Id: <20260714-rockchip-usbdp-cleanup-v13-1-6cb3e769d4c5@collabora.com>
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MIME-Version: 1.0
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Content-Type: text/plain; charset="utf-8"
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Content-Transfer-Encoding: 7bit
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Currently the Rockchip USBDP PHY is missing a documented port scheme.
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Meanwhile upstream RK3588 DTS files are a bit messy and use different
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port schemes. The upstream USBDP PHY Linux kernel driver does not yet
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parse the ports at all and thus does not create any implicit ABI either.
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But with the current mess it is not possible to properly support USB-C
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DP AltMode. Thus this introduces a proper port scheme following roughly
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the ports design of the Qualcomm QMP USB4-USB3-DP PHY controller binding
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with a slight difference that there is an additional port for the
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USB-C SBU port as the Rockchip USB-DP PHY also contains the SBU mux.
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Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
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Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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---
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.../bindings/phy/phy-rockchip-usbdp.yaml | 24 ++++++++++++++++++++++
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1 file changed, 24 insertions(+)
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--- a/Documentation/devicetree/bindings/phy/phy-rockchip-usbdp.yaml
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+++ b/Documentation/devicetree/bindings/phy/phy-rockchip-usbdp.yaml
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@@ -110,10 +110,34 @@ properties:
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port:
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$ref: /schemas/graph.yaml#/properties/port
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+ deprecated: true
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description:
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A port node to link the PHY to a TypeC controller for the purpose of
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handling orientation switching.
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+ ports:
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+ $ref: /schemas/graph.yaml#/properties/ports
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+ properties:
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+ port@0:
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+ $ref: /schemas/graph.yaml#/properties/port
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+ description:
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+ Output endpoint of the PHY for USB (or DP when configured into 4 lane
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+ mode), which should point to the superspeed port of a USB connector.
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+
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+ port@1:
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+ $ref: /schemas/graph.yaml#/properties/port
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+ description: Incoming endpoint from the USB controller
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+
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+ port@2:
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+ $ref: /schemas/graph.yaml#/properties/port
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+ description: Incoming endpoint from the DisplayPort controller
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+
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+ port@3:
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+ $ref: /schemas/graph.yaml#/properties/port
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+ description:
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+ Output endpoint of the PHY for DP Auxiliary, which should either point to
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+ the SBU port of a USB-C connector or a DisplayPort connector input port.
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+
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required:
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- compatible
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- reg
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