48 lines
1.7 KiB
Diff
48 lines
1.7 KiB
Diff
From git@z Thu Jan 1 00:00:00 1970
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Subject: [PATCH v13 14/35] phy: rockchip: usbdp: Use FIELD_PREP_WM16_CONST
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From: Sebastian Reichel <sebastian.reichel@collabora.com>
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Date: Tue, 14 Jul 2026 21:26:15 +0200
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Message-Id: <20260714-rockchip-usbdp-cleanup-v13-14-6cb3e769d4c5@collabora.com>
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MIME-Version: 1.0
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Content-Type: text/plain; charset="utf-8"
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Content-Transfer-Encoding: 7bit
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Cleanup code by replacing open-coded version of FIELD_PREP_WM16_CONST
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with the existing helper macro.
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Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
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Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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---
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drivers/phy/rockchip/phy-rockchip-usbdp.c | 6 +++---
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1 file changed, 3 insertions(+), 3 deletions(-)
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--- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
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+++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c
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@@ -12,6 +12,7 @@
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/gpio.h>
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+#include <linux/hw_bitfield.h>
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#include <linux/mfd/syscon.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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@@ -75,7 +76,6 @@
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#define TRSV_LN2_MON_RX_CDR_DONE_OFFSET 0x1b84 /* trsv_reg06E1 */
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#define TRSV_LN2_MON_RX_CDR_LOCK_DONE BIT(0)
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-#define BIT_WRITEABLE_SHIFT 16
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#define PHY_AUX_DP_DATA_POL_NORMAL 0
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#define PHY_AUX_DP_DATA_POL_INVERT 1
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#define PHY_LANE_MUX_USB 0
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@@ -104,8 +104,8 @@ struct rk_udphy_grf_reg {
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#define _RK_UDPHY_GEN_GRF_REG(offset, mask, disable, enable) \
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{\
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offset, \
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- FIELD_PREP_CONST(mask, disable) | (mask << BIT_WRITEABLE_SHIFT), \
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- FIELD_PREP_CONST(mask, enable) | (mask << BIT_WRITEABLE_SHIFT), \
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+ FIELD_PREP_WM16_CONST(mask, disable), \
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+ FIELD_PREP_WM16_CONST(mask, enable), \
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}
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#define RK_UDPHY_GEN_GRF_REG(offset, bitend, bitstart, disable, enable) \
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