eternalwrt/eternalwrt-mt798x
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
24c36866be13bfb7528a2671122e68c9441ee6ae
eternalwrt-mt798x/target/linux/realtek/dts/rtl8393_hpe_1920.dtsi
T
Markus StockhausenandRobert Marko 316f41e310 realtek: dts: convert EXTERNAL_PHY() to PHY_C22() 
The Realtek target currently uses two phy macros to simplify the
device dts.

- EXTERNAL_PHY() to denote a phy attached to the SoC
- INTERNAL_PHY() to denote an internal PHY (inside the SoC)

There is no benefit doing this. The topology around a port/phy is
well defined by the port macros. They link port, phy, pcs and even
leds. The only consumer of the attribute "phy-is-integrated" is
inside the dsa driver and that is being refactored.

As a first step define a new more meaningful PHY_C22() macro that
describes a c22 capable phy. This does not need to care about the
external/internal relation. To make it even more useful for the
RTL93xx targets with multiple mdio busses give it two parameters
PHY_C22(port_number, bus_address) where

- port_number is the absolute overall unique phy number
- bus_address is the location of the phy on the bus

For RTL83xx these two parameters will usually be the same. Instead
of three steps (inventing the macro, converting the consumers and
removeing the old macor) do a one-step conversion for the existing
EXTERNAL_PHY() macro.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22698
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-03-31 12:56:24 +02:00

393 lines
7.3 KiB
Devicetree
Raw Blame History

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "rtl839x.dtsi"
#include "rtl83xx_hpe_1920.dtsi"
#include <dt-bindings/leds/common.h>
/ {
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
leds {
compatible = "gpio-leds";
led_power: led-0 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_POWER;
gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
};
};
};
&mdio_bus0 {
PHY_C22(0, 0)
PHY_C22(1, 1)
PHY_C22(2, 2)
PHY_C22(3, 3)
PHY_C22(4, 4)
PHY_C22(5, 5)
PHY_C22(6, 6)
PHY_C22(7, 7)
PHY_C22(8, 8)
PHY_C22(9, 9)
PHY_C22(10, 10)
PHY_C22(11, 11)
PHY_C22(12, 12)
PHY_C22(13, 13)
PHY_C22(14, 14)
PHY_C22(15, 15)
PHY_C22(16, 16)
PHY_C22(17, 17)
PHY_C22(18, 18)
PHY_C22(19, 19)
PHY_C22(20, 20)
PHY_C22(21, 21)
PHY_C22(22, 22)
PHY_C22(23, 23)
PHY_C22(24, 24)
PHY_C22(25, 25)
PHY_C22(26, 26)
PHY_C22(27, 27)
PHY_C22(28, 28)
PHY_C22(29, 29)
PHY_C22(30, 30)
PHY_C22(31, 31)
PHY_C22(32, 32)
PHY_C22(33, 33)
PHY_C22(34, 34)
PHY_C22(35, 35)
PHY_C22(36, 36)
PHY_C22(37, 37)
PHY_C22(38, 38)
PHY_C22(39, 39)
PHY_C22(40, 40)
PHY_C22(41, 41)
PHY_C22(42, 42)
PHY_C22(43, 43)
PHY_C22(44, 44)
PHY_C22(45, 45)
PHY_C22(46, 46)
PHY_C22(47, 47)
};
&switch0 {
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
SWITCH_PORT_SDS(0, 1, 0, qsgmii)
SWITCH_PORT_SDS(1, 2, 0, qsgmii)
SWITCH_PORT_SDS(2, 3, 0, qsgmii)
SWITCH_PORT_SDS(3, 4, 0, qsgmii)
SWITCH_PORT_SDS(4, 5, 1, qsgmii)
SWITCH_PORT_SDS(5, 6, 1, qsgmii)
SWITCH_PORT_SDS(6, 7, 1, qsgmii)
SWITCH_PORT_SDS(7, 8, 1, qsgmii)
SWITCH_PORT_SDS(8, 9, 2, qsgmii)
SWITCH_PORT_SDS(9, 10, 2, qsgmii)
SWITCH_PORT_SDS(10, 11, 2, qsgmii)
SWITCH_PORT_SDS(11, 12, 2, qsgmii)
SWITCH_PORT_SDS(12, 13, 3, qsgmii)
SWITCH_PORT_SDS(13, 14, 3, qsgmii)
SWITCH_PORT_SDS(14, 15, 3, qsgmii)
SWITCH_PORT_SDS(15, 16, 3, qsgmii)
SWITCH_PORT_SDS(16, 17, 4, qsgmii)
SWITCH_PORT_SDS(17, 18, 4, qsgmii)
SWITCH_PORT_SDS(18, 19, 4, qsgmii)
SWITCH_PORT_SDS(19, 20, 4, qsgmii)
SWITCH_PORT_SDS(20, 21, 5, qsgmii)
SWITCH_PORT_SDS(21, 22, 5, qsgmii)
SWITCH_PORT_SDS(22, 23, 5, qsgmii)
SWITCH_PORT_SDS(23, 24, 5, qsgmii)
SWITCH_PORT_SDS(24, 25, 6, qsgmii)
SWITCH_PORT_SDS(25, 26, 6, qsgmii)
SWITCH_PORT_SDS(26, 27, 6, qsgmii)
SWITCH_PORT_SDS(27, 28, 6, qsgmii)
SWITCH_PORT_SDS(28, 29, 7, qsgmii)
SWITCH_PORT_SDS(29, 30, 7, qsgmii)
SWITCH_PORT_SDS(30, 31, 7, qsgmii)
SWITCH_PORT_SDS(31, 32, 7, qsgmii)
SWITCH_PORT_SDS(32, 33, 8, qsgmii)
SWITCH_PORT_SDS(33, 34, 8, qsgmii)
SWITCH_PORT_SDS(34, 35, 8, qsgmii)
SWITCH_PORT_SDS(35, 36, 8, qsgmii)
SWITCH_PORT_SDS(36, 37, 9, qsgmii)
SWITCH_PORT_SDS(37, 38, 9, qsgmii)
SWITCH_PORT_SDS(38, 39, 9, qsgmii)
SWITCH_PORT_SDS(39, 40, 9, qsgmii)
SWITCH_PORT_SDS(40, 41, 10, qsgmii)
SWITCH_PORT_SDS(41, 42, 10, qsgmii)
SWITCH_PORT_SDS(42, 43, 10, qsgmii)
SWITCH_PORT_SDS(43, 44, 10, qsgmii)
SWITCH_PORT_SDS(44, 45, 11, qsgmii)
SWITCH_PORT_SDS(45, 46, 11, qsgmii)
SWITCH_PORT_SDS(46, 47, 11, qsgmii)
SWITCH_PORT_SDS(47, 48, 11, qsgmii)
port@52 {
ethernet = <&ethernet0>;
reg = <52>;
phy-mode = "internal";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
&port0 {
nvmem-cells = <&macaddr_factory 2>;
nvmem-cell-names = "mac-address";
};
&port1 {
nvmem-cells = <&macaddr_factory 3>;
nvmem-cell-names = "mac-address";
};
&port2 {
nvmem-cells = <&macaddr_factory 4>;
nvmem-cell-names = "mac-address";
};
&port3 {
nvmem-cells = <&macaddr_factory 5>;
nvmem-cell-names = "mac-address";
};
&port4 {
nvmem-cells = <&macaddr_factory 6>;
nvmem-cell-names = "mac-address";
};
&port5 {
nvmem-cells = <&macaddr_factory 7>;
nvmem-cell-names = "mac-address";
};
&port6 {
nvmem-cells = <&macaddr_factory 8>;
nvmem-cell-names = "mac-address";
};
&port7 {
nvmem-cells = <&macaddr_factory 9>;
nvmem-cell-names = "mac-address";
};
&port8 {
nvmem-cells = <&macaddr_factory 10>;
nvmem-cell-names = "mac-address";
};
&port9 {
nvmem-cells = <&macaddr_factory 11>;
nvmem-cell-names = "mac-address";
};
&port10 {
nvmem-cells = <&macaddr_factory 12>;
nvmem-cell-names = "mac-address";
};
&port11 {
nvmem-cells = <&macaddr_factory 13>;
nvmem-cell-names = "mac-address";
};
&port12 {
nvmem-cells = <&macaddr_factory 14>;
nvmem-cell-names = "mac-address";
};
&port13 {
nvmem-cells = <&macaddr_factory 15>;
nvmem-cell-names = "mac-address";
};
&port14 {
nvmem-cells = <&macaddr_factory 16>;
nvmem-cell-names = "mac-address";
};
&port15 {
nvmem-cells = <&macaddr_factory 17>;
nvmem-cell-names = "mac-address";
};
&port16 {
nvmem-cells = <&macaddr_factory 18>;
nvmem-cell-names = "mac-address";
};
&port17 {
nvmem-cells = <&macaddr_factory 19>;
nvmem-cell-names = "mac-address";
};
&port18 {
nvmem-cells = <&macaddr_factory 20>;
nvmem-cell-names = "mac-address";
};
&port19 {
nvmem-cells = <&macaddr_factory 21>;
nvmem-cell-names = "mac-address";
};
&port20 {
nvmem-cells = <&macaddr_factory 22>;
nvmem-cell-names = "mac-address";
};
&port21 {
nvmem-cells = <&macaddr_factory 23>;
nvmem-cell-names = "mac-address";
};
&port22 {
nvmem-cells = <&macaddr_factory 24>;
nvmem-cell-names = "mac-address";
};
&port23 {
nvmem-cells = <&macaddr_factory 25>;
nvmem-cell-names = "mac-address";
};
&port24 {
nvmem-cells = <&macaddr_factory 26>;
nvmem-cell-names = "mac-address";
};
&port25 {
nvmem-cells = <&macaddr_factory 27>;
nvmem-cell-names = "mac-address";
};
&port26 {
nvmem-cells = <&macaddr_factory 28>;
nvmem-cell-names = "mac-address";
};
&port27 {
nvmem-cells = <&macaddr_factory 29>;
nvmem-cell-names = "mac-address";
};
&port28 {
nvmem-cells = <&macaddr_factory 30>;
nvmem-cell-names = "mac-address";
};
&port29 {
nvmem-cells = <&macaddr_factory 31>;
nvmem-cell-names = "mac-address";
};
&port30 {
nvmem-cells = <&macaddr_factory 32>;
nvmem-cell-names = "mac-address";
};
&port31 {
nvmem-cells = <&macaddr_factory 33>;
nvmem-cell-names = "mac-address";
};
&port32 {
nvmem-cells = <&macaddr_factory 34>;
nvmem-cell-names = "mac-address";
};
&port33 {
nvmem-cells = <&macaddr_factory 35>;
nvmem-cell-names = "mac-address";
};
&port34 {
nvmem-cells = <&macaddr_factory 36>;
nvmem-cell-names = "mac-address";
};
&port35 {
nvmem-cells = <&macaddr_factory 37>;
nvmem-cell-names = "mac-address";
};
&port36 {
nvmem-cells = <&macaddr_factory 38>;
nvmem-cell-names = "mac-address";
};
&port37 {
nvmem-cells = <&macaddr_factory 39>;
nvmem-cell-names = "mac-address";
};
&port38 {
nvmem-cells = <&macaddr_factory 40>;
nvmem-cell-names = "mac-address";
};
&port39 {
nvmem-cells = <&macaddr_factory 41>;
nvmem-cell-names = "mac-address";
};
&port40 {
nvmem-cells = <&macaddr_factory 42>;
nvmem-cell-names = "mac-address";
};
&port41 {
nvmem-cells = <&macaddr_factory 43>;
nvmem-cell-names = "mac-address";
};
&port42 {
nvmem-cells = <&macaddr_factory 44>;
nvmem-cell-names = "mac-address";
};
&port43 {
nvmem-cells = <&macaddr_factory 45>;
nvmem-cell-names = "mac-address";
};
&port44 {
nvmem-cells = <&macaddr_factory 46>;
nvmem-cell-names = "mac-address";
};
&port45 {
nvmem-cells = <&macaddr_factory 47>;
nvmem-cell-names = "mac-address";
};
&port46 {
nvmem-cells = <&macaddr_factory 48>;
nvmem-cell-names = "mac-address";
};
&port47 {
nvmem-cells = <&macaddr_factory 49>;
nvmem-cell-names = "mac-address";
};
Reference in New Issue View Git Blame Copy Permalink