62 lines
2.3 KiB
Diff
62 lines
2.3 KiB
Diff
From fb20ccf70cf695f178d7c32e2d33b376560df0ff Mon Sep 17 00:00:00 2001
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From: Chen-Yu Tsai <wens@kernel.org>
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Date: Tue, 17 Feb 2026 17:30:03 +0800
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Subject: [PATCH] clk: sunxi-ng: sun55i-a523-r: Add missing r-spi module clock
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When the PRCM clk driver was added, somehow the r-spi module clock
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was skipped over.
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Add it so that r-spi can actually work.
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Fixes: 8cea339cfb81 ("clk: sunxi-ng: add support for the A523/T527 PRCM CCU")
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Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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Link: https://patch.msgid.link/20260217093004.3239051-1-wens@kernel.org
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Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
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---
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drivers/clk/sunxi-ng/ccu-sun55i-a523-r.c | 17 ++++++++++++++++-
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1 file changed, 16 insertions(+), 1 deletion(-)
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--- a/drivers/clk/sunxi-ng/ccu-sun55i-a523-r.c
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+++ b/drivers/clk/sunxi-ng/ccu-sun55i-a523-r.c
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@@ -83,9 +83,22 @@ static SUNXI_CCU_MUX_DATA_WITH_GATE(r_pw
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static SUNXI_CCU_GATE_HW(bus_r_pwmctrl_clk, "bus-r-pwmctrl",
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&r_apb0_clk.common.hw, 0x13c, BIT(0), 0);
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-/* SPI clock is /M/N (same as new MMC?) */
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+static const struct clk_parent_data r_spi_parents[] = {
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+ { .fw_name = "hosc" },
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+ { .fw_name = "pll-periph" },
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+ { .name = "pll-periph0-300M" },
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+ { .name = "pll-periph1-300M" },
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+ { .name = "pll-audio" },
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+};
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+static SUNXI_CCU_DUALDIV_MUX_GATE(r_spi_clk, "r-spi", r_spi_parents, 0x150,
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+ 0, 5, /* M */
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+ 8, 5, /* P */
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+ 24, 3, /* mux */
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+ BIT(31), /* gate */
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+ 0);
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static SUNXI_CCU_GATE_HW(bus_r_spi_clk, "bus-r-spi",
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&r_ahb_clk.common.hw, 0x15c, BIT(0), 0);
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+
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static SUNXI_CCU_GATE_HW(bus_r_spinlock_clk, "bus-r-spinlock",
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&r_ahb_clk.common.hw, 0x16c, BIT(0), 0);
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static SUNXI_CCU_GATE_HW(bus_r_msgbox_clk, "bus-r-msgbox",
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@@ -138,6 +151,7 @@ static struct ccu_common *sun55i_a523_r_
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&bus_r_twd_clk.common,
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&r_pwmctrl_clk.common,
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&bus_r_pwmctrl_clk.common,
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+ &r_spi_clk.common,
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&bus_r_spi_clk.common,
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&bus_r_spinlock_clk.common,
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&bus_r_msgbox_clk.common,
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@@ -169,6 +183,7 @@ static struct clk_hw_onecell_data sun55i
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[CLK_BUS_R_TWD] = &bus_r_twd_clk.common.hw,
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[CLK_R_PWMCTRL] = &r_pwmctrl_clk.common.hw,
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[CLK_BUS_R_PWMCTRL] = &bus_r_pwmctrl_clk.common.hw,
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+ [CLK_R_SPI] = &r_spi_clk.common.hw,
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[CLK_BUS_R_SPI] = &bus_r_spi_clk.common.hw,
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[CLK_BUS_R_SPINLOCK] = &bus_r_spinlock_clk.common.hw,
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[CLK_BUS_R_MSGBOX] = &bus_r_msgbox_clk.common.hw,
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