RAM: ESMT M15T2G16128A-DEB DDR3 1866 MT/s This allows us to use the full size of nand, which extends ubi size from 64Mb to 122.25Mb. 1. Log in to the device and backup all the partitions, especially unique "Factory" and "bdinfo" partitions from System -> Backup / Flash Firmware -> Save mtdblock contents. 2. Install kmod-mtd-rw to unlock mtd partitions for writing apk update && apk add kmod-mtd-rw && insmod mtd-rw i_want_a_brick=1 3. Write new OpenWrt (U-Boot Layout) "BL2" and "FIP": mtd -e BL2 write openwrt-mediatek-filogic-cudy_m3000-v1-ubootmod-preloader.bin BL2 mtd -e FIP write openwrt-mediatek-filogic-cudy_m3000-v1-ubootmod-bl31-uboot.fip FIP 4. Set static IP on your PC: "192.168.1.254", gateway "192.168.1.1" 5. Serve openwrt-mediatek-filogic-cudy_m3000-v1-ubootmod-initramfs-recovery.itb using TFTP server. 6. Connect Router LAN with PC LAN. 7. Cut off the power and re-engage, wait for TFTP recovery to complete. 8. After OpenWrt initramfs recovery has booted, clean "/dev/mtd5" ubi partition to utilize maximum of free space: ubidetach -p /dev/mtd5; ubiformat /dev/mtd5 -y; ubiattach -p /dev/mtd5 ubimkvol /dev/ubi0 -n 0 -N ubootenv -s 128KiB ubimkvol /dev/ubi0 -n 1 -N ubootenv2 -s 128KiB 9. Perform sysupgrade. Signed-off-by: Dmitry Mostovoy <stavultras@gmail.com> Link: https://github.com/openwrt/openwrt/pull/23274 Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
204 lines
3.4 KiB
Devicetree
204 lines
3.4 KiB
Devicetree
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/dts-v1/;
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#include "mt7981b.dtsi"
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/ {
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aliases {
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label-mac-device = &gmac0;
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led-boot = &led_status;
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led-failsafe = &led_status;
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led-running = &led_status;
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led-upgrade = &led_status;
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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gpio-keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&pio 1 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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wps {
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label = "wps";
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gpios = <&pio 0 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_status: internet-white {
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function = LED_FUNCTION_WAN_ONLINE;
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color = <LED_COLOR_ID_WHITE>;
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gpios = <&pio 10 GPIO_ACTIVE_LOW>;
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};
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internet-red {
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function = LED_FUNCTION_WAN_ONLINE;
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color = <LED_COLOR_ID_RED>;
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gpios = <&pio 4 GPIO_ACTIVE_LOW>;
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};
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wan {
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function = LED_FUNCTION_WAN;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&pio 5 GPIO_ACTIVE_LOW>;
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};
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lan {
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function = LED_FUNCTION_LAN;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&pio 9 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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ð {
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pinctrl-names = "default";
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pinctrl-0 = <&mdio_pins>;
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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phy-handle = <&wan_phy>;
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nvmem-cell-names = "mac-address";
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nvmem-cells = <&macaddr_bdinfo_de00 0>;
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};
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gmac1: mac@1 {
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compatible = "mediatek,eth-mac";
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reg = <1>;
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phy-mode = "gmii";
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phy-handle = <&int_gbe_phy>;
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nvmem-cell-names = "mac-address";
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nvmem-cells = <&macaddr_bdinfo_de00 1>;
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};
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_flash_pins>;
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status = "okay";
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spi_nand: spi_nand@0 {
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compatible = "spi-nand";
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reg = <0>;
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spi-max-frequency = <52000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "BL2";
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reg = <0x0000000 0x0100000>;
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read-only;
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};
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partition@100000 {
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label = "u-boot-env";
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reg = <0x0100000 0x0080000>;
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};
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partition@180000 {
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label = "Factory";
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reg = <0x0180000 0x0200000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x1000>;
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};
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};
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};
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bdinfo: partition@380000 {
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label = "bdinfo";
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reg = <0x0380000 0x0040000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_bdinfo_de00: macaddr@de00 {
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#nvmem-cell-cells = <1>;
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compatible = "mac-base";
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reg = <0xde00 0x6>;
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};
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};
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};
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partition@3c0000 {
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label = "FIP";
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reg = <0x03c0000 0x0200000>;
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read-only;
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};
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ubi: partition@5c0000 {
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label = "ubi";
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reg = <0x05c0000 0x4000000>;
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};
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};
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};
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};
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&pio {
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spi0_flash_pins: spi0-pins {
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mux {
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function = "spi";
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groups = "spi0", "spi0_wp_hold";
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};
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conf-pu {
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pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
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};
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conf-pd {
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pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
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};
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};
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};
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&wifi {
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status = "okay";
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nvmem-cells = <&eeprom_factory_0>;
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nvmem-cell-names = "eeprom";
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};
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