Robert Marko
e235851495
Update the qca8k fixed link patch to v2 that is pending upstream. Signed-off-by: Robert Marko <robimarko@gmail.com>
159 lines
7.0 KiB
Diff
159 lines
7.0 KiB
Diff
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Fri, 5 Jun 2026 08:11:31 +0000 (UTC)
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Date: Fri, 05 Jun 2026 12:11:29 +0400
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Subject: [PATCH next-next v2] net: dsa: qca8k: Add support for force mode
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for fixed link topology
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Precedence: bulk
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X-Change-ID: 20260603-qca8337-force-mode-fbcba5296446
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To: Andrew Lunn <andrew@lunn.ch>, Vladimir Oltean <olteanv@gmail.com>,
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"David S. Miller" <davem@davemloft.net>, Eric Dumazet <edumazet@google.com>,
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Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>
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Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
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George Moussalem <george.moussalem@outlook.com>
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From: George Moussalem <george.moussalem@outlook.com>
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From: George Moussalem <george.moussalem@outlook.com>
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A fixed link topology is commonly used to connect this switch (on port
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0 or 6) to a SoC's MAC over SGMII. When inband negotiation is not used,
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the switch needs to be configured to operate in force mode. As such,
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enable support for force mode.
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Signed-off-by: George Moussalem <george.moussalem@outlook.com>
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---
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Changes in v2:
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- Added check for QCA8337 switch ID and build up the register mask
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accordingly before writing the force mode bit to avoid overwriting the
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bit on switches other than QCA8337 for which there's no documentation
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on whether force mode is supported or not.
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- Added comment to state that regardless of port used (0 or 6), the
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force mode bit is written to the PORT0 PAD register as per vendor SDK.
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- Link to v1: https://lore.kernel.org/r/20260603-qca8337-force-mode-v1-1-caf7670ffab3@outlook.com
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---
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drivers/net/dsa/qca/qca8k-8xxx.c | 22 ++++++++++++++++------
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drivers/net/dsa/qca/qca8k.h | 1 +
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2 files changed, 17 insertions(+), 6 deletions(-)
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---
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base-commit: b7bee4ca5688e30ca50fbc87b1b8f7eed7006c17
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change-id: 20260603-qca8337-force-mode-fbcba5296446
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Best regards,
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--- a/drivers/net/dsa/qca/qca8k-8xxx.c
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+++ b/drivers/net/dsa/qca/qca8k-8xxx.c
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@@ -1538,7 +1538,7 @@ static int qca8k_pcs_config(struct phyli
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{
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struct qca8k_priv *priv = pcs_to_qca8k_pcs(pcs)->priv;
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int cpu_port_index, ret, port;
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- u32 reg, val;
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+ u32 mask, reg, val;
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port = pcs_to_qca8k_pcs(pcs)->port;
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switch (port) {
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@@ -1611,11 +1611,21 @@ static int qca8k_pcs_config(struct phyli
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if (priv->ports_config.sgmii_tx_clk_falling_edge)
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val |= QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE;
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- if (val)
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- ret = qca8k_rmw(priv, reg,
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- QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE |
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- QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE,
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- val);
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+ mask = (val) ? (QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE |
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+ QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE) : 0;
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+
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+ /*
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+ * (Un)set force mode on QCA8337 only, don't include it in the mask for
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+ * others. It is written to the PORT0 PAD register for both port 0 and 6.
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+ */
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+ if (priv->switch_id == QCA8K_ID_QCA8337) {
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+ if (neg_mode == PHYLINK_PCS_NEG_OUTBAND)
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+ val |= QCA8K_PORT_PAD_SGMII_FORCE_MODE;
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+ mask |= QCA8K_PORT_PAD_SGMII_FORCE_MODE;
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+ }
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+
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+ if (mask)
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+ ret = qca8k_rmw(priv, reg, mask, val);
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return 0;
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}
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--- a/drivers/net/dsa/qca/qca8k.h
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+++ b/drivers/net/dsa/qca/qca8k.h
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@@ -58,6 +58,7 @@
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#define QCA8K_PORT_PAD_RGMII_TX_DELAY_EN BIT(25)
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#define QCA8K_PORT_PAD_RGMII_RX_DELAY_EN BIT(24)
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#define QCA8K_PORT_PAD_SGMII_EN BIT(7)
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+#define QCA8K_PORT_PAD_SGMII_FORCE_MODE BIT(3)
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#define QCA8K_REG_PWS 0x010
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#define QCA8K_PWS_POWER_ON_SEL BIT(31)
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/* This reg is only valid for QCA832x and toggle the package
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