Drop airoha,x2-mode related property from the DTSI and enable them only in the relevant devices that use a PCIe0 line. x2-mode should be enabled only for the WiFi card that would use it as it might cause problem for WiFi card that expect 2 single PCIe x1 line instead of a single PCIe x2 line. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
541 lines
9.4 KiB
Devicetree
541 lines
9.4 KiB
Devicetree
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
/dts-v1/;
|
|
|
|
#include <dt-bindings/leds/common.h>
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
#include "an7581.dtsi"
|
|
|
|
/ {
|
|
model = "Nokia Valyrian";
|
|
compatible = "nokia,valyrian", "airoha,an7581", "airoha,en7581";
|
|
|
|
aliases {
|
|
serial0 = &uart1;
|
|
led-boot = &led_status_white;
|
|
led-failsafe = &led_status_red;
|
|
led-running = &led_status_green;
|
|
led-upgrade = &led_status_blue;
|
|
};
|
|
|
|
chosen {
|
|
bootargs = "earlycon";
|
|
stdout-path = "serial0:115200n8";
|
|
};
|
|
|
|
memory@80000000 {
|
|
device_type = "memory";
|
|
reg = <0x0 0x80000000 0x2 0x00000000>;
|
|
};
|
|
|
|
gpio-keys {
|
|
compatible = "gpio-keys";
|
|
|
|
btn-0 {
|
|
label = "reset";
|
|
linux,code = <KEY_RESTART>;
|
|
gpios = <&en7581_pinctrl 0 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
btn-1 {
|
|
label = "wps";
|
|
linux,code = <KEY_WPS_BUTTON>;
|
|
gpios = <&en7581_pinctrl 13 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
btn-2 {
|
|
label = "wifi";
|
|
linux,code = <KEY_RFKILL>;
|
|
gpios = <&en7581_pinctrl 16 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
led_status_red: led-0 {
|
|
function = LED_FUNCTION_STATUS;
|
|
color = <LED_COLOR_ID_RED>;
|
|
gpios = <&leds_shift_reg 0 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
led_status_green: led-1 {
|
|
function = LED_FUNCTION_STATUS;
|
|
color = <LED_COLOR_ID_GREEN>;
|
|
gpios = <&leds_shift_reg 1 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
led_status_blue: led-2 {
|
|
function = LED_FUNCTION_STATUS;
|
|
color = <LED_COLOR_ID_BLUE>;
|
|
gpios = <&leds_shift_reg 2 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
led_status_white: led-3 {
|
|
function = LED_FUNCTION_STATUS;
|
|
color = <LED_COLOR_ID_WHITE>;
|
|
gpios = <&leds_shift_reg 3 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
led-4 {
|
|
function = LED_FUNCTION_POWER;
|
|
color = <LED_COLOR_ID_AMBER>;
|
|
gpios = <&leds_shift_reg 4 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
led-5 {
|
|
function = LED_FUNCTION_POWER;
|
|
color = <LED_COLOR_ID_GREEN>;
|
|
gpios = <&leds_shift_reg 5 GPIO_ACTIVE_LOW>;
|
|
default-state = "on";
|
|
};
|
|
|
|
led-6 {
|
|
function = LED_FUNCTION_POWER;
|
|
color = <LED_COLOR_ID_RED>;
|
|
gpios = <&leds_shift_reg 6 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
led-7 {
|
|
function = LED_FUNCTION_MOBILE;
|
|
color = <LED_COLOR_ID_GREEN>;
|
|
gpios = <&leds_shift_reg 7 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
led-8 {
|
|
function = LED_FUNCTION_WAN;
|
|
color = <LED_COLOR_ID_GREEN>;
|
|
gpios = <&leds_shift_reg 8 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
led-9 {
|
|
function = LED_FUNCTION_WAN;
|
|
color = <LED_COLOR_ID_RED>;
|
|
gpios = <&leds_shift_reg 9 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
led-10 {
|
|
function = LED_FUNCTION_USB;
|
|
color = <LED_COLOR_ID_GREEN>;
|
|
gpios = <&leds_shift_reg 10 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
sfp: sfp {
|
|
compatible = "sff,sfp";
|
|
|
|
i2c-bus = <&i2c0>;
|
|
|
|
mod-def0-gpios = <&en7581_pinctrl 33 GPIO_ACTIVE_LOW>;
|
|
los-gpios = <&en7581_pinctrl 36 GPIO_ACTIVE_HIGH>;
|
|
tx-disable-gpios = <&en7581_pinctrl 41 GPIO_ACTIVE_HIGH>;
|
|
tx-fault-gpios = <&en7581_pinctrl 40 GPIO_ACTIVE_HIGH>;
|
|
maximum-power-milliwatt = <3000>;
|
|
};
|
|
|
|
i2c-1 {
|
|
compatible = "i2c-gpio";
|
|
|
|
sda-gpios = <&en7581_pinctrl 2 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
|
|
scl-gpios = <&en7581_pinctrl 1 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
|
|
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
adc@40 {
|
|
compatible = "richtek,rtq6059";
|
|
reg = <0x40>;
|
|
|
|
#io-channel-cells = <1>;
|
|
};
|
|
};
|
|
|
|
spi-0 {
|
|
compatible = "spi-gpio";
|
|
|
|
sck-gpios = <&en7581_pinctrl 4 GPIO_ACTIVE_HIGH>;
|
|
mosi-gpios = <&en7581_pinctrl 3 GPIO_ACTIVE_HIGH>;
|
|
cs-gpios = <&en7581_pinctrl 30 GPIO_ACTIVE_LOW>;
|
|
|
|
num-chipselects = <1>;
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
leds_shift_reg: gpio-expander@0 {
|
|
compatible = "fairchild,74hc595";
|
|
reg = <0>;
|
|
|
|
enable-gpios = <&en7581_pinctrl 14 GPIO_ACTIVE_LOW>;
|
|
|
|
gpio-controller;
|
|
|
|
registers-number = <2>;
|
|
spi-max-frequency = <100000>;
|
|
|
|
#gpio-cells = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&en7581_pinctrl {
|
|
gpio-ranges = <&en7581_pinctrl 0 13 47>;
|
|
|
|
pcie1_rst_pins: pcie1-rst-pins {
|
|
conf {
|
|
pins = "pcie_reset1";
|
|
drive-open-drain = <1>;
|
|
};
|
|
};
|
|
|
|
pcie2_rst_pins: pcie2-rst-pins {
|
|
conf {
|
|
pins = "pcie_reset2";
|
|
drive-open-drain = <1>;
|
|
};
|
|
};
|
|
|
|
gswp1_led0_pins: gswp1-led1-pins {
|
|
mux {
|
|
function = "phy1_led0";
|
|
pins = "gpio43";
|
|
};
|
|
};
|
|
|
|
gswp2_led0_pins: gswp2-led1-pins {
|
|
mux {
|
|
function = "phy2_led0";
|
|
pins = "gpio44";
|
|
};
|
|
};
|
|
|
|
gswp3_led0_pins: gswp3-led1-pins {
|
|
mux {
|
|
function = "phy3_led0";
|
|
pins = "gpio45";
|
|
};
|
|
};
|
|
|
|
mmc_pins: mmc-pins {
|
|
mux {
|
|
function = "emmc";
|
|
groups = "emmc";
|
|
};
|
|
};
|
|
};
|
|
|
|
&mmc0 {
|
|
pinctrl-names = "default", "state_uhs";
|
|
pinctrl-0 = <&mmc_pins>;
|
|
pinctrl-1 = <&mmc_pins>;
|
|
status = "okay";
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
card@0 {
|
|
compatible = "mmc-card";
|
|
reg = <0>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
bl@800 {
|
|
label = "bl2";
|
|
reg = <0x00000800 0x0001f800>;
|
|
};
|
|
|
|
bootloader@20000 {
|
|
label = "bootloader";
|
|
reg = <0x00020000 0x000e0000>;
|
|
};
|
|
|
|
bootloader-inactive@100000 {
|
|
label = "bootloader-inactive";
|
|
reg = <0x00100000 0x000e0000>;
|
|
};
|
|
|
|
u-boot-env@1e0000 {
|
|
label = "u-boot-env";
|
|
reg = <0x001e0000 0x00020000>;
|
|
|
|
nvmem-layout {
|
|
compatible = "u-boot,env-layout";
|
|
};
|
|
};
|
|
|
|
factory@200000 {
|
|
label = "factory";
|
|
reg = <0x00200000 0x00800000>;
|
|
|
|
nvmem-layout {
|
|
compatible = "fixed-layout";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
eeprom_factory_0: eeprom@0 {
|
|
reg = <0x40000 0x1e00>;
|
|
};
|
|
|
|
mac_factory_2c0000: mac@2c0000 {
|
|
compatible = "mac-base";
|
|
reg = <0x2c0000 0x6>;
|
|
|
|
#nvmem-cell-cells = <1>;
|
|
};
|
|
|
|
onu_type_factory_2e0000: onu_type@2e0000 {
|
|
reg = <0x2e0000 0x10>;
|
|
};
|
|
|
|
board_config_factory_2e0010: board_config@2e0010 {
|
|
reg = <0x2e0010 0x8>;
|
|
};
|
|
};
|
|
};
|
|
|
|
mfgdata@a00000 {
|
|
label = "mfgdata";
|
|
reg = <0x00a00000 0x00100000>;
|
|
};
|
|
|
|
kernel-active@b00000 {
|
|
label = "kernel-active";
|
|
reg = <0x00b00000 0x00800000>;
|
|
};
|
|
|
|
kernel-inactive@1300000 {
|
|
label = "kernel-inactive";
|
|
reg = <0x01300000 0x00800000>;
|
|
};
|
|
|
|
rootfs-active@1b00000 {
|
|
label = "rootfs-active";
|
|
reg = <0x01b00000 0x06400000>;
|
|
};
|
|
|
|
rootfs-inactive@7f00000 {
|
|
label = "rootfs-inactive";
|
|
reg = <0x07f00000 0x06400000>;
|
|
};
|
|
|
|
rootfs-data@e300000 {
|
|
label = "rootfs_data";
|
|
reg = <0x0e300000 0x02000000>;
|
|
};
|
|
|
|
securestore@10300000 {
|
|
label = "securestore";
|
|
reg = <0x10300000 0x1000000>;
|
|
};
|
|
|
|
lcm-data@11300000 {
|
|
label = "lcm_data";
|
|
reg = <0x11300000 0x40000000>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&usb0 {
|
|
status = "okay";
|
|
|
|
mediatek,u3p-dis-msk = <0x1>;
|
|
phys = <&usb0_phy PHY_TYPE_USB2>;
|
|
};
|
|
|
|
&i2c0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&pciephy {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie0 {
|
|
airoha,x2-mode;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pcie1_rst_pins>;
|
|
status = "okay";
|
|
|
|
pcie@0,0 {
|
|
reg = <0x0000 0 0 0 0>;
|
|
|
|
wifi@0,0 {
|
|
compatible = "mediatek,mt76";
|
|
reg = <0x0000 0 0 0 0>;
|
|
|
|
nvmem-cells = <&eeprom_factory_0>;
|
|
nvmem-cell-names = "eeprom";
|
|
|
|
airoha,npu = <&npu>;
|
|
airoha,eth = <ð>;
|
|
|
|
band@0 {
|
|
/* 2.4 GHz */
|
|
reg = <0>;
|
|
nvmem-cells = <&mac_factory_2c0000 6>;
|
|
nvmem-cell-names = "mac-address";
|
|
};
|
|
|
|
band@1 {
|
|
/* 5 GHz */
|
|
reg = <1>;
|
|
nvmem-cells = <&mac_factory_2c0000 7>;
|
|
nvmem-cell-names = "mac-address";
|
|
};
|
|
|
|
band@2 {
|
|
/* 6 GHz */
|
|
reg = <2>;
|
|
nvmem-cells =<&mac_factory_2c0000 8>;
|
|
nvmem-cell-names = "mac-address";
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&pcie2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pcie2_rst_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
ð {
|
|
status = "okay";
|
|
};
|
|
|
|
&gdm1 {
|
|
status = "okay";
|
|
|
|
nvmem-cells = <&mac_factory_2c0000 3>;
|
|
nvmem-cell-names = "mac-address";
|
|
};
|
|
|
|
&mdio {
|
|
as21xx: ethernet-phy@1c {
|
|
compatible = "ethernet-phy-ieee802.3-c45";
|
|
reg = <0x1c>;
|
|
|
|
firmware-name = "as21x1x_fw.bin";
|
|
|
|
reset-deassert-us = <1000000>;
|
|
reset-assert-us = <1000000>;
|
|
reset-gpios = <&en7581_pinctrl 31 GPIO_ACTIVE_LOW>;
|
|
|
|
leds {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
led@0 {
|
|
reg = <0>;
|
|
color = <LED_COLOR_ID_GREEN>;
|
|
function = LED_FUNCTION_LAN;
|
|
default-state = "keep";
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&switch {
|
|
status = "okay";
|
|
};
|
|
|
|
&pon_pcs {
|
|
status = "okay";
|
|
};
|
|
|
|
&gdm2 {
|
|
status = "okay";
|
|
|
|
sfp = <&sfp>;
|
|
|
|
managed = "in-band-status";
|
|
phy-mode = "usxgmii";
|
|
|
|
nvmem-cells = <&mac_factory_2c0000 4>;
|
|
nvmem-cell-names = "mac-address";
|
|
|
|
openwrt,netdev-name = "wan";
|
|
};
|
|
|
|
ð_pcs {
|
|
status = "okay";
|
|
};
|
|
|
|
&gdm4 {
|
|
status = "okay";
|
|
|
|
managed = "in-band-status";
|
|
phy-handle = <&as21xx>;
|
|
phy-mode = "usxgmii";
|
|
|
|
nvmem-cells = <&mac_factory_2c0000 5>;
|
|
nvmem-cell-names = "mac-address";
|
|
|
|
openwrt,netdev-name = "10g";
|
|
};
|
|
|
|
&gsw_port1 {
|
|
label = "lan1";
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&gsw_phy1 {
|
|
pinctrl-names = "gbe-led";
|
|
pinctrl-0 = <&gswp1_led0_pins>;
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&gsw_phy1_led0 {
|
|
function = LED_FUNCTION_LAN;
|
|
active-low;
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&gsw_port2 {
|
|
label = "lan2";
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&gsw_phy2 {
|
|
pinctrl-names = "gbe-led";
|
|
pinctrl-0 = <&gswp2_led0_pins>;
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&gsw_phy2_led0 {
|
|
function = LED_FUNCTION_LAN;
|
|
active-low;
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&gsw_port3 {
|
|
label = "lan3";
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&gsw_phy3 {
|
|
pinctrl-names = "gbe-led";
|
|
pinctrl-0 = <&gswp3_led0_pins>;
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&gsw_phy3_led0 {
|
|
function = LED_FUNCTION_LAN;
|
|
active-low;
|
|
|
|
status = "okay";
|
|
};
|