Tianling ShenandNick Hainke
86e3c31bcc
This is an automatically generated commit which aids following Kernel patch history, as git will see the move and copy as a rename thus defeating the purpose. For the original discussion see: https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org> Link: https://github.com/openwrt/openwrt/pull/23139 Signed-off-by: Nick Hainke <vincent@systemli.org>
52 lines
2.0 KiB
Diff
52 lines
2.0 KiB
Diff
From 33b561eb66f1e271f2899e103c857d20425076f4 Mon Sep 17 00:00:00 2001
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From: Dragan Simic <dsimic@manjaro.org>
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Date: Wed, 8 Jan 2025 05:26:45 +0100
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Subject: arm64: dts: rockchip: Use "dma-noncoherent" in base RK3588 SoC dtsi
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The preferred way to denote hardware with non-coherent DMA is to use the
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"dma-noncoherent" DT property, at both the GIC redistributor and the GIC ITS
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levels, [1] instead of relying on the compatibles to handle hardware errata,
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in this case the Rockchip 3588001 errata. [2]
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Let's have the preferred way employed in the base Rockchip RK3588 SoC dtsi,
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which also goes along with adding initial support for the Rockchip RK3582 SoC
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variant, with its separate compatible. [2][3]
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[1] Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
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[2] https://lore.kernel.org/linux-rockchip/86msgoozqa.wl-maz@kernel.org/
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[3] https://lore.kernel.org/linux-rockchip/20241222030355.2246-4-naoki@radxa.com/
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Cc: Marc Zyngier <maz@kernel.org>
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Cc: FUKAUMI Naoki <naoki@radxa.com>
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Acked-by: Marc Zyngier <maz@kernel.org>
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Signed-off-by: Dragan Simic <dsimic@manjaro.org>
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Link: https://lore.kernel.org/r/fa1a672dae3644bb3caa58f03216d0ca349db88b.1736279094.git.dsimic@manjaro.org
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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--- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
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@@ -2020,6 +2020,7 @@
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<0x0 0xfe680000 0 0x100000>; /* GICR */
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interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupt-controller;
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+ dma-noncoherent;
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mbi-alias = <0x0 0xfe610000>;
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mbi-ranges = <424 56>;
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msi-controller;
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@@ -2031,6 +2032,7 @@
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its0: msi-controller@fe640000 {
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compatible = "arm,gic-v3-its";
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reg = <0x0 0xfe640000 0x0 0x20000>;
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+ dma-noncoherent;
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msi-controller;
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#msi-cells = <1>;
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};
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@@ -2038,6 +2040,7 @@
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its1: msi-controller@fe660000 {
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compatible = "arm,gic-v3-its";
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reg = <0x0 0xfe660000 0x0 0x20000>;
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+ dma-noncoherent;
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msi-controller;
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#msi-cells = <1>;
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};
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