Import pending series introducing support for standalone PCS drivers. This has previously already been used by the airoha target, and is also the base for the closer-to-upstream patches for MediaTek MT7988 10G SerDes support. In order to not having to diverge from upstream also backport series for standardized handling for PHY and PCS SerDes pair polarity. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
484 lines
16 KiB
Diff
484 lines
16 KiB
Diff
From: Felix Fietkau <nbd@nbd.name>
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Date: Tue, 15 Oct 2024 12:52:56 +0200
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Subject: [PATCH] net: ethernet: mtk_eth_soc: optimize dma ring address/index
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calculation
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Since DMA descriptor sizes are all power of 2, we can avoid costly integer
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division in favor or simple shifts.
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Signed-off-by: Felix Fietkau <nbd@nbd.name>
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---
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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@@ -44,6 +44,11 @@ MODULE_PARM_DESC(msg_level, "Message lev
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offsetof(struct mtk_hw_stats, xdp_stats.x) / \
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sizeof(u64) }
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+#define RX_DESC_OFS(eth, i) \
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+ ((i) << (eth)->soc->rx.desc_shift)
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+#define TX_DESC_OFS(eth, i) \
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+ ((i) << (eth)->soc->tx.desc_shift)
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+
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static const struct mtk_reg_map mtk_reg_map = {
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.tx_irq_mask = 0x1a1c,
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.tx_irq_status = 0x1a18,
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@@ -1306,13 +1311,13 @@ static int mtk_init_fq_dma(struct mtk_et
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dma_addr_t dma_addr;
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int i, j, len;
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- eth->scratch_ring = mtk_dma_ring_alloc(eth, cnt * soc->tx.desc_size,
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+ eth->scratch_ring = mtk_dma_ring_alloc(eth, TX_DESC_OFS(eth, cnt),
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ð->phy_scratch_ring, true);
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if (unlikely(!eth->scratch_ring))
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return -ENOMEM;
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- phy_ring_tail = eth->phy_scratch_ring + soc->tx.desc_size * (cnt - 1);
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+ phy_ring_tail = eth->phy_scratch_ring + TX_DESC_OFS(eth, cnt - 1);
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for (j = 0; j < DIV_ROUND_UP(soc->tx.fq_dma_size, MTK_FQ_DMA_LENGTH); j++) {
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len = min_t(int, cnt - j * MTK_FQ_DMA_LENGTH, MTK_FQ_DMA_LENGTH);
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@@ -1331,11 +1336,11 @@ static int mtk_init_fq_dma(struct mtk_et
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for (i = 0; i < len; i++) {
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struct mtk_tx_dma_v2 *txd;
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- txd = eth->scratch_ring + (j * MTK_FQ_DMA_LENGTH + i) * soc->tx.desc_size;
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+ txd = eth->scratch_ring + TX_DESC_OFS(eth, j * MTK_FQ_DMA_LENGTH + i);
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txd->txd1 = dma_addr + i * MTK_QDMA_PAGE_SIZE;
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if (j * MTK_FQ_DMA_LENGTH + i < cnt)
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txd->txd2 = eth->phy_scratch_ring +
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- (j * MTK_FQ_DMA_LENGTH + i + 1) * soc->tx.desc_size;
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+ TX_DESC_OFS(eth, j * MTK_FQ_DMA_LENGTH + i + 1);
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txd->txd3 = TX_DMA_PLEN0(MTK_QDMA_PAGE_SIZE);
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if (MTK_HAS_CAPS(soc->caps, MTK_36BIT_DMA))
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@@ -1365,9 +1370,9 @@ static void *mtk_qdma_phys_to_virt(struc
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}
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static struct mtk_tx_buf *mtk_desc_to_tx_buf(struct mtk_tx_ring *ring,
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- void *txd, u32 txd_size)
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+ void *txd, u32 txd_shift)
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{
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- int idx = (txd - ring->dma) / txd_size;
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+ int idx = (txd - ring->dma) >> txd_shift;
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return &ring->buf[idx];
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}
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@@ -1378,9 +1383,9 @@ static struct mtk_tx_dma *qdma_to_pdma(s
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return ring->dma_pdma - (struct mtk_tx_dma *)ring->dma + dma;
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}
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-static int txd_to_idx(struct mtk_tx_ring *ring, void *dma, u32 txd_size)
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+static int txd_to_idx(struct mtk_tx_ring *ring, void *dma, u32 txd_shift)
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{
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- return (dma - ring->dma) / txd_size;
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+ return (dma - ring->dma) >> txd_shift;
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}
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static void mtk_tx_unmap(struct mtk_eth *eth, struct mtk_tx_buf *tx_buf,
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@@ -1588,7 +1593,7 @@ static int mtk_tx_map(struct sk_buff *sk
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if (itxd == ring->last_free)
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return -ENOMEM;
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- itx_buf = mtk_desc_to_tx_buf(ring, itxd, soc->tx.desc_size);
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+ itx_buf = mtk_desc_to_tx_buf(ring, itxd, soc->tx.desc_shift);
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memset(itx_buf, 0, sizeof(*itx_buf));
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txd_info.addr = dma_map_single(eth->dma_dev, skb->data, txd_info.size,
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@@ -1642,7 +1647,7 @@ static int mtk_tx_map(struct sk_buff *sk
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mtk_tx_set_dma_desc(dev, txd, &txd_info);
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tx_buf = mtk_desc_to_tx_buf(ring, txd,
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- soc->tx.desc_size);
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+ soc->tx.desc_shift);
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if (new_desc)
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memset(tx_buf, 0, sizeof(*tx_buf));
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tx_buf->data = (void *)MTK_DMA_DUMMY_DESC;
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@@ -1685,7 +1690,7 @@ static int mtk_tx_map(struct sk_buff *sk
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} else {
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int next_idx;
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- next_idx = NEXT_DESP_IDX(txd_to_idx(ring, txd, soc->tx.desc_size),
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+ next_idx = NEXT_DESP_IDX(txd_to_idx(ring, txd, soc->tx.desc_shift),
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ring->dma_size);
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mtk_w32(eth, next_idx, MT7628_TX_CTX_IDX0);
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}
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@@ -1694,7 +1699,7 @@ static int mtk_tx_map(struct sk_buff *sk
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err_dma:
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do {
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- tx_buf = mtk_desc_to_tx_buf(ring, itxd, soc->tx.desc_size);
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+ tx_buf = mtk_desc_to_tx_buf(ring, itxd, soc->tx.desc_shift);
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/* unmap dma */
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mtk_tx_unmap(eth, tx_buf, NULL, false);
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@@ -1868,7 +1873,7 @@ static struct mtk_rx_ring *mtk_get_rx_ri
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ring = ð->rx_ring[i];
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idx = NEXT_DESP_IDX(ring->calc_idx, ring->dma_size);
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- rxd = ring->dma + idx * eth->soc->rx.desc_size;
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+ rxd = ring->dma + RX_DESC_OFS(eth, idx);
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if (rxd->rxd2 & RX_DMA_DONE) {
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ring->calc_idx_update = true;
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return ring;
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@@ -2036,7 +2041,7 @@ static int mtk_xdp_submit_frame(struct m
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}
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htxd = txd;
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- tx_buf = mtk_desc_to_tx_buf(ring, txd, soc->tx.desc_size);
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+ tx_buf = mtk_desc_to_tx_buf(ring, txd, soc->tx.desc_shift);
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memset(tx_buf, 0, sizeof(*tx_buf));
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htx_buf = tx_buf;
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@@ -2055,7 +2060,7 @@ static int mtk_xdp_submit_frame(struct m
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goto unmap;
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tx_buf = mtk_desc_to_tx_buf(ring, txd,
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- soc->tx.desc_size);
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+ soc->tx.desc_shift);
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memset(tx_buf, 0, sizeof(*tx_buf));
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n_desc++;
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}
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@@ -2093,7 +2098,7 @@ static int mtk_xdp_submit_frame(struct m
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} else {
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int idx;
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- idx = txd_to_idx(ring, txd, soc->tx.desc_size);
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+ idx = txd_to_idx(ring, txd, soc->tx.desc_shift);
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mtk_w32(eth, NEXT_DESP_IDX(idx, ring->dma_size),
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MT7628_TX_CTX_IDX0);
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}
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@@ -2104,7 +2109,7 @@ static int mtk_xdp_submit_frame(struct m
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unmap:
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while (htxd != txd) {
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- tx_buf = mtk_desc_to_tx_buf(ring, htxd, soc->tx.desc_size);
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+ tx_buf = mtk_desc_to_tx_buf(ring, htxd, soc->tx.desc_shift);
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mtk_tx_unmap(eth, tx_buf, NULL, false);
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htxd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU;
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@@ -2236,7 +2241,7 @@ static int mtk_poll_rx(struct napi_struc
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goto rx_done;
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idx = NEXT_DESP_IDX(ring->calc_idx, ring->dma_size);
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- rxd = ring->dma + idx * eth->soc->rx.desc_size;
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+ rxd = ring->dma + RX_DESC_OFS(eth, idx);
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data = ring->data[idx];
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if (!mtk_rx_get_desc(eth, &trxd, rxd))
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@@ -2503,7 +2508,7 @@ static int mtk_poll_tx_qdma(struct mtk_e
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break;
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tx_buf = mtk_desc_to_tx_buf(ring, desc,
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- eth->soc->tx.desc_size);
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+ eth->soc->tx.desc_shift);
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if (!tx_buf->data)
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break;
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@@ -2554,7 +2559,7 @@ static int mtk_poll_tx_pdma(struct mtk_e
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}
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mtk_tx_unmap(eth, tx_buf, &bq, true);
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- desc = ring->dma + cpu * eth->soc->tx.desc_size;
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+ desc = ring->dma + TX_DESC_OFS(eth, cpu);
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ring->last_free = desc;
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atomic_inc(&ring->free_count);
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@@ -2672,7 +2677,7 @@ static int mtk_tx_alloc(struct mtk_eth *
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{
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const struct mtk_soc_data *soc = eth->soc;
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struct mtk_tx_ring *ring = ð->tx_ring;
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- int i, sz = soc->tx.desc_size;
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+ int i, sz = TX_DESC_OFS(eth, 1);
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struct mtk_tx_dma_v2 *txd;
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int ring_size;
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u32 ofs, val;
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@@ -2712,7 +2717,7 @@ static int mtk_tx_alloc(struct mtk_eth *
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* descriptors in ring->dma_pdma.
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*/
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if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) {
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- ring->dma_pdma = dma_alloc_coherent(eth->dma_dev, ring_size * sz,
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+ ring->dma_pdma = dma_alloc_coherent(eth->dma_dev, TX_DESC_OFS(eth, ring_size),
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&ring->phys_pdma, GFP_KERNEL);
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if (!ring->dma_pdma)
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goto no_tx_mem;
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@@ -2727,7 +2732,7 @@ static int mtk_tx_alloc(struct mtk_eth *
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atomic_set(&ring->free_count, ring_size - 2);
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ring->next_free = ring->dma;
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ring->last_free = (void *)txd;
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- ring->last_free_ptr = (u32)(ring->phys + ((ring_size - 1) * sz));
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+ ring->last_free_ptr = (u32)(ring->phys + TX_DESC_OFS(eth, ring_size - 1));
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ring->thresh = MAX_SKB_FRAGS;
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/* make sure that all changes to the dma ring are flushed before we
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@@ -2739,7 +2744,7 @@ static int mtk_tx_alloc(struct mtk_eth *
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mtk_w32(eth, ring->phys, soc->reg_map->qdma.ctx_ptr);
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mtk_w32(eth, ring->phys, soc->reg_map->qdma.dtx_ptr);
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mtk_w32(eth,
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- ring->phys + ((ring_size - 1) * sz),
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+ ring->phys + TX_DESC_OFS(eth, ring_size - 1),
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soc->reg_map->qdma.crx_ptr);
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mtk_w32(eth, ring->last_free_ptr, soc->reg_map->qdma.drx_ptr);
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@@ -2776,7 +2781,6 @@ no_tx_mem:
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static void mtk_tx_clean(struct mtk_eth *eth)
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{
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- const struct mtk_soc_data *soc = eth->soc;
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struct mtk_tx_ring *ring = ð->tx_ring;
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int i;
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@@ -2788,14 +2792,14 @@ static void mtk_tx_clean(struct mtk_eth
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}
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if (ring->dma) {
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- mtk_dma_ring_free(eth, ring->dma_size * soc->tx.desc_size,
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+ mtk_dma_ring_free(eth, TX_DESC_OFS(eth, ring->dma_size),
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ring->dma, ring->phys, true);
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ring->dma = NULL;
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}
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if (ring->dma_pdma) {
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dma_free_coherent(eth->dma_dev,
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- ring->dma_size * soc->tx.desc_size,
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+ TX_DESC_OFS(eth, ring->dma_size),
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ring->dma_pdma, ring->phys_pdma);
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ring->dma_pdma = NULL;
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}
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@@ -2844,7 +2848,7 @@ static int mtk_rx_alloc(struct mtk_eth *
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}
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ring->dma = mtk_dma_ring_alloc(eth,
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- rx_dma_size * eth->soc->rx.desc_size,
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+ RX_DESC_OFS(eth, rx_dma_size),
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&ring->phys,
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rx_flag == MTK_RX_FLAGS_NORMAL);
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if (!ring->dma)
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@@ -2855,7 +2859,7 @@ static int mtk_rx_alloc(struct mtk_eth *
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dma_addr_t dma_addr;
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void *data;
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- rxd = ring->dma + i * eth->soc->rx.desc_size;
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+ rxd = ring->dma + RX_DESC_OFS(eth, i);
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if (ring->page_pool) {
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data = mtk_page_pool_get_buff(ring->page_pool,
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&dma_addr, GFP_KERNEL);
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@@ -2946,7 +2950,7 @@ static void mtk_rx_clean(struct mtk_eth
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if (!ring->data[i])
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continue;
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- rxd = ring->dma + i * eth->soc->rx.desc_size;
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+ rxd = ring->dma + RX_DESC_OFS(eth, i);
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if (!rxd->rxd1)
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continue;
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@@ -2962,7 +2966,7 @@ static void mtk_rx_clean(struct mtk_eth
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}
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if (ring->dma) {
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- mtk_dma_ring_free(eth, ring->dma_size * eth->soc->rx.desc_size,
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+ mtk_dma_ring_free(eth, RX_DESC_OFS(eth, ring->dma_size),
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ring->dma, ring->phys, in_sram);
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ring->dma = NULL;
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}
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@@ -3332,7 +3336,7 @@ static void mtk_dma_free(struct mtk_eth
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}
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if (eth->scratch_ring) {
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- mtk_dma_ring_free(eth, soc->tx.fq_dma_size * soc->tx.desc_size,
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+ mtk_dma_ring_free(eth, TX_DESC_OFS(eth, soc->tx.fq_dma_size),
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eth->scratch_ring, eth->phy_scratch_ring,
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true);
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eth->scratch_ring = NULL;
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@@ -5383,6 +5387,9 @@ static void mtk_remove(struct platform_d
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mtk_mdio_cleanup(eth);
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}
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+#define DESC_SIZE(struct_name) \
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+ .desc_shift = const_ilog2(sizeof(struct_name))
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+
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static const struct mtk_soc_data mt2701_data = {
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.reg_map = &mtk_reg_map,
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.caps = MT7623_CAPS | MTK_HWLRO,
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@@ -5391,14 +5398,14 @@ static const struct mtk_soc_data mt2701_
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.required_pctl = true,
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.version = 1,
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.tx = {
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- .desc_size = sizeof(struct mtk_tx_dma),
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+ DESC_SIZE(struct mtk_tx_dma),
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.dma_max_len = MTK_TX_DMA_BUF_LEN,
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.dma_len_offset = 16,
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.dma_size = MTK_DMA_SIZE(2K),
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.fq_dma_size = MTK_DMA_SIZE(2K),
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},
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.rx = {
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- .desc_size = sizeof(struct mtk_rx_dma),
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+ DESC_SIZE(struct mtk_rx_dma),
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.irq_done_mask = MTK_RX_DONE_INT,
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.dma_l4_valid = RX_DMA_L4_VALID,
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.dma_size = MTK_DMA_SIZE(2K),
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@@ -5419,14 +5426,14 @@ static const struct mtk_soc_data mt7621_
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.hash_offset = 2,
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.foe_entry_size = MTK_FOE_ENTRY_V1_SIZE,
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.tx = {
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- .desc_size = sizeof(struct mtk_tx_dma),
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+ DESC_SIZE(struct mtk_tx_dma),
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.dma_max_len = MTK_TX_DMA_BUF_LEN,
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.dma_len_offset = 16,
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.dma_size = MTK_DMA_SIZE(2K),
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.fq_dma_size = MTK_DMA_SIZE(2K),
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},
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.rx = {
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- .desc_size = sizeof(struct mtk_rx_dma),
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+ DESC_SIZE(struct mtk_rx_dma),
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.irq_done_mask = MTK_RX_DONE_INT,
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.dma_l4_valid = RX_DMA_L4_VALID,
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.dma_size = MTK_DMA_SIZE(2K),
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@@ -5449,14 +5456,14 @@ static const struct mtk_soc_data mt7622_
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.has_accounting = true,
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.foe_entry_size = MTK_FOE_ENTRY_V1_SIZE,
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.tx = {
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- .desc_size = sizeof(struct mtk_tx_dma),
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+ DESC_SIZE(struct mtk_tx_dma),
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.dma_max_len = MTK_TX_DMA_BUF_LEN,
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.dma_len_offset = 16,
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.dma_size = MTK_DMA_SIZE(2K),
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.fq_dma_size = MTK_DMA_SIZE(2K),
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},
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.rx = {
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- .desc_size = sizeof(struct mtk_rx_dma),
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+ DESC_SIZE(struct mtk_rx_dma),
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.irq_done_mask = MTK_RX_DONE_INT,
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.dma_l4_valid = RX_DMA_L4_VALID,
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.dma_size = MTK_DMA_SIZE(2K),
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@@ -5478,14 +5485,14 @@ static const struct mtk_soc_data mt7623_
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.foe_entry_size = MTK_FOE_ENTRY_V1_SIZE,
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.disable_pll_modes = true,
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.tx = {
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- .desc_size = sizeof(struct mtk_tx_dma),
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+ DESC_SIZE(struct mtk_tx_dma),
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.dma_max_len = MTK_TX_DMA_BUF_LEN,
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.dma_len_offset = 16,
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.dma_size = MTK_DMA_SIZE(2K),
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.fq_dma_size = MTK_DMA_SIZE(2K),
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},
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.rx = {
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- .desc_size = sizeof(struct mtk_rx_dma),
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+ DESC_SIZE(struct mtk_rx_dma),
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.irq_done_mask = MTK_RX_DONE_INT,
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.dma_l4_valid = RX_DMA_L4_VALID,
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.dma_size = MTK_DMA_SIZE(2K),
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@@ -5504,14 +5511,14 @@ static const struct mtk_soc_data mt7629_
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.has_accounting = true,
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.version = 1,
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.tx = {
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- .desc_size = sizeof(struct mtk_tx_dma),
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+ DESC_SIZE(struct mtk_tx_dma),
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.dma_max_len = MTK_TX_DMA_BUF_LEN,
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.dma_len_offset = 16,
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.dma_size = MTK_DMA_SIZE(2K),
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.fq_dma_size = MTK_DMA_SIZE(2K),
|
|
},
|
|
.rx = {
|
|
- .desc_size = sizeof(struct mtk_rx_dma),
|
|
+ DESC_SIZE(struct mtk_rx_dma),
|
|
.irq_done_mask = MTK_RX_DONE_INT,
|
|
.dma_l4_valid = RX_DMA_L4_VALID,
|
|
.dma_size = MTK_DMA_SIZE(2K),
|
|
@@ -5534,14 +5541,14 @@ static const struct mtk_soc_data mt7981_
|
|
.has_accounting = true,
|
|
.foe_entry_size = MTK_FOE_ENTRY_V2_SIZE,
|
|
.tx = {
|
|
- .desc_size = sizeof(struct mtk_tx_dma_v2),
|
|
+ DESC_SIZE(struct mtk_tx_dma_v2),
|
|
.dma_max_len = MTK_TX_DMA_BUF_LEN_V2,
|
|
.dma_len_offset = 8,
|
|
.dma_size = MTK_DMA_SIZE(2K),
|
|
.fq_dma_size = MTK_DMA_SIZE(2K),
|
|
},
|
|
.rx = {
|
|
- .desc_size = sizeof(struct mtk_rx_dma),
|
|
+ DESC_SIZE(struct mtk_rx_dma),
|
|
.irq_done_mask = MTK_RX_DONE_INT,
|
|
.dma_l4_valid = RX_DMA_L4_VALID_V2,
|
|
.dma_max_len = MTK_TX_DMA_BUF_LEN,
|
|
@@ -5564,14 +5571,14 @@ static const struct mtk_soc_data mt7986_
|
|
.has_accounting = true,
|
|
.foe_entry_size = MTK_FOE_ENTRY_V2_SIZE,
|
|
.tx = {
|
|
- .desc_size = sizeof(struct mtk_tx_dma_v2),
|
|
+ DESC_SIZE(struct mtk_tx_dma_v2),
|
|
.dma_max_len = MTK_TX_DMA_BUF_LEN_V2,
|
|
.dma_len_offset = 8,
|
|
.dma_size = MTK_DMA_SIZE(2K),
|
|
.fq_dma_size = MTK_DMA_SIZE(2K),
|
|
},
|
|
.rx = {
|
|
- .desc_size = sizeof(struct mtk_rx_dma),
|
|
+ DESC_SIZE(struct mtk_rx_dma),
|
|
.irq_done_mask = MTK_RX_DONE_INT,
|
|
.dma_l4_valid = RX_DMA_L4_VALID_V2,
|
|
.dma_max_len = MTK_TX_DMA_BUF_LEN,
|
|
@@ -5594,14 +5601,14 @@ static const struct mtk_soc_data mt7988_
|
|
.has_accounting = true,
|
|
.foe_entry_size = MTK_FOE_ENTRY_V3_SIZE,
|
|
.tx = {
|
|
- .desc_size = sizeof(struct mtk_tx_dma_v2),
|
|
+ DESC_SIZE(struct mtk_tx_dma_v2),
|
|
.dma_max_len = MTK_TX_DMA_BUF_LEN_V2,
|
|
.dma_len_offset = 8,
|
|
.dma_size = MTK_DMA_SIZE(2K),
|
|
.fq_dma_size = MTK_DMA_SIZE(4K),
|
|
},
|
|
.rx = {
|
|
- .desc_size = sizeof(struct mtk_rx_dma_v2),
|
|
+ DESC_SIZE(struct mtk_rx_dma_v2),
|
|
.irq_done_mask = MTK_RX_DONE_INT_V2,
|
|
.dma_l4_valid = RX_DMA_L4_VALID_V2,
|
|
.dma_max_len = MTK_TX_DMA_BUF_LEN_V2,
|
|
@@ -5618,13 +5625,13 @@ static const struct mtk_soc_data rt5350_
|
|
.required_pctl = false,
|
|
.version = 1,
|
|
.tx = {
|
|
- .desc_size = sizeof(struct mtk_tx_dma),
|
|
+ DESC_SIZE(struct mtk_tx_dma),
|
|
.dma_max_len = MTK_TX_DMA_BUF_LEN,
|
|
.dma_len_offset = 16,
|
|
.dma_size = MTK_DMA_SIZE(2K),
|
|
},
|
|
.rx = {
|
|
- .desc_size = sizeof(struct mtk_rx_dma),
|
|
+ DESC_SIZE(struct mtk_rx_dma),
|
|
.irq_done_mask = MTK_RX_DONE_INT,
|
|
.dma_l4_valid = RX_DMA_L4_VALID_PDMA,
|
|
.dma_max_len = MTK_TX_DMA_BUF_LEN,
|
|
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
|
|
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
|
|
@@ -1200,7 +1200,7 @@ struct mtk_reg_map {
|
|
* @foe_entry_size Foe table entry size.
|
|
* @has_accounting Bool indicating support for accounting of
|
|
* offloaded flows.
|
|
- * @desc_size Tx/Rx DMA descriptor size.
|
|
+ * @desc_shift Tx/Rx DMA descriptor size (in power-of-2).
|
|
* @irq_done_mask Rx irq done register mask.
|
|
* @dma_l4_valid Rx DMA valid register mask.
|
|
* @dma_max_len Max DMA tx/rx buffer length.
|
|
@@ -1221,14 +1221,14 @@ struct mtk_soc_data {
|
|
bool has_accounting;
|
|
bool disable_pll_modes;
|
|
struct {
|
|
- u32 desc_size;
|
|
+ u32 desc_shift;
|
|
u32 dma_max_len;
|
|
u32 dma_len_offset;
|
|
u32 dma_size;
|
|
u32 fq_dma_size;
|
|
} tx;
|
|
struct {
|
|
- u32 desc_size;
|
|
+ u32 desc_shift;
|
|
u32 irq_done_mask;
|
|
u32 dma_l4_valid;
|
|
u32 dma_max_len;
|