Lorenzo BianconiandChristian Marangi
c5a8ddd0ac
Backport more upstream patch to include all the fixes pushed upstream and add all the preliminary patch for multi-serdes support. While at it also move 2 patch in the 6xx numbering to the 000-1xx backport numbering to keep things tidy. All the affected patch manually and automatically refreshed. Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> [ add comment, renumber patch, add more patch, fix PCS patch ] Link: https://github.com/openwrt/openwrt/pull/22479 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
133 lines
4.8 KiB
Diff
133 lines
4.8 KiB
Diff
From 4d513329b87c1bd0546d9f0288794e244322daa6 Mon Sep 17 00:00:00 2001
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From: Lorenzo Bianconi <lorenzo@kernel.org>
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Date: Mon, 5 Jan 2026 10:40:47 +0100
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Subject: [PATCH] net: airoha: Use gdm port enum value whenever possible
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Use AIROHA_GDMx_IDX enum value whenever possible.
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This patch is just cosmetic changes and does not introduce any logic one.
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Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
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Link: https://patch.msgid.link/20260105-airoha-use-port-idx-enum-v1-1-503ca5763858@kernel.org
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/ethernet/airoha/airoha_eth.c | 40 +++++++++++++-----------
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1 file changed, 21 insertions(+), 19 deletions(-)
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--- a/drivers/net/ethernet/airoha/airoha_eth.c
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+++ b/drivers/net/ethernet/airoha/airoha_eth.c
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@@ -108,11 +108,11 @@ static int airoha_set_vip_for_gdm_port(s
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u32 vip_port;
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switch (port->id) {
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- case 3:
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+ case AIROHA_GDM3_IDX:
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/* FIXME: handle XSI_PCIE1_PORT */
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vip_port = XSI_PCIE0_VIP_PORT_MASK;
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break;
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- case 4:
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+ case AIROHA_GDM4_IDX:
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/* FIXME: handle XSI_USB_PORT */
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vip_port = XSI_ETH_VIP_PORT_MASK;
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break;
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@@ -514,8 +514,8 @@ static int airoha_fe_init(struct airoha_
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FIELD_PREP(IP_ASSEMBLE_PORT_MASK, 0) |
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FIELD_PREP(IP_ASSEMBLE_NBQ_MASK, 22));
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- airoha_fe_set(eth, REG_GDM_FWD_CFG(3), GDM_PAD_EN_MASK);
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- airoha_fe_set(eth, REG_GDM_FWD_CFG(4), GDM_PAD_EN_MASK);
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+ airoha_fe_set(eth, REG_GDM_FWD_CFG(AIROHA_GDM3_IDX), GDM_PAD_EN_MASK);
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+ airoha_fe_set(eth, REG_GDM_FWD_CFG(AIROHA_GDM4_IDX), GDM_PAD_EN_MASK);
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airoha_fe_crsn_qsel_init(eth);
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@@ -1690,27 +1690,29 @@ static int airhoha_set_gdm2_loopback(str
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/* Forward the traffic to the proper GDM port */
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pse_port = port->id == AIROHA_GDM3_IDX ? FE_PSE_PORT_GDM3
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: FE_PSE_PORT_GDM4;
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- airoha_set_gdm_port_fwd_cfg(eth, REG_GDM_FWD_CFG(2), pse_port);
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- airoha_fe_clear(eth, REG_GDM_FWD_CFG(2), GDM_STRIP_CRC_MASK);
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+ airoha_set_gdm_port_fwd_cfg(eth, REG_GDM_FWD_CFG(AIROHA_GDM2_IDX),
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+ pse_port);
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+ airoha_fe_clear(eth, REG_GDM_FWD_CFG(AIROHA_GDM2_IDX),
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+ GDM_STRIP_CRC_MASK);
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/* Enable GDM2 loopback */
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- airoha_fe_wr(eth, REG_GDM_TXCHN_EN(2), 0xffffffff);
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- airoha_fe_wr(eth, REG_GDM_RXCHN_EN(2), 0xffff);
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+ airoha_fe_wr(eth, REG_GDM_TXCHN_EN(AIROHA_GDM2_IDX), 0xffffffff);
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+ airoha_fe_wr(eth, REG_GDM_RXCHN_EN(AIROHA_GDM2_IDX), 0xffff);
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chan = port->id == AIROHA_GDM3_IDX ? airoha_is_7581(eth) ? 4 : 3 : 0;
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- airoha_fe_rmw(eth, REG_GDM_LPBK_CFG(2),
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+ airoha_fe_rmw(eth, REG_GDM_LPBK_CFG(AIROHA_GDM2_IDX),
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LPBK_CHAN_MASK | LPBK_MODE_MASK | LPBK_EN_MASK,
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FIELD_PREP(LPBK_CHAN_MASK, chan) |
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LBK_GAP_MODE_MASK | LBK_LEN_MODE_MASK |
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LBK_CHAN_MODE_MASK | LPBK_EN_MASK);
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- airoha_fe_rmw(eth, REG_GDM_LEN_CFG(2),
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+ airoha_fe_rmw(eth, REG_GDM_LEN_CFG(AIROHA_GDM2_IDX),
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GDM_SHORT_LEN_MASK | GDM_LONG_LEN_MASK,
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FIELD_PREP(GDM_SHORT_LEN_MASK, 60) |
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FIELD_PREP(GDM_LONG_LEN_MASK, AIROHA_MAX_MTU));
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/* Disable VIP and IFC for GDM2 */
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- airoha_fe_clear(eth, REG_FE_VIP_PORT_EN, BIT(2));
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- airoha_fe_clear(eth, REG_FE_IFC_PORT_EN, BIT(2));
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+ airoha_fe_clear(eth, REG_FE_VIP_PORT_EN, BIT(AIROHA_GDM2_IDX));
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+ airoha_fe_clear(eth, REG_FE_IFC_PORT_EN, BIT(AIROHA_GDM2_IDX));
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/* XXX: handle XSI_USB_PORT and XSI_PCE1_PORT */
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nbq = port->id == AIROHA_GDM3_IDX && airoha_is_7581(eth) ? 4 : 0;
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@@ -1746,8 +1748,8 @@ static int airoha_dev_init(struct net_de
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airoha_set_macaddr(port, dev->dev_addr);
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switch (port->id) {
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- case 3:
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- case 4:
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+ case AIROHA_GDM3_IDX:
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+ case AIROHA_GDM4_IDX:
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/* If GDM2 is active we can't enable loopback */
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if (!eth->ports[1]) {
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int err;
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@@ -1757,7 +1759,7 @@ static int airoha_dev_init(struct net_de
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return err;
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}
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fallthrough;
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- case 2:
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+ case AIROHA_GDM2_IDX:
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if (airoha_ppe_is_enabled(eth, 1)) {
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/* For PPE2 always use secondary cpu port. */
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fe_cpu_port = FE_PSE_PORT_CDM2;
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@@ -3101,14 +3103,14 @@ static const char * const en7581_xsi_rst
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static int airoha_en7581_get_src_port_id(struct airoha_gdm_port *port, int nbq)
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{
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switch (port->id) {
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- case 3:
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+ case AIROHA_GDM3_IDX:
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/* 7581 SoC supports PCIe serdes on GDM3 port */
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if (nbq == 4)
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return HSGMII_LAN_7581_PCIE0_SRCPORT;
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if (nbq == 5)
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return HSGMII_LAN_7581_PCIE1_SRCPORT;
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break;
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- case 4:
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+ case AIROHA_GDM4_IDX:
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/* 7581 SoC supports eth and usb serdes on GDM4 port */
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if (!nbq)
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return HSGMII_LAN_7581_ETH_SRCPORT;
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@@ -3132,12 +3134,12 @@ static const char * const an7583_xsi_rst
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static int airoha_an7583_get_src_port_id(struct airoha_gdm_port *port, int nbq)
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{
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switch (port->id) {
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- case 3:
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+ case AIROHA_GDM3_IDX:
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/* 7583 SoC supports eth serdes on GDM3 port */
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if (!nbq)
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return HSGMII_LAN_7583_ETH_SRCPORT;
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break;
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- case 4:
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+ case AIROHA_GDM4_IDX:
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/* 7583 SoC supports PCIe and USB serdes on GDM4 port */
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if (!nbq)
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return HSGMII_LAN_7583_PCIE_SRCPORT;
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