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wpewebkit: update to version 2.52.3

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Update WPEWebKit to the 2.52 stable major release branch.

Includes a pending patchset to get WASM BBQJIT working on RISCV64,
upstream PR https://github.com/WebKit/WebKit/pull/65621

Alltogether this brings acceptable performance (even with LLVMPipe
Mesa software renderer) on RISCV64.

Link: https://wpewebkit.org/release/wpewebkit-2.52.0.html
Link: https://wpewebkit.org/release/wpewebkit-2.52.1.html
Link: https://wpewebkit.org/release/wpewebkit-2.52.2.html
Link: https://wpewebkit.org/release/wpewebkit-2.52.3.html
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
Daniel Golle
2026-05-09 01:37:44 +01:00
parent be41d2f4dc
commit df0b899123
38 changed files with 4904 additions and 25 deletions
Download Patch File Download Diff File Expand all files Collapse all files
libs/wpewebkit/patches/138-JavaScriptCore-IPInt64-asm-RISCV64-port.patch
+928
View File
@@ -0,0 +1,928 @@
--- a/Source/JavaScriptCore/llint/InPlaceInterpreter64.asm
+++ b/Source/JavaScriptCore/llint/InPlaceInterpreter64.asm
@@ -51,7 +51,7 @@ end
# Dispatch target bases
-if ARM64 or ARM64E
+if ARM64 or ARM64E or RISCV64
const ipint_dispatch_base = _ipint_unreachable
const ipint_gc_dispatch_base = _ipint_struct_new
const ipint_conversion_dispatch_base = _ipint_i32_trunc_sat_f32_s
@@ -74,8 +74,15 @@ elsif X86_64
lshiftq (constexpr (WTF::fastLog2(JSC::IPInt::alignIPInt))), t0
addq t1, t0
jmp t0
+elsif RISCV64
+ # RISC-V: synthesize the ARM64 addlshift via lshiftp + addp, since the
+ # baseline rv64gc ISA does not have an add-with-shifted-operand form.
+ pcrtoaddr ipint_dispatch_base, t7
+ lshiftp (constexpr (WTF::fastLog2(JSC::IPInt::alignIPInt))), t0
+ addp t7, t0
+ jmp t0
else
- error
+ break
end
end
@@ -85,7 +92,7 @@ end
macro pushQuad(reg)
if ARM64 or ARM64E
push reg, reg
- elsif X86_64
+ elsif X86_64 or RISCV64
push reg, reg
else
break
@@ -100,7 +107,7 @@ macro popQuad(reg)
# FIXME: emit post-increment in offlineasm
if ARM64 or ARM64E
loadqinc [sp], reg, V128ISize
- elsif X86_64
+ elsif X86_64 or RISCV64
loadq [sp], reg
addq V128ISize, sp
else
@@ -198,7 +205,7 @@ macro argumINTDispatch()
addp 1, MC
bbgteq argumINTTmp, (constexpr IPInt::ArgumINTBytecode::NumOpcodes), _ipint_argument_dispatch_err
lshiftp (constexpr (WTF::fastLog2(JSC::IPInt::alignArgumInt))), argumINTTmp
-if ARM64 or ARM64E
+if ARM64 or ARM64E or RISCV64
pcrtoaddr _argumINT_begin, argumINTDsp
addp argumINTTmp, argumINTDsp
jmp argumINTDsp
@@ -221,7 +228,7 @@ macro argumINTInitializeDefaultLocals()
if ARM64 or ARM64E
# offlineasm doesn't have xzr so emit it
emit "stp x19, xzr, [x9]"
-elsif X86_64
+elsif X86_64 or RISCV64
storep argumINTTmp, [argumINTDst]
storep 0, 8[argumINTDst]
end
@@ -531,7 +538,7 @@ end
jmp .ipint_end_ret
end)
-if ARM64 or ARM64E
+if ARM64 or ARM64E or RISCV64
const IPIntCallCallee = sc1
const IPIntCallFunctionSlot = sc0
elsif X86_64
@@ -1834,7 +1841,7 @@ ipintOp(_i32_div_s, macro()
elsif ARM64 or ARM64E or RISCV64
divis t1, t0
else
- error
+ break
end
pushInt32(t0)
advancePC(1)
@@ -1859,7 +1866,7 @@ ipintOp(_i32_div_u, macro()
elsif ARM64 or ARM64E or RISCV64
divi t1, t0
else
- error
+ break
end
pushInt32(t0)
advancePC(1)
@@ -1895,7 +1902,7 @@ ipintOp(_i32_rem_s, macro()
elsif RISCV64
remis t0, t1, t2
else
- error
+ break
end
.ipint_i32_rem_s_return:
@@ -1923,7 +1930,7 @@ ipintOp(_i32_rem_u, macro()
elsif RISCV64
remi t0, t1, t2
else
- error
+ break
end
pushInt32(t2)
advancePC(1)
@@ -2106,7 +2113,7 @@ ipintOp(_i64_div_s, macro()
elsif ARM64 or ARM64E or RISCV64
divqs t1, t0
else
- error
+ break
end
pushInt64(t0)
advancePC(1)
@@ -2131,7 +2138,7 @@ ipintOp(_i64_div_u, macro()
elsif ARM64 or ARM64E or RISCV64
divq t1, t0
else
- error
+ break
end
pushInt64(t0)
advancePC(1)
@@ -2167,7 +2174,7 @@ ipintOp(_i64_rem_s, macro()
elsif RISCV64
remqs t0, t1, t2
else
- error
+ break
end
.ipint_i64_rem_s_return:
@@ -2195,7 +2202,7 @@ ipintOp(_i64_rem_u, macro()
elsif RISCV64
remq t0, t1, t2
else
- error
+ break
end
pushInt64(t2)
advancePC(1)
@@ -9204,7 +9211,7 @@ ipintOp(_i32_atomic_load, macro()
if ARM64 or ARM64E or X86_64
atomicloadi [mem], scratch
else
- error
+ break
end
pushInt32(scratch)
end)
@@ -9215,7 +9222,7 @@ ipintOp(_i64_atomic_load, macro()
if ARM64 or ARM64E or X86_64
atomicloadq [mem], scratch
else
- error
+ break
end
pushInt64(scratch)
end)
@@ -9226,7 +9233,7 @@ ipintOp(_i32_atomic_load8_u, macro()
if ARM64 or ARM64E or X86_64
atomicloadb [mem], scratch
else
- error
+ break
end
pushInt32(scratch)
end)
@@ -9237,7 +9244,7 @@ ipintOp(_i32_atomic_load16_u, macro()
if ARM64 or ARM64E or X86_64
atomicloadh [mem], scratch
else
- error
+ break
end
pushInt32(scratch)
end)
@@ -9248,7 +9255,7 @@ ipintOp(_i64_atomic_load8_u, macro()
if ARM64 or ARM64E or X86_64
atomicloadb [mem], scratch
else
- error
+ break
end
pushInt64(scratch)
end)
@@ -9259,7 +9266,7 @@ ipintOp(_i64_atomic_load16_u, macro()
if ARM64 or ARM64E or X86_64
atomicloadh [mem], scratch
else
- error
+ break
end
pushInt64(scratch)
end)
@@ -9270,7 +9277,7 @@ ipintOp(_i64_atomic_load32_u, macro()
if ARM64 or ARM64E or X86_64
atomicloadi [mem], scratch
else
- error
+ break
end
pushInt64(scratch)
end)
@@ -9374,7 +9381,7 @@ ipintOp(_i32_atomic_store, macro()
move value, newValue
end)
else
- error
+ break
end
end)
end)
@@ -9390,7 +9397,7 @@ ipintOp(_i64_atomic_store, macro()
move value, newValue
end)
else
- error
+ break
end
end)
end)
@@ -9406,7 +9413,7 @@ ipintOp(_i32_atomic_store8_u, macro()
move value, newValue
end)
else
- error
+ break
end
end)
end)
@@ -9422,7 +9429,7 @@ ipintOp(_i32_atomic_store16_u, macro()
move value, newValue
end)
else
- error
+ break
end
end)
end)
@@ -9438,7 +9445,7 @@ ipintOp(_i64_atomic_store8_u, macro()
move value, newValue
end)
else
- error
+ break
end
end)
end)
@@ -9454,7 +9461,7 @@ ipintOp(_i64_atomic_store16_u, macro()
move value, newValue
end)
else
- error
+ break
end
end)
end)
@@ -9470,7 +9477,7 @@ ipintOp(_i64_atomic_store32_u, macro()
move value, newValue
end)
else
- error
+ break
end
end)
end)
@@ -9506,7 +9513,7 @@ ipintOp(_i32_atomic_rmw_add, macro()
addi value, oldValue, newValue
end)
else
- error
+ break
end
pushInt32(scratch1)
end)
@@ -9524,7 +9531,7 @@ ipintOp(_i64_atomic_rmw_add, macro()
addq value, oldValue, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -9543,7 +9550,7 @@ ipintOp(_i32_atomic_rmw8_add_u, macro()
addi value, oldValue, newValue
end)
else
- error
+ break
end
pushInt32(scratch1)
end)
@@ -9562,7 +9569,7 @@ ipintOp(_i32_atomic_rmw16_add_u, macro()
addi value, oldValue, newValue
end)
else
- error
+ break
end
pushInt32(scratch1)
end)
@@ -9581,7 +9588,7 @@ ipintOp(_i64_atomic_rmw8_add_u, macro()
addi value, oldValue, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -9600,7 +9607,7 @@ ipintOp(_i64_atomic_rmw16_add_u, macro()
addi value, oldValue, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -9619,7 +9626,7 @@ ipintOp(_i64_atomic_rmw32_add_u, macro()
addi value, oldValue, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -9639,7 +9646,7 @@ ipintOp(_i32_atomic_rmw_sub, macro()
subi oldValue, value, newValue
end)
else
- error
+ break
end
pushInt32(scratch1)
end)
@@ -9659,7 +9666,7 @@ ipintOp(_i64_atomic_rmw_sub, macro()
subq oldValue, value, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -9680,7 +9687,7 @@ ipintOp(_i32_atomic_rmw8_sub_u, macro()
subi oldValue, value, newValue
end)
else
- error
+ break
end
pushInt32(scratch1)
end)
@@ -9701,7 +9708,7 @@ ipintOp(_i32_atomic_rmw16_sub_u, macro()
subi oldValue, value, newValue
end)
else
- error
+ break
end
pushInt32(scratch1)
end)
@@ -9722,7 +9729,7 @@ ipintOp(_i64_atomic_rmw8_sub_u, macro()
subi oldValue, value, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -9743,7 +9750,7 @@ ipintOp(_i64_atomic_rmw16_sub_u, macro()
subi oldValue, value, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -9764,7 +9771,7 @@ ipintOp(_i64_atomic_rmw32_sub_u, macro()
subi oldValue, value, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -9784,7 +9791,7 @@ ipintOp(_i32_atomic_rmw_and, macro()
andi value, oldValue, newValue
end)
else
- error
+ break
end
pushInt32(scratch1)
end)
@@ -9804,7 +9811,7 @@ ipintOp(_i64_atomic_rmw_and, macro()
andq value, oldValue, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -9824,7 +9831,7 @@ ipintOp(_i32_atomic_rmw8_and_u, macro()
andi value, oldValue, newValue
end)
else
- error
+ break
end
pushInt32(scratch1)
end)
@@ -9844,7 +9851,7 @@ ipintOp(_i32_atomic_rmw16_and_u, macro()
andi value, oldValue, newValue
end)
else
- error
+ break
end
pushInt32(scratch1)
end)
@@ -9864,7 +9871,7 @@ ipintOp(_i64_atomic_rmw8_and_u, macro()
andi value, oldValue, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -9884,7 +9891,7 @@ ipintOp(_i64_atomic_rmw16_and_u, macro()
andi value, oldValue, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -9904,7 +9911,7 @@ ipintOp(_i64_atomic_rmw32_and_u, macro()
andi value, oldValue, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -9923,7 +9930,7 @@ ipintOp(_i32_atomic_rmw_or, macro()
ori value, oldValue, newValue
end)
else
- error
+ break
end
pushInt32(scratch1)
end)
@@ -9942,7 +9949,7 @@ ipintOp(_i64_atomic_rmw_or, macro()
orq value, oldValue, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -9961,7 +9968,7 @@ ipintOp(_i32_atomic_rmw8_or_u, macro()
ori value, oldValue, newValue
end)
else
- error
+ break
end
pushInt32(scratch1)
end)
@@ -9980,7 +9987,7 @@ ipintOp(_i32_atomic_rmw16_or_u, macro()
ori value, oldValue, newValue
end)
else
- error
+ break
end
pushInt32(scratch1)
end)
@@ -9999,7 +10006,7 @@ ipintOp(_i64_atomic_rmw8_or_u, macro()
ori value, oldValue, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -10018,7 +10025,7 @@ ipintOp(_i64_atomic_rmw16_or_u, macro()
ori value, oldValue, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -10037,7 +10044,7 @@ ipintOp(_i64_atomic_rmw32_or_u, macro()
ori value, oldValue, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -10056,7 +10063,7 @@ ipintOp(_i32_atomic_rmw_xor, macro()
xori value, oldValue, newValue
end)
else
- error
+ break
end
pushInt32(scratch1)
end)
@@ -10075,7 +10082,7 @@ ipintOp(_i64_atomic_rmw_xor, macro()
xorq value, oldValue, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -10094,7 +10101,7 @@ ipintOp(_i32_atomic_rmw8_xor_u, macro()
xori value, oldValue, newValue
end)
else
- error
+ break
end
pushInt32(scratch1)
end)
@@ -10113,7 +10120,7 @@ ipintOp(_i32_atomic_rmw16_xor_u, macro()
xori value, oldValue, newValue
end)
else
- error
+ break
end
pushInt32(scratch1)
end)
@@ -10132,7 +10139,7 @@ ipintOp(_i64_atomic_rmw8_xor_u, macro()
xori value, oldValue, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -10151,7 +10158,7 @@ ipintOp(_i64_atomic_rmw16_xor_u, macro()
xori value, oldValue, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -10170,7 +10177,7 @@ ipintOp(_i64_atomic_rmw32_xor_u, macro()
xori value, oldValue, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -10189,7 +10196,7 @@ ipintOp(_i32_atomic_rmw_xchg, macro()
move value, newValue
end)
else
- error
+ break
end
pushInt32(scratch1)
end)
@@ -10208,7 +10215,7 @@ ipintOp(_i64_atomic_rmw_xchg, macro()
move value, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -10227,7 +10234,7 @@ ipintOp(_i32_atomic_rmw8_xchg_u, macro()
move value, newValue
end)
else
- error
+ break
end
pushInt32(scratch1)
end)
@@ -10246,7 +10253,7 @@ ipintOp(_i32_atomic_rmw16_xchg_u, macro(
move value, newValue
end)
else
- error
+ break
end
pushInt32(scratch1)
end)
@@ -10265,7 +10272,7 @@ ipintOp(_i64_atomic_rmw8_xchg_u, macro()
move value, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -10284,7 +10291,7 @@ ipintOp(_i64_atomic_rmw16_xchg_u, macro(
move value, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -10303,7 +10310,7 @@ ipintOp(_i64_atomic_rmw32_xchg_u, macro(
move value, newValue
end)
else
- error
+ break
end
pushInt64(scratch1)
end)
@@ -10346,7 +10353,7 @@ macro weakCASExchangeByte(mem, value, ex
.done:
move scratch2, expected
else
- error
+ break
end
end
@@ -10366,7 +10373,7 @@ macro weakCASExchangeHalf(mem, value, ex
.done:
move scratch2, expected
else
- error
+ break
end
end
@@ -10386,7 +10393,7 @@ macro weakCASExchangeInt(mem, value, exp
.done:
move scratch2, expected
else
- error
+ break
end
end
@@ -10406,7 +10413,7 @@ macro weakCASExchangeQuad(mem, value, ex
.done:
move scratch2, expected
else
- error
+ break
end
end
@@ -10418,7 +10425,7 @@ ipintOp(_i32_atomic_rmw_cmpxchg, macro()
elsif ARM64
weakCASExchangeInt(mem, value, expected, scratch, scratch2)
else
- error
+ break
end
pushInt32(expected)
end)
@@ -10431,7 +10438,7 @@ ipintOp(_i64_atomic_rmw_cmpxchg, macro()
elsif ARM64
weakCASExchangeQuad(mem, value, expected, scratch, scratch2)
else
- error
+ break
end
pushInt64(expected)
end)
@@ -10445,7 +10452,7 @@ ipintOp(_i32_atomic_rmw8_cmpxchg_u, macr
elsif ARM64
weakCASExchangeByte(mem, value, expected, scratch, scratch2)
else
- error
+ break
end
pushInt32(expected)
end)
@@ -10459,7 +10466,7 @@ ipintOp(_i32_atomic_rmw16_cmpxchg_u, mac
elsif ARM64
weakCASExchangeHalf(mem, value, expected, scratch, scratch2)
else
- error
+ break
end
pushInt32(expected)
end)
@@ -10473,7 +10480,7 @@ ipintOp(_i64_atomic_rmw8_cmpxchg_u, macr
elsif ARM64
weakCASExchangeByte(mem, value, expected, scratch, scratch2)
else
- error
+ break
end
pushInt64(expected)
end)
@@ -10487,7 +10494,7 @@ ipintOp(_i64_atomic_rmw16_cmpxchg_u, mac
elsif ARM64
weakCASExchangeHalf(mem, value, expected, scratch, scratch2)
else
- error
+ break
end
pushInt64(expected)
end)
@@ -10501,7 +10508,7 @@ ipintOp(_i64_atomic_rmw32_cmpxchg_u, mac
elsif ARM64
weakCASExchangeInt(mem, value, expected, scratch, scratch2)
else
- error
+ break
end
pushInt64(expected)
end)
@@ -10812,7 +10819,7 @@ mintAlign(_a1)
mintArgDispatch()
mintAlign(_a2)
-if ARM64 or ARM64E or X86_64
+if ARM64 or ARM64E or X86_64 or RISCV64
mintPop(a2)
mintArgDispatch()
else
@@ -10820,7 +10827,7 @@ else
end
mintAlign(_a3)
-if ARM64 or ARM64E or X86_64
+if ARM64 or ARM64E or X86_64 or RISCV64
mintPop(a3)
mintArgDispatch()
else
@@ -10828,7 +10835,7 @@ else
end
mintAlign(_a4)
-if ARM64 or ARM64E or X86_64
+if ARM64 or ARM64E or X86_64 or RISCV64
mintPop(a4)
mintArgDispatch()
else
@@ -10836,7 +10843,7 @@ else
end
mintAlign(_a5)
-if ARM64 or ARM64E or X86_64
+if ARM64 or ARM64E or X86_64 or RISCV64
mintPop(a5)
mintArgDispatch()
else
@@ -10844,7 +10851,7 @@ else
end
mintAlign(_a6)
-if ARM64 or ARM64E
+if ARM64 or ARM64E or RISCV64
mintPop(a6)
mintArgDispatch()
else
@@ -10852,7 +10859,7 @@ else
end
mintAlign(_a7)
-if ARM64 or ARM64E
+if ARM64 or ARM64E or RISCV64
mintPop(a7)
mintArgDispatch()
else
@@ -11072,7 +11079,7 @@ mintAlign(_r1)
mintRetDispatch()
mintAlign(_r2)
-if ARM64 or ARM64E or X86_64
+if ARM64 or ARM64E or X86_64 or RISCV64
subp StackValueSize, mintRetDst
storeq wa2, [mintRetDst]
mintRetDispatch()
@@ -11081,7 +11088,7 @@ else
end
mintAlign(_r3)
-if ARM64 or ARM64E or X86_64
+if ARM64 or ARM64E or X86_64 or RISCV64
subp StackValueSize, mintRetDst
storeq wa3, [mintRetDst]
mintRetDispatch()
@@ -11090,7 +11097,7 @@ else
end
mintAlign(_r4)
-if ARM64 or ARM64E or X86_64
+if ARM64 or ARM64E or X86_64 or RISCV64
subp StackValueSize, mintRetDst
storeq wa4, [mintRetDst]
mintRetDispatch()
@@ -11099,7 +11106,7 @@ else
end
mintAlign(_r5)
-if ARM64 or ARM64E or X86_64
+if ARM64 or ARM64E or X86_64 or RISCV64
subp StackValueSize, mintRetDst
storeq wa5, [mintRetDst]
mintRetDispatch()
@@ -11108,7 +11115,7 @@ else
end
mintAlign(_r6)
-if ARM64 or ARM64E
+if ARM64 or ARM64E or RISCV64
subp StackValueSize, mintRetDst
storeq wa6, [mintRetDst]
mintRetDispatch()
@@ -11117,7 +11124,7 @@ else
end
mintAlign(_r7)
-if ARM64 or ARM64E
+if ARM64 or ARM64E or RISCV64
subp StackValueSize, mintRetDst
storeq wa7, [mintRetDst]
mintRetDispatch()
@@ -11392,7 +11399,7 @@ uintAlign(_r5)
uintDispatch()
uintAlign(_r6)
-if ARM64 or ARM64E
+if ARM64 or ARM64E or RISCV64
popQuad(wa6)
uintDispatch()
else
@@ -11400,7 +11407,7 @@ else
end
uintAlign(_r7)
-if ARM64 or ARM64E
+if ARM64 or ARM64E or RISCV64
popQuad(wa7)
uintDispatch()
else
@@ -11481,7 +11488,7 @@ argumINTAlign(_a1)
argumINTDispatch()
argumINTAlign(_a2)
-if ARM64 or ARM64E or X86_64
+if ARM64 or ARM64E or X86_64 or RISCV64
storeq wa2, [argumINTDst]
addp LocalSize, argumINTDst
argumINTDispatch()
@@ -11491,7 +11498,7 @@ end
argumINTAlign(_a3)
-if ARM64 or ARM64E or X86_64
+if ARM64 or ARM64E or X86_64 or RISCV64
storeq wa3, [argumINTDst]
addp LocalSize, argumINTDst
argumINTDispatch()
@@ -11500,7 +11507,7 @@ else
end
argumINTAlign(_a4)
-if ARM64 or ARM64E or X86_64
+if ARM64 or ARM64E or X86_64 or RISCV64
storeq wa4, [argumINTDst]
addp LocalSize, argumINTDst
argumINTDispatch()
@@ -11509,7 +11516,7 @@ else
end
argumINTAlign(_a5)
-if ARM64 or ARM64E or X86_64
+if ARM64 or ARM64E or X86_64 or RISCV64
storeq wa5, [argumINTDst]
addp LocalSize, argumINTDst
argumINTDispatch()
@@ -11518,7 +11525,7 @@ else
end
argumINTAlign(_a6)
-if ARM64 or ARM64E
+if ARM64 or ARM64E or RISCV64
storeq wa6, [argumINTDst]
addp LocalSize, argumINTDst
argumINTDispatch()
@@ -11527,7 +11534,7 @@ else
end
argumINTAlign(_a7)
-if ARM64 or ARM64E
+if ARM64 or ARM64E or RISCV64
storeq wa7, [argumINTDst]
addp LocalSize, argumINTDst
argumINTDispatch()