diff --git a/uboot-mtk-20250711/drivers/mtd/nand/spi/Makefile b/uboot-mtk-20250711/drivers/mtd/nand/spi/Makefile index e7dade3bd..89d246dff 100644 --- a/uboot-mtk-20250711/drivers/mtd/nand/spi/Makefile +++ b/uboot-mtk-20250711/drivers/mtd/nand/spi/Makefile @@ -3,5 +3,6 @@ spinand-objs := core.o esmt.o gigadevice.o macronix.o micron.o paragon.o spinand-objs += toshiba.o winbond.o xtx.o spinand-objs += etron.o +spinand-objs += foresee.o spinand-objs += fudanmicro.o obj-$(CONFIG_MTD_SPI_NAND) += spinand.o diff --git a/uboot-mtk-20250711/drivers/mtd/nand/spi/core.c b/uboot-mtk-20250711/drivers/mtd/nand/spi/core.c index 73196c120..40bc3ab5f 100644 --- a/uboot-mtk-20250711/drivers/mtd/nand/spi/core.c +++ b/uboot-mtk-20250711/drivers/mtd/nand/spi/core.c @@ -887,6 +887,7 @@ static const struct nand_ops spinand_ops = { static const struct spinand_manufacturer *spinand_manufacturers[] = { &etron_spinand_manufacturer, + &foresee_spinand_manufacturer, &fudan_spinand_manufacturer, &gigadevice_spinand_manufacturer, ¯onix_spinand_manufacturer, diff --git a/uboot-mtk-20250711/drivers/mtd/nand/spi/foresee.c b/uboot-mtk-20250711/drivers/mtd/nand/spi/foresee.c new file mode 100644 index 000000000..3f346912a --- /dev/null +++ b/uboot-mtk-20250711/drivers/mtd/nand/spi/foresee.c @@ -0,0 +1,129 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2020 Grandstream Networks, Inc + * + * Authors: + * Carl + */ + +#ifndef __UBOOT__ +#include +#include +#endif +#include + +#define SPINAND_MFR_FORESEE 0xCD + +static SPINAND_OP_VARIANTS(read_cache_variants, + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); + +static SPINAND_OP_VARIANTS(write_cache_variants, + SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), + SPINAND_PROG_LOAD(true, 0, NULL, 0)); + +static SPINAND_OP_VARIANTS(update_cache_variants, + SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), + SPINAND_PROG_LOAD(true, 0, NULL, 0)); + +static int fsxxndxxg_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + return -ERANGE; +} + +static int fsxxndxxg_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + if (section) + return -ERANGE; + + region->offset = 2; + region->length = mtd->oobsize - 2; + + return 0; +} + +static const struct mtd_ooblayout_ops fsxxndxxg_ooblayout = { + .ecc = fsxxndxxg_ooblayout_ecc, + .rfree = fsxxndxxg_ooblayout_free, +}; + +static const struct spinand_info foresee_spinand_table[] = { + SPINAND_INFO("FS35ND01G-S1Y2", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xEA), + NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)), + SPINAND_INFO("FS35ND02G-S3Y2", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xEB), + NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)), + SPINAND_INFO("FS35ND04G-S2Y2", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xEC), + NAND_MEMORG(1, 2048, 64, 64, 4096, 80, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)), + SPINAND_INFO("F35SQA001G", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x71), + NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), + NAND_ECCREQ(1, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)), + SPINAND_INFO("F35SQA002G", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x72), + NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1), + NAND_ECCREQ(1, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)), + SPINAND_INFO("F35SQA512M", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x70), + NAND_MEMORG(1, 2048, 64, 64, 512, 20, 1, 1, 1), + NAND_ECCREQ(1, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)), + SPINAND_INFO("F35UQA512M", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x60), + NAND_MEMORG(1, 2048, 64, 64, 512, 20, 1, 1, 1), + NAND_ECCREQ(1, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)), +}; + +static const struct spinand_manufacturer_ops foresee_spinand_manuf_ops = { +}; + +const struct spinand_manufacturer foresee_spinand_manufacturer = { + .id = SPINAND_MFR_FORESEE, + .name = "foresee", + .chips = foresee_spinand_table, + .nchips = ARRAY_SIZE(foresee_spinand_table), + .ops = &foresee_spinand_manuf_ops, +}; diff --git a/uboot-mtk-20250711/include/linux/mtd/spinand.h b/uboot-mtk-20250711/include/linux/mtd/spinand.h index 2e12c2d41..ae299bf92 100644 --- a/uboot-mtk-20250711/include/linux/mtd/spinand.h +++ b/uboot-mtk-20250711/include/linux/mtd/spinand.h @@ -298,6 +298,7 @@ struct spinand_manufacturer { /* SPI NAND manufacturers */ extern const struct spinand_manufacturer etron_spinand_manufacturer; +extern const struct spinand_manufacturer foresee_spinand_manufacturer; extern const struct spinand_manufacturer fudan_spinand_manufacturer; extern const struct spinand_manufacturer gigadevice_spinand_manufacturer; extern const struct spinand_manufacturer macronix_spinand_manufacturer;