diff --git a/uboot-mtk-20250711/drivers/mtd/nand/spi/Makefile b/uboot-mtk-20250711/drivers/mtd/nand/spi/Makefile index 89d246dff..d1c4ddba9 100644 --- a/uboot-mtk-20250711/drivers/mtd/nand/spi/Makefile +++ b/uboot-mtk-20250711/drivers/mtd/nand/spi/Makefile @@ -2,7 +2,9 @@ spinand-objs := core.o esmt.o gigadevice.o macronix.o micron.o paragon.o spinand-objs += toshiba.o winbond.o xtx.o +spinand-objs += dosilicon.o spinand-objs += etron.o +spinand-objs += fmsh.o spinand-objs += foresee.o -spinand-objs += fudanmicro.o +spinand-objs += gsto.o obj-$(CONFIG_MTD_SPI_NAND) += spinand.o diff --git a/uboot-mtk-20250711/drivers/mtd/nand/spi/core.c b/uboot-mtk-20250711/drivers/mtd/nand/spi/core.c index 40bc3ab5f..194c97704 100644 --- a/uboot-mtk-20250711/drivers/mtd/nand/spi/core.c +++ b/uboot-mtk-20250711/drivers/mtd/nand/spi/core.c @@ -886,10 +886,12 @@ static const struct nand_ops spinand_ops = { }; static const struct spinand_manufacturer *spinand_manufacturers[] = { + &dosilicon_spinand_manufacturer, &etron_spinand_manufacturer, + &fmsh_spinand_manufacturer, &foresee_spinand_manufacturer, - &fudan_spinand_manufacturer, &gigadevice_spinand_manufacturer, + &gsto_spinand_manufacturer, ¯onix_spinand_manufacturer, µn_spinand_manufacturer, ¶gon_spinand_manufacturer, diff --git a/uboot-mtk-20250711/drivers/mtd/nand/spi/dosilicon.c b/uboot-mtk-20250711/drivers/mtd/nand/spi/dosilicon.c new file mode 100644 index 000000000..8af825768 --- /dev/null +++ b/uboot-mtk-20250711/drivers/mtd/nand/spi/dosilicon.c @@ -0,0 +1,238 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2020 Rockchip Electronics Co., Ltd + * + * Authors: + * Dingqiang Lin + */ + +#ifndef __UBOOT__ +#include +#include +#endif +#include + +#define SPINAND_MFR_DOSILICON 0xE5 + +#define DOSICON_STATUS_ECC_MASK GENMASK(6, 4) +#define DOSICON_STATUS_ECC_NO_BITFLIPS (0 << 4) +#define DOSICON_STATUS_ECC_1TO3_BITFLIPS (1 << 4) +#define DOSICON_STATUS_ECC_4TO6_BITFLIPS (3 << 4) +#define DOSICON_STATUS_ECC_7TO8_BITFLIPS (5 << 4) + +static SPINAND_OP_VARIANTS(read_cache_variants, + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); + +static SPINAND_OP_VARIANTS(write_cache_variants, + SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), + SPINAND_PROG_LOAD(true, 0, NULL, 0)); + +static SPINAND_OP_VARIANTS(update_cache_variants, + SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), + SPINAND_PROG_LOAD(true, 0, NULL, 0)); + +static int ds35xxga_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + if (section > 3) + return -ERANGE; + + region->offset = (16 * section) + 8; + region->length = 8; + + return 0; +} + +static int ds35xxga_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + if (section > 3) + return -ERANGE; + + region->offset = (16 * section) + 2; + region->length = 6; + + return 0; +} + +static const struct mtd_ooblayout_ops ds35xxga_ooblayout = { + .ecc = ds35xxga_ooblayout_ecc, + .rfree = ds35xxga_ooblayout_free, +}; + +static int ds35xxgb_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + if (section) + return -ERANGE; + + region->offset = 64; + region->length = 64; + + return 0; +} + +static int ds35xxgb_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + if (section) + return -ERANGE; + + /* Reserve 1 bytes for the BBM. */ + region->offset = 1; + region->length = 63; + + return 0; +} + +static const struct mtd_ooblayout_ops ds35xxgb_ooblayout = { + .ecc = ds35xxgb_ooblayout_ecc, + .rfree = ds35xxgb_ooblayout_free, +}; + +static int ds35xxgb_ecc_get_status(struct spinand_device *spinand, + u8 status) +{ + switch (status & DOSICON_STATUS_ECC_MASK) { + case STATUS_ECC_NO_BITFLIPS: + return 0; + + case STATUS_ECC_UNCOR_ERROR: + return -EBADMSG; + + case DOSICON_STATUS_ECC_1TO3_BITFLIPS: + return 3; + + case DOSICON_STATUS_ECC_4TO6_BITFLIPS: + return 6; + + case DOSICON_STATUS_ECC_7TO8_BITFLIPS: + return 8; + + default: + break; + } + + return -EINVAL; +} + +static const struct spinand_info dosilicon_spinand_table[] = { + SPINAND_INFO("DS35X1GA", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x71), + NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)), + SPINAND_INFO("DS35Q2GA", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x72), + NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)), + SPINAND_INFO("DS35M1GA", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x21), + NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)), + SPINAND_INFO("DS35M2GA", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x22), + NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)), + SPINAND_INFO("DS35Q2GB", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF2), + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&ds35xxgb_ooblayout, + ds35xxgb_ecc_get_status)), + SPINAND_INFO("DS35M1GB", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA1), + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&ds35xxgb_ooblayout, + ds35xxgb_ecc_get_status)), + SPINAND_INFO("DS35Q1GB", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF1), + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&ds35xxgb_ooblayout, + ds35xxgb_ecc_get_status)), + SPINAND_INFO("DS35Q4GM", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF4), + NAND_MEMORG(1, 2048, 128, 64, 4096, 80, 2, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&ds35xxgb_ooblayout, + ds35xxgb_ecc_get_status)), + SPINAND_INFO("DS35Q12B", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF5), + NAND_MEMORG(1, 2048, 128, 64, 512, 10, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&ds35xxgb_ooblayout, + ds35xxgb_ecc_get_status)), + SPINAND_INFO("DS35M12B", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA5), + NAND_MEMORG(1, 2048, 128, 64, 512, 10, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&ds35xxgb_ooblayout, + ds35xxgb_ecc_get_status)), + SPINAND_INFO("DS35Q1GD-IB", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x51), + NAND_MEMORG(1, 2048, 128, 64, 1024, 10, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)), +}; + +static const struct spinand_manufacturer_ops dosilicon_spinand_manuf_ops = { +}; + +const struct spinand_manufacturer dosilicon_spinand_manufacturer = { + .id = SPINAND_MFR_DOSILICON, + .name = "dosilicon", + .chips = dosilicon_spinand_table, + .nchips = ARRAY_SIZE(dosilicon_spinand_table), + .ops = &dosilicon_spinand_manuf_ops, +}; diff --git a/uboot-mtk-20250711/drivers/mtd/nand/spi/fmsh.c b/uboot-mtk-20250711/drivers/mtd/nand/spi/fmsh.c new file mode 100644 index 000000000..3bef4358f --- /dev/null +++ b/uboot-mtk-20250711/drivers/mtd/nand/spi/fmsh.c @@ -0,0 +1,167 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2020-2021 Rockchip Electronics Co., Ltd + * + * Authors: + * Dingqiang Lin + */ + +#ifndef __UBOOT__ +#include +#include +#endif +#include + +#define SPINAND_MFR_FMSH 0xA1 + +static SPINAND_OP_VARIANTS(read_cache_variants, + SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); + +static SPINAND_OP_VARIANTS(write_cache_variants, + SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), + SPINAND_PROG_LOAD(true, 0, NULL, 0)); + +static SPINAND_OP_VARIANTS(update_cache_variants, + SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), + SPINAND_PROG_LOAD(false, 0, NULL, 0)); + +static int fm25s01a_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + return -ERANGE; +} + +static int fm25s01a_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + if (section) + return -ERANGE; + + region->offset = 2; + region->length = 62; + + return 0; +} + +static const struct mtd_ooblayout_ops fm25s01a_ooblayout = { + .ecc = fm25s01a_ooblayout_ecc, + .rfree = fm25s01a_ooblayout_free, +}; + +static int fm25s01_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + if (section) + return -ERANGE; + + region->offset = 64; + region->length = 64; + + return 0; +} + +static int fm25s01_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + if (section) + return -ERANGE; + + region->offset = 2; + region->length = 62; + + return 0; +} + +static const struct mtd_ooblayout_ops fm25s01_ooblayout = { + .ecc = fm25s01_ooblayout_ecc, + .rfree = fm25s01_ooblayout_free, +}; + +/* + * ecc bits: 0xC0[4,6] + * [0b000], No bit errors were detected; + * [0b001] and [0b011], 1~6 Bit errors were detected and corrected. Not + * reach Flipping Bits; + * [0b101], Bit error count equals the bit flip + * detection threshold + * [0b010], Multiple bit errors were detected and + * not corrected. + * others, Reserved. + */ +static int fm25s01bi3_ecc_ecc_get_status(struct spinand_device *spinand, + u8 status) +{ + struct nand_device *nand = spinand_to_nand(spinand); + u8 eccsr = (status & GENMASK(6, 4)) >> 4; + + if (eccsr <= 1 || eccsr == 3) + return eccsr; + else if (eccsr == 5) + return nand->eccreq.strength; + else + return -EBADMSG; +} + +static const struct spinand_info fmsh_spinand_table[] = { + SPINAND_INFO("FM25S01A", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE4), + NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), + NAND_ECCREQ(1, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)), + SPINAND_INFO("FM25S02A", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE5), + NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1), + NAND_ECCREQ(1, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)), + SPINAND_INFO("FM25S01", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA1), + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), + NAND_ECCREQ(1, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(&fm25s01_ooblayout, NULL)), + SPINAND_INFO("FM25LS01", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA5), + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), + NAND_ECCREQ(1, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(&fm25s01_ooblayout, NULL)), + SPINAND_INFO("FM25S01BI3", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD4), + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&fm25s01_ooblayout, fm25s01bi3_ecc_ecc_get_status)), +}; + +static const struct spinand_manufacturer_ops fmsh_spinand_manuf_ops = { +}; + +const struct spinand_manufacturer fmsh_spinand_manufacturer = { + .id = SPINAND_MFR_FMSH, + .name = "FMSH", + .chips = fmsh_spinand_table, + .nchips = ARRAY_SIZE(fmsh_spinand_table), + .ops = &fmsh_spinand_manuf_ops, +}; diff --git a/uboot-mtk-20250711/drivers/mtd/nand/spi/fudanmicro.c b/uboot-mtk-20250711/drivers/mtd/nand/spi/fudanmicro.c deleted file mode 100644 index 22e8097a8..000000000 --- a/uboot-mtk-20250711/drivers/mtd/nand/spi/fudanmicro.c +++ /dev/null @@ -1,107 +0,0 @@ -#ifndef __UBOOT__ -#include -#include -#include -#endif -#include -#include - -#define SPINAND_MFR_FUDAN 0xA1 - -#define FM25S01B_STATUS_ECC_MASK (7 << 4) -#define STATUS_ECC_1_3_BITFLIPS (1 << 4) -#define STATUS_ECC_4_6_BITFLIPS (3 << 4) -#define STATUS_ECC_7_8_BITFLIPS (5 << 4) - -static SPINAND_OP_VARIANTS(read_cache_variants, - SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), - SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), - SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), - SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); - -static SPINAND_OP_VARIANTS(write_cache_variants, - SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), - SPINAND_PROG_LOAD(true, 0, NULL, 0)); - -static SPINAND_OP_VARIANTS(update_cache_variants, - SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), - SPINAND_PROG_LOAD(false, 0, NULL, 0)); - -static int fm25s01b_ooblayout_ecc(struct mtd_info *mtd, int section, - struct mtd_oob_region *region) -{ - if (section) - return -ERANGE; - - region->offset = 64; - region->length = 64; - - return 0; -} - -static int fm25s01b_ooblayout_free(struct mtd_info *mtd, int section, - struct mtd_oob_region *region) -{ - if (section > 3) - return -ERANGE; - - region->offset = (16 * section) + 4; - region->length = 12; - - return 0; -} - -static const struct mtd_ooblayout_ops fm25s01b_ooblayout = { - .ecc = fm25s01b_ooblayout_ecc, - .rfree = fm25s01b_ooblayout_free, -}; - -static int fm25s01b_ecc_get_status(struct spinand_device *spinand, - u8 status) -{ - switch (status & FM25S01B_STATUS_ECC_MASK) { - case STATUS_ECC_NO_BITFLIPS: - return 0; - - case STATUS_ECC_UNCOR_ERROR: - return -EBADMSG; - - case STATUS_ECC_1_3_BITFLIPS: - return 3; - - case STATUS_ECC_4_6_BITFLIPS: - return 6; - - case STATUS_ECC_7_8_BITFLIPS: - return 8; - - default: - break; - } - - return -EINVAL; -} - -static const struct spinand_info fudan_spinand_table[] = { - SPINAND_INFO("FM25s01B", - SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD4), - NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), - NAND_ECCREQ(8, 512), - SPINAND_INFO_OP_VARIANTS(&read_cache_variants, - &write_cache_variants, - &update_cache_variants), - SPINAND_HAS_QE_BIT, - SPINAND_ECCINFO(&fm25s01b_ooblayout, - fm25s01b_ecc_get_status)), -}; - -static const struct spinand_manufacturer_ops fudan_spinand_manuf_ops = { -}; - -const struct spinand_manufacturer fudan_spinand_manufacturer = { - .id = SPINAND_MFR_FUDAN, - .name = "FUDAN Micron", - .chips = fudan_spinand_table, - .nchips = ARRAY_SIZE(fudan_spinand_table), - .ops = &fudan_spinand_manuf_ops, -}; diff --git a/uboot-mtk-20250711/drivers/mtd/nand/spi/gsto.c b/uboot-mtk-20250711/drivers/mtd/nand/spi/gsto.c new file mode 100644 index 000000000..b0d56587d --- /dev/null +++ b/uboot-mtk-20250711/drivers/mtd/nand/spi/gsto.c @@ -0,0 +1,92 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2023 Rockchip Electronics Co., Ltd + * + * Authors: + * Dingqiang Lin + */ + +#ifndef __UBOOT__ +#include +#include +#endif +#include + +#define SPINAND_MFR_GSTO 0x52 + +static SPINAND_OP_VARIANTS(read_cache_variants, + SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); + +static SPINAND_OP_VARIANTS(write_cache_variants, + SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), + SPINAND_PROG_LOAD(true, 0, NULL, 0)); + +static SPINAND_OP_VARIANTS(update_cache_variants, + SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), + SPINAND_PROG_LOAD(false, 0, NULL, 0)); + +static int gss0xgsak1_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + if (section) + return -ERANGE; + + region->offset = 32; + region->length = 32; + + return 0; +} + +static int gss0xgsak1_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + if (section) + return -ERANGE; + + region->offset = 2; + region->length = 30; + + return 0; +} + +static const struct mtd_ooblayout_ops gss0xgsak1_ooblayout = { + .ecc = gss0xgsak1_ooblayout_ecc, + .rfree = gss0xgsak1_ooblayout_free, +}; + +static const struct spinand_info gsto_spinand_table[] = { + SPINAND_INFO("GSS01GSAK1", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBA, 0x13), + NAND_MEMORG(1, 2048, 64, 64, 1024, 10, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(&gss0xgsak1_ooblayout, NULL)), + SPINAND_INFO("GSS02GSAK1", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBA, 0x23), + NAND_MEMORG(1, 2048, 64, 64, 2048, 20, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(&gss0xgsak1_ooblayout, NULL)), +}; + +static const struct spinand_manufacturer_ops gsto_spinand_manuf_ops = { +}; + +const struct spinand_manufacturer gsto_spinand_manufacturer = { + .id = SPINAND_MFR_GSTO, + .name = "GSTO", + .chips = gsto_spinand_table, + .nchips = ARRAY_SIZE(gsto_spinand_table), + .ops = &gsto_spinand_manuf_ops, +}; diff --git a/uboot-mtk-20250711/include/linux/mtd/spinand.h b/uboot-mtk-20250711/include/linux/mtd/spinand.h index ae299bf92..d8d650cba 100644 --- a/uboot-mtk-20250711/include/linux/mtd/spinand.h +++ b/uboot-mtk-20250711/include/linux/mtd/spinand.h @@ -297,10 +297,12 @@ struct spinand_manufacturer { }; /* SPI NAND manufacturers */ +extern const struct spinand_manufacturer dosilicon_spinand_manufacturer; extern const struct spinand_manufacturer etron_spinand_manufacturer; +extern const struct spinand_manufacturer fmsh_spinand_manufacturer; extern const struct spinand_manufacturer foresee_spinand_manufacturer; -extern const struct spinand_manufacturer fudan_spinand_manufacturer; extern const struct spinand_manufacturer gigadevice_spinand_manufacturer; +extern const struct spinand_manufacturer gsto_spinand_manufacturer; extern const struct spinand_manufacturer macronix_spinand_manufacturer; extern const struct spinand_manufacturer micron_spinand_manufacturer; extern const struct spinand_manufacturer paragon_spinand_manufacturer;