diff --git a/uboot-mtk-20250711/arch/arm/dts/mt7622.dtsi b/uboot-mtk-20250711/arch/arm/dts/mt7622.dtsi index 3d698b890..f70fadd80 100644 --- a/uboot-mtk-20250711/arch/arm/dts/mt7622.dtsi +++ b/uboot-mtk-20250711/arch/arm/dts/mt7622.dtsi @@ -37,6 +37,30 @@ }; }; + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* 64 KiB reserved for ramoops/pstore */ + ramoops@42ff0000 { + compatible = "ramoops"; + reg = <0x42ff0000 0x10000>; + record-size = <0x1000>; + }; + + /* 192 KiB reserved for ARM Trusted Firmware (BL31) */ + secmon_reserved: secmon@43000000 { + reg = <0x43000000 0x30000>; + no-map; + }; + }; + snfi: snfi@1100d000 { compatible = "mediatek,mtk-snfi-spi"; reg = <0x1100d000 0x2000>; diff --git a/uboot-mtk-20250711/arch/arm/dts/mt7981.dtsi b/uboot-mtk-20250711/arch/arm/dts/mt7981.dtsi index 3d3daac43..73d72acee 100644 --- a/uboot-mtk-20250711/arch/arm/dts/mt7981.dtsi +++ b/uboot-mtk-20250711/arch/arm/dts/mt7981.dtsi @@ -46,6 +46,35 @@ }; }; + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* 64 KiB reserved for ramoops/pstore */ + ramoops@42ff0000 { + compatible = "ramoops"; + reg = <0x42ff0000 0x10000>; + record-size = <0x1000>; + }; + + /* 192 KiB reserved for ARM Trusted Firmware (BL31) */ + secmon_reserved: secmon@43000000 { + reg = <0x43000000 0x30000>; + no-map; + }; + + wmcpu_emi: wmcpu-reserved@4fc00000 { + no-map; + reg = <0x4fc00000 0x00100000>; + }; + }; + gpt_clk: gpt_dummy20m { compatible = "fixed-clock"; clock-frequency = <13000000>; diff --git a/uboot-mtk-20250711/arch/arm/dts/mt7986.dtsi b/uboot-mtk-20250711/arch/arm/dts/mt7986.dtsi index 609654d43..ffdc9b997 100644 --- a/uboot-mtk-20250711/arch/arm/dts/mt7986.dtsi +++ b/uboot-mtk-20250711/arch/arm/dts/mt7986.dtsi @@ -58,6 +58,35 @@ }; }; + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* 64 KiB reserved for ramoops/pstore */ + ramoops@42ff0000 { + compatible = "ramoops"; + reg = <0x42ff0000 0x10000>; + record-size = <0x1000>; + }; + + /* 192 KiB reserved for ARM Trusted Firmware (BL31) */ + secmon_reserved: secmon@43000000 { + reg = <0x43000000 0x30000>; + no-map; + }; + + wmcpu_emi: wmcpu-reserved@4fc00000 { + no-map; + reg = <0x4fc00000 0x00100000>; + }; + }; + dummy_clk: dummy12m { compatible = "fixed-clock"; clock-frequency = <12000000>; diff --git a/uboot-mtk-20250711/arch/arm/dts/mt7988.dtsi b/uboot-mtk-20250711/arch/arm/dts/mt7988.dtsi index a6a482350..230c78608 100644 --- a/uboot-mtk-20250711/arch/arm/dts/mt7988.dtsi +++ b/uboot-mtk-20250711/arch/arm/dts/mt7988.dtsi @@ -75,6 +75,30 @@ #clock-cells = <0>; }; + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* 64 KiB reserved for ramoops/pstore */ + ramoops@42ff0000 { + compatible = "ramoops"; + reg = <0 0x42ff0000 0 0x10000>; + record-size = <0x1000>; + }; + + /* 320 KiB reserved for ARM Trusted Firmware (BL31+BL32) */ + secmon_reserved: secmon@43000000 { + reg = <0 0x43000000 0 0x50000>; + no-map; + }; + }; + hwver: hwver { compatible = "mediatek,hwver", "syscon"; reg = <0 0x8000000 0 0x1000>;