161 lines
2.9 KiB
Plaintext
161 lines
2.9 KiB
Plaintext
/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) */
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/*
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* Copyright (C) 2020 STMicroelectronics - All Rights Reserved
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* Copyright (C) 2021 Rouven Czerwinski, Pengutronix
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*/
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/dts-v1/;
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#include "stm32mp157.dtsi"
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#include "stm32mp15xc.dtsi"
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#include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi"
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#include "stm32mp15xx-osd32.dtsi"
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#include "stm32mp15xxac-pinctrl.dtsi"
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/ {
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model = "Linux Automation Test Automation Controller (TAC)";
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compatible = "lxa,stm32mp157c-tac", "oct,stm32mp15xx-osd32", "st,stm32mp157";
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aliases {
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mmc1 = &sdmmc2;
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serial0 = &uart4;
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};
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chosen {
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stdout-path = &uart4;
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};
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led-controller-0 {
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compatible = "gpio-leds";
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led-0 {
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label = "tac:green:user1";
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gpios = <&gpiof 10 1>;
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linux,default-trigger = "heartbeat";
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};
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};
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reg_3v3: regulator_3v3 {
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compatible = "regulator-fixed";
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regulator-name = "3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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vin-supply = <&v3v3>;
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};
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};
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&pinctrl {
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tac_sdmmc2_d47_pins_b: tac-sdmmc2-d47-1 {
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pins {
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pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
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<STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
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<STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
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<STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
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slew-rate = <1>;
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drive-push-pull;
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bias-disable;
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};
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};
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};
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/* VCO = 624 MHz => P = 208, Q = 48, R = 104 */
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&pll3 {
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st,pll = <&pll3_cfg2>;
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pll3_cfg2: pll3-cfg2 {
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st,pll_vco = <&pll3_vco_624Mhz>;
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st,pll_div_pqr = <2 12 5>;
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};
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};
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/* VCO = 750.0 MHz => P = 125, Q = 75, R = 62.5 */
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&pll4 {
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st,pll = <&pll4_cfg2>;
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pll4_cfg2: pll4-cfg2 {
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st,pll_vco = <&pll4_vco_750Mhz>;
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st,pll_div_pqr = <5 9 11>;
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};
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};
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&rcc {
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/* change parent clocks */
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st,clksrc = <
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CLK_MPU_PLL1P
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CLK_AXI_PLL2P
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CLK_MCU_PLL3P
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CLK_RTC_LSE
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CLK_MCO1_DISABLED
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CLK_MCO2_DISABLED
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CLK_CKPER_HSE
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CLK_FMC_ACLK
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CLK_QSPI_ACLK
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CLK_ETH_PLL4P
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CLK_SDMMC12_PLL3R
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CLK_DSI_DSIPLL
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CLK_STGEN_HSE
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CLK_USBPHY_HSE
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CLK_SPI2S1_PLL3Q
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CLK_SPI2S23_PLL3Q
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CLK_SPI45_HSI
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CLK_SPI6_HSI
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CLK_I2C46_HSI
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CLK_SDMMC3_DISABLED
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CLK_USBO_USBPHY
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CLK_ADC_CKPER
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CLK_CEC_DISABLED
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CLK_I2C12_HSI
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CLK_I2C35_HSI
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CLK_UART1_HSI
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CLK_UART24_HSI
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CLK_UART35_HSI
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CLK_UART6_HSI
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CLK_UART78_HSI
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CLK_SPDIF_DISABLED
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CLK_FDCAN_PLL3Q
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CLK_SAI1_DISABLED
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CLK_SAI2_DISABLED
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CLK_SAI3_DISABLED
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CLK_SAI4_DISABLED
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CLK_RNG1_LSI
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CLK_RNG2_LSI
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CLK_LPTIM1_PCLK1
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CLK_LPTIM23_PCLK3
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CLK_LPTIM45_LSE
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>;
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st,pll_vco {
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pll3_vco_624Mhz: pll3-vco-624Mhz {
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src = <CLK_PLL3_HSE>;
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divmn = <1 51>;
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};
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pll4_vco_750Mhz: pll4-vco-750Mhz {
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src = <CLK_PLL4_HSE>;
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divmn = <3 124>;
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};
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};
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};
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&sdmmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc2_b4_pins_a &tac_sdmmc2_d47_pins_b>;
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bus-width = <8>;
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mmc-ddr-3_3v;
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no-1-8-v;
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no-sd;
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no-sdio;
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non-removable;
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st,neg-edge;
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vmmc-supply = <®_3v3>;
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status = "okay";
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};
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&uart4 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart4_pins_a>;
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status = "okay";
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};
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