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target_linux_generic / Update target_linux_generic (openwrt-25.12) (push) Successful in 8s
41 lines
1.4 KiB
Diff
41 lines
1.4 KiB
Diff
From bcbbfb4f62c4ba35783cc617997a2e92d91e3940 Mon Sep 17 00:00:00 2001
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From: "SkyLake.Huang" <skylake.huang@mediatek.com>
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Date: Thu, 17 Oct 2024 11:22:13 +0800
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Subject: [PATCH 03/20] net: phy: mediatek-ge-soc: Propagate error code
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correctly in cal_cycle()
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This patch propagates error code correctly in cal_cycle()
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and improve with FIELD_GET().
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Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
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Reviewed-by: Simon Horman <horms@kernel.org>
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Signed-off-by: Andrew Lunn <andrew@lunn.ch>
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---
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drivers/net/phy/mediatek-ge-soc.c | 8 +++++---
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1 file changed, 5 insertions(+), 3 deletions(-)
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--- a/drivers/net/phy/mediatek-ge-soc.c
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+++ b/drivers/net/phy/mediatek-ge-soc.c
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@@ -110,7 +110,7 @@
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#define MTK_PHY_CR_TX_AMP_OFFSET_D_MASK GENMASK(6, 0)
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#define MTK_PHY_RG_AD_CAL_COMP 0x17a
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-#define MTK_PHY_AD_CAL_COMP_OUT_SHIFT (8)
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+#define MTK_PHY_AD_CAL_COMP_OUT_MASK GENMASK(8, 8)
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#define MTK_PHY_RG_AD_CAL_CLK 0x17b
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#define MTK_PHY_DA_CAL_CLK BIT(0)
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@@ -351,8 +351,10 @@ static int cal_cycle(struct phy_device *
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phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CALIN,
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MTK_PHY_DA_CALIN_FLAG);
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- ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CAL_COMP) >>
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- MTK_PHY_AD_CAL_COMP_OUT_SHIFT;
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+ ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CAL_COMP);
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+ if (ret < 0)
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+ return ret;
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+ ret = FIELD_GET(MTK_PHY_AD_CAL_COMP_OUT_MASK, ret);
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phydev_dbg(phydev, "cal_val: 0x%x, ret: %d\n", cal_val, ret);
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return ret;
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