From 178879625f0f10ff708728087d91a5fe79990ce2 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Thu, 21 Aug 2025 21:18:41 +0000 Subject: [PATCH] arm64: dts: rockchip: Enable more power domains for RK3528 Describe device power-domains and enable the PD_RKVENC, PD_VO and PD_VPU power-domains on RK3528. The PD_RKVDEC is used by RKVDEC and DDRPHY CRU, and is kept disabled to prevent a full system reset trying to read the rate of the SCMI_CLK_DDR clock. Signed-off-by: Jonas Karlman Link: https://lore.kernel.org/r/20250821211843.3051349-2-jonas@kwiboo.se Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3528.dtsi | 30 +++++++++++++++++++++--- 1 file changed, 27 insertions(+), 3 deletions(-) --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi @@ -171,6 +171,7 @@ gpio-ranges = <&pinctrl 0 32 32>; interrupt-controller; #interrupt-cells = <2>; + power-domains = <&power RK3528_PD_VPU>; }; gpio2: gpio@ffb00000 { @@ -183,6 +184,7 @@ gpio-ranges = <&pinctrl 0 64 32>; interrupt-controller; #interrupt-cells = <2>; + power-domains = <&power RK3528_PD_VO>; }; gpio3: gpio@ffb10000 { @@ -195,6 +197,7 @@ gpio-ranges = <&pinctrl 0 96 32>; interrupt-controller; #interrupt-cells = <2>; + power-domains = <&power RK3528_PD_VPU>; }; gpio4: gpio@ffb20000 { @@ -207,6 +210,7 @@ gpio-ranges = <&pinctrl 0 128 32>; interrupt-controller; #interrupt-cells = <2>; + power-domains = <&power RK3528_PD_RKVENC>; }; }; @@ -522,7 +526,6 @@ reg = ; pm_qos = <&qos_rkvenc>; #power-domain-cells = <0>; - status = "disabled"; }; power-domain@RK3528_PD_VO { reg = ; @@ -536,7 +539,6 @@ <&qos_vdpp>, <&qos_vop>; #power-domain-cells = <0>; - status = "disabled"; }; power-domain@RK3528_PD_VPU { reg = ; @@ -550,7 +552,6 @@ <&qos_usb3otg>, <&qos_vpu>; #power-domain-cells = <0>; - status = "disabled"; }; }; }; @@ -592,6 +593,7 @@ interrupts = ; dmas = <&dmac 25>, <&dmac 24>; dma-names = "tx", "rx"; + power-domains = <&power RK3528_PD_RKVENC>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -606,6 +608,7 @@ interrupts = ; dmas = <&dmac 31>, <&dmac 30>; dma-names = "tx", "rx"; + power-domains = <&power RK3528_PD_VPU>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -630,6 +633,7 @@ clock-names = "baudclk", "apb_pclk"; interrupts = ; dmas = <&dmac 11>, <&dmac 10>; + power-domains = <&power RK3528_PD_RKVENC>; reg-io-width = <4>; reg-shift = <2>; status = "disabled"; @@ -642,6 +646,7 @@ clock-names = "baudclk", "apb_pclk"; interrupts = ; dmas = <&dmac 13>, <&dmac 12>; + power-domains = <&power RK3528_PD_VPU>; reg-io-width = <4>; reg-shift = <2>; status = "disabled"; @@ -654,6 +659,7 @@ clock-names = "baudclk", "apb_pclk"; interrupts = ; dmas = <&dmac 15>, <&dmac 14>; + power-domains = <&power RK3528_PD_RKVENC>; reg-io-width = <4>; reg-shift = <2>; status = "disabled"; @@ -666,6 +672,7 @@ clock-names = "baudclk", "apb_pclk"; interrupts = ; dmas = <&dmac 17>, <&dmac 16>; + power-domains = <&power RK3528_PD_VO>; reg-io-width = <4>; reg-shift = <2>; status = "disabled"; @@ -678,6 +685,7 @@ clock-names = "baudclk", "apb_pclk"; interrupts = ; dmas = <&dmac 19>, <&dmac 18>; + power-domains = <&power RK3528_PD_VPU>; reg-io-width = <4>; reg-shift = <2>; status = "disabled"; @@ -690,6 +698,7 @@ clock-names = "baudclk", "apb_pclk"; interrupts = ; dmas = <&dmac 21>, <&dmac 20>; + power-domains = <&power RK3528_PD_VPU>; reg-io-width = <4>; reg-shift = <2>; status = "disabled"; @@ -702,6 +711,7 @@ clock-names = "baudclk", "apb_pclk"; interrupts = ; dmas = <&dmac 23>, <&dmac 22>; + power-domains = <&power RK3528_PD_VPU>; reg-io-width = <4>; reg-shift = <2>; status = "disabled"; @@ -714,6 +724,7 @@ clocks = <&cru CLK_I2C0>, <&cru PCLK_I2C0>; clock-names = "i2c", "pclk"; interrupts = ; + power-domains = <&power RK3528_PD_RKVENC>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -726,6 +737,7 @@ clocks = <&cru CLK_I2C1>, <&cru PCLK_I2C1>; clock-names = "i2c", "pclk"; interrupts = ; + power-domains = <&power RK3528_PD_RKVENC>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -752,6 +764,7 @@ clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>; clock-names = "i2c", "pclk"; interrupts = ; + power-domains = <&power RK3528_PD_VPU>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -766,6 +779,7 @@ interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&i2c4_xfer>; + power-domains = <&power RK3528_PD_VO>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -778,6 +792,7 @@ clocks = <&cru CLK_I2C5>, <&cru PCLK_I2C5>; clock-names = "i2c", "pclk"; interrupts = ; + power-domains = <&power RK3528_PD_VPU>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -790,6 +805,7 @@ clocks = <&cru CLK_I2C6>, <&cru PCLK_I2C6>; clock-names = "i2c", "pclk"; interrupts = ; + power-domains = <&power RK3528_PD_VPU>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -804,6 +820,7 @@ interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&i2c7_xfer>; + power-domains = <&power RK3528_PD_VO>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -895,6 +912,7 @@ clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>; clock-names = "saradc", "apb_pclk"; interrupts = ; + power-domains = <&power RK3528_PD_VPU>; resets = <&cru SRST_P_SARADC>; reset-names = "saradc-apb"; #io-channel-cells = <1>; @@ -915,6 +933,7 @@ interrupt-names = "macirq", "eth_wake_irq"; phy-handle = <&rmii0_phy>; phy-mode = "rmii"; + power-domains = <&power RK3528_PD_VO>; resets = <&cru SRST_A_MAC_VO>; reset-names = "stmmaceth"; rockchip,grf = <&vo_grf>; @@ -973,6 +992,7 @@ interrupts = , ; interrupt-names = "macirq", "eth_wake_irq"; + power-domains = <&power RK3528_PD_VPU>; resets = <&cru SRST_A_MAC>; reset-names = "stmmaceth"; rockchip,grf = <&vpu_grf>; @@ -1023,6 +1043,7 @@ pinctrl-names = "default"; pinctrl-0 = <&emmc_bus8>, <&emmc_clk>, <&emmc_cmd>, <&emmc_strb>; + power-domains = <&power RK3528_PD_VPU>; resets = <&cru SRST_C_EMMC>, <&cru SRST_H_EMMC>, <&cru SRST_A_EMMC>, <&cru SRST_B_EMMC>, <&cru SRST_T_EMMC>; @@ -1044,6 +1065,7 @@ max-frequency = <200000000>; pinctrl-names = "default"; pinctrl-0 = <&sdio0_bus4>, <&sdio0_clk>, <&sdio0_cmd>; + power-domains = <&power RK3528_PD_VPU>; resets = <&cru SRST_H_SDIO0>; reset-names = "reset"; status = "disabled"; @@ -1063,6 +1085,7 @@ max-frequency = <200000000>; pinctrl-names = "default"; pinctrl-0 = <&sdio1_bus4>, <&sdio1_clk>, <&sdio1_cmd>; + power-domains = <&power RK3528_PD_VPU>; resets = <&cru SRST_H_SDIO1>; reset-names = "reset"; status = "disabled"; @@ -1083,6 +1106,7 @@ pinctrl-names = "default"; pinctrl-0 = <&sdmmc_bus4>, <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_det>; + power-domains = <&power RK3528_PD_VO>; resets = <&cru SRST_H_SDMMC0>; reset-names = "reset"; rockchip,default-sample-phase = <90>;