45 lines
1.6 KiB
Diff
45 lines
1.6 KiB
Diff
From 2efdb041019fd6c58abefba3eb6fdc4d659e576c Mon Sep 17 00:00:00 2001
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From: Damon Ding <damon.ding@rock-chips.com>
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Date: Thu, 6 Feb 2025 11:03:30 +0800
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Subject: arm64: dts: rockchip: Fix label name of hdptxphy for RK3588
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The hdptxphy is a combo transmit-PHY for HDMI2.1 TMDS Link, FRL Link, DP
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and eDP Link. Therefore, it is better to name it hdptxphy0 other than
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hdptxphy_hdmi0, which will be referenced by both hdmi0 and edp0 nodes.
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Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
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Link: https://lore.kernel.org/r/20250206030330.680424-3-damon.ding@rock-chips.com
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[added armsom-sige7, where hdmi-support was added recently and also
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the hdptxphy0-as-dclk source I just added]
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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--- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
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@@ -1262,7 +1262,7 @@
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<&cru DCLK_VOP2>,
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<&cru DCLK_VOP3>,
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<&cru PCLK_VOP_ROOT>,
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- <&hdptxphy_hdmi0>;
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+ <&hdptxphy0>;
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clock-names = "aclk",
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"hclk",
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"dclk_vp0",
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@@ -1387,7 +1387,7 @@
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<GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH 0>,
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<GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupt-names = "avp", "cec", "earc", "main", "hpd";
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- phys = <&hdptxphy_hdmi0>;
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+ phys = <&hdptxphy0>;
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pinctrl-names = "default";
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pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
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&hdmim0_tx0_scl &hdmim0_tx0_sda>;
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@@ -2810,7 +2810,7 @@
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#dma-cells = <1>;
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};
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- hdptxphy_hdmi0: phy@fed60000 {
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+ hdptxphy0: phy@fed60000 {
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compatible = "rockchip,rk3588-hdptx-phy";
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reg = <0x0 0xfed60000 0x0 0x2000>;
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clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>, <&cru PCLK_HDPTX0>;
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