43 lines
1.2 KiB
Diff
43 lines
1.2 KiB
Diff
From ba82f56bbf20e4166c988621cd0507509872848e Mon Sep 17 00:00:00 2001
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From: Detlev Casanova <detlev.casanova@collabora.com>
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Date: Fri, 28 Feb 2025 09:50:48 -0500
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Subject: [PATCH] arm64: dts: rockchip: Add SPI NOR device on the ROCK 4D
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The SPI NOR chip is connected on the FSPI0 core, so enable the sfc0 node
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and add the flash device to it.
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The SPI NOR won't work at higher speed than 50 MHz, specify the limit.
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Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
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Link: https://lore.kernel.org/r/20250228145304.581349-3-detlev.casanova@collabora.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts | 16 ++++++++++++++++
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1 file changed, 16 insertions(+)
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--- a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
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@@ -701,6 +701,22 @@
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status = "okay";
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};
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+
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+&sfc0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&fspi0_pins &fspi0_csn0>;
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+ status = "okay";
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+
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+ flash@0 {
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+ compatible = "jedec,spi-nor";
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+ reg = <0>;
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+ spi-max-frequency = <50000000>;
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+ spi-rx-bus-width = <4>;
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+ spi-tx-bus-width = <1>;
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+ vcc-supply = <&vcc_1v8_s3>;
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+ };
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+};
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+
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&u2phy0 {
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status = "okay";
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};
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