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target_linux_rockchip / Update target_linux_rockchip (openwrt-25.12) (push) Successful in 8s
126 lines
4.4 KiB
Diff
126 lines
4.4 KiB
Diff
From 8faac4ef6206a1c771e1c016e205dcee8164d618 Mon Sep 17 00:00:00 2001
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From: Jianwei Zheng <jianwei.zheng@rock-chips.com>
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Date: Wed, 23 Jul 2025 12:23:03 +0000
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Subject: [PATCH] phy: rockchip: inno-usb2: Add support for RK3528
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The RK3528 has a single USB2PHY with a otg and host port.
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Add support for the RK3528 variant of USB2PHY.
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PHY tuning for RK3528:
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- Turn off differential receiver in suspend mode to save power
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consumption.
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- Set HS eye-height to 400mV instead of default 450mV.
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- Choose the Tx fs/ls data as linestate from TX driver for otg port
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which uses dwc3 controller to improve fs/ls devices compatibility with
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long cables.
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This is based on vendor kernel linux-stan-6.1-rkr5 tag.
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Signed-off-by: Jianwei Zheng <jianwei.zheng@rock-chips.com>
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Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
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---
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drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 74 +++++++++++++++++++
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1 file changed, 74 insertions(+)
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--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
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+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
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@@ -1516,6 +1516,28 @@ static int rk3128_usb2phy_tuning(struct
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BIT(2) << BIT_WRITEABLE_SHIFT | 0);
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}
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+static int rk3528_usb2phy_tuning(struct rockchip_usb2phy *rphy)
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+{
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+ int ret = 0;
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+
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+ /* Turn off otg port differential receiver in suspend mode */
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+ ret |= regmap_write(rphy->phy_base, 0x30, BIT(18) | 0x0000);
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+
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+ /* Turn off host port differential receiver in suspend mode */
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+ ret |= regmap_write(rphy->phy_base, 0x430, BIT(18) | 0x0000);
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+
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+ /* Set otg port HS eye height to 400mv (default is 450mv) */
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+ ret |= regmap_write(rphy->phy_base, 0x30, GENMASK(22, 20) | 0x0000);
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+
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+ /* Set host port HS eye height to 400mv (default is 450mv) */
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+ ret |= regmap_write(rphy->phy_base, 0x430, GENMASK(22, 20) | 0x0000);
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+
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+ /* Choose the Tx fs/ls data as linestate from TX driver for otg port */
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+ ret |= regmap_write(rphy->phy_base, 0x94, GENMASK(22, 19) | 0x0018);
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+
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+ return ret;
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+}
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+
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static int rk3576_usb2phy_tuning(struct rockchip_usb2phy *rphy)
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{
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int ret;
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@@ -1898,6 +1920,57 @@ static const struct rockchip_usb2phy_cfg
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{ /* sentinel */ }
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};
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+static const struct rockchip_usb2phy_cfg rk3528_phy_cfgs[] = {
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+ {
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+ .reg = 0xffdf0000,
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+ .num_ports = 2,
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+ .phy_tuning = rk3528_usb2phy_tuning,
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+ .clkout_ctl_phy = { 0x041c, 7, 2, 0, 0x27 },
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+ .port_cfgs = {
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+ [USB2PHY_PORT_OTG] = {
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+ .phy_sus = { 0x004c, 8, 0, 0, 0x1d1 },
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+ .bvalid_det_en = { 0x0074, 3, 2, 0, 3 },
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+ .bvalid_det_st = { 0x0078, 3, 2, 0, 3 },
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+ .bvalid_det_clr = { 0x007c, 3, 2, 0, 3 },
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+ .idfall_det_en = { 0x0074, 5, 5, 0, 1 },
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+ .idfall_det_st = { 0x0078, 5, 5, 0, 1 },
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+ .idfall_det_clr = { 0x007c, 5, 5, 0, 1 },
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+ .idrise_det_en = { 0x0074, 4, 4, 0, 1 },
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+ .idrise_det_st = { 0x0078, 4, 4, 0, 1 },
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+ .idrise_det_clr = { 0x007c, 4, 4, 0, 1 },
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+ .ls_det_en = { 0x0074, 0, 0, 0, 1 },
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+ .ls_det_st = { 0x0078, 0, 0, 0, 1 },
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+ .ls_det_clr = { 0x007c, 0, 0, 0, 1 },
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+ .utmi_avalid = { 0x006c, 1, 1, 0, 1 },
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+ .utmi_bvalid = { 0x006c, 0, 0, 0, 1 },
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+ .utmi_id = { 0x006c, 6, 6, 0, 1 },
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+ .utmi_ls = { 0x006c, 5, 4, 0, 1 },
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+ },
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+ [USB2PHY_PORT_HOST] = {
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+ .phy_sus = { 0x005c, 8, 0, 0x1d2, 0x1d1 },
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+ .ls_det_en = { 0x0090, 0, 0, 0, 1 },
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+ .ls_det_st = { 0x0094, 0, 0, 0, 1 },
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+ .ls_det_clr = { 0x0098, 0, 0, 0, 1 },
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+ .utmi_ls = { 0x006c, 13, 12, 0, 1 },
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+ .utmi_hstdet = { 0x006c, 15, 15, 0, 1 },
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+ }
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+ },
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+ .chg_det = {
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+ .opmode = { 0x004c, 3, 0, 5, 1 },
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+ .cp_det = { 0x006c, 19, 19, 0, 1 },
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+ .dcp_det = { 0x006c, 18, 18, 0, 1 },
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+ .dp_det = { 0x006c, 20, 20, 0, 1 },
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+ .idm_sink_en = { 0x0058, 1, 1, 0, 1 },
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+ .idp_sink_en = { 0x0058, 0, 0, 0, 1 },
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+ .idp_src_en = { 0x0058, 2, 2, 0, 1 },
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+ .rdm_pdwn_en = { 0x0058, 3, 3, 0, 1 },
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+ .vdm_src_en = { 0x0058, 5, 5, 0, 1 },
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+ .vdp_src_en = { 0x0058, 4, 4, 0, 1 },
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+ },
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+ },
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+ { /* sentinel */ }
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+};
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+
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static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = {
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{
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.reg = 0xfe8a0000,
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@@ -2216,6 +2289,7 @@ static const struct of_device_id rockchi
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{ .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
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{ .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
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{ .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
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+ { .compatible = "rockchip,rk3528-usb2phy", .data = &rk3528_phy_cfgs },
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{ .compatible = "rockchip,rk3568-usb2phy", .data = &rk3568_phy_cfgs },
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{ .compatible = "rockchip,rk3576-usb2phy", .data = &rk3576_phy_cfgs },
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{ .compatible = "rockchip,rk3588-usb2phy", .data = &rk3588_phy_cfgs },
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