sunxi: backport latest pending thermal patches

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
2026-05-07 15:09:37 +08:00
parent 92f2416c60
commit 231abf4031
5 changed files with 25 additions and 74 deletions
@@ -1,49 +0,0 @@
From git@z Thu Jan 1 00:00:00 1970
Subject: [PATCH v3 2/6] thermal/drivers/sun8i: add gpadc clock
From: Mikhail Kalashnikov <iuncuim@gmail.com>
Date: Sat, 25 Oct 2025 12:31:25 +0800
Message-Id: <20251025043129.160454-3-iuncuim@gmail.com>
MIME-Version: 1.0
Content-Type: text/plain; charset="utf-8"
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Some processors (e.g. Allwinner A523) require GPADC clocking activation for
temperature sensors to work. So let's add support for enabling it.
Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
Reviewed-by: Chen-Yu Tsai <wens@kernel.org>
---
drivers/thermal/sun8i_thermal.c | 8 ++++++++
1 file changed, 8 insertions(+)
--- a/drivers/thermal/sun8i_thermal.c
+++ b/drivers/thermal/sun8i_thermal.c
@@ -66,6 +66,7 @@ struct tsensor {
};
struct ths_thermal_chip {
+ bool has_gpadc_clk;
bool has_mod_clk;
bool has_bus_clk_reset;
bool needs_sram;
@@ -89,6 +90,7 @@ struct ths_device {
struct regmap_field *sram_regmap_field;
struct reset_control *reset;
struct clk *bus_clk;
+ struct clk *gpadc_clk;
struct clk *mod_clk;
struct tsensor sensor[MAX_SENSOR_NUM];
};
@@ -417,6 +419,12 @@ static int sun8i_ths_resource_init(struc
if (ret)
return ret;
+ if (tmdev->chip->has_gpadc_clk) {
+ tmdev->gpadc_clk = devm_clk_get_enabled(&pdev->dev, "gpadc");
+ if (IS_ERR(tmdev->gpadc_clk))
+ return PTR_ERR(tmdev->gpadc_clk);
+ }
+
if (tmdev->chip->needs_sram) {
struct regmap *regmap;
@@ -1,9 +1,9 @@
From git@z Thu Jan 1 00:00:00 1970
Subject: [PATCH v3 3/6] thermal/drivers/sun8i: replace
Subject: [PATCH v4 2/5] thermal/drivers/sun8i: replace
devm_reset_control_get to devm_reset_control_get_shared_deasserted
From: Mikhail Kalashnikov <iuncuim@gmail.com>
Date: Sat, 25 Oct 2025 12:31:26 +0800
Message-Id: <20251025043129.160454-4-iuncuim@gmail.com>
Date: Mon, 04 May 2026 13:02:42 +0800
Message-Id: <20260504050245.646078-3-iuncuim@gmail.com>
MIME-Version: 1.0
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: 7bit
@@ -15,13 +15,14 @@ devm_reset_control_get_shared_deasserted().
Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Chen-Yu Tsai <wens@kernel.org>
---
drivers/thermal/sun8i_thermal.c | 16 +---------------
1 file changed, 1 insertion(+), 15 deletions(-)
--- a/drivers/thermal/sun8i_thermal.c
+++ b/drivers/thermal/sun8i_thermal.c
@@ -344,11 +344,6 @@ out:
@@ -342,11 +342,6 @@ out:
return ret;
}
@@ -33,7 +34,7 @@ Reviewed-by: Chen-Yu Tsai <wens@csie.org>
static struct regmap *sun8i_ths_get_sram_regmap(struct device_node *node)
{
struct platform_device *sram_pdev;
@@ -391,19 +386,10 @@ static int sun8i_ths_resource_init(struc
@@ -389,19 +384,10 @@ static int sun8i_ths_resource_init(struc
return PTR_ERR(tmdev->regmap);
if (tmdev->chip->has_bus_clk_reset) {
@@ -1,9 +1,9 @@
From git@z Thu Jan 1 00:00:00 1970
Subject: [PATCH v3 4/6] thermal/drivers/sun8i: get calibration data from
Subject: [PATCH v4 3/5] thermal/drivers/sun8i: get calibration data from
two nvmem cells
From: Mikhail Kalashnikov <iuncuim@gmail.com>
Date: Sat, 25 Oct 2025 12:31:27 +0800
Message-Id: <20251025043129.160454-5-iuncuim@gmail.com>
Date: Mon, 04 May 2026 13:02:43 +0800
Message-Id: <20260504050245.646078-4-iuncuim@gmail.com>
MIME-Version: 1.0
Content-Type: text/plain; charset="utf-8"
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@@ -19,7 +19,7 @@ Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
--- a/drivers/thermal/sun8i_thermal.c
+++ b/drivers/thermal/sun8i_thermal.c
@@ -303,43 +303,70 @@ static int sun50i_h6_ths_calibrate(struc
@@ -301,43 +301,70 @@ static int sun50i_h6_ths_calibrate(struc
static int sun8i_ths_calibrate(struct ths_device *tmdev)
{
@@ -1,17 +1,15 @@
From git@z Thu Jan 1 00:00:00 1970
Subject: [PATCH v3 5/6] thermal/drivers/sun8i: Add support for A523 THS0/1
Subject: [PATCH v4 4/5] thermal/drivers/sun8i: Add support for A523 THS0/1
controllers
From: Mikhail Kalashnikov <iuncuim@gmail.com>
Date: Sat, 25 Oct 2025 12:31:28 +0800
Message-Id: <20251025043129.160454-6-iuncuim@gmail.com>
Date: Mon, 04 May 2026 13:02:44 +0800
Message-Id: <20260504050245.646078-5-iuncuim@gmail.com>
MIME-Version: 1.0
Content-Type: text/plain; charset="utf-8"
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The A523 processor has two temperature controllers, THS0 and THS1.
THS0 has only one temperature sensor, which is located in the DRAM.
THS1 does have 3 sensors:
ths1_0 - "big" cores
ths1_1 - "little" cores
@@ -23,6 +21,7 @@ value from ths1_2, but uses separate calibration data, so we get two
different values from real one.
Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
Reviewed-by: Chen-Yu Tsai <wens@kernel.org>
---
drivers/thermal/sun8i_thermal.c | 133 ++++++++++++++++++++++++++++++++
1 file changed, 133 insertions(+)
@@ -42,7 +41,7 @@ Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
struct tsensor {
struct ths_device *tmdev;
struct thermal_zone_device *tzd;
@@ -116,6 +122,15 @@ static int sun50i_h5_calc_temp(struct th
@@ -114,6 +120,15 @@ static int sun50i_h5_calc_temp(struct th
return -1590 * reg / 10 + 276000;
}
@@ -58,7 +57,7 @@ Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
static int sun8i_ths_get_temp(struct thermal_zone_device *tz, int *temp)
{
struct tsensor *s = thermal_zone_device_priv(tz);
@@ -301,6 +316,97 @@ static int sun50i_h6_ths_calibrate(struc
@@ -299,6 +314,97 @@ static int sun50i_h6_ths_calibrate(struc
return 0;
}
@@ -156,7 +155,7 @@ Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
static int sun8i_ths_calibrate(struct ths_device *tmdev)
{
struct nvmem_cell *calcell = NULL;
@@ -730,6 +836,31 @@ static const struct ths_thermal_chip sun
@@ -722,6 +828,31 @@ static const struct ths_thermal_chip sun
.calc_temp = sun8i_ths_calc_temp,
};
@@ -164,7 +163,7 @@ Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
+static const struct ths_thermal_chip sun55i_a523_ths0 = {
+ .sensor_num = 1,
+ .has_bus_clk_reset = true,
+ .has_gpadc_clk = true,
+ .has_mod_clk = true,
+ .ft_deviation = 5000,
+ .temp_data_base = SUN50I_H6_THS_TEMP_DATA,
+ .calibrate = sun55i_a523_ths_calibrate,
@@ -176,7 +175,7 @@ Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
+static const struct ths_thermal_chip sun55i_a523_ths1 = {
+ .sensor_num = 3,
+ .has_bus_clk_reset = true,
+ .has_gpadc_clk = true,
+ .has_mod_clk = true,
+ .ft_deviation = 5000,
+ .temp_data_base = SUN50I_H6_THS_TEMP_DATA,
+ .calibrate = sun55i_a523_ths_calibrate,
@@ -188,7 +187,7 @@ Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
static const struct of_device_id of_ths_match[] = {
{ .compatible = "allwinner,sun8i-a83t-ths", .data = &sun8i_a83t_ths },
{ .compatible = "allwinner,sun8i-h3-ths", .data = &sun8i_h3_ths },
@@ -740,6 +871,8 @@ static const struct of_device_id of_ths_
@@ -732,6 +863,8 @@ static const struct of_device_id of_ths_
{ .compatible = "allwinner,sun50i-h6-ths", .data = &sun50i_h6_ths },
{ .compatible = "allwinner,sun20i-d1-ths", .data = &sun20i_d1_ths },
{ .compatible = "allwinner,sun50i-h616-ths", .data = &sun50i_h616_ths },
@@ -1,9 +1,9 @@
From git@z Thu Jan 1 00:00:00 1970
Subject: [PATCH v3 6/6] Allwinner: A523: add support for A523 THS0/1
Subject: [PATCH v4 5/5] Allwinner: A523: add support for A523 THS0/1
controllers
From: Mikhail Kalashnikov <iuncuim@gmail.com>
Date: Sat, 25 Oct 2025 12:31:29 +0800
Message-Id: <20251025043129.160454-7-iuncuim@gmail.com>
Date: Mon, 04 May 2026 13:02:45 +0800
Message-Id: <20260504050245.646078-6-iuncuim@gmail.com>
MIME-Version: 1.0
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: 7bit
@@ -108,7 +108,7 @@ Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
+ reg = <0x02009400 0x400>;
+ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_GPADC1>;
+ clock-names = "bus", "gpadc";
+ clock-names = "bus", "mod";
+ resets = <&ccu RST_BUS_THS>;
+ nvmem-cells = <&ths_calibration0>, <&ths_calibration1>;
+ nvmem-cell-names = "calibration",
@@ -121,7 +121,7 @@ Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
+ reg = <0x0200a000 0x400>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_GPADC0>;
+ clock-names = "bus", "gpadc";
+ clock-names = "bus", "mod";
+ resets = <&ccu RST_BUS_THS>;
+ nvmem-cells = <&ths_calibration0>, <&ths_calibration1>;
+ nvmem-cell-names = "calibration",