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realtek: pcs: rtl838x: carve out writes for SerDes 0/1

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For an attempt to simplify and reduce patching, carve out two special
writes for SerDes 0/1. While their exact purpose isn't fully known, they
need to match to make QSGMII on those two SerDes work. In order to be
able to merge the per-SerDes QSGMII patching sequences, carve them out
to the patching function one level above.

Link: https://github.com/openwrt/openwrt/pull/23741
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
This commit is contained in:
Jonas Jelonek
2026-06-11 20:27:30 +02:00
parent 77ca8616fc
commit 5c9f370a47
1 changed files with 13 additions and 3 deletions
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target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c
+13 -3
View File
@@ -665,9 +665,6 @@ static const s16 rtpcs_838x_sds_hw_mode_vals[RTPCS_SDS_MODE_MAX] = {
static void rtpcs_838x_sds_patch_01_qsgmii_6275b(struct rtpcs_ctrl *ctrl)
{
/* CKREFBUF_S0S1 for QSGMII */
regmap_write_bits(ctrl->map, RTPCS_838X_PLL_CML_CTRL, 0xf, 0xf);
rtpcs_sds_write(SDS(ctrl, 0), 1, 3, 0xf46f);
rtpcs_sds_write(SDS(ctrl, 0), 1, 2, 0x85fa);
rtpcs_sds_write(SDS(ctrl, 1), 1, 2, 0x85fa);
@@ -896,6 +893,19 @@ static int rtpcs_838x_sds_patch(struct rtpcs_serdes *sds,
break;
}
if (sds_id < 2) {
/*
* These settings have to match to make QSGMII working.
* Testing showed that both variants work:
* - CKREFBUF_S0S1 = 0xf + REG_CML_SEL = 0x1
* - CKREFBUF_S0S1 = 0x0 + REG_CML_SEL = 0x0
*/
/* CKREFBUF_S0S1 */
regmap_write_bits(ctrl->map, RTPCS_838X_PLL_CML_CTRL, 0xf, 0xf);
rtpcs_sds_write_bits(sds, 0x1, 0x3, 1, 1, 0x1); /* REG_CML_SEL */
}
rtpcs_sds_write(sds, 0x1, 0x9, 0x8e64);
rtpcs_sds_write(sds, 0x1, 0x9, 0x8c64);