rockchip: fix broken SGMII/QSGMII support for RK3568

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
2026-07-15 16:07:35 +08:00
parent 1cdd31f165
commit 5e853ccbb1
@@ -41,15 +41,16 @@ Signed-off-by: David Wu <david.wu@rock-chips.com>
};
static const char * const rk_rmii_clocks[] = {
@@ -60,6 +63,7 @@ static const char * const rk_rmii_clocks
@@ -60,6 +63,8 @@ static const char * const rk_rmii_clocks
enum rk_clocks_index {
RK_ACLK_MAC = 0,
RK_PCLK_MAC,
+ RK_PCLK_XPCS,
+ RK_CLK_XPCS_EEE,
RK_MAC_CLK_TX,
RK_CLK_MAC_SPEED,
RK_MAC_CLK_RX,
@@ -89,6 +93,7 @@ struct rk_priv_data {
@@ -89,6 +94,7 @@ struct rk_priv_data {
struct regmap *grf;
struct regmap *php_grf;
@@ -57,7 +58,7 @@ Signed-off-by: David Wu <david.wu@rock-chips.com>
};
static int rk_set_reg_speed(struct rk_priv_data *bsp_priv,
@@ -229,6 +234,128 @@ static void rk_gmac_integrated_fephy_pow
@@ -229,6 +235,128 @@ static void rk_gmac_integrated_fephy_pow
regmap_write(priv->grf, reg, RK_FEPHY_SHUTDOWN);
}
@@ -186,7 +187,7 @@ Signed-off-by: David Wu <david.wu@rock-chips.com>
#define PX30_GRF_GMAC_CON1 0x0904
/* PX30_GRF_GMAC_CON1 */
@@ -966,6 +1093,7 @@ static const struct rk_gmac_ops rk3528_o
@@ -966,6 +1094,7 @@ static const struct rk_gmac_ops rk3528_o
#define RK3568_GRF_GMAC1_CON1 0x038c
/* RK3568_GRF_GMAC0_CON1 && RK3568_GRF_GMAC1_CON1 */
@@ -194,7 +195,7 @@ Signed-off-by: David Wu <david.wu@rock-chips.com>
#define RK3568_GMAC_PHY_INTF_SEL_RGMII \
(GRF_BIT(4) | GRF_CLR_BIT(5) | GRF_CLR_BIT(6))
#define RK3568_GMAC_PHY_INTF_SEL_RMII \
@@ -981,6 +1109,46 @@ static const struct rk_gmac_ops rk3528_o
@@ -981,6 +1110,46 @@ static const struct rk_gmac_ops rk3528_o
#define RK3568_GMAC_CLK_RX_DL_CFG(val) HIWORD_UPDATE(val, 0x7F, 8)
#define RK3568_GMAC_CLK_TX_DL_CFG(val) HIWORD_UPDATE(val, 0x7F, 0)
@@ -241,7 +242,7 @@ Signed-off-by: David Wu <david.wu@rock-chips.com>
static void rk3568_set_to_rgmii(struct rk_priv_data *bsp_priv,
int tx_delay, int rx_delay)
{
@@ -1013,6 +1181,8 @@ static void rk3568_set_to_rmii(struct rk
@@ -1013,6 +1182,8 @@ static void rk3568_set_to_rmii(struct rk
static const struct rk_gmac_ops rk3568_ops = {
.set_to_rgmii = rk3568_set_to_rgmii,
.set_to_rmii = rk3568_set_to_rmii,
@@ -250,7 +251,7 @@ Signed-off-by: David Wu <david.wu@rock-chips.com>
.set_speed = rk_set_clk_mac_speed,
.regs_valid = true,
.regs = {
@@ -1462,7 +1632,7 @@ static int gmac_clk_enable(struct rk_pri
@@ -1462,7 +1633,7 @@ static int gmac_clk_enable(struct rk_pri
return 0;
}
@@ -259,7 +260,7 @@ Signed-off-by: David Wu <david.wu@rock-chips.com>
{
struct regulator *ldo = bsp_priv->regulator;
struct device *dev = bsp_priv->dev;
@@ -1575,6 +1745,18 @@ static struct rk_priv_data *rk_gmac_setu
@@ -1575,6 +1746,18 @@ static struct rk_priv_data *rk_gmac_setu
return ERR_CAST(bsp_priv->php_grf);
}
}
@@ -278,7 +279,7 @@ Signed-off-by: David Wu <david.wu@rock-chips.com>
if (plat->phy_node) {
bsp_priv->integrated_phy = of_property_read_bool(plat->phy_node,
@@ -1609,6 +1791,14 @@ static int rk_gmac_check_ops(struct rk_p
@@ -1609,6 +1792,14 @@ static int rk_gmac_check_ops(struct rk_p
if (!bsp_priv->ops->set_to_rmii)
return -EINVAL;
break;
@@ -293,7 +294,7 @@ Signed-off-by: David Wu <david.wu@rock-chips.com>
default:
dev_err(bsp_priv->dev,
"unsupported interface %d", bsp_priv->phy_iface);
@@ -1652,11 +1842,19 @@ static int rk_gmac_powerup(struct rk_pri
@@ -1652,11 +1843,19 @@ static int rk_gmac_powerup(struct rk_pri
dev_info(dev, "init for RMII\n");
bsp_priv->ops->set_to_rmii(bsp_priv);
break;
@@ -314,7 +315,7 @@ Signed-off-by: David Wu <david.wu@rock-chips.com>
if (ret) {
gmac_clk_enable(bsp_priv, false);
return ret;
@@ -1677,7 +1875,7 @@ static void rk_gmac_powerdown(struct rk_
@@ -1677,7 +1876,7 @@ static void rk_gmac_powerdown(struct rk_
pm_runtime_put_sync(gmac->dev);
@@ -323,3 +324,27 @@ Signed-off-by: David Wu <david.wu@rock-chips.com>
gmac_clk_enable(gmac, false);
}
@@ -1691,6 +1890,12 @@ static void rk_get_interfaces(struct stm
if (rk->ops->set_to_rmii)
__set_bit(PHY_INTERFACE_MODE_RMII, interfaces);
+
+ if (rk->ops->set_to_sgmii)
+ __set_bit(PHY_INTERFACE_MODE_SGMII, interfaces);
+
+ if (rk->ops->set_to_qsgmii)
+ __set_bit(PHY_INTERFACE_MODE_QSGMII, interfaces);
}
static int rk_set_clk_tx_rate(void *bsp_priv_, struct clk *clk_tx_i,
@@ -1698,6 +1903,10 @@ static int rk_set_clk_tx_rate(void *bsp_
{
struct rk_priv_data *bsp_priv = bsp_priv_;
+ if (interface == PHY_INTERFACE_MODE_SGMII ||
+ interface == PHY_INTERFACE_MODE_QSGMII)
+ return 0;
+
if (bsp_priv->ops->set_speed)
return bsp_priv->ops->set_speed(bsp_priv, bsp_priv->phy_iface,
speed);