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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
2025-01-05 22:24:10 +08:00
parent 849b0be2de 6dacba30a7
commit 687c2906ac
48 changed files with 1495 additions and 90 deletions
Download Patch File Download Diff File Expand all files Collapse all files
package/base-files/files/lib/functions/system.sh
+1 -1
View File
@@ -66,7 +66,7 @@ get_mac_ascii() {
local key="$2"
local mac_dirty
mac_dirty=$(strings "$part" | sed -n 's/^'"$key"'=//p')
mac_dirty=$(strings "$part" | tr -d ' \t' | sed -n 's/^'"$key"'=//p' | head -n 1)
# "canonicalize" mac
[ -n "$mac_dirty" ] && macaddr_canonicalize "$mac_dirty"
package/boot/uboot-mediatek/patches/453-add-openwrt-one.patch
+2 -1
View File
@@ -519,7 +519,7 @@
+_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title $ver"
--- /dev/null
+++ b/openwrt-one-spi-nand_env
@@ -0,0 +1,60 @@
@@ -0,0 +1,61 @@
+ethaddr_factory=mtd read factory 0x46000000 0x0 0x20000 && env readmem -b ethaddr 0x4600002a 0x6 ; setenv ethaddr_factory
+ipaddr=192.168.11.11
+serverip=192.168.11.23
@@ -561,6 +561,7 @@
+check_buttons=if button front ; then run boot_recovery ; run boot_tftp ; run led_loop_error ; else if button back ; then ; run usb_recover ; run led_loop_error ; fi ; fi
+led_boot=led green on ; led white on ; led red on
+led_done=led green on ; led white off ; led red off
+led_loop_done=led white off ; led green on ; echo done ; while true ; do sleep 1 ; done
+led_loop_error=led white off ; led green off ; while true ; do led red on ; sleep 1 ; led red off ; sleep 1 ; done
+led_start=led white on ; led green off ; led red off
+preboot=run led_boot
package/boot/uboot-mediatek/patches/460-add-routerich-ax3000.patch
+1 -1
View File
@@ -1,6 +1,6 @@
--- /dev/null
+++ b/configs/mt7981_routerich_ax3000_defconfig
@@ -0,0 +1,107 @@
@@ -0,0 +1,108 @@
+CONFIG_ARM=y
+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
+CONFIG_POSITION_INDEPENDENT=y
package/kernel/linux/modules/netdevices.mk
+17
View File
@@ -575,6 +575,23 @@ endef
$(eval $(call KernelPackage,dsa-b53-mdio))
define KernelPackage/dsa-mv88e6060
SUBMENU:=$(NETWORK_DEVICES_MENU)
TITLE:=Marvell MV88E6060 DSA Switch
DEPENDS:=+kmod-dsa +kmod-phy-marvell
KCONFIG:=CONFIG_NET_DSA_TAG_TRAILER \
CONFIG_NET_DSA_MV88E6060
FILES:= \
$(LINUX_DIR)/drivers/net/dsa/mv88e6060.ko \
$(LINUX_DIR)/net/dsa/tag_trailer.ko
AUTOLOAD:=$(call AutoLoad,41,mv88e6060,1)
endef
define KernelPackage/dsa-mv88e6060/description
Kernel modules for MV88E6060 DSA switches
endef
$(eval $(call KernelPackage,dsa-mv88e6060))
define KernelPackage/dsa-tag-dsa
SUBMENU:=$(NETWORK_DEVICES_MENU)
package/kernel/mac80211/patches/rt2x00/620-01-rt2x00-respect-rt2800-hardware-TX-queue-index.patch
+257
View File
@@ -0,0 +1,257 @@
From 654653e718f6c55c6f29fd94cc8152a92c8166ac Mon Sep 17 00:00:00 2001
From: Shiji Yang <yangshiji66@outlook.com>
Date: Tue, 24 Dec 2024 08:36:32 +0800
Subject: [PATCH 1/2] rt2x00: respect the rt2800 hardware TX queue index
The Ralink TX queue register index is different from the Linux
IEEE80211 queue id definition. Their conversion table is as follows:
Queue IEEE80211 Ralink
AC_VO 0 3
AC_VI 1 2
AC_BE 2 0
AC_BK 3 1
The TX queues are still functioning properly under the current
configuration. I don't have evidence, but I believe there should
be some differences in the internal hardware implementation of
different TX queues, e.g. interrupt priority. so it's better to
respect the queue index defined by the Ralink when we construct
the TX rings and descriptors.
And the more important thing is that we are using the wrong queue
index to calculate the register offset and mask in .conf_tx(),
which resulted in writing incorrect AIFSN, CWMAX, CWMIN and TXOP
values for all TX queues. This patch introduces a index conversion
table to fix these parameters.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
---
drivers/net/wireless/ralink/rt2x00/rt2800.h | 24 ++++++------
.../net/wireless/ralink/rt2x00/rt2800lib.c | 20 +++++++---
.../net/wireless/ralink/rt2x00/rt2800mmio.c | 38 ++++++++++---------
.../net/wireless/ralink/rt2x00/rt2x00queue.h | 20 ++++++++++
4 files changed, 67 insertions(+), 35 deletions(-)
--- a/drivers/net/wireless/ralink/rt2x00/rt2800.h
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h
@@ -379,10 +379,10 @@
/*
* WMM_AIFSN_CFG: Aifsn for each EDCA AC
- * AIFSN0: AC_VO
- * AIFSN1: AC_VI
- * AIFSN2: AC_BE
- * AIFSN3: AC_BK
+ * AIFSN0: AC_BE
+ * AIFSN1: AC_BK
+ * AIFSN2: AC_VI
+ * AIFSN3: AC_VO
*/
#define WMM_AIFSN_CFG 0x0214
#define WMM_AIFSN_CFG_AIFSN0 FIELD32(0x0000000f)
@@ -392,10 +392,10 @@
/*
* WMM_CWMIN_CSR: CWmin for each EDCA AC
- * CWMIN0: AC_VO
- * CWMIN1: AC_VI
- * CWMIN2: AC_BE
- * CWMIN3: AC_BK
+ * CWMIN0: AC_BE
+ * CWMIN1: AC_BK
+ * CWMIN2: AC_VI
+ * CWMIN3: AC_VO
*/
#define WMM_CWMIN_CFG 0x0218
#define WMM_CWMIN_CFG_CWMIN0 FIELD32(0x0000000f)
@@ -405,10 +405,10 @@
/*
* WMM_CWMAX_CSR: CWmax for each EDCA AC
- * CWMAX0: AC_VO
- * CWMAX1: AC_VI
- * CWMAX2: AC_BE
- * CWMAX3: AC_BK
+ * CWMAX0: AC_BE
+ * CWMAX1: AC_BK
+ * CWMAX2: AC_VI
+ * CWMAX3: AC_VO
*/
#define WMM_CWMAX_CFG 0x021c
#define WMM_CWMAX_CFG_CWMAX0 FIELD32(0x0000000f)
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -835,7 +835,8 @@ void rt2800_write_tx_data(struct queue_e
txdesc->key_idx : txdesc->u.ht.wcid);
rt2x00_set_field32(&word, TXWI_W1_MPDU_TOTAL_BYTE_COUNT,
txdesc->length);
- rt2x00_set_field32(&word, TXWI_W1_PACKETID_QUEUE, entry->queue->qid);
+ rt2x00_set_field32(&word, TXWI_W1_PACKETID_QUEUE,
+ rt2x00_ac_to_hwq(entry->queue->qid));
rt2x00_set_field32(&word, TXWI_W1_PACKETID_ENTRY, (entry->entry_idx % 3) + 1);
rt2x00_desc_write(txwi, 1, word);
@@ -1125,6 +1126,12 @@ void rt2800_txdone(struct rt2x00_dev *rt
u32 reg;
u8 qid;
bool match;
+ static const u8 rt2ac[] = {
+ IEEE80211_AC_BE,
+ IEEE80211_AC_BK,
+ IEEE80211_AC_VI,
+ IEEE80211_AC_VO,
+ };
while (quota-- > 0 && kfifo_get(&rt2x00dev->txstatus_fifo, &reg)) {
/*
@@ -1132,6 +1139,8 @@ void rt2800_txdone(struct rt2x00_dev *rt
* guaranteed to be one of the TX QIDs .
*/
qid = rt2x00_get_field32(reg, TX_STA_FIFO_PID_QUEUE);
+ /* Convert Ralink hardware queue index to IEEE80211 queue id. */
+ qid = rt2ac[qid];
queue = rt2x00queue_get_tx_queue(rt2x00dev, qid);
if (unlikely(rt2x00queue_empty(queue))) {
@@ -12188,8 +12197,9 @@ int rt2800_conf_tx(struct ieee80211_hw *
queue = rt2x00queue_get_tx_queue(rt2x00dev, queue_idx);
/* Update WMM TXOP register */
- offset = WMM_TXOP0_CFG + (sizeof(u32) * (!!(queue_idx & 2)));
- field.bit_offset = (queue_idx & 1) * 16;
+ offset = WMM_TXOP0_CFG +
+ (sizeof(u32) * (!!(rt2x00_ac_to_hwq(queue_idx) & 2)));
+ field.bit_offset = (rt2x00_ac_to_hwq(queue_idx) & 1) * 16;
field.bit_mask = 0xffff << field.bit_offset;
reg = rt2800_register_read(rt2x00dev, offset);
@@ -12197,7 +12207,7 @@ int rt2800_conf_tx(struct ieee80211_hw *
rt2800_register_write(rt2x00dev, offset, reg);
/* Update WMM registers */
- field.bit_offset = queue_idx * 4;
+ field.bit_offset = rt2x00_ac_to_hwq(queue_idx) * 4;
field.bit_mask = 0xf << field.bit_offset;
reg = rt2800_register_read(rt2x00dev, WMM_AIFSN_CFG);
@@ -12213,7 +12223,7 @@ int rt2800_conf_tx(struct ieee80211_hw *
rt2800_register_write(rt2x00dev, WMM_CWMAX_CFG, reg);
/* Update EDCA registers */
- offset = EDCA_AC0_CFG + (sizeof(u32) * queue_idx);
+ offset = EDCA_AC0_CFG + (sizeof(u32) * rt2x00_ac_to_hwq(queue_idx));
reg = rt2800_register_read(rt2x00dev, offset);
rt2x00_set_field32(&reg, EDCA_AC0_CFG_TX_OP, queue->txop);
--- a/drivers/net/wireless/ralink/rt2x00/rt2800mmio.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800mmio.c
@@ -35,7 +35,7 @@ unsigned int rt2800mmio_get_dma_done(str
case QID_AC_VI:
case QID_AC_BE:
case QID_AC_BK:
- qid = queue->qid;
+ qid = rt2x00_ac_to_hwq(queue->qid);
idx = rt2x00mmio_register_read(rt2x00dev, TX_DTX_IDX(qid));
break;
case QID_MGMT:
@@ -456,6 +456,7 @@ void rt2800mmio_kick_queue(struct data_q
{
struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
struct queue_entry *entry;
+ u8 qid;
switch (queue->qid) {
case QID_AC_VO:
@@ -464,7 +465,8 @@ void rt2800mmio_kick_queue(struct data_q
case QID_AC_BK:
WARN_ON_ONCE(rt2x00queue_empty(queue));
entry = rt2x00queue_get_entry(queue, Q_INDEX);
- rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX(queue->qid),
+ qid = rt2x00_ac_to_hwq(queue->qid);
+ rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX(qid),
entry->entry_idx);
hrtimer_start(&rt2x00dev->txstatus_timer,
TXSTATUS_TIMEOUT, HRTIMER_MODE_REL);
@@ -666,36 +668,36 @@ int rt2800mmio_init_queues(struct rt2x00
* Initialize registers.
*/
entry_priv = rt2x00dev->tx[0].entries[0].priv_data;
- rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR0,
+ rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR3,
entry_priv->desc_dma);
- rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT0,
+ rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT3,
rt2x00dev->tx[0].limit);
- rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX0, 0);
- rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX0, 0);
+ rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX3, 0);
+ rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX3, 0);
entry_priv = rt2x00dev->tx[1].entries[0].priv_data;
- rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR1,
+ rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR2,
entry_priv->desc_dma);
- rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT1,
+ rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT2,
rt2x00dev->tx[1].limit);
- rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX1, 0);
- rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX1, 0);
+ rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX2, 0);
+ rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX2, 0);
entry_priv = rt2x00dev->tx[2].entries[0].priv_data;
- rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR2,
+ rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR0,
entry_priv->desc_dma);
- rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT2,
+ rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT0,
rt2x00dev->tx[2].limit);
- rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX2, 0);
- rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX2, 0);
+ rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX0, 0);
+ rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX0, 0);
entry_priv = rt2x00dev->tx[3].entries[0].priv_data;
- rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR3,
+ rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR1,
entry_priv->desc_dma);
- rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT3,
+ rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT1,
rt2x00dev->tx[3].limit);
- rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX3, 0);
- rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX3, 0);
+ rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX1, 0);
+ rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX1, 0);
rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR4, 0);
rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT4, 0);
--- a/drivers/net/wireless/ralink/rt2x00/rt2x00queue.h
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00queue.h
@@ -57,6 +57,26 @@ enum data_queue_qid {
};
/**
+ * rt2x00_ac_to_hwq - Convert IEEE80211 queue id to Ralink hardware
+ * queue register index.
+ * @ac: TX queue id.
+ */
+static inline u8 rt2x00_ac_to_hwq(enum data_queue_qid ac)
+{
+ static const u8 ralink_queue_map[] = {
+ [IEEE80211_AC_BE] = 0,
+ [IEEE80211_AC_BK] = 1,
+ [IEEE80211_AC_VI] = 2,
+ [IEEE80211_AC_VO] = 3,
+ };
+
+ if (unlikely(ac >= IEEE80211_NUM_ACS))
+ return ac;
+
+ return ralink_queue_map[ac];
+}
+
+/**
* enum skb_frame_desc_flags: Flags for &struct skb_frame_desc
*
* @SKBDESC_DMA_MAPPED_RX: &skb_dma field has been mapped for RX
package/kernel/mac80211/patches/rt2x00/620-02-rt2x00-increase-the-watchdog-sampling-frequency.patch
+74
View File
@@ -0,0 +1,74 @@
From aec50d1a30349759de0ac535f54c3441bf7ebef7 Mon Sep 17 00:00:00 2001
From: Shiji Yang <yangshiji66@outlook.com>
Date: Sun, 22 Dec 2024 17:06:59 +0800
Subject: [PATCH 2/2] rt2x00: increase the watchdog sampling frequency
Increase the sampling frequency of the watchdog when the hung
counter reaches the threshold to avoid some unnecessary resets.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
---
.../net/wireless/ralink/rt2x00/rt2800lib.c | 45 +++++++++++++------
1 file changed, 32 insertions(+), 13 deletions(-)
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -1320,26 +1320,45 @@ static bool rt2800_watchdog_hung(struct
return true;
}
+static inline bool check_dma_busy_rx(u32 reg_cfg, u32 reg_int)
+{
+ return (rt2x00_get_field32(reg_cfg, WPDMA_GLO_CFG_RX_DMA_BUSY) &&
+ rt2x00_get_field32(reg_int, INT_SOURCE_CSR_RX_COHERENT));
+}
+
+static inline bool check_dma_busy_tx(u32 reg_cfg, u32 reg_int)
+{
+ return (rt2x00_get_field32(reg_cfg, WPDMA_GLO_CFG_TX_DMA_BUSY) &&
+ rt2x00_get_field32(reg_int, INT_SOURCE_CSR_TX_COHERENT));
+}
+
static bool rt2800_watchdog_dma_busy(struct rt2x00_dev *rt2x00dev)
{
bool busy_rx, busy_tx;
u32 reg_cfg = rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG);
u32 reg_int = rt2800_register_read(rt2x00dev, INT_SOURCE_CSR);
- if (rt2x00_get_field32(reg_cfg, WPDMA_GLO_CFG_RX_DMA_BUSY) &&
- rt2x00_get_field32(reg_int, INT_SOURCE_CSR_RX_COHERENT))
- rt2x00dev->rxdma_busy++;
- else
- rt2x00dev->rxdma_busy = 0;
-
- if (rt2x00_get_field32(reg_cfg, WPDMA_GLO_CFG_TX_DMA_BUSY) &&
- rt2x00_get_field32(reg_int, INT_SOURCE_CSR_TX_COHERENT))
- rt2x00dev->txdma_busy++;
- else
- rt2x00dev->txdma_busy = 0;
+ rt2x00dev->rxdma_busy = check_dma_busy_rx(reg_cfg, reg_int) ?
+ rt2x00dev->rxdma_busy + 1 : 0;
+ rt2x00dev->txdma_busy = check_dma_busy_tx(reg_cfg, reg_int) ?
+ rt2x00dev->txdma_busy + 1 : 0;
+
+ if (rt2x00dev->rxdma_busy > 25 || rt2x00dev->txdma_busy > 25) {
+ int cnt;
+ for (cnt = 0; cnt < 10; cnt++) {
+ msleep(5);
+ reg_cfg = rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG);
+ reg_int = rt2800_register_read(rt2x00dev, INT_SOURCE_CSR);
+
+ if (!check_dma_busy_rx(reg_cfg, reg_int))
+ rt2x00dev->rxdma_busy = 0;
+ if (!check_dma_busy_tx(reg_cfg, reg_int))
+ rt2x00dev->txdma_busy = 0;
+ }
+ }
- busy_rx = rt2x00dev->rxdma_busy > 30;
- busy_tx = rt2x00dev->txdma_busy > 30;
+ busy_rx = rt2x00dev->rxdma_busy > 40;
+ busy_tx = rt2x00dev->txdma_busy > 40;
if (!busy_rx && !busy_tx)
return false;
package/kernel/mac80211/patches/rt2x00/621-01-rt2x00-always-calibrate-MT7620-when-switching-channe.patch
+77
View File
@@ -0,0 +1,77 @@
From 2c5aad0f9990724cce48e0a53b66bc0438e4603d Mon Sep 17 00:00:00 2001
From: Shiji Yang <yangshiji66@outlook.com>
Date: Sun, 22 Dec 2024 17:06:59 +0800
Subject: [PATCH 1/4] rt2x00: always calibrate MT7620 when switching channel
Perform calibration work after each channel switching operation.
This should help improve the rx/tx signal strength for MT7620.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
---
.../net/wireless/ralink/rt2x00/rt2800lib.c | 24 ++++++++++++++-----
1 file changed, 18 insertions(+), 6 deletions(-)
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -5704,6 +5704,9 @@ static void rt2800_config_ps(struct rt2x
}
}
+static void rt2800_calibration_rt6352_stage1(struct rt2x00_dev *rt2x00dev);
+static void rt2800_calibration_rt6352_stage2(struct rt2x00_dev *rt2x00dev);
+
void rt2800_config(struct rt2x00_dev *rt2x00dev,
struct rt2x00lib_conf *libconf,
const unsigned int flags)
@@ -5718,10 +5721,18 @@ void rt2800_config(struct rt2x00_dev *rt
*/
rt2800_update_survey(rt2x00dev);
+ if (rt2x00_rt(rt2x00dev, RT6352) &&
+ !test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags))
+ rt2800_calibration_rt6352_stage1(rt2x00dev);
+
rt2800_config_channel(rt2x00dev, libconf->conf,
&libconf->rf, &libconf->channel);
rt2800_config_txpower(rt2x00dev, libconf->conf->chandef.chan,
libconf->conf->power_level);
+
+ if (rt2x00_rt(rt2x00dev, RT6352) &&
+ !test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags))
+ rt2800_calibration_rt6352_stage2(rt2x00dev);
}
if (flags & IEEE80211_CONF_CHANGE_POWER)
rt2800_config_txpower(rt2x00dev, libconf->conf->chandef.chan,
@@ -10427,15 +10438,19 @@ static void rt2800_restore_rf_bbp_rt6352
}
}
-static void rt2800_calibration_rt6352(struct rt2x00_dev *rt2x00dev)
+static void rt2800_calibration_rt6352_stage1(struct rt2x00_dev *rt2x00dev)
{
- u32 reg;
-
if (rt2x00_has_cap_external_pa(rt2x00dev) ||
rt2x00_has_cap_external_lna_bg(rt2x00dev))
rt2800_restore_rf_bbp_rt6352(rt2x00dev);
rt2800_r_calibration(rt2x00dev);
+}
+
+static void rt2800_calibration_rt6352_stage2(struct rt2x00_dev *rt2x00dev)
+{
+ u32 reg;
+
rt2800_rf_self_txdc_cal(rt2x00dev);
rt2800_rxdcoc_calibration(rt2x00dev);
rt2800_bw_filter_calibration(rt2x00dev, true);
@@ -10766,9 +10781,6 @@ static void rt2800_init_rfcsr_6352(struc
rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
-
- /* Do calibration and init PA/LNA */
- rt2800_calibration_rt6352(rt2x00dev);
}
static void rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
package/kernel/mac80211/patches/rt2x00/621-02-rt2x00-rework-link-tuner-for-MT7620.patch
+48
View File
@@ -0,0 +1,48 @@
From aaa57924324c1ee77afa5e3effc95cc86158ddcc Mon Sep 17 00:00:00 2001
From: Shiji Yang <yangshiji66@outlook.com>
Date: Sun, 22 Dec 2024 17:06:59 +0800
Subject: [PATCH 2/4] rt2x00: rework link tuner for MT7620
Correct the VGC gain value for MT7620 and only do gain calibration
for supported devices.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
---
drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -5561,6 +5561,9 @@ static void rt2800_config_txpower(struct
void rt2800_gain_calibration(struct rt2x00_dev *rt2x00dev)
{
+ if (rt2x00_rt(rt2x00dev, RT6352))
+ return;
+
rt2800_config_txpower(rt2x00dev, rt2x00dev->hw->conf.chandef.chan,
rt2x00dev->tx_power);
}
@@ -5773,9 +5776,10 @@ static u8 rt2800_get_default_vgc(struct
rt2x00_rt(rt2x00dev, RT3593) ||
rt2x00_rt(rt2x00dev, RT5390) ||
rt2x00_rt(rt2x00dev, RT5392) ||
- rt2x00_rt(rt2x00dev, RT5592) ||
- rt2x00_rt(rt2x00dev, RT6352))
+ rt2x00_rt(rt2x00dev, RT5592))
vgc = 0x1c + (2 * rt2x00dev->lna_gain);
+ else if(rt2x00_rt(rt2x00dev, RT6352))
+ vgc = 0x04 + (2 * rt2x00dev->lna_gain);
else
vgc = 0x2e + rt2x00dev->lna_gain;
} else { /* 5GHZ band */
@@ -5828,7 +5832,8 @@ void rt2800_link_tuner(struct rt2x00_dev
{
u8 vgc;
- if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C))
+ if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C) ||
+ rt2x00_rt(rt2x00dev, RT6352))
return;
/* When RSSI is better than a certain threshold, increase VGC
package/kernel/mac80211/patches/rt2x00/621-03-rt2x00-correct-MT7620-SDM-mode-register-value.patch
+25
View File
@@ -0,0 +1,25 @@
From b672507ca9f06bb17213036b16bc4f5c5bc65357 Mon Sep 17 00:00:00 2001
From: Shiji Yang <yangshiji66@outlook.com>
Date: Sun, 22 Dec 2024 17:06:59 +0800
Subject: [PATCH 3/4] rt2x00: correct MT7620 SDM mode register value
rt2x00_set_field8() is a mask writing function. If we want to set
the BIT(7) for the SDM mode register here, we only need to fill "4"
in the mask.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
---
drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -3848,7 +3848,7 @@ static void rt2800_config_channel_rf7620
/* Default: XO=20MHz , SDM mode */
rfcsr = rt2800_rfcsr_read(rt2x00dev, 16);
- rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 0x80);
+ rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 4);
rt2800_rfcsr_write(rt2x00dev, 16, rfcsr);
rfcsr = rt2800_rfcsr_read(rt2x00dev, 21);
package/kernel/mac80211/patches/rt2x00/621-04-rt2x00-fix-register-operation-on-RXIQ-calibration.patch
+60
View File
@@ -0,0 +1,60 @@
From 2585ada646e4dcf152ab813a24d667e6903105f4 Mon Sep 17 00:00:00 2001
From: Shiji Yang <yangshiji66@outlook.com>
Date: Sun, 22 Dec 2024 17:06:59 +0800
Subject: [PATCH 4/4] rt2x00: fix register operation on RXIQ calibration
In rt2800_rxiq_calibration(), some variables are overwritten
before being used. Based on the values of the relevant registers
in other functions, I believe the correct operation should be
bit mask writing.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
---
drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -8846,7 +8846,7 @@ static void rt2800_rxiq_calibration(stru
rt2x00_warn(rt2x00dev, "Timeout waiting for MAC status in RXIQ calibration\n");
bbpval = bbp4 & (~0x18);
- bbpval = bbp4 | 0x00;
+ bbpval = bbpval | 0x00;
rt2800_bbp_write(rt2x00dev, 4, bbpval);
bbpval = rt2800_bbp_read(rt2x00dev, 21);
@@ -8928,13 +8928,13 @@ static void rt2800_rxiq_calibration(stru
for (ch_idx = 0; ch_idx < 2; ch_idx = ch_idx + 1) {
if (ch_idx == 0) {
rfval = rfb0r1 & (~0x3);
- rfval = rfb0r1 | 0x1;
+ rfval = rfval | 0x1;
rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, rfval);
rfval = rfb0r2 & (~0x33);
- rfval = rfb0r2 | 0x11;
+ rfval = rfval | 0x11;
rt2800_rfcsr_write_bank(rt2x00dev, 0, 2, rfval);
rfval = rfb0r42 & (~0x50);
- rfval = rfb0r42 | 0x10;
+ rfval = rfval | 0x10;
rt2800_rfcsr_write_bank(rt2x00dev, 0, 42, rfval);
rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00001006);
@@ -8947,13 +8947,13 @@ static void rt2800_rxiq_calibration(stru
rt2800_bbp_dcoc_write(rt2x00dev, 1, 0x00);
} else {
rfval = rfb0r1 & (~0x3);
- rfval = rfb0r1 | 0x2;
+ rfval = rfval | 0x2;
rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, rfval);
rfval = rfb0r2 & (~0x33);
- rfval = rfb0r2 | 0x22;
+ rfval = rfval | 0x22;
rt2800_rfcsr_write_bank(rt2x00dev, 0, 2, rfval);
rfval = rfb0r42 & (~0x50);
- rfval = rfb0r42 | 0x40;
+ rfval = rfval | 0x40;
rt2800_rfcsr_write_bank(rt2x00dev, 0, 42, rfval);
rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00002006);
package/kernel/mac80211/patches/rt2x00/622-01-rt2x00-fix-RFCSR-register-init-values-for-RT5592.patch
+230
View File
@@ -0,0 +1,230 @@
From b48887d5de9921d0ff9e88068e3cd555a383d702 Mon Sep 17 00:00:00 2001
From: Shiji Yang <yangshiji66@outlook.com>
Date: Sun, 22 Dec 2024 17:06:59 +0800
Subject: [PATCH 1/2] rt2x00: fix RFCSR register init values for RT5592
Based on Raink proprietary driver 2.7.1.5, correct the initial
values of some RFCSR registers for RT5592.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
---
.../net/wireless/ralink/rt2x00/rt2800lib.c | 122 ++++++++----------
1 file changed, 53 insertions(+), 69 deletions(-)
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -3576,9 +3576,8 @@ static void rt2800_config_channel_rf55xx
/* TODO RF27 <- tssi */
- rfcsr = rf->channel <= 10 ? 0x07 : 0x06;
- rt2800_rfcsr_write(rt2x00dev, 23, rfcsr);
- rt2800_rfcsr_write(rt2x00dev, 59, rfcsr);
+ rt2800_rfcsr_write(rt2x00dev, 23, rf->channel <= 10 ? 0x08 : 0x07);
+ rt2800_rfcsr_write(rt2x00dev, 59, rf->channel <= 4 ? 0x06 : 0x04);
if (is_11b) {
/* CCK */
@@ -3599,7 +3598,7 @@ static void rt2800_config_channel_rf55xx
power_bound = POWER_BOUND;
ep_reg = 0x2;
} else {
- rt2800_rfcsr_write(rt2x00dev, 10, 0x97);
+ rt2800_rfcsr_write(rt2x00dev, 10, 0x95);
/* FIMXE: RF11 overwrite */
rt2800_rfcsr_write(rt2x00dev, 11, 0x40);
rt2800_rfcsr_write(rt2x00dev, 25, 0xBF);
@@ -3608,13 +3607,15 @@ static void rt2800_config_channel_rf55xx
rt2800_rfcsr_write(rt2x00dev, 37, 0x04);
rt2800_rfcsr_write(rt2x00dev, 38, 0x85);
rt2800_rfcsr_write(rt2x00dev, 40, 0x42);
- rt2800_rfcsr_write(rt2x00dev, 41, 0xBB);
+ rt2800_rfcsr_write(rt2x00dev, 41, 0xAB);
rt2800_rfcsr_write(rt2x00dev, 42, 0xD7);
- rt2800_rfcsr_write(rt2x00dev, 45, 0x41);
+ rt2800_rfcsr_write(rt2x00dev, 45, 0x01);
rt2800_rfcsr_write(rt2x00dev, 48, 0x00);
rt2800_rfcsr_write(rt2x00dev, 57, 0x77);
+ rt2800_rfcsr_write(rt2x00dev, 58, 0x19);
rt2800_rfcsr_write(rt2x00dev, 60, 0x05);
rt2800_rfcsr_write(rt2x00dev, 61, 0x01);
+ rt2800_rfcsr_write(rt2x00dev, 62, 0x19);
/* TODO RF27 <- tssi */
@@ -3623,82 +3624,59 @@ static void rt2800_config_channel_rf55xx
rt2800_rfcsr_write(rt2x00dev, 12, 0x2E);
rt2800_rfcsr_write(rt2x00dev, 13, 0x22);
rt2800_rfcsr_write(rt2x00dev, 22, 0x60);
- rt2800_rfcsr_write(rt2x00dev, 23, 0x7F);
- if (rf->channel <= 50)
- rt2800_rfcsr_write(rt2x00dev, 24, 0x09);
- else if (rf->channel >= 52)
- rt2800_rfcsr_write(rt2x00dev, 24, 0x07);
+ rt2800_rfcsr_write(rt2x00dev, 23, 0x7E);
+ rt2800_rfcsr_write(rt2x00dev, 24, 0x07);
rt2800_rfcsr_write(rt2x00dev, 39, 0x1C);
rt2800_rfcsr_write(rt2x00dev, 43, 0x5B);
- rt2800_rfcsr_write(rt2x00dev, 44, 0X40);
rt2800_rfcsr_write(rt2x00dev, 46, 0X00);
- rt2800_rfcsr_write(rt2x00dev, 51, 0xFE);
- rt2800_rfcsr_write(rt2x00dev, 52, 0x0C);
- rt2800_rfcsr_write(rt2x00dev, 54, 0xF8);
+ rt2800_rfcsr_write(rt2x00dev, 51, 0xFD);
+ rt2800_rfcsr_write(rt2x00dev, 52, 0x0E);
+ rt2800_rfcsr_write(rt2x00dev, 55, 0x04);
+ rt2800_rfcsr_write(rt2x00dev, 56, 0xBB);
+ rt2800_rfcsr_write(rt2x00dev, 59, 0x7C);
+
if (rf->channel <= 50) {
- rt2800_rfcsr_write(rt2x00dev, 55, 0x06),
- rt2800_rfcsr_write(rt2x00dev, 56, 0xD3);
+ rt2800_rfcsr_write(rt2x00dev, 44, 0X32);
+ rt2800_rfcsr_write(rt2x00dev, 54, 0xF9);
} else if (rf->channel >= 52) {
- rt2800_rfcsr_write(rt2x00dev, 55, 0x04);
- rt2800_rfcsr_write(rt2x00dev, 56, 0xBB);
+ rt2800_rfcsr_write(rt2x00dev, 44, 0X2A);
+ rt2800_rfcsr_write(rt2x00dev, 54, 0xF8);
}
-
- rt2800_rfcsr_write(rt2x00dev, 58, 0x15);
- rt2800_rfcsr_write(rt2x00dev, 59, 0x7F);
- rt2800_rfcsr_write(rt2x00dev, 62, 0x15);
-
} else if (rf->channel >= 100 && rf->channel <= 165) {
-
rt2800_rfcsr_write(rt2x00dev, 12, 0x0E);
rt2800_rfcsr_write(rt2x00dev, 13, 0x42);
rt2800_rfcsr_write(rt2x00dev, 22, 0x40);
- if (rf->channel <= 153) {
- rt2800_rfcsr_write(rt2x00dev, 23, 0x3C);
- rt2800_rfcsr_write(rt2x00dev, 24, 0x06);
- } else if (rf->channel >= 155) {
- rt2800_rfcsr_write(rt2x00dev, 23, 0x38);
- rt2800_rfcsr_write(rt2x00dev, 24, 0x05);
- }
+ rt2800_rfcsr_write(rt2x00dev, 52, 0x06);
+ rt2800_rfcsr_write(rt2x00dev, 55, 0x01);
+
if (rf->channel <= 138) {
+ rt2800_rfcsr_write(rt2x00dev, 23, 0x7C);
rt2800_rfcsr_write(rt2x00dev, 39, 0x1A);
rt2800_rfcsr_write(rt2x00dev, 43, 0x3B);
- rt2800_rfcsr_write(rt2x00dev, 44, 0x20);
rt2800_rfcsr_write(rt2x00dev, 46, 0x18);
- } else if (rf->channel >= 140) {
+ } else {
+ rt2800_rfcsr_write(rt2x00dev, 23, 0x78);
rt2800_rfcsr_write(rt2x00dev, 39, 0x18);
rt2800_rfcsr_write(rt2x00dev, 43, 0x1B);
- rt2800_rfcsr_write(rt2x00dev, 44, 0x10);
rt2800_rfcsr_write(rt2x00dev, 46, 0X08);
}
- if (rf->channel <= 124)
- rt2800_rfcsr_write(rt2x00dev, 51, 0xFC);
- else if (rf->channel >= 126)
- rt2800_rfcsr_write(rt2x00dev, 51, 0xEC);
- if (rf->channel <= 138)
- rt2800_rfcsr_write(rt2x00dev, 52, 0x06);
- else if (rf->channel >= 140)
- rt2800_rfcsr_write(rt2x00dev, 52, 0x06);
- rt2800_rfcsr_write(rt2x00dev, 54, 0xEB);
- if (rf->channel <= 138)
- rt2800_rfcsr_write(rt2x00dev, 55, 0x01);
- else if (rf->channel >= 140)
- rt2800_rfcsr_write(rt2x00dev, 55, 0x00);
- if (rf->channel <= 128)
- rt2800_rfcsr_write(rt2x00dev, 56, 0xBB);
- else if (rf->channel >= 130)
- rt2800_rfcsr_write(rt2x00dev, 56, 0xAB);
- if (rf->channel <= 116)
- rt2800_rfcsr_write(rt2x00dev, 58, 0x1D);
- else if (rf->channel >= 118)
- rt2800_rfcsr_write(rt2x00dev, 58, 0x15);
- if (rf->channel <= 138)
- rt2800_rfcsr_write(rt2x00dev, 59, 0x3F);
- else if (rf->channel >= 140)
- rt2800_rfcsr_write(rt2x00dev, 59, 0x7C);
- if (rf->channel <= 116)
- rt2800_rfcsr_write(rt2x00dev, 62, 0x1D);
- else if (rf->channel >= 118)
- rt2800_rfcsr_write(rt2x00dev, 62, 0x15);
+
+ if (rf->channel <= 114) {
+ rt2800_rfcsr_write(rt2x00dev, 24, 0x02);
+ rt2800_rfcsr_write(rt2x00dev, 44, 0x1A);
+ rt2800_rfcsr_write(rt2x00dev, 54, 0xEA);
+ rt2800_rfcsr_write(rt2x00dev, 56, 0xB3);
+ } else {
+ rt2800_rfcsr_write(rt2x00dev, 24, 0x03);
+ rt2800_rfcsr_write(rt2x00dev, 44, 0x0A);
+ rt2800_rfcsr_write(rt2x00dev, 54, 0xF9);
+ rt2800_rfcsr_write(rt2x00dev, 56, 0x9B);
+ }
+
+ rt2800_rfcsr_write(rt2x00dev, 51, rf->channel <= 124 ? 0xFC : 0xEC);
+ rt2800_rfcsr_write(rt2x00dev, 58, rf->channel <= 116 ? 0x1D : 0x15);
+ rfcsr = (rf->channel >= 116 && rf->channel <= 138) ? 0x7E : 0x7C;
+ rt2800_rfcsr_write(rt2x00dev, 59, rfcsr);
}
power_bound = POWER_BOUND_5G;
@@ -3710,7 +3688,7 @@ static void rt2800_config_channel_rf55xx
rt2x00_set_field8(&rfcsr, RFCSR49_TX, power_bound);
else
rt2x00_set_field8(&rfcsr, RFCSR49_TX, info->default_power1);
- if (is_type_ep)
+ if (!is_type_ep)
rt2x00_set_field8(&rfcsr, RFCSR49_EP, ep_reg);
rt2800_rfcsr_write(rt2x00dev, 49, rfcsr);
@@ -3719,7 +3697,7 @@ static void rt2800_config_channel_rf55xx
rt2x00_set_field8(&rfcsr, RFCSR50_TX, power_bound);
else
rt2x00_set_field8(&rfcsr, RFCSR50_TX, info->default_power2);
- if (is_type_ep)
+ if (!is_type_ep)
rt2x00_set_field8(&rfcsr, RFCSR50_EP, ep_reg);
rt2800_rfcsr_write(rt2x00dev, 50, rfcsr);
@@ -3740,7 +3718,6 @@ static void rt2800_config_channel_rf55xx
rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD, 0);
rt2800_rfcsr_write(rt2x00dev, 1, rfcsr);
- rt2800_rfcsr_write(rt2x00dev, 6, 0xe4);
if (conf_is_ht40(conf))
rt2800_rfcsr_write(rt2x00dev, 30, 0x16);
@@ -8505,12 +8482,15 @@ static void rt2800_init_rfcsr_5392(struc
static void rt2800_init_rfcsr_5592(struct rt2x00_dev *rt2x00dev)
{
+ u16 eeprom;
+
rt2800_rf_init_calibration(rt2x00dev, 30);
rt2800_rfcsr_write(rt2x00dev, 1, 0x3F);
+ rt2800_rfcsr_write(rt2x00dev, 2, 0x80);
rt2800_rfcsr_write(rt2x00dev, 3, 0x08);
rt2800_rfcsr_write(rt2x00dev, 5, 0x10);
- rt2800_rfcsr_write(rt2x00dev, 6, 0xE4);
+ rt2800_rfcsr_write(rt2x00dev, 6, 0xE0);
rt2800_rfcsr_write(rt2x00dev, 7, 0x00);
rt2800_rfcsr_write(rt2x00dev, 14, 0x00);
rt2800_rfcsr_write(rt2x00dev, 15, 0x00);
@@ -8526,9 +8506,13 @@ static void rt2800_init_rfcsr_5592(struc
rt2800_rfcsr_write(rt2x00dev, 34, 0x07);
rt2800_rfcsr_write(rt2x00dev, 35, 0x12);
rt2800_rfcsr_write(rt2x00dev, 47, 0x0C);
- rt2800_rfcsr_write(rt2x00dev, 53, 0x22);
+ rt2800_rfcsr_write(rt2x00dev, 53, 0x44);
rt2800_rfcsr_write(rt2x00dev, 63, 0x07);
+ eeprom = rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF2);
+ if (!rt2x00_get_field16(eeprom, EEPROM_NIC_CONF2_CRYSTAL))
+ rt2800_rfcsr_write(rt2x00dev, 6, 0xE4);
+
rt2800_rfcsr_write(rt2x00dev, 2, 0x80);
msleep(1);
package/kernel/mac80211/patches/rt2x00/622-02-rt2x00-fix-BBP-register-init-values-for-RT5592.patch
+119
View File
@@ -0,0 +1,119 @@
From 1847d817df5585f9d957d16ed2a56ceb41cf6df7 Mon Sep 17 00:00:00 2001
From: Shiji Yang <yangshiji66@outlook.com>
Date: Sun, 22 Dec 2024 17:06:59 +0800
Subject: [PATCH 2/2] rt2x00: fix BBP register init values for RT5592
Based on Raink proprietary driver 2.7.1.5, correct the initial
values of some BBP registers for RT5592.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
---
.../net/wireless/ralink/rt2x00/rt2800lib.c | 32 +++++++++----------
1 file changed, 15 insertions(+), 17 deletions(-)
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -3746,6 +3746,7 @@ static void rt2800_config_channel_rf55xx
rt2800_bbp_write(rt2x00dev, 80, (rf->channel <= 14) ? 0x0E : 0x08);
rt2800_bbp_write(rt2x00dev, 81, (rf->channel <= 14) ? 0x3A : 0x38);
rt2800_bbp_write(rt2x00dev, 82, (rf->channel <= 14) ? 0x62 : 0x92);
+ rt2800_bbp_write(rt2x00dev, 95, (rf->channel <= 14) ? 0x9A : 0x1A);
/* GLRT band configuration */
rt2800_bbp_write(rt2x00dev, 195, 128);
@@ -3758,7 +3759,7 @@ static void rt2800_config_channel_rf55xx
rt2800_bbp_write(rt2x00dev, 196, (rf->channel <= 14) ? 0x32 : 0x20);
rt2800_bbp_write(rt2x00dev, 195, 133);
rt2800_bbp_write(rt2x00dev, 196, (rf->channel <= 14) ? 0x28 : 0x7F);
- rt2800_bbp_write(rt2x00dev, 195, 124);
+ rt2800_bbp_write(rt2x00dev, 195, 134);
rt2800_bbp_write(rt2x00dev, 196, (rf->channel <= 14) ? 0x19 : 0x7F);
}
@@ -4304,7 +4305,8 @@ static void rt2800_config_channel(struct
rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
- if (rt2x00_rt(rt2x00dev, RT6352))
+ if (rt2x00_rt(rt2x00dev, RT5592) ||
+ rt2x00_rt(rt2x00dev, RT6352))
rt2800_bbp_write(rt2x00dev, 86, 0x38);
else
rt2800_bbp_write(rt2x00dev, 86, 0);
@@ -4313,6 +4315,7 @@ static void rt2800_config_channel(struct
if (rf->channel <= 14) {
if (!rt2x00_rt(rt2x00dev, RT5390) &&
!rt2x00_rt(rt2x00dev, RT5392) &&
+ !rt2x00_rt(rt2x00dev, RT5592) &&
!rt2x00_rt(rt2x00dev, RT6352)) {
if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
rt2800_bbp_write(rt2x00dev, 82, 0x62);
@@ -4336,17 +4339,20 @@ static void rt2800_config_channel(struct
else if (rt2x00_rt(rt2x00dev, RT3593) ||
rt2x00_rt(rt2x00dev, RT3883))
rt2800_bbp_write(rt2x00dev, 82, 0x82);
- else if (!rt2x00_rt(rt2x00dev, RT6352))
+ else if (!rt2x00_rt(rt2x00dev, RT5592) &&
+ !rt2x00_rt(rt2x00dev, RT6352))
rt2800_bbp_write(rt2x00dev, 82, 0xf2);
if (rt2x00_rt(rt2x00dev, RT3593) ||
rt2x00_rt(rt2x00dev, RT3883))
rt2800_bbp_write(rt2x00dev, 83, 0x9a);
- if (rt2x00_has_cap_external_lna_a(rt2x00dev))
- rt2800_bbp_write(rt2x00dev, 75, 0x46);
- else
- rt2800_bbp_write(rt2x00dev, 75, 0x50);
+ if (!rt2x00_rt(rt2x00dev, RT5592)) {
+ if (rt2x00_has_cap_external_lna_a(rt2x00dev))
+ rt2800_bbp_write(rt2x00dev, 75, 0x46);
+ else
+ rt2800_bbp_write(rt2x00dev, 75, 0x50);
+ }
}
reg = rt2800_register_read(rt2x00dev, TX_BAND_CFG);
@@ -5783,12 +5789,10 @@ static inline void rt2800_set_vgc(struct
if (rt2x00_rt(rt2x00dev, RT3572) ||
rt2x00_rt(rt2x00dev, RT3593) ||
rt2x00_rt(rt2x00dev, RT3883) ||
+ rt2x00_rt(rt2x00dev, RT5592) ||
rt2x00_rt(rt2x00dev, RT6352)) {
rt2800_bbp_write_with_rx_chain(rt2x00dev, 66,
vgc_level);
- } else if (rt2x00_rt(rt2x00dev, RT5592)) {
- rt2800_bbp_write(rt2x00dev, 83, qual->rssi > -65 ? 0x4a : 0x7a);
- rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, vgc_level);
} else {
rt2800_bbp_write(rt2x00dev, 66, vgc_level);
}
@@ -7016,7 +7020,6 @@ static void rt2800_init_bbp_5592(struct
rt2800_bbp_write(rt2x00dev, 88, 0x90);
rt2800_bbp_write(rt2x00dev, 91, 0x04);
rt2800_bbp_write(rt2x00dev, 92, 0x02);
- rt2800_bbp_write(rt2x00dev, 95, 0x9a);
rt2800_bbp_write(rt2x00dev, 98, 0x12);
rt2800_bbp_write(rt2x00dev, 103, 0xC0);
rt2800_bbp_write(rt2x00dev, 104, 0x92);
@@ -7027,6 +7030,7 @@ static void rt2800_init_bbp_5592(struct
rt2800_bbp_write(rt2x00dev, 134, 0xD0);
rt2800_bbp_write(rt2x00dev, 135, 0xF6);
rt2800_bbp_write(rt2x00dev, 137, 0x0F);
+ rt2800_bbp_write(rt2x00dev, 148, 0x84);
/* Initialize GLRT (Generalized Likehood Radio Test) */
rt2800_init_bbp_5592_glrt(rt2x00dev);
@@ -7051,12 +7055,6 @@ static void rt2800_init_bbp_5592(struct
rt2x00_set_field8(&value, BBP254_BIT7, 1);
rt2800_bbp_write(rt2x00dev, 254, value);
}
-
- rt2800_init_freq_calibration(rt2x00dev);
-
- rt2800_bbp_write(rt2x00dev, 84, 0x19);
- if (rt2x00_rt_rev_gte(rt2x00dev, RT5592, REV_RT5592C))
- rt2800_bbp_write(rt2x00dev, 103, 0xc0);
}
static void rt2800_init_bbp_6352(struct rt2x00_dev *rt2x00dev)
package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
+5 -5
View File
@@ -52,9 +52,9 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
static const unsigned int rt2800_eeprom_map[EEPROM_WORD_COUNT] = {
[EEPROM_CHIP_ID] = 0x0000,
[EEPROM_VERSION] = 0x0001,
@@ -10404,8 +10422,10 @@ static void rt2800_calibration_rt6352(st
u32 reg;
@@ -10428,8 +10446,10 @@ static void rt2800_restore_rf_bbp_rt6352
static void rt2800_calibration_rt6352_stage1(struct rt2x00_dev *rt2x00dev)
{
if (rt2x00_has_cap_external_pa(rt2x00dev) ||
- rt2x00_has_cap_external_lna_bg(rt2x00dev))
+ rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
@@ -63,8 +63,8 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+ }
rt2800_r_calibration(rt2x00dev);
rt2800_rf_self_txdc_cal(rt2x00dev);
@@ -10423,6 +10443,8 @@ static void rt2800_calibration_rt6352(st
}
@@ -10453,6 +10473,8 @@ static void rt2800_calibration_rt6352_st
!rt2x00_has_cap_external_lna_bg(rt2x00dev))
return;
package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
+17 -16
View File
@@ -14,13 +14,13 @@
*/
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -3836,14 +3836,16 @@ static void rt2800_config_channel_rf7620
@@ -3842,14 +3842,16 @@ static void rt2800_config_channel_rf7620
rt2x00_set_field8(&rfcsr, RFCSR19_K, rf->rf4);
rt2800_rfcsr_write(rt2x00dev, 19, rfcsr);
- /* Default: XO=20MHz , SDM mode */
- rfcsr = rt2800_rfcsr_read(rt2x00dev, 16);
- rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 0x80);
- rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 4);
- rt2800_rfcsr_write(rt2x00dev, 16, rfcsr);
-
- rfcsr = rt2800_rfcsr_read(rt2x00dev, 21);
@@ -29,7 +29,7 @@
+ if (rt2800_hw_get_chipver(rt2x00dev) > 1) {
+ /* Default: XO=20MHz , SDM mode */
+ rfcsr = rt2800_rfcsr_read(rt2x00dev, 16);
+ rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 0x80);
+ rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 4);
+ rt2800_rfcsr_write(rt2x00dev, 16, rfcsr);
+
+ rfcsr = rt2800_rfcsr_read(rt2x00dev, 21);
@@ -39,7 +39,7 @@
rfcsr = rt2800_rfcsr_read(rt2x00dev, 1);
rt2x00_set_field8(&rfcsr, RFCSR1_TX2_EN_MT7620,
@@ -3877,18 +3879,23 @@ static void rt2800_config_channel_rf7620
@@ -3883,18 +3885,23 @@ static void rt2800_config_channel_rf7620
rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x20);
}
@@ -73,7 +73,7 @@
if (!test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags)) {
if (conf_is_ht40(conf)) {
@@ -4002,25 +4009,29 @@ static void rt2800_config_alc_rt6352(str
@@ -4008,25 +4015,29 @@ static void rt2800_config_alc_rt6352(str
if (unlikely(rt2800_wait_bbp_rf_ready(rt2x00dev, MAC_STATUS_CFG_BBP_RF_BUSY)))
rt2x00_warn(rt2x00dev, "RF busy while configuring ALC\n");
@@ -121,7 +121,7 @@
rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, mac_sys_ctrl);
rt2800_vco_calibration(rt2x00dev);
@@ -4513,7 +4524,8 @@ static void rt2800_config_channel(struct
@@ -4524,7 +4535,8 @@ static void rt2800_config_channel(struct
if (rt2x00_rt(rt2x00dev, RT6352)) {
/* BBP for GLRT BW */
bbp = conf_is_ht40(conf) ?
@@ -131,7 +131,7 @@
0x15 : 0x1a;
rt2800_bbp_glrt_write(rt2x00dev, 141, bbp);
@@ -6017,18 +6029,33 @@ static int rt2800_init_registers(struct
@@ -6042,18 +6054,34 @@ static int rt2800_init_registers(struct
} else if (rt2x00_rt(rt2x00dev, RT5350)) {
rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
} else if (rt2x00_rt(rt2x00dev, RT6352)) {
@@ -162,7 +162,8 @@
+ rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000401);
+ rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x000C0001);
+ rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
+ rt2800_register_write(rt2x00dev, TX_ALC_VGA3, 0x00000000);
+ rt2800_register_write(rt2x00dev, TX_PIN_CFG, 0x00150f0f);
+ rt2800_register_write(rt2x00dev, TX_ALC_VGA3, 0x06060606);
+ rt2800_register_write(rt2x00dev, TX0_BB_GAIN_ATTEN, 0x0);
+ rt2800_register_write(rt2x00dev, TX1_BB_GAIN_ATTEN, 0x0);
+ rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN,
@@ -177,7 +178,7 @@
reg = rt2800_register_read(rt2x00dev, TX_ALC_CFG_1);
rt2x00_set_field32(&reg, TX_ALC_CFG_1_ROS_BUSY_EN, 0);
rt2800_register_write(rt2x00dev, TX_ALC_CFG_1, reg);
@@ -7141,14 +7168,16 @@ static void rt2800_init_bbp_6352(struct
@@ -7160,14 +7188,16 @@ static void rt2800_init_bbp_6352(struct
rt2800_bbp_write(rt2x00dev, 188, 0x00);
rt2800_bbp_write(rt2x00dev, 189, 0x00);
@@ -202,7 +203,7 @@
/* BBP for G band GLRT function (BBP_128 ~ BBP_221) */
rt2800_bbp_glrt_write(rt2x00dev, 0, 0x00);
@@ -10378,6 +10407,9 @@ static void rt2800_restore_rf_bbp_rt6352
@@ -10404,6 +10434,9 @@ static void rt2800_restore_rf_bbp_rt6352
rt2800_register_write(rt2x00dev, RF_BYPASS3, 0x0);
}
@@ -212,7 +213,7 @@
if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23);
@@ -10455,6 +10487,9 @@ static void rt2800_calibration_rt6352(st
@@ -10485,6 +10518,9 @@ static void rt2800_calibration_rt6352_st
rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
}
@@ -222,7 +223,7 @@
if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
@@ -10545,31 +10580,36 @@ static void rt2800_init_rfcsr_6352(struc
@@ -10575,31 +10611,36 @@ static void rt2800_init_rfcsr_6352(struc
rt2800_rfcsr_write(rt2x00dev, 42, 0x5B);
rt2800_rfcsr_write(rt2x00dev, 43, 0x00);
@@ -284,7 +285,7 @@
/* Initialize RF channel register to default value */
rt2800_rfcsr_write_chanreg(rt2x00dev, 0, 0x03);
@@ -10635,63 +10675,71 @@ static void rt2800_init_rfcsr_6352(struc
@@ -10665,63 +10706,71 @@ static void rt2800_init_rfcsr_6352(struc
rt2800_rfcsr_write_bank(rt2x00dev, 6, 45, 0xC5);
@@ -411,7 +412,7 @@
/* Initialize RF DC calibration register to default value */
rt2800_rfcsr_write_dccal(rt2x00dev, 0, 0x47);
@@ -10754,12 +10802,17 @@ static void rt2800_init_rfcsr_6352(struc
@@ -10784,12 +10833,17 @@ static void rt2800_init_rfcsr_6352(struc
rt2800_rfcsr_write_dccal(rt2x00dev, 62, 0x00);
rt2800_rfcsr_write_dccal(rt2x00dev, 63, 0x00);
@@ -431,6 +432,6 @@
+ rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
+ }
}
/* Do calibration and init PA/LNA */
rt2800_calibration_rt6352(rt2x00dev);
static void rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
package/kernel/mt76/Makefile
+3 -3
View File
@@ -8,9 +8,9 @@ PKG_LICENSE_FILES:=
PKG_SOURCE_URL:=https://github.com/openwrt/mt76
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2025-01-03
PKG_SOURCE_VERSION:=959a2d40007f502d9465b8aede79e761f875abd3
PKG_MIRROR_HASH:=a00a26a4685c053a639a95657804b09d0d4a1452744647871070beb6332b7c3a
PKG_SOURCE_DATE:=2025-01-04
PKG_SOURCE_VERSION:=e354436db4402552bcb0cbe9abab2a46fb1ad31c
PKG_MIRROR_HASH:=7e3894e1f2641e172f87be1ae0cc6adda318d989350ebd53500a7df02f0afd8f
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
PKG_USE_NINJA:=0
package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
+8
View File
@@ -1203,6 +1203,14 @@ drv_mac80211_setup() {
wdev_tool "$phy$phy_suffix" set_config "$(json_dump)" $active_ifnames
json_set_namespace "$prev"
[ -z "$phy_suffix" ] && {
if [ -n "$txpower" ]; then
iw phy "$phy" set txpower fixed "${txpower%%.*}00"
else
iw phy "$phy" set txpower auto
fi
}
for_each_interface "ap sta adhoc mesh monitor" mac80211_set_vif_txpower
wireless_set_up
}
target/linux/ath79/image/tiny-tp-link.mk
+1
View File
@@ -481,6 +481,7 @@ define Device/tplink_tl-wr941-v2
$(Device/tplink-4m)
SOC := ar9132
DEVICE_MODEL := TL-WR941ND
DEVICE_PACKAGES := kmod-dsa-mv88e6060
DEVICE_VARIANT := v2/v3
DEVICE_ALT0_VENDOR := TP-Link
DEVICE_ALT0_MODEL := TL-WR941N
target/linux/ath79/tiny/config-default
-3
View File
@@ -1,9 +1,6 @@
CONFIG_GRO_CELLS=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
CONFIG_NET_DEVLINK=y
CONFIG_NET_DSA=y
CONFIG_NET_DSA_MV88E6060=y
CONFIG_NET_DSA_TAG_TRAILER=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NVMEM_SYSFS=y
CONFIG_NVMEM_U_BOOT_ENV=y
target/linux/bcm27xx/bcm2712/config-6.6
+4 -4
View File
@@ -239,7 +239,7 @@ CONFIG_FB_DEVICE=y
CONFIG_FB_IOMEM_FOPS=y
CONFIG_FB_IOMEM_HELPERS=y
CONFIG_FB_SIMPLE=y
CONFIG_FIRMWARE_RP1=y
# CONFIG_FIRMWARE_RP1 is not set
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FONT_8x16=y
@@ -372,7 +372,7 @@ CONFIG_MAGIC_SYSRQ=y
CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1f6
CONFIG_MAILBOX=y
# CONFIG_MAILBOX_TEST is not set
CONFIG_MBOX_RP1=y
# CONFIG_MBOX_RP1 is not set
CONFIG_MDIO_BCM_UNIMAC=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
@@ -537,7 +537,7 @@ CONFIG_RESET_RASPBERRYPI=y
CONFIG_RESET_SIMPLE=y
CONFIG_RFS_ACCEL=y
CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
CONFIG_RP1_PIO=y
# CONFIG_RP1_PIO is not set
# CONFIG_RPI_POE_POWER is not set
CONFIG_RPS=y
CONFIG_RTC_CLASS=y
@@ -550,7 +550,7 @@ CONFIG_SCSI_COMMON=y
# CONFIG_SCSI_LOWLEVEL is not set
# CONFIG_SCSI_PROC_FS is not set
CONFIG_SENSORS_RASPBERRYPI_HWMON=y
CONFIG_SENSORS_RP1_ADC=y
# CONFIG_SENSORS_RP1_ADC is not set
CONFIG_SERIAL_8250_BCM2835AUX=y
CONFIG_SERIAL_8250_BCM7271=y
# CONFIG_SERIAL_8250_DMA is not set
target/linux/bcm27xx/modules/hwmon.mk
+17
View File
@@ -2,6 +2,23 @@
#
# Copyright (C) 2019 OpenWrt.org
define KernelPackage/rp1-adc
SUBMENU:=$(OTHER_MENU)
TITLE:=RP1 ADC and temperature sensor driver
KCONFIG:=CONFIG_SENSORS_RP1_ADC
FILES:=$(LINUX_DIR)/drivers/hwmon/rp1-adc.ko
AUTOLOAD:=$(call AutoLoad,21,rp1-adc)
DEPENDS:=@TARGET_bcm27xx_bcm2712
endef
define KernelPackage/rp1-adc/description
Kernel module for RP1 silicon providing ADC and
temperature monitoring.
endef
$(eval $(call KernelPackage,rp1-adc))
define KernelPackage/hwmon-raspberrypi
TITLE:=Raspberry Pi voltage monitor
KCONFIG:=CONFIG_SENSORS_RASPBERRYPI_HWMON
target/linux/bcm27xx/modules/other.mk
+51 -2
View File
@@ -55,13 +55,46 @@ endef
$(eval $(call KernelPackage,smi-bcm2835-dev))
define KernelPackage/rp1
SUBMENU:=$(OTHER_MENU)
TITLE:=RP1 firmware
KCONFIG:=CONFIG_FIRMWARE_RP1
FILES:=$(LINUX_DIR)/drivers/firmware/rp1.ko
AUTOLOAD:=$(call AutoLoad,21,rp1)
DEPENDS:=@TARGET_bcm27xx_bcm2712
endef
define KernelPackage/rp1/description
This driver provides a firmware interface to the RP1 processor using shared
memory and a mailbox.
endef
$(eval $(call KernelPackage,rp1))
define KernelPackage/rp1-pio
SUBMENU:=$(OTHER_MENU)
TITLE:=RP1 PIO block support
KCONFIG:=CONFIG_RP1_PIO
FILES:=$(LINUX_DIR)/drivers/misc/rp1-pio.ko
AUTOLOAD:=$(call AutoLoad,21,rp1-pio)
DEPENDS:=@TARGET_bcm27xx_bcm2712 +kmod-rp1
endef
define KernelPackage/rp1-pio/description
Driver providing control of the Raspberry Pi PIO block, as found in RP1
endef
$(eval $(call KernelPackage,rp1-pio))
define KernelPackage/pwm-pio-rp1
SUBMENU:=$(OTHER_MENU)
TITLE:=RP1 PWM support
KCONFIG:=CONFIG_PWM_PIO_RP1
FILES:=$(LINUX_DIR)/drivers/pwm/pwm-pio-rp1.ko
AUTOLOAD:=$(call AutoLoad,21,pwm-pio-rp1)
DEPENDS:=@TARGET_bcm27xx_bcm2712
DEPENDS:=@TARGET_bcm27xx_bcm2712 +kmod-rp1-pio
endef
define KernelPackage/pwm-pio-rp1/description
@@ -80,7 +113,7 @@ define KernelPackage/ws2812-pio-rp1
KCONFIG:=CONFIG_WS2812_PIO_RP1
FILES:=$(LINUX_DIR)/drivers/misc/ws2812-pio-rp1.ko
AUTOLOAD:=$(call AutoLoad,21,ws2812-pio-rp1)
DEPENDS:=@TARGET_bcm27xx_bcm2712
DEPENDS:=@TARGET_bcm27xx_bcm2712 +kmod-rp1-pio
endef
define KernelPackage/ws2812-pio-rp1/description
@@ -90,3 +123,19 @@ define KernelPackage/ws2812-pio-rp1/description
endef
$(eval $(call KernelPackage,ws2812-pio-rp1))
define KernelPackage/rp1-mailbox
SUBMENU:=$(OTHER_MENU)
TITLE:=RP1 mailbox IPC driver
KCONFIG:=CONFIG_MBOX_RP1
FILES:=$(LINUX_DIR)/drivers/mailbox/rp1-mailbox.ko
AUTOLOAD:=$(call AutoLoad,21,rp1-mailbox)
DEPENDS:=@TARGET_bcm27xx_bcm2712
endef
define KernelPackage/rp1-mailbox/description
This is a RP1 mailbox IPC driver.
endef
$(eval $(call KernelPackage,rp1-mailbox))
target/linux/bcm27xx/modules/video.mk
+1 -1
View File
@@ -156,7 +156,7 @@ define KernelPackage/drm-rp1-dpi
CONFIG_DRM_TTM_HELPER=n
FILES:=$(LINUX_DIR)/drivers/gpu/drm/rp1/rp1-dpi/drm-rp1-dpi.ko
AUTOLOAD:=$(call AutoLoad,67,drm-rp1-dpi)
DEPENDS:=@TARGET_bcm27xx_bcm2712 +kmod-drm-vc4
DEPENDS:=@TARGET_bcm27xx_bcm2712 +kmod-drm-vc4 +kmod-rp1-pio
endef
define KernelPackage/drm-rp1-dpi/description
target/linux/ixp4xx/config-6.6
-3
View File
@@ -168,9 +168,6 @@ CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_KUSER_HELPERS=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NET_DEVLINK=y
CONFIG_NET_DSA=y
CONFIG_NET_DSA_MV88E6060=y
CONFIG_NET_DSA_TAG_TRAILER=y
CONFIG_NET_EGRESS=y
CONFIG_NET_INGRESS=y
CONFIG_NET_PTP_CLASSIFY=y
target/linux/ixp4xx/image/Makefile
+1 -1
View File
@@ -128,7 +128,7 @@ define Device/usrobotics_usr8200
DEVICE_VENDOR := USRobotics
DEVICE_MODEL := USR8200
# USB2 is compiled in and needs no package
DEVICE_PACKAGES := ixp4xx-microcode-ethernet kmod-rtc-r7301 kmod-firewire kmod-firewire-ohci
DEVICE_PACKAGES := ixp4xx-microcode-ethernet kmod-rtc-r7301 kmod-firewire kmod-firewire-ohci kmod-dsa-mv88e6060
DEVICE_DTS := intel-ixp42x-usrobotics-usr8200
KERNEL := kernel-bin | append-dtb
IMAGES := kernel.bin rootfs.bin
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz5490.dtsi
+66
View File
@@ -46,6 +46,61 @@
phy9: ethernet-phy@9 {
reg = <0x09>;
};
switch@0 {
compatible = "qca,qca8334";
#address-cells = <1>;
#size-cells = <0>;
reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
reg = <0>;
dsa,member = <1 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
ethernet = <&rgmii0>;
phy-mode = "rgmii-txid";
tx-internal-delay-ps = <3000>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@2 {
reg = <2>;
label = "lan3";
phy-mode = "internal";
phy-handle = <&phy_port2>;
};
port@3 {
reg = <3>;
label = "lan4";
phy-mode = "internal";
phy-handle = <&phy_port3>;
};
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy_port2: phy@1 {
reg = <1>;
};
phy_port3: phy@2 {
reg = <2>;
};
};
};
};
&gswip_ports {
@@ -56,6 +111,17 @@
phy-handle = <&phy6>;
};
rgmii0: port@1 {
reg = <1>;
label = "sw0";
phy-mode = "rgmii";
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@2 {
reg = <2>;
label = "lan2";
target/linux/lantiq/image/vr9.mk
+2 -2
View File
@@ -177,7 +177,7 @@ define Device/avm_fritz5490
DEVICE_VARIANT := Other NAND
KERNEL_SIZE := 4096k
IMAGE_SIZE := 49152k
DEVICE_PACKAGES := kmod-usb3 fritz-tffs \
DEVICE_PACKAGES := kmod-dsa-qca8k kmod-phy-qca83xx kmod-usb3 fritz-tffs \
-ltq-vdsl-vr9-vectoring-fw-installer -kmod-ltq-vdsl-vr9-mei \
-kmod-ltq-vdsl-vr9 -kmod-ltq-atm-vr9 -kmod-ltq-ptm-vr9 \
-ltq-vdsl-vr9-app -kmod-owl-loader \
@@ -195,7 +195,7 @@ define Device/avm_fritz5490-micron
DEVICE_VARIANT := Micron NAND
KERNEL_SIZE := 4096k
IMAGE_SIZE := 49152k
DEVICE_PACKAGES := kmod-usb3 fritz-tffs \
DEVICE_PACKAGES := kmod-dsa-qca8k kmod-phy-qca83xx kmod-usb3 fritz-tffs \
-ltq-vdsl-vr9-vectoring-fw-installer -kmod-ltq-vdsl-vr9-mei \
-kmod-ltq-vdsl-vr9 -kmod-ltq-atm-vr9 -kmod-ltq-ptm-vr9 \
-ltq-vdsl-vr9-app -kmod-owl-loader \
target/linux/lantiq/xrx200/base-files/etc/board.d/02_network
+2 -4
View File
@@ -14,15 +14,13 @@ lantiq_setup_interfaces()
arcadyan,arv7519rw22)
ucidef_set_interface_lan "lan1 lan2 lan3 lan4 lan5"
;;
avm,fritz5490|\
avm,fritz5490-micron)
ucidef_set_interfaces_lan_wan "lan1 lan2" "wan"
;;
arcadyan,vgv7510kw22-brn|\
arcadyan,vgv7510kw22-nor|\
arcadyan,vgv7519-brn|\
arcadyan,vgv7519-nor|\
arcadyan,vrv9510kwac23|\
avm,fritz5490|\
avm,fritz5490-micron|\
bt,homehub-v5a|\
lantiq,easy80920-nand|\
lantiq,easy80920-nor|\
target/linux/mediatek/dts/mt7981b-cudy-ap3000-v1.dts
+218
View File
@@ -0,0 +1,218 @@
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/dts-v1/;
#include "mt7981.dtsi"
/ {
model = "Cudy AP3000 v1";
compatible = "cudy,ap3000-v1", "mediatek,mt7981";
aliases {
label-mac-device = &gmac0;
led-boot = &status_led;
led-failsafe = &status_led;
led-running = &status_led;
led-upgrade = &status_led;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
gpio-keys {
compatible = "gpio-keys";
button-reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
};
};
gpio-leds {
compatible = "gpio-leds";
led-0 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WLAN_2GHZ;
gpios = <&pio 4 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
led-1 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WLAN_5GHZ;
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
status_led: led-2 {
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 11 GPIO_ACTIVE_LOW>;
};
};
watchdog {
compatible = "linux,wdt-gpio";
gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
hw_algo = "level";
hw_margin_ms = <10000>;
always-running;
};
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&eth {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-handle = <&phy1>;
phy-mode = "2500base-x";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_bdinfo_de00 0>;
};
};
&mdio_bus {
phy1: phy@1 {
reg = <1>;
interrupt-parent = <&pio>;
interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
reset-assert-us = <100000>;
reset-deassert-us = <100000>;
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
/* ESMT F50L2G41XA (256M) */
spi_nand@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-buswidth = <4>;
spi-rx-buswidth = <4>;
spi-cal-enable;
spi-cal-mode = "read-data";
spi-cal-datalen = <7>;
spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4e 0x41 0x4e 0x44>;
spi-cal-addrlen = <5>;
spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bl2";
reg = <0x0 0x100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x100000 0x80000>;
};
partition@180000 {
label = "factory";
reg = <0x180000 0x200000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};
};
};
partition@380000 {
label = "bdinfo";
reg = <0x380000 0x40000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_bdinfo_de00: macaddr@de00 {
compatible = "mac-base";
reg = <0xde00 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@3C0000 {
label = "fip";
reg = <0x3C0000 0x200000>;
read-only;
};
partition@5C0000 {
label = "ubi";
reg = <0x5C0000 0x4000000>;
};
};
};
};
&wifi {
nvmem-cell-names = "eeprom";
nvmem-cells = <&eeprom_factory_0>;
status = "okay";
};
target/linux/mediatek/filogic/base-files/etc/board.d/02_network
+1
View File
@@ -78,6 +78,7 @@ mediatek_setup_interfaces()
ucidef_set_interfaces_lan_wan "lan1" eth1
;;
cudy,ap3000outdoor-v1|\
cudy,ap3000-v1|\
cudy,re3000-v1|\
netgear,wax220|\
ubnt,unifi-6-plus|\
target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
+3 -6
View File
@@ -68,14 +68,11 @@ case "$board" in
addr=$(mtd_get_mac_binary "Factory" 0x8000)
[ "$PHYNBR" = "1" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress
;;
cudy,tr3000-v1|\
cudy,re3000-v1)
addr=$(mtd_get_mac_binary bdinfo 0xde00)
[ "$PHYNBR" = "0" ] && echo "$addr" > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_setbit_la $(macaddr_add $addr 1) > /sys${DEVPATH}/macaddress
;;
cudy,ap3000outdoor-v1|\
cudy,ap3000-v1|\
cudy,m3000-v1|\
cudy,re3000-v1|\
cudy,tr3000-v1|\
cudy,wr3000s-v1|\
cudy,wr3000-v1)
addr=$(mtd_get_mac_binary bdinfo 0xde00)
target/linux/mediatek/filogic/base-files/etc/init.d/bootcount
-7
View File
@@ -5,13 +5,6 @@ START=99
boot() {
case $(board_name) in
dlink,aquila-pro-ai-m30-a1)
if grep -q bootpart=ubi0 /proc/cmdline; then
fw_setenv bootpart 0
else
fw_setenv bootpart 1
fi
;;
zyxel,ex5700-telenor)
fw_setenv uboot_bootcount 0
;;
target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
+1
View File
@@ -128,6 +128,7 @@ platform_do_upgrade() {
yuncore,ax835)
default_do_upgrade "$1"
;;
dlink,aquila-pro-ai-m30-a1|\
dlink,aquila-pro-ai-m60-a1)
fw_setenv sw_tryactive 0
nand_do_upgrade "$1"
target/linux/mediatek/image/filogic.mk
+17
View File
@@ -649,6 +649,23 @@ define Device/cudy_ap3000outdoor-v1
endef
TARGET_DEVICES += cudy_ap3000outdoor-v1
define Device/cudy_ap3000-v1
DEVICE_VENDOR := Cudy
DEVICE_MODEL := AP3000
DEVICE_VARIANT := v1
DEVICE_DTS := mt7981b-cudy-ap3000-v1
DEVICE_DTS_DIR := ../dts
SUPPORTED_DEVICES += R49
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k
PAGESIZE := 2048
IMAGE_SIZE := 65536k
KERNEL_IN_UBI := 1
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware
endef
TARGET_DEVICES += cudy_ap3000-v1
define Device/cudy_m3000-v1
DEVICE_VENDOR := Cudy
DEVICE_MODEL := M3000
target/linux/mediatek/image/mt7622.mk
+1 -1
View File
@@ -123,7 +123,7 @@ define Device/buffalo_wsr
buffalo-enc $$(DEVICE_MODEL) $$(BUFFALO_TAG_VERSION) -l | \
buffalo-tag-dhp $$(DEVICE_MODEL) JP JP | buffalo-enc-tag -l | buffalo-dhp-image
IMAGE/factory-uboot.bin := append-ubi | \
buffalo-trx $$$$(BUFFALO_TRX_MAGIC) $$$$@ $(KDIR)/ubi_mark
buffalo-trx $$$$(BUFFALO_TRX_MAGIC) $$$$@ $(KDIR)/ubi_mark | append-metadata
IMAGE/sysupgrade.bin := \
buffalo-trx $$$$(BUFFALO_TRX_MAGIC) $(KDIR)/tmp/$$(DEVICE_NAME).null | \
sysupgrade-tar kernel=$$$$@ | append-metadata
target/linux/ramips/dts/mt7620a.dtsi
+1 -1
View File
@@ -540,7 +540,7 @@
interrupt-parent = <&intc>;
interrupts = <14>;
max-frequency = <48000000>;
max-frequency = <24000000>;
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&sdhci_pins>;
target/linux/ramips/dts/mt7620a_hiwifi_hc5861.dts
-4
View File
@@ -108,10 +108,6 @@
};
};
&sdhci {
max-frequency = <24000000>;
};
&wmac {
pinctrl-names = "default", "pa_gpio";
pinctrl-0 = <&pa_pins>;
target/linux/ramips/dts/mt7628an.dtsi
+1 -1
View File
@@ -394,7 +394,7 @@
interrupt-parent = <&intc>;
interrupts = <14>;
max-frequency = <48000000>;
max-frequency = <24000000>;
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&sdxc_pins>;
target/linux/ramips/dts/mt7628an_hiwifi_hc5661a.dts
+19 -1
View File
@@ -1,3 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7628an_hiwifi_hc5x61a.dtsi"
/ {
@@ -25,9 +27,25 @@
};
};
&pinctrl {
ephy-analog;
sdxc_router_mode: sdxc_router_mode {
groups = "esd", "gpio", "i2c", "sdmode", "uart1";
function = "gpio";
};
};
&sdhci {
status = "okay";
pinctrl-0 = <&sdxc_router_mode>;
pinctrl-1 = <&sdxc_router_mode>;
};
&state_default {
gpio {
groups = "i2c", "refclk", "wdt", "wled_an";
groups = "i2s", "refclk", "wdt", "wled_an";
function = "gpio";
};
};
target/linux/ramips/dts/mt7628an_hiwifi_hc5761a.dts
+17 -1
View File
@@ -44,9 +44,25 @@
};
};
&pinctrl {
ephy-analog;
sdxc_router_mode: sdxc_router_mode {
groups = "esd", "gpio", "i2c", "sdmode", "uart1";
function = "gpio";
};
};
&sdhci {
status = "okay";
pinctrl-0 = <&sdxc_router_mode>;
pinctrl-1 = <&sdxc_router_mode>;
};
&state_default {
gpio {
groups = "i2c", "refclk", "wdt", "p2led_an", "p3led_an", "wled_an";
groups = "i2s", "refclk", "wdt", "p2led_an", "p3led_an", "wled_an";
function = "gpio";
};
};
target/linux/ramips/dts/mt7628an_mediatek_linkit-smart-7688.dts
+19
View File
@@ -168,8 +168,27 @@
nvmem-cell-names = "mac-address";
};
&pinctrl {
ephy-digital;
sdxc_iot_mode: sdxc_iot_mode {
esd {
groups = "esd";
function = "iot";
};
sdxc {
groups = "sdmode";
function = "sdxc";
};
};
};
&sdhci {
status = "okay";
pinctrl-0 = <&sdxc_iot_mode>;
pinctrl-1 = <&sdxc_iot_mode>;
cd-inverted;
};
target/linux/ramips/dts/mt7628an_onion_omega2.dtsi
+19
View File
@@ -170,8 +170,27 @@
nvmem-cell-names = "mac-address";
};
&pinctrl {
ephy-digital;
sdxc_iot_mode: sdxc_iot_mode {
esd {
groups = "esd";
function = "iot";
};
sdxc {
groups = "sdmode";
function = "sdxc";
};
};
};
&sdhci {
status = "okay";
pinctrl-0 = <&sdxc_iot_mode>;
pinctrl-1 = <&sdxc_iot_mode>;
};
&wmac {
target/linux/ramips/dts/mt7628an_ravpower_rp-wd009.dts
+19
View File
@@ -84,6 +84,22 @@
};
};
&pinctrl {
ephy-digital;
sdxc_iot_mode: sdxc_iot_mode {
esd {
groups = "esd";
function = "iot";
};
sdxc {
groups = "sdmode";
function = "sdxc";
};
};
};
&state_default {
gpio {
groups = "uart1", "wled_an", "p0led_an", "p2led_an", "p3led_an",
@@ -94,6 +110,9 @@
&sdhci {
status = "okay";
pinctrl-0 = <&sdxc_iot_mode>;
pinctrl-1 = <&sdxc_iot_mode>;
};
&i2c {
target/linux/ramips/dts/mt7628an_vocore_vocore2.dtsi
+23
View File
@@ -68,6 +68,22 @@
};
};
&pinctrl {
ephy-digital;
sdxc_iot_mode: sdxc_iot_mode {
esd {
groups = "esd";
function = "iot";
};
sdxc {
groups = "sdmode";
function = "sdxc";
};
};
};
&state_default {
gpio {
groups = "wled_an", "refclk", "wdt";
@@ -75,6 +91,13 @@
};
};
&sdhci {
status = "okay";
pinctrl-0 = <&sdxc_iot_mode>;
pinctrl-1 = <&sdxc_iot_mode>;
};
&wmac {
status = "okay";
target/linux/ramips/files/drivers/mmc/host/mtk-mmc/sd.c
-6
View File
@@ -2210,12 +2210,6 @@ static int msdc_drv_probe(struct platform_device *pdev)
struct msdc_hw *hw;
int ret;
//FIXME: this should be done by pinconf and not by the sd driver
if ((ralink_soc == MT762X_SOC_MT7688 ||
ralink_soc == MT762X_SOC_MT7628AN) &&
(!(rt_sysc_r32(0x60) & BIT(15))))
rt_sysc_m32(0xf << 17, 0xf << 17, 0x3c);
hw = &msdc0_hw;
if (of_property_read_bool(pdev->dev.of_node, "mtk,wp-en"))
target/linux/ramips/image/mt76x8.mk
+2 -1
View File
@@ -290,6 +290,7 @@ define Device/hiwifi_hc5661a
IMAGE_SIZE := 15808k
DEVICE_VENDOR := HiWiFi
DEVICE_MODEL := HC5661A
DEVICE_PACKAGES := kmod-mmc-mtk
SUPPORTED_DEVICES += hc5661a
endef
TARGET_DEVICES += hiwifi_hc5661a
@@ -298,7 +299,7 @@ define Device/hiwifi_hc5761a
IMAGE_SIZE := 15808k
DEVICE_VENDOR := HiWiFi
DEVICE_MODEL := HC5761A
DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci
DEVICE_PACKAGES := kmod-mmc-mtk kmod-mt76x0e kmod-usb2 kmod-usb-ohci
endef
TARGET_DEVICES += hiwifi_hc5761a
target/linux/ramips/modules.mk
+1
View File
@@ -47,6 +47,7 @@ $(eval $(call KernelPackage,pwm-mediatek-ramips))
define KernelPackage/sdhci-mt7620
SUBMENU:=Other modules
TITLE:=MT7620 SDCI
CONFLICTS:=kmod-mmc-mtk
DEPENDS:=@(TARGET_ramips_mt7620||TARGET_ramips_mt76x8||TARGET_ramips_mt7621) +kmod-mmc
KCONFIG:= \
CONFIG_MTK_MMC \
target/linux/ramips/patches-6.6/831-mmc-mtk-sd-initialize-pad-delay-and-drive-strength.patch
+44 -9
View File
@@ -4,6 +4,8 @@ Subject: [PATCH] mmc: mtk-sd: initialize the pad and tune registers
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
---
drivers/mmc/host/mtk-sd.c | 26 +++++++++++++++++++++++---
1 file changed, 23 insertions(+), 3 deletions(-)
--- a/drivers/mmc/host/mtk-sd.c
+++ b/drivers/mmc/host/mtk-sd.c
@@ -20,19 +22,52 @@ Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
#define PAD_DS_TUNE 0x188
#define PAD_CMD_TUNE 0x18c
#define EMMC51_CFG0 0x204
@@ -1795,6 +1799,16 @@ static void msdc_init_hw(struct msdc_hos
@@ -400,6 +404,7 @@ struct mtk_mmc_compatible {
bool enhance_rx;
bool support_64g;
bool use_internal_cd;
+ bool legacy_mt762x; /* for mt7620, mt7621 and mt76x8 */
};
struct msdc_tune_para {
@@ -537,6 +542,7 @@ static const struct mtk_mmc_compatible m
.stop_clk_fix = false,
.enhance_rx = false,
.use_internal_cd = true,
+ .legacy_mt762x = true,
};
static const struct mtk_mmc_compatible mt7622_compat = {
@@ -1729,9 +1735,11 @@ static void msdc_init_hw(struct msdc_hos
}
writel(0, host->base + MSDC_IOCON);
sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_DDLSEL, 0);
- writel(0x403c0046, host->base + MSDC_PATCH_BIT);
- sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1);
- writel(0xffff4089, host->base + MSDC_PATCH_BIT1);
+ if(!host->dev_comp->legacy_mt762x) {
+ writel(0x403c0046, host->base + MSDC_PATCH_BIT);
+ sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1);
+ writel(0xffff4089, host->base + MSDC_PATCH_BIT1);
+ }
sdr_set_bits(host->base + EMMC50_CFG0, EMMC50_CFG_CFCSTS_SEL);
if (host->dev_comp->stop_clk_fix) {
@@ -1795,6 +1803,18 @@ static void msdc_init_hw(struct msdc_hos
MSDC_PAD_TUNE_RXDLYSEL);
}
+ /* Set pins drive strength */
+ writel(0x000d0044, host->base + MSDC_PAD_CTRL0);
+ writel(0x000e0044, host->base + MSDC_PAD_CTRL1);
+ writel(0x000e0044, host->base + MSDC_PAD_CTRL2);
+ if (host->dev_comp->legacy_mt762x) {
+ /* Set pins drive strength */
+ writel(0x000d0044, host->base + MSDC_PAD_CTRL0);
+ writel(0x000e0044, host->base + MSDC_PAD_CTRL1);
+ writel(0x000e0044, host->base + MSDC_PAD_CTRL2);
+
+ /* Set pad delay */
+ writel(0x84101010, host->base + MSDC_PAD_TUNE);
+ writel(0x10101010, host->base + MSDC_PAD_TUNE0);
+ writel(0x10101010, host->base + MSDC_PAD_TUNE1);
+ /* Set pad delay */
+ writel(0x84101010, host->base + MSDC_PAD_TUNE);
+ writel(0x10101010, host->base + MSDC_PAD_TUNE0);
+ writel(0x10101010, host->base + MSDC_PAD_TUNE1);
+ }
+
if (mmc->caps2 & MMC_CAP2_NO_SDIO) {
sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_SDIO);
target/linux/realtek/Makefile
-5
View File
@@ -20,13 +20,8 @@ include $(INCLUDE_DIR)/target.mk
DEFAULT_PACKAGES += \
ethtool \
firewall4 \
ip-bridge \
ip-full \
kmod-gpio-button-hotplug \
kmod-nft-offload \
nftables \
odhcp6c \
tc-bpf \
uboot-envtools \