uboot-rockchip: improve adc download key support

Restore support for RK3576/RK3588 and enter dnl mode in SPL.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
2026-06-04 10:58:41 +08:00
parent 4a72a24023
commit 848e65f0ff
5 changed files with 160 additions and 14 deletions
@@ -0,0 +1,146 @@
From: Chris Morgan <macroalpha82@gmail.com>
To: u-boot@lists.denx.de
Cc: andre.przywara@arm.com, kever.yang@rock-chips.com,
philipp.tomsich@vrull.eu, sjg@chromium.org, jagan@edgeble.ai,
jonas@kwiboo.se, Chris Morgan <macromorgan@hotmail.com>
Subject: [PATCH V4 3/7] rockchip: boot_mode: Allow rockchip_dnl_key_pressed() in SPL
Date: Tue, 2 Jan 2024 09:46:50 -0600 [thread overview]
Message-ID: <20240102154654.191055-4-macroalpha82@gmail.com> (raw)
In-Reply-To: <20240102154654.191055-1-macroalpha82@gmail.com>
From: Chris Morgan <macromorgan@hotmail.com>
Update the rockchip_dnl_key_pressed() so that it can run in
SPL. Also change the ADC channel to a define that can be
overridden by a board specific option.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
---
arch/arm/mach-rockchip/Makefile | 4 ++--
arch/arm/mach-rockchip/boot_mode.c | 11 ++++++++++-
2 files changed, 12 insertions(+), 3 deletions(-)
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -58,6 +58,10 @@ static void rockchip_reset_to_dnl_mode(v
#define KEY_DOWN_MIN_VAL 0
#define KEY_DOWN_MAX_VAL 30
+#ifndef RK_DNL_ADC_CHAN
+#define RK_DNL_ADC_CHAN 1
+#endif
+
__weak int rockchip_dnl_key_pressed(void)
{
#if CONFIG_IS_ENABLED(ADC)
@@ -73,7 +77,8 @@ __weak int rockchip_dnl_key_pressed(void
ret = -ENODEV;
uclass_foreach_dev(dev, uc) {
if (!strncmp(dev->name, "saradc", 6)) {
- ret = adc_channel_single_shot(dev->name, 1, &val);
+ ret = adc_channel_single_shot(dev->name,
+ RK_DNL_ADC_CHAN, &val);
break;
}
}
@@ -105,10 +110,12 @@ void show_boot_progress(int val)
static void rockchip_dnl_mode_check(void)
{
+#if CONFIG_IS_ENABLED(ADC)
if (rockchip_dnl_key_pressed()) {
puts("download key pressed, ");
rockchip_reset_to_dnl_mode();
}
+#endif
}
int setup_boot_mode(void)
@@ -121,6 +128,7 @@ int setup_boot_mode(void)
boot_mode = readl(reg);
debug("%s: boot mode 0x%08x\n", __func__, boot_mode);
+#if !defined(CONFIG_XPL_BUILD)
/* Clear boot mode */
writel(BOOT_NORMAL, reg);
@@ -134,6 +142,7 @@ int setup_boot_mode(void)
env_set("preboot", "setenv preboot; ums mmc 0");
break;
}
+#endif
return 0;
}
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -8,6 +8,7 @@
#include <dm.h>
#include <misc.h>
#include <asm/armv8/mmu.h>
+#include <asm/arch-rockchip/boot_mode.h>
#include <asm/arch-rockchip/bootrom.h>
#include <asm/arch-rockchip/grf_rk3568.h>
#include <asm/arch-rockchip/hardware.h>
@@ -143,6 +144,13 @@ int arch_cpu_init(void)
return 0;
}
+#ifdef CONFIG_SPL_BUILD
+void __weak spl_board_init(void)
+{
+ setup_boot_mode();
+}
+#endif
+
#define RK3568_OTP_CPU_CODE_OFFSET 0x02
#define RK3568_OTP_SPECIFICATION_OFFSET 0x07
#define RK3568_OTP_PERFORMANCE_OFFSET 0x22
--- a/arch/arm/mach-rockchip/rk3576/rk3576.c
+++ b/arch/arm/mach-rockchip/rk3576/rk3576.c
@@ -8,6 +8,7 @@
#include <dm.h>
#include <misc.h>
#include <asm/armv8/mmu.h>
+#include <asm/arch-rockchip/boot_mode.h>
#include <asm/arch-rockchip/bootrom.h>
#include <asm/arch-rockchip/hardware.h>
@@ -189,6 +190,13 @@ int arch_cpu_init(void)
return 0;
}
+#ifdef CONFIG_SPL_BUILD
+void __weak spl_board_init(void)
+{
+ setup_boot_mode();
+}
+#endif
+
#define RK3576_OTP_CPU_CODE_OFFSET 0x02
#define RK3576_OTP_SPECIFICATION_OFFSET 0x08
--- a/arch/arm/mach-rockchip/rk3588/rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
@@ -10,6 +10,7 @@
#include <misc.h>
#include <spl.h>
#include <asm/armv8/mmu.h>
+#include <asm/arch-rockchip/boot_mode.h>
#include <asm/arch-rockchip/bootrom.h>
#include <asm/arch-rockchip/grf_rk3588.h>
#include <asm/arch-rockchip/hardware.h>
@@ -211,6 +212,13 @@ int arch_cpu_init(void)
}
#endif
+#ifdef CONFIG_SPL_BUILD
+void __weak spl_board_init(void)
+{
+ setup_boot_mode();
+}
+#endif
+
#define RK3588_OTP_CPU_CODE_OFFSET 0x02
#define RK3588_OTP_SPECIFICATION_OFFSET 0x06
@@ -1,11 +0,0 @@
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -73,7 +73,7 @@ __weak int rockchip_dnl_key_pressed(void
ret = -ENODEV;
uclass_foreach_dev(dev, uc) {
if (!strncmp(dev->name, "saradc", 6)) {
- ret = adc_channel_single_shot(dev->name, 1, &val);
+ ret = adc_channel_single_shot(dev->name, 0, &val);
break;
}
}
@@ -0,0 +1,11 @@
--- a/include/configs/rk3568_common.h
+++ b/include/configs/rk3568_common.h
@@ -15,6 +15,8 @@
#define CFG_SYS_SDRAM_BASE 0
#define SDRAM_MAX_SIZE 0xf0000000
+#define RK_DNL_ADC_CHAN 0
+
#ifndef ROCKCHIP_DEVICE_SETTINGS
#define ROCKCHIP_DEVICE_SETTINGS
#endif
@@ -27,7 +27,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
#include <misc.h>
#include <spl.h>
#include <asm/armv8/mmu.h>
@@ -213,6 +214,15 @@ int arch_cpu_init(void)
@@ -221,6 +222,15 @@ void __weak spl_board_init(void)
#define RK3588_OTP_CPU_CODE_OFFSET 0x02
#define RK3588_OTP_SPECIFICATION_OFFSET 0x06
@@ -43,7 +43,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
int checkboard(void)
{
@@ -258,3 +268,199 @@ int checkboard(void)
@@ -266,3 +276,199 @@ int checkboard(void)
return 0;
}
@@ -1,6 +1,6 @@
--- a/arch/arm/mach-rockchip/rk3588/rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
@@ -355,9 +355,11 @@ int ft_system_setup(void *blob, struct b
@@ -363,9 +363,11 @@ int ft_system_setup(void *blob, struct b
if (ip_state[0] & FAIL_CPU_CLUSTER2)
ip_state[0] |= FAIL_CPU_CLUSTER2;