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qualcommax: ipq50xx: convert to UNIPHY PCS and DWMAC stack

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Convert to UNIPHY PCS and DWMAC ethernet stack from qca-ssdk.

Since we are not using SSDK anymore, we dont need to patch in the UNIPHY
clock names anymore so drop the patch.

Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22381
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
George Moussalem
2026-07-11 22:26:44 +02:00
committed by Robert Marko
parent 79443bf6c9
commit af17ab0a3f
22 changed files with 180 additions and 456 deletions
Download Patch File Download Diff File Expand all files Collapse all files
target/linux/qualcommax/dts/ipq5018-ax6000.dts
+16 -30
View File
@@ -12,7 +12,7 @@
compatible = "xiaomi,ax6000", "qcom,ipq5018";
aliases {
label-mac-device = &dp1;
label-mac-device = &gmac0;
led-boot = &led_system_blue;
led-failsafe = &led_system_yellow;
led-running = &led_system_blue;
@@ -225,11 +225,11 @@
#address-cells = <1>;
#size-cells = <1>;
mac_addr_dp1: macaddr@0 {
mac_addr_gmac0: macaddr@0 {
reg = <0x0 0x6>;
};
mac_addr_dp2: macaddr@6 {
mac_addr_gmac1: macaddr@6 {
reg = <0x6 0x6>;
};
@@ -292,45 +292,31 @@
* =================================================================
*/
&switch {
&uniphy0 {
status = "okay";
switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
qcom,port_phyinfo {
// MAC0 -> GE Phy --- MDI --- QCA8337 Switch
port@1 {
port_id = <1>;
mdiobus = <&mdio0>;
phy_address = <7>;
phy_dac = <0x10 0x10>;
};
// MAC1 -> Uniphy --- SGMII --- QCA8081
port@2 {
port_id = <2>;
mdiobus = <&mdio1>;
phy_address = <8>;
port_mac_sel = "QGMAC_PORT";
};
};
assigned-clocks = <&uniphy0 UNIPHY_CLK_REF>;
assigned-clock-rates = <UNIPHY_REFCLK_50MHZ>;
};
// MAC0 -> GE Phy
&dp1 {
&gmac0 {
status = "okay";
nvmem-cells = <&mac_addr_dp1 0>;
nvmem-cells = <&mac_addr_gmac0 0>;
nvmem-cell-names = "mac-address";
};
// MAC1 ---SGMII---> QCA8081
&dp2 {
// MAC1 --- SGMII+ ---> QCA8081
&gmac1 {
status = "okay";
label = "wan";
phy-handle = <&qca8081>;
nvmem-cells = <&mac_addr_dp2 0>;
phy-mode = "2500base-x";
label = "wan";
nvmem-cells = <&mac_addr_gmac1 0>;
nvmem-cell-names = "mac-address";
};
@@ -455,7 +441,7 @@
reg = <4>;
phy-handle = <&qca8337_3>;
phy-mode = "gmii";
ethernet = <&dp1>;
ethernet = <&gmac0>;
};
};
};
target/linux/qualcommax/dts/ipq5018-ax830.dts
+11 -24
View File
@@ -75,45 +75,32 @@
};
};
&switch {
&uniphy0 {
status = "okay";
switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
qcom,port_phyinfo {
// MAC0 -> GE Phy
port@1 {
port_id = <1>;
mdiobus = <&mdio0>;
phy_address = <7>;
};
// MAC1 -> Uniphy --- SGMII --- QCA8081
port@2 {
port_id = <2>;
mdiobus = <&mdio1>;
phy_address = <28>;
port_mac_sel = "QGMAC_PORT";
};
};
assigned-clocks = <&uniphy0 UNIPHY_CLK_REF>;
assigned-clock-rates = <UNIPHY_REFCLK_50MHZ>;
};
// MAC0 -> GE Phy
&dp1 {
&gmac0 {
status = "okay";
label = "lan";
nvmem-cells = <&hw_mac_addr 0>;
nvmem-cell-names = "mac-address";
phy-mode = "sgmii";
};
// MAC1 ---SGMII---> QCA8081
&dp2 {
// MAC1 --- SGMII+ ---> QCA8081
&gmac1 {
status = "okay";
label = "wan";
phy-handle = <&qca8081>;
phy-mode = "2500base-x";
label = "wan";
nvmem-cells = <&hw_mac_addr 1>;
nvmem-cell-names = "mac-address";
};
target/linux/qualcommax/dts/ipq5018-ax850.dts
+10 -23
View File
@@ -74,45 +74,32 @@
};
};
&switch {
&uniphy0 {
status = "okay";
switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
qcom,port_phyinfo {
// MAC0 -> GE Phy
port@1 {
port_id = <1>;
mdiobus = <&mdio0>;
phy_address = <7>;
};
// MAC1 -> Uniphy --- SGMII --- QCA8081
port@2 {
port_id = <2>;
mdiobus = <&mdio1>;
phy_address = <28>;
port_mac_sel = "QGMAC_PORT";
};
};
assigned-clocks = <&uniphy0 UNIPHY_CLK_REF>;
assigned-clock-rates = <UNIPHY_REFCLK_50MHZ>;
};
// MAC0 -> GE Phy
&dp1 {
&gmac0 {
status = "okay";
label = "lan";
nvmem-cells = <&hw_mac_addr 0>;
nvmem-cell-names = "mac-address";
phy-mode = "sgmii";
};
// MAC1 ---SGMII---> QCA8081
&dp2 {
&gmac1 {
status = "okay";
label = "wan";
phy-handle = <&qca8081>;
phy-mode = "2500base-x";
label = "wan";
nvmem-cells = <&hw_mac_addr 1>;
nvmem-cell-names = "mac-address";
};
target/linux/qualcommax/dts/ipq5018-gl-b3000.dts
+14 -25
View File
@@ -13,8 +13,8 @@
compatible = "glinet,gl-b3000", "qcom,ipq5018";
aliases {
ethernet1 = &dp2;
label-mac-device = &dp2;
ethernet1 = &gmac1;
label-mac-device = &gmac1;
led-boot = &led_system_blue;
led-failsafe = &led_status_white;
led-running = &led_status_white;
@@ -58,31 +58,20 @@
};
};
&switch {
&uniphy0 {
status = "okay";
switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
qcom,port_phyinfo {
// MAC0 -> GE Phy -> QCA8337 Phy2
port@1 {
port_id = <1>;
mdiobus = <&mdio0>;
phy_address = <7>;
};
// MAC1 ---SGMII---> QCA8337 SerDes
port@2 {
port_id = <2>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
assigned-clocks = <&uniphy0 UNIPHY_CLK_REF>;
assigned-clock-rates = <UNIPHY_REFCLK_25MHZ>;
};
// MAC1 ---SGMII---> QCA8337 SerDes
&dp2 {
&gmac1 {
status = "okay";
nvmem-cells = <&macaddr_dp2 0>;
phy-mode = "sgmii";
nvmem-cells = <&macaddr_gmac1 0>;
nvmem-cell-names = "mac-address";
fixed-link {
@@ -131,7 +120,7 @@
reg = <0>;
label = "cpu";
phy-mode = "sgmii";
ethernet = <&dp2>;
ethernet = <&gmac1>;
qca,sgmii-enable-pll;
fixed-link {
@@ -153,7 +142,7 @@
label = "lan1";
phy-handle = <&qca8337_1>;
nvmem-cells = <&macaddr_dp2 2>;
nvmem-cells = <&macaddr_gmac1 2>;
nvmem-cell-names = "mac-address";
};
@@ -163,7 +152,7 @@
label = "lan2";
phy-handle = <&qca8337_2>;
nvmem-cells = <&macaddr_dp2 2>;
nvmem-cells = <&macaddr_gmac1 2>;
nvmem-cell-names = "mac-address";
};
};
@@ -228,7 +217,7 @@
#address-cells = <1>;
#size-cells = <1>;
macaddr_dp2: macaddr@0 {
macaddr_gmac1: macaddr@0 {
compatible = "mac-base";
#nvmem-cell-cells = <1>;
reg = <0x6 0x6>;
target/linux/qualcommax/dts/ipq5018-mr3000d-ci.dts
+9 -23
View File
@@ -15,7 +15,7 @@
compatible = "cmcc,mr3000d-ci", "qcom,ipq5018";
aliases {
label-mac-device = <&dp1>;
label-mac-device = <&gmac1>;
led-boot = &led_status_red;
led-failsafe = &led_status_green;
@@ -178,31 +178,15 @@
* ===============================================================
*/
&switch {
&uniphy0 {
status = "okay";
switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
qcom,port_phyinfo {
// MAC0 -> GE Phy -> QCA8337 Phy4
port@1 {
port_id = <1>;
mdiobus = <&mdio0>;
phy_address = <7>;
};
// MAC1 ---SGMII---> QCA8337 SerDes
port@2 {
port_id = <2>;
mdiobus = <&mdio1>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
assigned-clocks = <&uniphy0 UNIPHY_CLK_REF>;
assigned-clock-rates = <UNIPHY_REFCLK_25MHZ>;
};
// MAC0 -> GE Phy
&dp1 {
&gmac0 {
status = "okay";
nvmem-cell-names = "mac-address";
@@ -210,9 +194,11 @@
};
// MAC1 -> SGMII
&dp2 {
&gmac1 {
status = "okay";
phy-mode = "sgmii";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_art_6 (0)>;
@@ -304,7 +290,7 @@
port@6 {
reg = <6>;
phy-mode = "sgmii";
ethernet = <&dp2>;
ethernet = <&gmac1>;
qca,sgmii-enable-pll;
fixed-link {
target/linux/qualcommax/dts/ipq5018-mr5500.dts
+8 -20
View File
@@ -1,6 +1,7 @@
/dts-v1/;
#include "ipq5018.dtsi"
#include "ipq5018-ess.dtsi"
#include "ipq5018-mx-base.dtsi"
/ {
@@ -48,32 +49,19 @@
* ===============================================================
*/
&switch {
&uniphy0 {
status = "okay";
switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
qcom,port_phyinfo {
// MAC0 -> GE Phy
port@1 {
port_id = <1>;
mdiobus = <&mdio0>;
phy_address = <7>;
};
// MAC1 ---SGMII---> QCA8337 SerDes
port@2 {
port_id = <2>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
assigned-clocks = <&uniphy0 UNIPHY_CLK_REF>;
assigned-clock-rates = <UNIPHY_REFCLK_25MHZ>;
};
// MAC1 ---SGMII---> QCA8337 SerDes
&dp2 {
&gmac1 {
status = "okay";
phy-mode = "sgmii";
nvmem-cells = <&hw_mac_addr 0>;
nvmem-cell-names = "mac-address";
@@ -238,7 +226,7 @@
reg = <6>;
label = "cpu";
phy-mode = "sgmii";
ethernet = <&dp2>;
ethernet = <&gmac1>;
qca,sgmii-enable-pll;
fixed-link {
target/linux/qualcommax/dts/ipq5018-mx-base.dtsi
-1
View File
@@ -1,5 +1,4 @@
#include "ipq5018.dtsi"
#include "ipq5018-ess.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
target/linux/qualcommax/dts/ipq5018-mx2000.dts
+8 -20
View File
@@ -1,6 +1,7 @@
/dts-v1/;
#include "ipq5018.dtsi"
#include "ipq5018-ess.dtsi"
#include "ipq5018-mx-base.dtsi"
#include "ipq5018-qcn6122.dtsi"
@@ -29,32 +30,19 @@
* ===============================================================
*/
&switch {
&uniphy0 {
status = "okay";
switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
qcom,port_phyinfo {
// MAC0 -> GE Phy -> QCA8337 Phy4
port@1 {
port_id = <1>;
mdiobus = <&mdio0>;
phy_address = <7>;
};
// MAC1 ---SGMII---> QCA8337 SerDes
port@2 {
port_id = <2>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
assigned-clocks = <&uniphy0 UNIPHY_CLK_REF>;
assigned-clock-rates = <UNIPHY_REFCLK_25MHZ>;
};
// MAC1 ---SGMII---> QCA8337 SerDes
&dp2 {
&gmac1 {
status = "okay";
phy-mode = "sgmii";
nvmem-cells = <&hw_mac_addr 0>;
nvmem-cell-names = "mac-address";
@@ -139,7 +127,7 @@
reg = <6>;
label = "cpu";
phy-mode = "sgmii";
ethernet = <&dp2>;
ethernet = <&gmac1>;
qca,sgmii-enable-pll;
fixed-link {
target/linux/qualcommax/dts/ipq5018-mx5500.dts
+9 -21
View File
@@ -1,6 +1,7 @@
/dts-v1/;
#include "ipq5018.dtsi"
#include "ipq5018-ess.dtsi"
#include "ipq5018-mx-base.dtsi"
/ {
@@ -13,7 +14,7 @@
};
aliases {
label-mac-device = &dp2;
label-mac-device = &gmac1;
};
};
@@ -32,32 +33,19 @@
* ===============================================================
*/
&switch {
&uniphy0 {
status = "okay";
switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
qcom,port_phyinfo {
// MAC0 -> GE Phy -> QCA8337 Phy4
port@1 {
port_id = <1>;
mdiobus = <&mdio0>;
phy_address = <7>;
};
// MAC1 ---SGMII---> QCA8337 SerDes
port@2 {
port_id = <2>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
assigned-clocks = <&uniphy0 UNIPHY_CLK_REF>;
assigned-clock-rates = <UNIPHY_REFCLK_25MHZ>;
};
// MAC1 ---SGMII---> QCA8337 SerDes
&dp2 {
&gmac1 {
status = "okay";
phy-mode = "sgmii";
nvmem-cells = <&hw_mac_addr 0>;
nvmem-cell-names = "mac-address";
@@ -142,7 +130,7 @@
reg = <6>;
label = "cpu";
phy-mode = "sgmii";
ethernet = <&dp2>;
ethernet = <&gmac1>;
qca,sgmii-enable-pll;
fixed-link {
target/linux/qualcommax/dts/ipq5018-mx6200.dts
+13 -26
View File
@@ -1,6 +1,7 @@
/dts-v1/;
#include "ipq5018.dtsi"
#include "ipq5018-ess.dtsi"
#include "ipq5018-mx-base.dtsi"
#include "ipq5018-qcn6122.dtsi"
@@ -32,45 +33,31 @@
* =================================================================
*/
&switch {
&uniphy0 {
status = "okay";
switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
qcom,port_phyinfo {
// MAC0 -> GE Phy -> MDI --> RJ45
port@1 {
port_id = <1>;
mdiobus = <&mdio0>;
phy_address = <7>;
};
// MAC1 ---SGMII---> MaxLinear PHY -> RJ45
port@2 {
port_id = <2>;
mdiobus = <&mdio1>;
phy_address = <15>;
port_mac_sel = "QGMAC_PORT";
};
};
assigned-clocks = <&uniphy0 UNIPHY_CLK_REF>;
assigned-clock-rates = <UNIPHY_REFCLK_50MHZ>;
};
// MAC0 ---MDI---> IPQ5018 GE PHY
&dp1 {
&gmac0 {
status = "okay";
label = "lan";
phy-handle = <&ge_phy>;
nvmem-cells = <&hw_mac_addr 1>;
nvmem-cell-names = "mac-address";
};
// MAC1 ---SGMII---> MXL Phy
&dp2 {
// MAC1 ---SGMII---> QCA8337 SerDes
&gmac1 {
status = "okay";
label = "wan";
phy-handle = <&gpy115c>;
phy-mode = "sgmii";
label = "wan";
nvmem-cells = <&hw_mac_addr 0>;
nvmem-cell-names = "mac-address";
};
@@ -89,7 +76,7 @@
// Maxlinear Ethernet GPY115C
gpy115c: ethernet-phy@f {
compatible = "ethernet-phy-id67c9.df10";
reg = <15>;
reg = <0xf>;
};
};
target/linux/qualcommax/dts/ipq5018-pz-l8.dts
+10 -24
View File
@@ -20,7 +20,7 @@
led-failsafe = &led_lan;
led-running = &led_wan;
led-upgrade = &led_lan;
label-mac-device = <&dp1>;
label-mac-device = <&gmac0>;
};
chosen {
@@ -136,31 +136,15 @@
};
};
&switch {
&uniphy0 {
status = "okay";
switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
qcom,port_phyinfo {
// MAC0 -> GE Phy --- MDI --- QCA8337 Phy4(Port5)
port@1 {
port_id = <1>;
mdiobus = <&mdio0>;
phy_address = <7>;
};
// MAC1 -> Uniphy --- SGMII --- QCA8337 SerDes(Port6)
port@2 {
port_id = <2>;
mdiobus = <&mdio1>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
assigned-clocks = <&uniphy0 UNIPHY_CLK_REF>;
assigned-clock-rates = <UNIPHY_REFCLK_25MHZ>;
};
// MAC0 -> GE Phy
&dp1 {
&gmac0 {
status = "okay";
nvmem-cells = <&hw_mac_addr 0>;
@@ -168,9 +152,11 @@
};
// MAC1 -> SGMII
&dp2 {
&gmac1 {
status = "okay";
phy-mode = "sgmii";
nvmem-cells = <&hw_mac_addr 1>;
nvmem-cell-names = "mac-address";
@@ -235,7 +221,7 @@
port@0 {
reg = <0>;
phy-mode = "sgmii";
ethernet = <&dp2>;
ethernet = <&gmac1>;
qca,sgmii-enable-pll;
fixed-link {
@@ -272,7 +258,7 @@
reg = <5>;
phy-handle = <&qca8337_4>;
phy-mode = "gmii";
ethernet = <&dp1>;
ethernet = <&gmac0>;
};
};
};
target/linux/qualcommax/dts/ipq5018-redmi-ax5400.dts
+15 -29
View File
@@ -12,7 +12,7 @@
compatible = "xiaomi,redmi-ax5400", "qcom,ipq5018";
aliases {
label-mac-device = &dp1;
label-mac-device = &gmac0;
led-boot = &led_system_blue;
led-failsafe = &led_system_yellow;
led-running = &led_system_blue;
@@ -222,11 +222,11 @@
#address-cells = <1>;
#size-cells = <1>;
mac_addr_dp2: macaddr@0 {
mac_addr_gmac1: macaddr@0 {
reg = <0x0 0x6>;
};
mac_addr_dp1: macaddr@6 {
mac_addr_gmac0: macaddr@6 {
reg = <0x6 0x6>;
};
};
@@ -281,42 +281,28 @@
* =================================================================
*/
&switch {
&uniphy0 {
status = "okay";
switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
qcom,port_phyinfo {
// MAC0 -> GE Phy --- MDI --- QCA8337 PHY4
port@1 {
port_id = <1>;
mdiobus = <&mdio0>;
phy_address = <7>;
phy_dac = <0x10 0x10>;
};
// MAC1 -> Uniphy --- SGMII --- QCA8337 MAC6
port@2 {
port_id = <2>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
assigned-clocks = <&uniphy0 UNIPHY_CLK_REF>;
assigned-clock-rates = <UNIPHY_REFCLK_25MHZ>;
};
// MAC0 -> GE Phy
&dp1 {
&gmac0 {
status = "okay";
nvmem-cells = <&mac_addr_dp1 0>;
nvmem-cells = <&mac_addr_gmac0 0>;
nvmem-cell-names = "mac-address";
};
// MAC1 ---SGMII---> QCA8337
&dp2 {
&gmac1 {
status = "okay";
nvmem-cells = <&mac_addr_dp2 0>;
phy-mode = "sgmii";
nvmem-cells = <&mac_addr_gmac1 0>;
nvmem-cell-names = "mac-address";
fixed-link {
@@ -380,7 +366,7 @@
label = "wan";
phy-handle = <&qca8337_0>;
nvmem-cells = <&mac_addr_dp1 0>;
nvmem-cells = <&mac_addr_gmac0 0>;
nvmem-cell-names = "mac-address";
};
@@ -406,13 +392,13 @@
reg = <5>;
phy-handle = <&qca8337_4>;
phy-mode = "gmii";
ethernet = <&dp1>;
ethernet = <&gmac0>;
};
port@6 {
reg = <6>;
phy-mode = "sgmii";
ethernet = <&dp2>;
ethernet = <&gmac1>;
qca,sgmii-enable-pll;
fixed-link {
target/linux/qualcommax/dts/ipq5018-scr50axe.dts
+11 -20
View File
@@ -15,7 +15,7 @@
compatible ="zyxel,scr50axe", "qcom,ipq5018";
aliases {
label-mac-device = &dp2;
label-mac-device = &gmac1;
led-boot = &led_power_blue;
led-failsafe = &led_power_red;
led-upgrade = &led_power_green;
@@ -134,36 +134,27 @@
};
};
&switch {
&uniphy0 {
status = "okay";
switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
qcom,port_phyinfo {
port@1 {
port_id = <1>;
mdiobus = <&mdio0>;
phy_address = <7>;
};
port@2 {
port_id = <2>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
assigned-clocks = <&uniphy0 UNIPHY_CLK_REF>;
assigned-clock-rates = <UNIPHY_REFCLK_25MHZ>;
};
&dp1 {
&gmac0 {
status = "okay";
label = "wan";
nvmem-cells = <&macaddr_appsblenv_ethaddr 0>;
nvmem-cell-names = "mac-address";
};
&dp2 {
&gmac1 {
status = "okay";
phy-mode = "sgmii";
nvmem-cells = <&macaddr_appsblenv_ethaddr (-4)>;
nvmem-cell-names = "mac-address";
@@ -236,7 +227,7 @@
port@6 {
reg = <6>;
phy-mode = "sgmii";
ethernet = <&dp2>;
ethernet = <&gmac1>;
qca,sgmii-enable-pll;
fixed-link {
target/linux/qualcommax/dts/ipq5018-spnmx56.dts
+12 -26
View File
@@ -1,6 +1,7 @@
/dts-v1/;
#include "ipq5018.dtsi"
#include "ipq5018-ess.dtsi"
#include "ipq5018-mx-base.dtsi"
/ {
@@ -31,44 +32,29 @@
* =================================================================
*/
&switch {
&uniphy0 {
status = "okay";
switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
qcom,port_phyinfo {
// MAC0 -> GE Phy --- MDI --- QCA8337 Switch
port@1 {
port_id = <1>;
mdiobus = <&mdio0>;
phy_address = <7>;
phy_dac = <0x10 0x10>;
};
// MAC1 -> Uniphy --- SGMII --- QCA8081
port@2 {
port_id = <2>;
mdiobus = <&mdio1>;
phy_address = <28>;
port_mac_sel = "QGMAC_PORT";
};
};
assigned-clocks = <&uniphy0 UNIPHY_CLK_REF>;
assigned-clock-rates = <UNIPHY_REFCLK_50MHZ>;
};
// MAC0 -> GE Phy
&dp1 {
&gmac0 {
status = "okay";
nvmem-cells = <&hw_mac_addr 0>;
nvmem-cell-names = "mac-address";
};
// MAC1 ---SGMII---> QCA8081
&dp2 {
// MAC1 ---SGMII---> QCA8337 SerDes
&gmac1 {
status = "okay";
label = "wan";
phy-handle = <&qca8081>;
phy-mode = "2500base-x";
label = "wan";
nvmem-cells = <&hw_mac_addr 0>;
nvmem-cell-names = "mac-address";
};
@@ -155,7 +141,7 @@
reg = <5>;
phy-handle = <&qca8337_4>;
phy-mode = "gmii";
ethernet = <&dp1>;
ethernet = <&gmac0>;
};
};
};
target/linux/qualcommax/dts/ipq5018-wn-dax3000gr.dts
+10 -20
View File
@@ -19,7 +19,7 @@
led-boot = &led_status_green;
led-failsafe = &led_status_red;
led-upgrade = &led_status_green;
label-mac-device = <&dp1>;
label-mac-device = <&gmac0>;
};
chosen {
@@ -186,37 +186,27 @@
};
};
&switch {
&uniphy0 {
status = "okay";
switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
qcom,port_phyinfo {
port@1 {
port_id = <1>;
mdiobus = <&mdio0>;
phy_address = <7>;
};
port@2 {
port_id = <2>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
assigned-clocks = <&uniphy0 UNIPHY_CLK_REF>;
assigned-clock-rates = <UNIPHY_REFCLK_25MHZ>;
};
&dp1 {
&gmac0 {
status = "okay";
label = "wan";
nvmem-cells = <&macaddr_appsblenv_ethaddr 2>;
nvmem-cell-names = "mac-address";
};
&dp2 {
&gmac1 {
status = "okay";
phy-mode = "sgmii";
nvmem-cells = <&macaddr_appsblenv_ethaddr 0>;
nvmem-cell-names = "mac-address";
@@ -290,7 +280,7 @@
port@6 {
reg = <6>;
phy-mode = "sgmii";
ethernet = <&dp2>;
ethernet = <&gmac1>;
qca,sgmii-enable-pll;
fixed-link {
target/linux/qualcommax/dts/ipq5018-wrc-x3000gs2.dts
+10 -20
View File
@@ -20,7 +20,7 @@
led-failsafe = &led_power_red;
led-running = &led_power_green;
led-upgrade = &led_power_green;
label-mac-device = <&dp1>;
label-mac-device = <&gmac0>;
};
chosen {
@@ -180,37 +180,27 @@
};
};
&switch {
&uniphy0 {
status = "okay";
switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
qcom,port_phyinfo {
port@1 {
port_id = <1>;
mdiobus = <&mdio0>;
phy_address = <7>;
};
port@2 {
port_id = <2>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
assigned-clocks = <&uniphy0 UNIPHY_CLK_REF>;
assigned-clock-rates = <UNIPHY_REFCLK_25MHZ>;
};
&dp1 {
&gmac0 {
status = "okay";
label = "wan";
nvmem-cells = <&macaddr_appsblenv_ethaddr 3>;
nvmem-cell-names = "mac-address";
};
&dp2 {
&gmac1 {
status = "okay";
phy-mode = "sgmii";
nvmem-cells = <&macaddr_appsblenv_ethaddr 0>;
nvmem-cell-names = "mac-address";
@@ -284,7 +274,7 @@
port@6 {
reg = <6>;
phy-mode = "sgmii";
ethernet = <&dp2>;
ethernet = <&gmac1>;
qca,sgmii-enable-pll;
fixed-link {
target/linux/qualcommax/dts/ipq5018-wrc-x3000gst2.dts
+8 -20
View File
@@ -20,7 +20,7 @@
led-failsafe = &led_power_red;
led-running = &led_power_green;
led-upgrade = &led_power_green;
label-mac-device = <&dp1>;
label-mac-device = <&gmac0>;
};
chosen {
@@ -180,27 +180,14 @@
};
};
&switch {
&uniphy0 {
status = "okay";
switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
qcom,port_phyinfo {
port@1 {
port_id = <1>;
mdiobus = <&mdio0>;
phy_address = <7>;
};
port@2 {
port_id = <2>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
assigned-clocks = <&uniphy0 UNIPHY_CLK_REF>;
assigned-clock-rates = <UNIPHY_REFCLK_25MHZ>;
};
&dp1 {
&gmac0 {
status = "okay";
label = "wan";
@@ -208,9 +195,10 @@
nvmem-cell-names = "mac-address";
};
&dp2 {
&gmac1 {
status = "okay";
phy-mode = "sgmii";
nvmem-cells = <&macaddr_appsblenv_ethaddr 0>;
nvmem-cell-names = "mac-address";
@@ -284,7 +272,7 @@
port@6 {
reg = <6>;
phy-mode = "sgmii";
ethernet = <&dp2>;
ethernet = <&gmac1>;
qca,sgmii-enable-pll;
fixed-link {
target/linux/qualcommax/files/include/dt-bindings/net/qcom-ipq-ess.h
-42
View File
@@ -1,42 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _DT_BINDINGS_NET_QCOM_IPQ_ESS_H
#define _DT_BINDINGS_NET_QCOM_IPQ_ESS_H
#define ESS_PORT0 0x1
#define ESS_PORT1 0x2
#define ESS_PORT2 0x4
#define ESS_PORT3 0x8
#define ESS_PORT4 0x10
#define ESS_PORT5 0x20
#define ESS_PORT6 0x40
#define ESS_PORT7 0x80
/* SSDK MAC/UNIPHY modes */
#define MAC_MODE_PSGMII 0x0
#define MAC_MODE_PSGMII_RGMII5 0x1
#define MAC_MODE_SGMII0_RGMII5 0x2
#define MAC_MODE_SGMII1_RGMII5 0x3
#define MAC_MODE_PSGMII_RMII0 0x4
#define MAC_MODE_PSGMII_RMII1 0x5
#define MAC_MODE_PSGMII_RMII0_RMII1 0x6
#define MAC_MODE_PSGMII_RGMII4 0x7
#define MAC_MODE_SGMII0_RGMII4 0x8
#define MAC_MODE_SGMII1_RGMII4 0x9
#define MAC_MODE_SGMII4_RGMII4 0xa
#define MAC_MODE_QSGMII 0xb
#define MAC_MODE_SGMII_PLUS 0xc
#define MAC_MODE_USXGMII 0xd
#define MAC_MODE_10GBASE_R 0xe
#define MAC_MODE_SGMII_CHANNEL0 0xf
#define MAC_MODE_SGMII_CHANNEL1 0x10
#define MAC_MODE_SGMII_CHANNEL4 0x11
#define MAC_MODE_RGMII 0x12
#define MAC_MODE_PSGMII_FIBER 0x13
#define MAC_MODE_SGMII_FIBER 0x14
#define MAC_MODE_UQXGMII 0x15
#define MAC_MODE_UDXGMII 0x16
#define MAC_MODE_UQXGMII_3CHANNELS 0x17
#define MAC_MODE_DISABLED 0xff
#endif /* _DT_BINDINGS_NET_QCOM_IPQ_ESS_H */
target/linux/qualcommax/ipq50xx/config-default
+5
View File
@@ -1,3 +1,5 @@
# CONFIG_DWMAC_GENERIC is not set
CONFIG_DWMAC_IPQ5018=y
CONFIG_IPQ_CMN_PLL=y
CONFIG_IPQ_GCC_5018=y
CONFIG_LEDS_PWM=y
@@ -6,6 +8,7 @@ CONFIG_MTD_SPI_NAND=y
CONFIG_NET_DSA_QCA8K=y
CONFIG_NET_DSA_QCA8K_LEDS_SUPPORT=y
CONFIG_NET_DSA_TAG_QCA=y
CONFIG_PCS_XPCS=y
CONFIG_PHY_QCOM_M31_USB=y
CONFIG_PHY_QCOM_UNIPHY_PCIE_28LP=y
CONFIG_PINCTRL_IPQ5018=y
@@ -18,3 +21,5 @@ CONFIG_QCOM_Q6V5_MPD=y
CONFIG_QCOM_Q6V5_WCSS_SEC=y
CONFIG_QCOM_TMEL_QMP_MAILBOX=y
CONFIG_SPI_QPIC_SNAND=y
CONFIG_STMMAC_ETH=y
CONFIG_STMMAC_PLATFORM=y
target/linux/qualcommax/ipq50xx/target.mk
-1
View File
@@ -1,6 +1,5 @@
SUBTARGET:=ipq50xx
BOARDNAME:=Qualcomm Atheros IPQ50xx
DEFAULT_PACKAGES += kmod-qca-nss-dp
define Target/Description
Build firmware images for Qualcomm Atheros IPQ50xx based boards.
target/linux/qualcommax/patches-6.12/0722-clk-qcom-gcc-ipq5018-refer-to-uniphy-rx-and-tx-clk-providers-by-name.patch
-40
View File
@@ -1,40 +0,0 @@
From ce9e56a436e486690097cfbdda2d0c11b60db4c2 Mon Sep 17 00:00:00 2001
From: Ziyang Huang <hzyitc@outlook.com>
Date: Sun, 8 Sep 2024 16:40:12 +0800
Subject: [PATCH] clk: gcc-ipq5018: refer to UNIPHY rx and tx clk providers by name
QCA-SSDK does not register the output clocks of the onboard uniphy so the
GCC and DTS can't reference them by their index.
The SSDK references them by name, so let's change the GCC driver
accordingly.
Signed-off-by: Ziyang Huang <hzyitc@outlook.com>
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
---
drivers/clk/qcom/gcc-ipq5018.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
--- a/drivers/clk/qcom/gcc-ipq5018.c
+++ b/drivers/clk/qcom/gcc-ipq5018.c
@@ -368,8 +368,8 @@ static const struct parent_map gcc_xo_ge
static const struct clk_parent_data gcc_xo_uniphy_gcc_rx_uniphy_gcc_tx_ubi32_pll_gpll0[] = {
{ .index = DT_XO },
- { .index = DT_UNIPHY_RX_CLK },
- { .index = DT_UNIPHY_TX_CLK },
+ { .name = "uniphy_gcc_rx", .index = -1 },
+ { .name = "uniphy_gcc_tx", .index = -1 },
{ .hw = &ubi32_pll.clkr.hw },
{ .hw = &gpll0.clkr.hw },
};
@@ -384,8 +384,8 @@ static const struct parent_map gcc_xo_un
static const struct clk_parent_data gcc_xo_uniphy_gcc_tx_uniphy_gcc_rx_ubi32_pll_gpll0[] = {
{ .index = DT_XO },
- { .index = DT_UNIPHY_TX_CLK },
- { .index = DT_UNIPHY_RX_CLK },
+ { .name = "uniphy_gcc_tx", .index = -1 },
+ { .name = "uniphy_gcc_rx", .index = -1 },
{ .hw = &ubi32_pll.clkr.hw },
{ .hw = &gpll0.clkr.hw },
};
target/linux/qualcommax/patches-6.12/0912-arm64-dts-qcom-ipq5018-remove-cpufreq-scaling.patch
+1 -1
View File
@@ -13,7 +13,7 @@ Signed-off-by: Robert Senderek <robert.senderek@10g.pl>
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
@@ -94,12 +94,6 @@
@@ -95,12 +95,6 @@
compatible = "operating-points-v2";
opp-shared;