mediatek: add Ruijie RG-X60 support

Hardware specification:
  SoC: MediaTek MT7986A 4x A53
  Flash: 128MB SPI-NAND (W25N01GVZEIG)
  RAM: 512MB DDR3 (W634GU6QB)
  Ethernet: 3x 1GbE (MT7531) + 1x 2.5GbE (EN8811H)
  WiFi: MediaTek MT7975(P)N
  Button: Mesh, Reset
  Power: DC Jack 12V

Flash instructions:
Login into the webUI and flash sysupgrade.bin without saving
configurations.

While at it, create a shared dtsi for X60 and X60-Pro devices and
assign MAC using NVMEM as much as possible. The SPI frequcency has
been increased to 52 MHz as well since the chip supports up to
108 MHz.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
2026-04-18 21:17:29 +08:00
parent a2ff671fec
commit b52da5d88e
6 changed files with 356 additions and 186 deletions
@@ -1,34 +1,19 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986a.dtsi"
#include "mt7986a-ruijie-rg-x60.dtsi"
/ {
compatible = "ruijie,rg-x60-pro", "mediatek,mt7986a";
model = "Ruijie RG-X60 Pro";
aliases {
serial0 = &uart0;
led-boot = &led_system;
led-failsafe = &led_alarm;
led-running = &led_system;
led-upgrade = &led_alarm;
};
chosen {
bootargs = "console=ttyS0,115200n8 earlycon=uart8250,mmio32,0x11002000";
};
memory@40000000 {
reg = <0 0x40000000 0 0x20000000>;
device_type = "memory";
};
gpio-keys {
compatible = "gpio-keys";
@@ -62,44 +47,11 @@
};
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-handle = <&phy7>;
phy-mode = "2500base-x";
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
};
&gmac1 {
phy-handle = <&phy7>;
};
&mdio {
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
};
phy7: phy@7 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <7>;
@@ -112,118 +64,6 @@
};
};
&pio {
spi_flash_pins: spi-flash-pins-33-to-38 {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
wf_2g_5g_pins: wf_2g_5g-pins {
mux {
function = "wifi";
groups = "wf_2g", "wf_5g";
};
conf {
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <MTK_DRIVE_4mA>;
};
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi_flash_pins>;
status = "okay";
flash@0 {
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <20000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "BL2";
reg = <0x000000 0x100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x100000 0x80000>;
read-only;
};
partition@180000 {
label = "Factory";
reg = <0x180000 0x200000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};
};
};
partition@380000 {
label = "FIP";
reg = <0x380000 0x200000>;
read-only;
};
partition@580000 {
label = "product_info";
reg = <0x580000 0x80000>;
read-only;
};
partition@600000 {
label = "kdump";
reg = <0x600000 0x80000>;
read-only;
};
partition@680000 {
label = "ubi";
reg = <0x680000 0x3f00000>;
};
};
};
};
&switch {
ports {
#address-cells = <1>;
@@ -330,18 +170,9 @@
};
&wifi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&wf_2g_5g_pins>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
band@1 {
reg = <1>;
nvmem-cells = <&macaddr_product_info 3>;
nvmem-cell-names = "mac-address";
};
};
@@ -0,0 +1,109 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7986a-ruijie-rg-x60.dtsi"
/ {
model = "Ruijie RG-X60";
compatible = "ruijie,rg-x60", "mediatek,mt7986a";
aliases {
led-boot = &red_led;
led-failsafe = &red_led;
led-running = &green_led;
led-upgrade = &green_led;
};
gpio-keys {
compatible = "gpio-keys";
button-mesh {
label = "mesh";
linux,code = <BTN_9>;
linux,input-type = <EV_SW>;
gpios = <&pio 15 GPIO_ACTIVE_LOW>;
};
button-reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 14 GPIO_ACTIVE_LOW>;
};
};
gpio-leds {
compatible = "gpio-leds";
green_led: led-0 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
};
red_led: led-1 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
};
led-2 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 11 GPIO_ACTIVE_LOW>;
};
led-3 {
color = <LED_COLOR_ID_GREEN>;
function = "mesh";
gpios = <&pio 22 GPIO_ACTIVE_LOW>;
};
};
};
&gmac1 {
phy-handle = <&phy15>;
};
&mdio {
phy15: phy@f {
compatible = "ethernet-phy-id03a2.a411";
reg = <15>;
reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <10000>;
};
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
label = "lan1";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan3";
};
port@6 {
reg = <6>;
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
@@ -0,0 +1,224 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986a.dtsi"
/ {
aliases {
label-mac-device = &gmac1;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@40000000 {
reg = <0 0x40000000 0 0x20000000>;
device_type = "memory";
};
};
&crypto {
status = "okay";
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
nvmem-cells = <&macaddr_product_info 1>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "2500base-x";
nvmem-cells = <&macaddr_product_info 0>;
nvmem-cell-names = "mac-address";
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
};
};
&mdio {
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
};
};
&pio {
spi_flash_pins: spi-flash-pins-33-to-38 {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
wf_2g_5g_pins: wf-2g-5g-pins {
mux {
function = "wifi";
groups = "wf_2g", "wf_5g";
};
conf {
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <MTK_DRIVE_4mA>;
};
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi_flash_pins>;
status = "okay";
flash@0 {
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bl2";
reg = <0x0 0x100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x100000 0x80000>;
read-only;
};
partition@180000 {
label = "factory";
reg = <0x180000 0x200000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};
};
};
partition@380000 {
label = "fip";
reg = <0x380000 0x200000>;
read-only;
};
partition@580000 {
label = "product_info";
reg = <0x580000 0x80000>;
read-only;
nvmem-layout {
compatible = "u-boot,env";
env-size = <0x20000>;
macaddr_product_info: ethaddr {
#nvmem-cell-cells = <1>;
};
};
};
partition@600000 {
label = "kdump";
reg = <0x600000 0x80000>;
read-only;
};
partition@680000 {
label = "ubi";
reg = <0x680000 0x3f00000>;
compatible = "linux,ubi";
};
};
};
};
&trng {
status = "okay";
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&wifi {
#address-cells = <1>;
#size-cells = <0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
pinctrl-names = "default";
pinctrl-0 = <&wf_2g_5g_pins>;
status = "okay";
band@0 {
reg = <0>;
nvmem-cells = <&macaddr_product_info 2>;
nvmem-cell-names = "mac-address";
};
};
@@ -20,6 +20,7 @@ mediatek_setup_interfaces()
nokia,ea0326gmp|\
mercusys,mr80x-v3|\
routerich,ax3000-v1|\
ruijie,rg-x60|\
zbtlink,zbt-z8103ax|\
zbtlink,zbt-z8103ax-c)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" eth1
@@ -298,11 +299,6 @@ mediatek_setup_macs()
wan_mac=$(macaddr_add "$lan_mac" 1)
label_mac=$wan_mac
;;
ruijie,rg-x60-pro)
label_mac=$(mtd_get_mac_ascii product_info ethaddr)
wan_mac=$label_mac
lan_mac=$(macaddr_add "$label_mac" 1)
;;
tplink,eap683-lr)
label_mac=$(get_mac_binary "/tmp/factory/default-mac" 0)
lan_mac=$label_mac
@@ -202,10 +202,8 @@ case "$board" in
[ "$PHYNBR" = "0" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $addr 3 > /sys${DEVPATH}/macaddress
;;
ruijie,rg-x60-pro)
addr=$(mtd_get_mac_ascii product_info ethaddr)
[ "$PHYNBR" = "0" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $addr 3 > /sys${DEVPATH}/macaddress
ruijie,rg-x60)
[ "$PHYNBR" = "1" ] && macaddr_setbit_la $(macaddr_add $(get_mac_label) 0xb00002) > /sys${DEVPATH}/macaddress
;;
tplink,eap683-lr)
addr=$(get_mac_label)
+12
View File
@@ -2966,6 +2966,18 @@ define Device/routerich_be7200
endef
TARGET_DEVICES += routerich_be7200
define Device/ruijie_rg-x60
DEVICE_VENDOR := Ruijie
DEVICE_MODEL := RG-X60
DEVICE_DTS := mt7986a-ruijie-rg-x60
DEVICE_DTS_CONFIG := config@ruijie_x60_gsw_en8811h_phy
DEVICE_DTS_DIR := ../dts
SUPPORTED_DEVICES += X60
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7986-firmware mt7986-wo-firmware kmod-phy-airoha-en8811h
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
TARGET_DEVICES += ruijie_rg-x60
define Device/ruijie_rg-x60-pro
DEVICE_VENDOR := Ruijie
DEVICE_MODEL := RG-X60 Pro