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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
2025-09-01 14:54:04 +08:00
parent a36cb6db66 9de2da13bf
commit b7711fb575
10 changed files with 266 additions and 35 deletions
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package/firmware/ipq-wifi/Makefile
+8 -4
View File
@@ -6,9 +6,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/firmware/qca-wireless.git
PKG_SOURCE_DATE:=2025-05-30
PKG_SOURCE_VERSION:=fde3d2a7ce59be389224304049a4a5b9ca49a45e
PKG_MIRROR_HASH:=2e149366118192d4976baf42ac23d22ef32e477feb111d2756a2411278b6cf46
PKG_SOURCE_DATE:=2025-08-25
PKG_SOURCE_VERSION:=a510502e7922b0a61e455e43479a62e7d27cf3ba
PKG_MIRROR_HASH:=0b8120ce09fdd9176e77b65f2c0866e14aa580ba7e6dd9440f37011418346be7
PKG_FLAGS:=nonshared
include $(INCLUDE_DIR)/package.mk
@@ -56,6 +56,7 @@ ALLWIFIBOARDS:= \
tplink_eap660hd-v1 \
tplink_archer-c6-v2 \
wallys_dr40x9 \
xiaomi_aiot-ac2350 \
xiaomi_ax3600 \
xiaomi_ax9000 \
yyets_le1 \
@@ -96,6 +97,8 @@ define ipq-wifi-install-one
$(call ipq-wifi-install-one-to,$(1),$(2),QCA9887/hw1.0),\
$(if $(filter $(suffix $(1)),.QCA9984 .qca9984),\
$(call ipq-wifi-install-one-to,$(1),$(2),QCA9984/hw1.0),\
$(if $(filter $(suffix $(1)),.QCA9988 .qca9988),\
$(call ipq-wifi-install-one-to,$(1),$(2),QCA9984/hw1.0),\
$(if $(filter $(suffix $(1)),.QCA99X0 .qca99x0),\
$(call ipq-wifi-install-one-to,$(1),$(2),QCA99X0/hw2.0),\
$(if $(filter $(suffix $(1)),.IPQ6018 .ipq6018),\
@@ -105,7 +108,7 @@ define ipq-wifi-install-one
$(if $(filter $(suffix $(1)),.QCN9074 .qcn9074),\
$(call ipq-wifi-install-ath11-one-to,$(1),$(2),QCN9074/hw1.0),\
$(error Unrecognized board-file suffix '$(suffix $(1))' for '$(1)')\
))))))))
)))))))))
endef
# Blank line required at end of above define due to foreach context
@@ -184,6 +187,7 @@ $(eval $(call generate-ipq-wifi-package,spectrum_sax1v1k,Spectrum SAX1V1K))
$(eval $(call generate-ipq-wifi-package,tplink_eap660hd-v1,TP-Link EAP660 HD v1))
$(eval $(call generate-ipq-wifi-package,tplink_archer-c6-v2,TP-Link Archer C6 V2))
$(eval $(call generate-ipq-wifi-package,wallys_dr40x9,Wallys DR40X9))
$(eval $(call generate-ipq-wifi-package,xiaomi_aiot-ac2350,Xiaomi AIoT AC2350))
$(eval $(call generate-ipq-wifi-package,xiaomi_ax3600,Xiaomi AX3600))
$(eval $(call generate-ipq-wifi-package,xiaomi_ax9000,Xiaomi AX9000))
$(eval $(call generate-ipq-wifi-package,yyets_le1,YYeTs LE1))
target/linux/armsr/image/Makefile
-1
View File
@@ -12,7 +12,6 @@ GRUB_TERMINAL_CONFIG =
GRUB_CONSOLE_CMDLINE = earlycon
ifneq ($(CONFIG_GRUB_CONSOLE),)
GRUB_CONSOLE_CMDLINE += console=tty1
GRUB_TERMINALS += console
endif
target/linux/armsr/patches-6.6/300-printk-always-setup-default-consoles.patch
+47
View File
@@ -0,0 +1,47 @@
From 0059efbd0f9c291795078fb4e50722641d525f38 Mon Sep 17 00:00:00 2001
From: Mathew McBride <matt@traverse.com.au>
Date: Thu, 16 Jan 2025 11:48:44 +1100
Subject: [PATCH] printk: always setup default (tty0 + stdout / SPCR) consoles
when no console= present
(This is a hack specific to OpenWrt's armsr target)
This change resolves a difference in behaviour between arm64 ACPI
and DT systems.
Our usecase is to ensure the system console is always present
regardless of display mode (serial port or screen).
Both ACPI and DT have mechanisms to setup a serial console from
information passed by firmware (SPCR and stdout-path respectively).
On ACPI systems, the SPCR table is parsed very early on in the kernel
boot which prevents the screen console (tty0) from appearing if it is
not explicitly set.
We would like to avoid specifying console= arguments as there are many
possible configurations on the serial side (like ttyS0, ttyAMA0, ttymxc0
etc.).
If the kernel does not consume the serial port in SPCR/stdout-path,
then the 'default' settings from the firmware (baud rate etc.) are lost.
If the system administrator explicitly specifies a console= argument,
then the old behaviour is returned.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Link: https://github.com/openwrt/openwrt/pull/17012#issuecomment-2591751115
---
kernel/printk/printk.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/kernel/printk/printk.c
+++ b/kernel/printk/printk.c
@@ -3515,7 +3515,7 @@ void register_console(struct console *ne
* Note that a console with tty binding will have CON_CONSDEV
* flag set and will be first in the list.
*/
- if (preferred_console < 0) {
+ if (!console_set_on_cmdline) {
if (hlist_empty(&console_list) || !console_first()->device ||
console_first()->flags & CON_BOOT) {
try_enable_default_console(newcon);
target/linux/ath79/dts/qca9563_xiaomi_aiot-ac2350.dts
+1
View File
@@ -201,5 +201,6 @@
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&precal_art_5000>;
nvmem-cell-names = "pre-calibration";
qcom,ath10k-calibration-variant = "Xiaomi-AIoT-AC2350";
};
};
target/linux/ath79/image/generic.mk
+1 -1
View File
@@ -3270,7 +3270,7 @@ define Device/xiaomi_aiot-ac2350
SOC := qca9563
DEVICE_VENDOR := Xiaomi
DEVICE_MODEL := AIoT AC2350
DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca9984-ct
DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca9984-ct ipq-wifi-xiaomi_aiot-ac2350
IMAGE_SIZE := 14336k
endef
TARGET_DEVICES += xiaomi_aiot-ac2350
target/linux/generic/pending-6.6/742-net-ethernet-mtk_eth_soc-fix-tx-vlan-tag-for-llc-pac.patch
+39
View File
@@ -0,0 +1,39 @@
From: Felix Fietkau <nbd@nbd.name>
Date: Sun, 31 Aug 2025 20:05:13 +0200
Subject: [PATCH] net: ethernet: mtk_eth_soc: fix tx vlan tag for llc packets
When sending llc packets with vlan tx offload, the hardware fails to
actually add the tag. Deal with this by fixing it up in software.
Fixes: 656e705243fd ("net-next: mediatek: add support for MT7623 ethernet")
Reported-by: Thibaut VARENE <hacks@slashdirt.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
---
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -1763,6 +1763,13 @@ static netdev_tx_t mtk_start_xmit(struct
bool gso = false;
int tx_num;
+ if (skb_vlan_tag_present(skb) &&
+ !eth_proto_is_802_3(eth_hdr(skb)->h_proto)) {
+ skb = __vlan_hwaccel_push_inside(skb);
+ if (!skb)
+ goto dropped;
+ }
+
/* normally we can rely on the stack not calling this more than once,
* however we have 2 queues running on the same ring so we need to lock
* the ring access
@@ -1826,8 +1833,9 @@ static netdev_tx_t mtk_start_xmit(struct
drop:
spin_unlock(&eth->page_lock);
- stats->tx_dropped++;
dev_kfree_skb_any(skb);
+dropped:
+ stats->tx_dropped++;
return NETDEV_TX_OK;
}
target/linux/realtek/files-6.6/drivers/net/ethernet/rtl838x_eth.c
+17 -23
View File
@@ -436,28 +436,25 @@ static irqreturn_t rtl83xx_net_irq(int irq, void *dev_id)
struct net_device *ndev = dev_id;
struct rtl838x_eth_priv *priv = netdev_priv(ndev);
u32 status = sw_r32(priv->r->dma_if_intr_sts);
unsigned long ring, rings;
netdev_dbg(ndev, "RX IRQ received: %08x\n", status);
netdev_dbg(ndev, "rx interrupt received, status %08x\n", status);
if ((status & RTL83XX_DMA_IF_INTR_STS_RX_RUN_OUT_MASK) && net_ratelimit())
netdev_warn(ndev, "RX buffer overrun: status 0x%x, mask: 0x%x\n",
status, sw_r32(priv->r->dma_if_intr_msk));
if (status & RTL83XX_DMA_IF_INTR_RX_RUN_OUT_MASK)
if (net_ratelimit())
netdev_warn(ndev, "rx ring overrun, status 0x%08x, mask 0x%08x\n",
status, sw_r32(priv->r->dma_if_intr_msk));
if (status & RTL83XX_DMA_IF_INTR_STS_RX_DONE_MASK) {
/* Disable rx interrupts */
sw_w32_mask(0xff00 & status, 0, priv->r->dma_if_intr_msk);
for (int i = 0; i < priv->rxrings; i++) {
if (status & BIT(i + 8)) {
pr_debug("Scheduling queue: %d\n", i);
napi_schedule(&priv->rx_qs[i].napi);
}
}
rings = FIELD_GET(RTL83XX_DMA_IF_INTR_RX_DONE_MASK, status);
for_each_set_bit(ring, &rings, priv->rxrings) {
netdev_dbg(ndev, "schedule rx ring %lu\n", ring);
sw_w32_mask(RTL83XX_DMA_IF_INTR_RX_MASK(ring), 0, priv->r->dma_if_intr_msk);
napi_schedule(&priv->rx_qs[ring].napi);
}
if ((status & RTL83XX_DMA_IF_INTR_STS_NOTIFY_MASK) && priv->family_id == RTL8390_FAMILY_ID)
if (status & RTL839X_DMA_IF_INTR_NOTIFY_MASK)
rtl839x_l2_notification_handler(priv);
/* Acknowledge all interrupts */
sw_w32(status, priv->r->dma_if_intr_sts);
return IRQ_HANDLED;
@@ -1337,25 +1334,22 @@ static int rtl838x_poll_rx(struct napi_struct *napi, int budget)
{
struct rtl838x_rx_q *rx_q = container_of(napi, struct rtl838x_rx_q, napi);
struct rtl838x_eth_priv *priv = rx_q->priv;
int ring = rx_q->id;
int work_done = 0;
int r = rx_q->id;
int work;
while (work_done < budget) {
work = rtl838x_hw_receive(priv->netdev, r, budget - work_done);
int work = rtl838x_hw_receive(priv->netdev, ring, budget - work_done);
if (!work)
break;
work_done += work;
}
if (work_done < budget) {
napi_complete_done(napi, work_done);
/* Enable RX interrupt */
if (work_done < budget && napi_complete_done(napi, work_done)) {
/* Re-enable rx interrupts */
if (priv->family_id == RTL9300_FAMILY_ID || priv->family_id == RTL9310_FAMILY_ID)
sw_w32(0xffffffff, priv->r->dma_if_intr_rx_done_msk);
else
sw_w32_mask(0, 0xf00ff | BIT(r + 8), priv->r->dma_if_intr_msk);
sw_w32_mask(0, RTL83XX_DMA_IF_INTR_RX_MASK(ring), priv->r->dma_if_intr_msk);
}
return work_done;
target/linux/realtek/files-6.6/drivers/net/ethernet/rtl838x_eth.h
+4 -3
View File
@@ -48,9 +48,10 @@
#define RTL930X_MAC_FORCE_MODE_CTRL (0xCA1C)
#define RTL931X_MAC_FORCE_MODE_CTRL (0x0ddc)
#define RTL83XX_DMA_IF_INTR_STS_NOTIFY_MASK GENMASK(22, 20)
#define RTL83XX_DMA_IF_INTR_STS_RX_DONE_MASK GENMASK(15, 8)
#define RTL83XX_DMA_IF_INTR_STS_RX_RUN_OUT_MASK GENMASK(7, 0)
#define RTL839X_DMA_IF_INTR_NOTIFY_MASK GENMASK(22, 20)
#define RTL83XX_DMA_IF_INTR_RX_DONE_MASK GENMASK(15, 8)
#define RTL83XX_DMA_IF_INTR_RX_RUN_OUT_MASK GENMASK(7, 0)
#define RTL83XX_DMA_IF_INTR_RX_MASK(ring) (BIT(ring) | BIT(ring + 8))
/* MAC address settings */
#define RTL838X_MAC (0xa9ec)
target/linux/realtek/patches-6.6/304-timer-otto-fix-stall-after-restart.patch
+146
View File
@@ -0,0 +1,146 @@
From: Markus Stockhausen <markus.stockhausen@gmx.de>
Date: Sat, 19 Jul 2025 18:22:21 +0200
Subject: [PATCH] realtek: fix stall after restart of otto timer
With kernel 6.9 the kernel scheduler has been redesigned. This uncovered
a bug in the realtek timer hardware and a misconception in the driver.
Regarding the driver: Software cannot set the current counter value to
zero directly. This is automatically done when writing a new target value.
Drop function rttm_set_counter(). Additionally do not use stop timer
during normal operation because it acknowledges interrupts. This should
only be done from the interrupt handler. Replace this with disable_timer().
Regarding the hardware: There is a minimal chance that a timer dies if it
is reprogrammed within the 5us before its expiration time. Let's call this
the "critical time window". Work around this issue by introducing a
bounce() function. It restarts the timer directly before the normal
restart functions as follows:
- Stop timer
- Restart timer with a slow frequency.
- Target time will be >5us
- The subsequent normal restart will be outside the critical window
While we are here clarify documentation and double the timer frequency to
6.25 Mhz. This allows for more detailed timestamps.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
---
--- a/drivers/clocksource/timer-rtl-otto.c
+++ b/drivers/clocksource/timer-rtl-otto.c
@@ -20,12 +20,11 @@
/*
* The Otto platform provides multiple 28 bit timers/counters with the following
- * operating logic. If enabled the timer counts up. Per timer one can set a
- * maximum counter value as an end marker. If end marker is reached the timer
- * fires an interrupt. If the timer "overflows" by reaching the end marker or
- * by adding 1 to 0x0fffffff the counter is reset to 0. When this happens and
- * the timer is in operating mode COUNTER it stops. In mode TIMER it will
- * continue to count up.
+ * operating logic. If enabled the timer counts up. Per timer a counter target
+ * value can be set with the minimum being 0x2 and the maximumu being 0xfffffff.
+ * If the the target value is reached the timer is reset to 0. Depending on its
+ * configuration the timer will then fire an interrupt. In case the timer is in
+ * operating mode COUNTER it stops. In mode TIMER it will continue to count up.
*/
#define RTTM_CTRL_COUNTER 0
#define RTTM_CTRL_TIMER BIT(24)
@@ -33,16 +32,15 @@
#define RTTM_BIT_COUNT 28
#define RTTM_MIN_DELTA 8
#define RTTM_MAX_DELTA CLOCKSOURCE_MASK(28)
+#define RTTM_MAX_DIVISOR GENMASK(15, 0)
/*
- * Timers are derived from the LXB clock frequency. Usually this is a fixed
- * multiple of the 25 MHz oscillator. The 930X SOC is an exception from that.
- * Its LXB clock has only dividers and uses the switch PLL of 2.45 GHz as its
- * base. The only meaningful frequencies we can achieve from that are 175.000
- * MHz and 153.125 MHz. The greatest common divisor of all explained possible
- * speeds is 3125000. Pin the timers to this 3.125 MHz reference frequency.
+ * Timers are derived from the lexra bus (LXB) clock frequency. This is 175 MHz
+ * on RTL930x and 200 MHz on the other platforms. With 6.25 MHz choose a common
+ * divisor to have enough range and detail. This even allows to compare the
+ * different platforms more easily.
*/
-#define RTTM_TICKS_PER_SEC 3125000
+#define RTTM_TICKS_PER_SEC 6250000
struct rttm_cs {
struct timer_of to;
@@ -50,11 +48,6 @@ struct rttm_cs {
};
/* Simple internal register functions */
-static inline void rttm_set_counter(void __iomem *base, unsigned int counter)
-{
- iowrite32(counter, base + RTTM_CNT);
-}
-
static inline unsigned int rttm_get_counter(void __iomem *base)
{
return ioread32(base + RTTM_CNT);
@@ -107,6 +100,22 @@ static irqreturn_t rttm_timer_interrupt(
return IRQ_HANDLED;
}
+static void rttm_bounce_timer(void __iomem *base, u32 mode)
+{
+ /*
+ * When a running timer has less than ~5us left, a stop/start sequence
+ * might fail. While the details are unknown the most evident effect is
+ * that the subsequent interrupt will not be fired.
+ *
+ * As a workaround issue an intermediate restart with a very slow
+ * frequency of ~3kHz keeping the target value. So the actual follow
+ * up restart will always be issued outside the critical window.
+ */
+
+ rttm_disable_timer(base);
+ rttm_enable_timer(base, mode, RTTM_MAX_DIVISOR);
+}
+
static void rttm_stop_timer(void __iomem *base)
{
rttm_disable_timer(base);
@@ -115,7 +124,6 @@ static void rttm_stop_timer(void __iomem
static void rttm_start_timer(struct timer_of *to, u32 mode)
{
- rttm_set_counter(to->of_base.base, 0);
rttm_enable_timer(to->of_base.base, mode, to->of_clk.rate / RTTM_TICKS_PER_SEC);
}
@@ -124,7 +132,8 @@ static int rttm_next_event(unsigned long
struct timer_of *to = to_timer_of(clkevt);
RTTM_DEBUG(to->of_base.base);
- rttm_stop_timer(to->of_base.base);
+ rttm_bounce_timer(to->of_base.base, RTTM_CTRL_COUNTER);
+ rttm_disable_timer(to->of_base.base);
rttm_set_period(to->of_base.base, delta);
rttm_start_timer(to, RTTM_CTRL_COUNTER);
@@ -136,7 +145,8 @@ static int rttm_state_oneshot(struct clo
struct timer_of *to = to_timer_of(clkevt);
RTTM_DEBUG(to->of_base.base);
- rttm_stop_timer(to->of_base.base);
+ rttm_bounce_timer(to->of_base.base, RTTM_CTRL_COUNTER);
+ rttm_disable_timer(to->of_base.base);
rttm_set_period(to->of_base.base, RTTM_TICKS_PER_SEC / HZ);
rttm_start_timer(to, RTTM_CTRL_COUNTER);
@@ -148,7 +158,8 @@ static int rttm_state_periodic(struct cl
struct timer_of *to = to_timer_of(clkevt);
RTTM_DEBUG(to->of_base.base);
- rttm_stop_timer(to->of_base.base);
+ rttm_bounce_timer(to->of_base.base, RTTM_CTRL_TIMER);
+ rttm_disable_timer(to->of_base.base);
rttm_set_period(to->of_base.base, RTTM_TICKS_PER_SEC / HZ);
rttm_start_timer(to, RTTM_CTRL_TIMER);
tools/firmware-utils/Makefile
+3 -3
View File
@@ -11,9 +11,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/firmware-utils.git
PKG_SOURCE_DATE:=2025-02-16
PKG_SOURCE_VERSION:=5d1446bf57d6490573dc71f10c05e83b36d44374
PKG_MIRROR_HASH:=e054ea416f5a596f681bba593f71dfbe8149361432d7c17f2374c60dfe227749
PKG_SOURCE_DATE:=2025-08-03
PKG_SOURCE_VERSION:=950f83405a935395492d61c9972b5e5ca826eeee
PKG_MIRROR_HASH:=19f5b7547dc6f9460e25183c83d55aca9d1f18148466c09b64504a64379a34ae
include $(INCLUDE_DIR)/host-build.mk
include $(INCLUDE_DIR)/cmake.mk