rockchip: refresh upstreamed otp patches

Mark upstream accepted patches as backport.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
2026-03-26 16:59:12 +08:00
parent 75d3612b5b
commit c6e2e01a2a
9 changed files with 98 additions and 82 deletions
@@ -0,0 +1,70 @@
From 2d7b5e1c962158833ef778a09d9293ed710fcc84 Mon Sep 17 00:00:00 2001
From: Heiko Stuebner <heiko@sntech.de>
Date: Thu, 12 Mar 2026 22:30:18 +0100
Subject: [PATCH] arm64: dts: rockchip: Enable OTP controller for RK356x
Enable the One Time Programmable Controller (OTPC) in RK356x and add
an initial nvmem fixed layout.
Tested-by: Diederik de Haas <diederik@cknow-tech.com> # NanoPi R5S, PineNote
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20260312213019.13965-3-heiko@sntech.de
---
arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 46 +++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -1134,6 +1134,52 @@
status = "disabled";
};
+ otp: efuse@fe38c000 {
+ compatible = "rockchip,rk3568-otp";
+ reg = <0x0 0xfe38c000 0x0 0x4000>;
+ clocks = <&cru CLK_OTPC_NS_USR>, <&cru PCLK_OTPC_NS>,
+ <&cru PCLK_OTPPHY>, <&cru CLK_OTPC_NS_SBPI>;
+ clock-names = "otp", "apb_pclk", "phy", "sbpi";
+ resets = <&cru SRST_OTPC_NS_USR>, <&cru SRST_P_OTPC_NS>,
+ <&cru SRST_OTPPHY>, <&cru SRST_OTPC_NS_SBPI>;
+ reset-names = "otp", "apb", "phy", "sbpi";
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpu_code: cpu-code@2 {
+ reg = <0x02 0x2>;
+ };
+
+ otp_cpu_version: cpu-version@8 {
+ reg = <0x08 0x1>;
+ bits = <3 3>;
+ };
+
+ otp_id: id@a {
+ reg = <0x0a 0x10>;
+ };
+
+ cpu_leakage: cpu-leakage@1a {
+ reg = <0x1a 0x1>;
+ };
+
+ log_leakage: log-leakage@1b {
+ reg = <0x1b 0x1>;
+ };
+
+ npu_leakage: npu-leakage@1c {
+ reg = <0x1c 0x1>;
+ };
+
+ gpu_leakage: gpu-leakage@1d {
+ reg = <0x1d 0x1>;
+ };
+ };
+ };
+
i2s0_8ch: i2s@fe400000 {
compatible = "rockchip,rk3568-i2s-tdm";
reg = <0x0 0xfe400000 0x0 0x1000>;
@@ -1,6 +1,6 @@
From 7f6f8fc3ee62f6eb633320c7989d4ba502787e3c Mon Sep 17 00:00:00 2001
From 9e7aba140eba2aeb72e65ea778c89a245fa235a4 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 16 Mar 2025 19:18:58 +0000
Date: Thu, 5 Feb 2026 22:18:58 +0100
Subject: [PATCH] nvmem: rockchip-otp: Handle internal word_size in main
reg_read op
@@ -19,8 +19,11 @@ specific read_reg operation and allow code reuse in a future RK3568
reg_read operation.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Srinivas Kandagatla <srini@kernel.org>
---
drivers/nvmem/rockchip-otp.c | 72 ++++++++++++++++++++----------------
1 file changed, 40 insertions(+), 32 deletions(-)
@@ -1,15 +1,16 @@
From 24ddbf99c76a352cc1931ccb5118bca0656034b8 Mon Sep 17 00:00:00 2001
From 11e01bcb827d369344f7f0e960698d33db9ced5a Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Tue, 15 Apr 2025 18:32:02 +0800
Date: Thu, 5 Feb 2026 22:18:59 +0100
Subject: [PATCH] nvmem: rockchip-otp: Add support for RK3568
This adds the necessary data for handling otp the rk3568.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Srinivas Kandagatla <srini@kernel.org>
---
drivers/nvmem/rockchip-otp.c | 69 ++++++++++++++++++++++++++++++++++++
1 file changed, 69 insertions(+)
@@ -1,12 +1,15 @@
From 249b07e24d3d1d47b7ec23d5f09a56837b66d7f5 Mon Sep 17 00:00:00 2001
From 85e2134182e21dc9550a1e316d690b1dda52d8cf Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 16 Mar 2025 00:05:45 +0000
Date: Thu, 5 Feb 2026 22:19:01 +0100
Subject: [PATCH] nvmem: rockchip-otp: Add support for RK3528
Add support for the OTP controller in RK3528. The OTPC is similar to the
OTPC in RK3562 and RK3568, exept for a missing phy clock and reset.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Srinivas Kandagatla <srini@kernel.org>
---
drivers/nvmem/rockchip-otp.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
@@ -1,31 +1,31 @@
From 8a50a4471e4b0db33a74c01229a7ad386918344b Mon Sep 17 00:00:00 2001
From a956b54f33de96e0d879e679c22a717d390e1afa Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 16 Mar 2025 00:06:43 +0000
Subject: [PATCH] arm64: dts: rockchip: Enable OTP controller for RK3528
Date: Thu, 12 Mar 2026 22:30:19 +0100
Subject: arm64: dts: rockchip: Enable OTP controller for RK3528
Enable the One Time Programmable Controller (OTPC) in RK3528 and add
an initial nvmem fixed layout.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20260312213019.13965-4-heiko@sntech.de
---
arch/arm64/boot/dts/rockchip/rk3528.dtsi | 49 ++++++++++++++++++++++++
1 file changed, 49 insertions(+)
arch/arm64/boot/dts/rockchip/rk3528.dtsi | 47 ++++++++++++++++++++++++++++++++
1 file changed, 47 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
@@ -1190,6 +1190,55 @@
@@ -1206,6 +1206,53 @@
status = "disabled";
};
+ otp: nvmem@ffce0000 {
+ otp: efuse@ffce0000 {
+ compatible = "rockchip,rk3528-otp";
+ reg = <0x0 0xffce0000 0x0 0x4000>;
+ clocks = <&cru CLK_USER_OTPC_NS>,
+ <&cru PCLK_OTPC_NS>,
+ clocks = <&cru CLK_USER_OTPC_NS>, <&cru PCLK_OTPC_NS>,
+ <&cru CLK_SBPI_OTPC_NS>;
+ clock-names = "otp", "apb_pclk", "sbpi";
+ resets = <&cru SRST_USER_OTPC_NS>,
+ <&cru SRST_P_OTPC_NS>,
+ resets = <&cru SRST_USER_OTPC_NS>, <&cru SRST_P_OTPC_NS>,
+ <&cru SRST_SBPI_OTPC_NS>;
+ reset-names = "otp", "apb", "sbpi";
+
@@ -79,7 +79,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
qos_crypto_a: qos@ff200000 {
compatible = "rockchip,rk3528-qos", "syscon";
reg = <0x0 0xff200000 0x0 0x20>;
@@ -1275,6 +1323,35 @@
@@ -1273,6 +1321,35 @@
rockchip,pipe-phy-grf = <&pipe_phy_grf>;
status = "disabled";
};
@@ -1,61 +0,0 @@
From e8c0448b695911c5a0cc37cadaacaf71d16b04d2 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Thu, 12 Nov 2020 15:43:28 +0800
Subject: [PATCH] arm64: dts: rockchip: rk3568: Add otp device node
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I4ec51ba8d4e1381f787c0137cb475a21e546789d
---
arch/arm64/boot/dts/rockchip/rk3568.dtsi | 29 ++++++++++++++++++++++++
1 file changed, 29 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -894,6 +894,47 @@
};
};
+ otp: otp@fe38c000 {
+ compatible = "rockchip,rk3568-otp";
+ reg = <0x0 0xfe38c000 0x0 0x4000>;
+ clocks = <&cru CLK_OTPC_NS_USR>, <&cru CLK_OTPC_NS_SBPI>,
+ <&cru PCLK_OTPC_NS>, <&cru PCLK_OTPPHY>;
+ clock-names = "usr", "sbpi", "apb", "phy";
+ resets = <&cru SRST_OTPPHY>;
+ reset-names = "otp_phy";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpu_code: cpu-code@2 {
+ reg = <0x02 0x2>;
+ };
+
+ otp_cpu_version: cpu-version@8 {
+ reg = <0x08 0x1>;
+ bits = <3 3>;
+ };
+
+ otp_id: id@a {
+ reg = <0x0a 0x10>;
+ };
+
+ cpu_leakage: cpu-leakage@1a {
+ reg = <0x1a 0x1>;
+ };
+
+ log_leakage: log-leakage@1b {
+ reg = <0x1b 0x1>;
+ };
+
+ npu_leakage: npu-leakage@1c {
+ reg = <0x1c 0x1>;
+ };
+
+ gpu_leakage: gpu-leakage@1d {
+ reg = <0x1d 0x1>;
+ };
+ };
+
qos_gpu: qos@fe128000 {
compatible = "rockchip,rk3568-qos", "syscon";
reg = <0x0 0xfe128000 0x0 0x20>;
@@ -11,7 +11,7 @@ Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -1188,10 +1188,10 @@
@@ -1147,10 +1147,10 @@
};
rng: rng@fe388000 {
@@ -1,6 +1,6 @@
--- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
@@ -1365,6 +1365,16 @@
@@ -1363,6 +1363,16 @@
};
};