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Merge Official Source

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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
2026-04-14 10:54:59 +08:00
parent 77fd4ffac6 a45ce4c788
commit c7e6b40e89
384 changed files with 7761 additions and 39079 deletions
Download Patch File Download Diff File Expand all files Collapse all files
include/image-commands.mk
+1 -1
View File
@@ -324,7 +324,7 @@ define Build/copy-file
endef
# Create a header for a D-Link AI series recovery image and add it at the beginning of the image
# Currently supported: AQUILA M30, EAGLE M32 and R32
# Currently supported: AQUILA E30 and M30, EAGLE M32 and R32
# Arguments:
# 1: Start string of the header
# 2: Firmware version
package/base-files/files/sbin/sysupgrade
+15 -3
View File
@@ -201,12 +201,17 @@ build_list_of_backup_overlay_files() {
# do not backup files from packages, except those listed
# in conffiles and keep.d
{
if [ -f /usr/lib/opkg/status ]; then
find /usr/lib/opkg/info -type f -name "*.list" -exec cat {} \;
find /usr/lib/opkg/info -type f -name "*.control" -exec sed \
-ne '/^Alternatives/{s/^Alternatives: //;s/, /\n/g;p}' {} \; |
cut -f2 -d:
} | grep -v -x -F -f $conffiles |
elif [ -d /lib/apk/packages ]; then
find /lib/apk/packages -type f -name "*.list" -exec cat {} \;
find /lib/apk/packages -type f -name "*.alternatives" -exec cat {} \; |
tr ' ' '\n' |
cut -f2 -d:
fi | grep -v -x -F -f $conffiles |
grep -v -x -F -f $keepfiles | sort -u > "$packagesfiles"
rm -f "$keepfiles" "$conffiles"
fi
@@ -217,10 +222,14 @@ build_list_of_backup_overlay_files() {
( cd /overlay/upper/; find .$SAVE_OVERLAY_PATH \( -type f -o -type l \) $find_filter | sed \
-e 's,^\.,,' \
-e '\,^/etc/board.json$,d' \
-e '\,^/etc/luci-uploads/\.placeholder,d' \
-e '\,/[^/]*-opkg$,d' \
-e '\,^/etc/urandom.seed$,d' \
-e '\,^/etc/apk/world$,d' \
-e "\,^$INSTALLED_PACKAGES$,d" \
-e '\,^/usr/lib/opkg/.*,d' \
-e '\,^/lib/apk/.*,d' \
-e '\,^/run$,d' \
) | grep -v -x -F -f $packagesfiles > "$file"
rm -f "$packagesfiles"
@@ -298,6 +307,9 @@ create_backup_archive() {
\( -exec test -f /overlay/upper/{} \; -exec echo {} overlay \; \) -o \
\( -exec echo {} unknown \; \) \
\) | sed -e 's,.*/,,;s/\.list /\t/')" || ret=1
else
echo "Failed to detect installed packages metadata files." >&2
ret=1
fi
fi
fi
@@ -395,7 +407,7 @@ json_get_var forceable "forceable"
}
if [ -n "$CONF_IMAGE" ]; then
case "$(get_magic_word $CONF_IMAGE cat)" in
case "$(get_magic_word "$CONF_IMAGE" cat)" in
# .gz files
1f8b) ;;
*)
package/boot/arm-trusted-firmware-mvebu/Makefile
+14 -14
View File
@@ -7,9 +7,9 @@
include $(TOPDIR)/rules.mk
PKG_VERSION:=2.9
PKG_RELEASE:=2
PKG_HASH:=76a66a1de0c01aeb83dfc7b72b51173fe62c6e51d6fca17cc562393117bed08b
PKG_VERSION:=2.14
PKG_RELEASE:=1
PKG_HASH:=14fb6101f2ef424ec84c0296c3cbdeb7f79b22f5fbb46529bea0e362d0fab0d5
PKG_MAINTAINER:=Vladimir Vid <vladimir.vid@sartura.hr>
@@ -119,7 +119,6 @@ TFA_TARGETS:= \
edpu
TFA_MAKE_FLAGS += \
$(if $(CONFIG_BINUTILS_VERSION_2_37)$(CONFIG_BINUTILS_VERSION_2_38),,LDFLAGS="-no-warn-rwx-segments") \
CROSS_CM3=$(BUILD_DIR)/$(CM3_GCC_NAME)-$(CM3_GCC_RELEASE)-$(CM3_GCC_VERSION)/bin/arm-none-eabi- \
BL33=$(STAGING_DIR_IMAGE)/$(UBOOT)-u-boot.bin \
MV_DDR_PATH=$(BUILD_DIR)/$(MV_DDR_NAME) \
@@ -139,7 +138,7 @@ TFA_MAKE_FLAGS += \
mrvl_uart
A3700_UTILS_NAME:=a3700-utils
A3700_UTILS_RELEASE:=a3e1c67
A3700_UTILS_RELEASE:=a3e1c67b
A3700_UTILS_SOURCE=$(A3700_UTILS_NAME)-$(A3700_UTILS_RELEASE).tar.bz2
define Download/a3700-utils
@@ -152,33 +151,33 @@ define Download/a3700-utils
endef
CRYPTOPP_NAME:=cryptopp
CRYPTOPP_RELEASE:=4d0cad5
CRYPTOPP_RELEASE:=843d74c7
CRYPTOPP_SOURCE=$(CRYPTOPP_NAME)-$(CRYPTOPP_RELEASE).tar.bz2
define Download/cryptopp
FILE:=$(CRYPTOPP_SOURCE)
PROTO:=git
URL:=https://github.com/weidai11/cryptopp.git
SOURCE_VERSION:=4d0cad5401d1a2c998b314bc89288c9620d3021d
MIRROR_HASH:=6c53c8b4dfa07df0c5915a90c20f70c64d150b652cf5ac52e2eae08c5a9cc7cd
SOURCE_VERSION:=843d74c7c97f9e19a615b8ff3c0ca06599ca501b
MIRROR_HASH:=6d58162a0527971cac09208b7fbef3c02a8186ecdb3c28e03aabe00085183309
SUBDIR:=$(CRYPTOPP_NAME)
endef
MV_DDR_NAME:=mv-ddr-marvell
MV_DDR_RELEASE:=541616b
MV_DDR_RELEASE:=7bcb9dc7
MV_DDR_SOURCE:=$(MV_DDR_NAME)-$(MV_DDR_RELEASE).tar.bz2
define Download/mv-ddr-marvell
FILE:=$(MV_DDR_SOURCE)
PROTO:=git
URL:=https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git
SOURCE_VERSION:=541616bc5d25a0167c9901546255c55973e2c0f0
MIRROR_HASH:=9e86a986c7400ed1a72165a88150b6c494ebd87303b16314b43e5785e3f13068
SOURCE_VERSION:=7bcb9dc7ea7fa233bf96bd0350a4ec7c205e342e
MIRROR_HASH:=2afd31932731c5d30378aca4bdcb15cd0d56028727767c21a1e6885e190e85c4
SUBDIR:=$(MV_DDR_NAME)
endef
MOX_BB_NAME:=mox-boot-builder
MOX_BB_RELEASE:=604f8f51
MOX_BB_RELEASE:=d6d9646a
MOX_BB_SOURCE:=$(MOX_BB_NAME)-$(MOX_BB_RELEASE).tar.bz2
define Download/mox-boot-builder
@@ -186,8 +185,8 @@ define Download/mox-boot-builder
PROTO:=git
SUBMODULES:=skip
URL:=https://gitlab.nic.cz/turris/mox-boot-builder.git
SOURCE_VERSION:=604f8f51d97b4e59fa6d1e579101daa194d6ed2d
MIRROR_HASH:=b09337a7dde140f57e40133b6e7b7e1eb338e7cea9b15a3af6874824462f15f7
SOURCE_VERSION:=d6d9646abea1f536f4c5cf29f592f94e7dafe05d
MIRROR_HASH:=6e7822b58040f803632868270097bba0b0dbc5a1f856e5e46c7e76b90a8eeb27
SUBDIR:=$(MOX_BB_NAME)
endef
@@ -237,6 +236,7 @@ endef
define Build/Compile
+$(MAKE) \
CROSS_COMPILE=$(TARGET_CROSS) \
CROSS_CM3=$(BUILD_DIR)/$(CM3_GCC_NAME)-$(CM3_GCC_RELEASE)-$(CM3_GCC_VERSION)/bin/arm-none-eabi- \
WTMI_VERSION=$(MOX_BB_RELEASE) \
CRYPTOPP_PATH=$PWD/cryptopp/ \
package/boot/arm-trusted-firmware-mvebu/patches/001-no-git.patch
+3 -3
View File
@@ -3,7 +3,7 @@ overzealous checks.
--- a/plat/marvell/armada/a3k/common/a3700_common.mk
+++ b/plat/marvell/armada/a3k/common/a3700_common.mk
@@ -78,7 +78,6 @@ ifdef WTP
@@ -81,7 +81,6 @@ ifdef WTP
# Do not remove! Following checks are required to ensure correct TF-A builds, removing these checks leads to broken TF-A builds
$(if $(wildcard $(value WTP)/*),,$(error "'WTP=$(value WTP)' was specified, but '$(value WTP)' directory does not exist"))
@@ -16,6 +16,6 @@ overzealous checks.
$(if $(value MV_DDR_PATH),,$(error "Platform '${PLAT}' for ddr tool requires MV_DDR_PATH. Please set MV_DDR_PATH to point to the right directory"))
$(if $(wildcard $(value MV_DDR_PATH)/*),,$(error "'MV_DDR_PATH=$(value MV_DDR_PATH)' was specified, but '$(value MV_DDR_PATH)' directory does not exist"))
- $(if $(shell git -C $(value MV_DDR_PATH) rev-parse --show-cdup 2>&1),$(error "'MV_DDR_PATH=$(value MV_DDR_PATH)' was specified, but '$(value MV_DDR_PATH)' does not contain valid mv-ddr-marvell git repository"))
$(Q)$(MAKE) --no-print-directory -C $(WTP) MV_DDR_PATH=$(MV_DDR_PATH) DDR_TOPOLOGY=$(DDR_TOPOLOGY) mv_ddr
$(q)$(MAKE) --no-print-directory -C $(WTP) MV_DDR_PATH=$(MV_DDR_PATH) DDR_TOPOLOGY=$(DDR_TOPOLOGY) mv_ddr
$(BUILD_PLAT)/$(UART_IMAGE): $(BUILD_PLAT)/$(BOOT_IMAGE) $(BUILD_PLAT)/wtmi.bin $(TBB) $(TIMBUILD) $(TIMDDRTOOL)
$(BUILD_PLAT)/$(UART_IMAGE): $(BUILD_PLAT)/$(BOOT_IMAGE) $(BUILD_PLAT)/wtmi.bin $(TBB) $(TIMBUILD) $(TIMDDRTOOL) | $(BUILD_PLAT)/$(BUILD_UART)/ $$(@D)/
package/boot/arm-trusted-firmware-mvebu/patches/002-cryptopp_ldflags.patch
+3 -3
View File
@@ -6,8 +6,8 @@ Forward the host compiler flags to the compilation of the cryptopp library.
$(if $(wildcard $(CRYPTOPP_LIBDIR)/*),,$(error "Either 'CRYPTOPP_PATH' or 'CRYPTOPP_LIB' was set to '$(CRYPTOPP_LIBDIR)', but '$(CRYPTOPP_LIBDIR)' does not exist"))
$(if $(wildcard $(CRYPTOPP_INCDIR)/*),,$(error "Either 'CRYPTOPP_PATH' or 'CRYPTOPP_INCDIR' was set to '$(CRYPTOPP_INCDIR)', but '$(CRYPTOPP_INCDIR)' does not exist"))
ifdef CRYPTOPP_PATH
- $(Q)$(MAKE) --no-print-directory -C $(CRYPTOPP_PATH) -f GNUmakefile
+ $(Q)$(MAKE) --no-print-directory -C $(CRYPTOPP_PATH) -f GNUmakefile LDFLAGS="$(HOST_LDFLAGS)" CPPFLAGS="$(HOST_CPPFLAGS)"
- $(q)$(MAKE) --no-print-directory -C $(CRYPTOPP_PATH) -f GNUmakefile
+ $(q)$(MAKE) --no-print-directory -C $(CRYPTOPP_PATH) -f GNUmakefile LDFLAGS="$(HOST_LDFLAGS)" CPPFLAGS="$(HOST_CPPFLAGS)"
endif
$(Q)$(MAKE) --no-print-directory -C $(WTP)/wtptp/src/TBB_Linux -f TBB_linux.mak LIBDIR=$(CRYPTOPP_LIBDIR) INCDIR=$(CRYPTOPP_INCDIR)
$(q)$(MAKE) --no-print-directory -C $(WTP)/wtptp/src/TBB_Linux -f TBB_linux.mak LIBDIR=$(CRYPTOPP_LIBDIR) INCDIR=$(CRYPTOPP_INCDIR)
package/boot/uboot-tools/Makefile
+10 -5
View File
@@ -1,8 +1,8 @@
include $(TOPDIR)/rules.mk
PKG_DISTNAME:=u-boot
PKG_VERSION:=2026.01
PKG_RELEASE:=2
PKG_VERSION:=2026.04
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_DISTNAME)-$(PKG_VERSION).tar.bz2
PKG_SOURCE_URL:= \
@@ -10,7 +10,7 @@ PKG_SOURCE_URL:= \
https://mirror.cyberbits.eu/u-boot \
ftp://ftp.denx.de/pub/u-boot
PKG_URL:=https://docs.u-boot.org/en/latest/
PKG_HASH:=b60d5865cefdbc75da8da4156c56c458e00de75a49b80c1a2e58a96e30ad0d54
PKG_HASH:=ac7c04b8b7004923b00a4e5d6699c5df4d21233bac9fda690d8cfbc209fff2fd
PKG_SOURCE_SUBDIR:=$(PKG_DISTNAME)-$(PKG_VERSION)
PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_DISTNAME)-$(PKG_VERSION)
@@ -70,14 +70,19 @@ endef
define Build/Configure
$(call Build/Compile/Default,tools-only_defconfig)
$(SED) 's/CONFIG_TOOLS_LIBCRYPTO=y/# CONFIG_TOOLS_LIBCRYPTO is not set/' $(PKG_BUILD_DIR)/.config
$(SED) 's/CONFIG_TOOLS_KWBIMAGE=y/# CONFIG_TOOLS_KWBIMAGE is not set/' $(PKG_BUILD_DIR)/.config
$(PKG_BUILD_DIR)/scripts/config \
--file $(PKG_BUILD_DIR)/.config \
--disable TOOLS_KWBIMAGE \
--disable TOOLS_LIBCRYPTO \
--disable TOOLS_MKEFICAPSULE
endef
MAKE_FLAGS += \
ARCH="sandbox" \
TARGET_CFLAGS="$(TARGET_CFLAGS)" \
TARGET_LDFLAGS="$(TARGET_LDFLAGS)" \
PKG_CONFIG_SYSROOT_DIR="$(STAGING_DIR)" \
NO_PYTHON=1 \
V=$(if $(findstring c,$(OPENWRT_VERBOSE)),1,)
package/boot/uboot-tools/patches/003-tools-dumpimage-fix-tools-compile.patch
+1 -21
View File
@@ -44,27 +44,7 @@ Signed-off-by: Scott Mercer <TheRootEd24@gmail.com>
# Enable all the config-independent tools
ifneq ($(HOST_TOOLS_ALL),)
CONFIG_ARCH_KIRKWOOD = y
@@ -261,15 +281,10 @@ hostprogs-$(CONFIG_MIPS) += mips-relocs
hostprogs-$(CONFIG_ASN1_COMPILER) += asn1_compiler
HOSTCFLAGS_asn1_compiler.o = -idirafter $(srctree)/include
-HOSTCFLAGS_mkeficapsule.o += \
- $(shell pkg-config --cflags gnutls 2> /dev/null || echo "")
-HOSTLDLIBS_mkeficapsule += \
- $(shell pkg-config --libs gnutls 2> /dev/null || echo "-lgnutls")
-mkeficapsule-objs := generated/lib/uuid.o \
- generated/lib/sha1.o \
- $(LIBFDT_OBJS) \
- mkeficapsule.o
-hostprogs-$(CONFIG_TOOLS_MKEFICAPSULE) += mkeficapsule
+HOSTCFLAGS_mkeficapsule.o +=
+HOSTLDLIBS_mkeficapsule +=
+mkeficapsule-objs :=
+hostprogs-$(CONFIG_TOOLS_MKEFICAPSULE) +=
mkfwumdata-objs := mkfwumdata.o generated/lib/crc32.o
HOSTLDLIBS_mkfwumdata += -luuid
@@ -330,8 +345,7 @@ HOST_EXTRACFLAGS += -include $(srctree)/
@@ -329,8 +349,7 @@ HOST_EXTRACFLAGS += -include $(srctree)/
-I$(srctree)/scripts/dtc/libfdt \
-I$(srctree)/tools \
-DUSE_HOSTCC \
package/boot/uboot-tools/patches/013-tools-fit_check_sign-all-image-types.patch
+4 -4
View File
@@ -28,7 +28,7 @@
/* Return the first error we found */
--- a/boot/image-fit.c
+++ b/boot/image-fit.c
@@ -2079,8 +2079,10 @@ int fit_image_load(struct bootm_headers
@@ -2095,8 +2095,10 @@ int fit_image_load(struct bootm_headers
fit_uname_config = fit_uname_configp ? *fit_uname_configp : NULL;
fit_base_uname_config = NULL;
prop_name = fit_get_image_type_property(ph_type);
@@ -39,7 +39,7 @@
bootstage_mark(bootstage_id + BOOTSTAGE_SUB_FORMAT);
ret = fit_check_format(fit, IMAGE_SIZE_INVAL);
@@ -2117,7 +2119,9 @@ int fit_image_load(struct bootm_headers
@@ -2134,7 +2136,9 @@ int fit_image_load(struct bootm_headers
cfg_noffset = ret;
fit_base_uname_config = fdt_get_name(fit, cfg_noffset, NULL);
@@ -49,8 +49,8 @@
/* Remember this config */
if (image_type == IH_TYPE_KERNEL)
images->fit_uname_cfg = fit_base_uname_config;
@@ -2140,7 +2144,9 @@ int fit_image_load(struct bootm_headers
fit_uname = fit_get_name(fit, noffset, NULL);
@@ -2156,7 +2160,9 @@ int fit_image_load(struct bootm_headers
image_ph_phase(ph_type));
}
if (noffset < 0) {
+#ifndef USE_HOSTCC
package/boot/uboot-tools/uboot-envtools/files/mediatek_filogic
+1
View File
@@ -125,6 +125,7 @@ comfast,cf-e393ax|\
iptime,ax3000m)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x80000"
;;
dlink,aquila-pro-ai-e30-a1|\
dlink,aquila-pro-ai-m30-a1|\
dlink,aquila-pro-ai-m60-a1)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x40000" "0x40000"
package/boot/uboot-tools/uboot-envtools/files/ramips
+1
View File
@@ -51,6 +51,7 @@ asus,rt-ax54|\
asus,4g-ax56|\
belkin,rt1800|\
c-life,xg1|\
edup,ep-rt2983|\
elecom,wrc-x1800gs|\
h3c,tx1800-plus|\
h3c,tx1801-plus|\
package/boot/uboot-tools/uboot-envtools/files/realtek
+2 -1
View File
@@ -27,7 +27,8 @@ zyxel,gs1900-24e-a1|\
zyxel,gs1900-24ep-a1|\
zyxel,gs1900-24hp-a1|\
zyxel,gs1900-24hp-b1|\
zyxel,gs1900-48-a1)
zyxel,gs1900-48-a1|\
zyxel,gs1900-48hp-a1)
ubootenv_add_mtd "u-boot-env" "0x0" "0x400" "0x10000"
ubootenv_add_sys_mtd "u-boot-env2" "0x0" "0x1000" "0x10000"
;;
package/firmware/linux-firmware/Makefile
+2 -2
View File
@@ -8,12 +8,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=linux-firmware
PKG_VERSION:=20260309
PKG_VERSION:=20260410
PKG_RELEASE:=1
PKG_SOURCE_URL:=@KERNEL/linux/kernel/firmware
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
PKG_HASH:=c74cc6f562b58ad5bc6b2b00a61abc29c9e49e06126e7ba34fbca9928e07a96c
PKG_HASH:=b7812ed6d59f6b09ecceddaa0be842a7e82a79cc0e46ca60478a4ebf02f1e178
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
package/kernel/lantiq/ltq-atm/Makefile
+1 -1
View File
@@ -7,7 +7,7 @@ include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=ltq-atm
PKG_RELEASE:=3
PKG_RELEASE:=4
PKG_MAINTAINER:=John Crispin <john@phrozen.org>
PKG_LICENSE:=GPL-2.0+
package/kernel/lantiq/ltq-atm/src/ltq_atm.c
+3 -10
View File
@@ -38,7 +38,7 @@
#include <linux/atmdev.h>
#include <linux/mod_devicetable.h>
#include <linux/platform_device.h>
#include <linux/of_device.h>
#include <linux/of.h>
#include <linux/atm.h>
#include <linux/clk.h>
#include <linux/interrupt.h>
@@ -1756,20 +1756,12 @@ MODULE_DEVICE_TABLE(of, ltq_atm_match);
static int ltq_atm_probe(struct platform_device *pdev)
{
const struct of_device_id *match;
struct ltq_atm_ops *ops = NULL;
const struct ltq_atm_ops *ops;
int ret;
int port_num;
struct port_cell_info port_cell = {0};
char ver_str[256];
match = of_match_device(ltq_atm_match, &pdev->dev);
if (!match) {
dev_err(&pdev->dev, "failed to find matching device\n");
return -ENOENT;
}
ops = (struct ltq_atm_ops *) match->data;
check_parameters();
ret = init_priv_data();
@@ -1778,6 +1770,7 @@ static int ltq_atm_probe(struct platform_device *pdev)
goto INIT_PRIV_DATA_FAIL;
}
ops = of_device_get_match_data(&pdev->dev);
ret = ops->init(pdev);
if (ret)
return ret;
package/kernel/linux/modules/crypto.mk
+7 -7
View File
@@ -145,7 +145,7 @@ define KernelPackage/crypto-crc32
HIDDEN:=1
FILES:=$(LINUX_DIR)/crypto/crc32_generic.ko@lt6.18 \
$(LINUX_DIR)/crypto/crc32-cryptoapi.ko@ge6.18
AUTOLOAD:=$(call AutoLoad,04,LINUX_6_12:crc32_generic !LINUX_6_12:crc32-cryptoapi,1)
AUTOLOAD:=$(call AutoLoad,04,crc32_generic@lt6.18 crc32-cryptoapi@ge6.18,1)
$(call AddDepends/crypto)
endef
@@ -158,7 +158,7 @@ define KernelPackage/crypto-crc32c
KCONFIG:=CONFIG_CRYPTO_CRC32C
FILES:=$(LINUX_DIR)/crypto/crc32c_generic.ko@lt6.18 \
$(LINUX_DIR)/crypto/crc32c-cryptoapi.ko@ge6.18
AUTOLOAD:=$(call AutoLoad,04,LINUX_6_12:crc32c_generic !LINUX_6_12:crc32c-cryptoapi,1)
AUTOLOAD:=$(call AutoLoad,04,crc32c_generic@lt6.18 crc32c-cryptoapi@ge6.18,1)
$(call AddDepends/crypto)
endef
@@ -744,7 +744,7 @@ define KernelPackage/crypto-md5
CONFIG_CRYPTO_MD5_PPC
FILES:=$(LINUX_DIR)/crypto/md5.ko \
$(LINUX_DIR)/lib/crypto/libmd5.ko@ge6.18
AUTOLOAD:=$(call AutoLoad,09,md5 !LINUX_6_12:libmd5)
AUTOLOAD:=$(call AutoLoad,09,md5 libmd5@ge6.18)
$(call AddDepends/crypto)
endef
@@ -838,7 +838,7 @@ ifndef CONFIG_TARGET_x86_64
$(LINUX_DIR)/arch/x86/crypto/serpent-sse2-i586.ko \
$(LINUX_DIR)/crypto/cryptd.ko@lt6.18 \
$(LINUX_DIR)/crypto/crypto_simd.ko@lt6.18
AUTOLOAD+= $(call AutoLoad,10,LINUX_6_12:cryptd \
AUTOLOAD+= $(call AutoLoad,10,cryptd@lt6.18 \
serpent-sse2-i586 twofish-i586 blowfish_generic)
endef
endif
@@ -983,7 +983,7 @@ define KernelPackage/crypto-sha1
CONFIG_CRYPTO_SHA1_SSSE3@lt6.18
FILES:=$(LINUX_DIR)/crypto/sha1_generic.ko@lt6.18 \
$(LINUX_DIR)/crypto/sha1.ko@ge6.18
AUTOLOAD:=$(call AutoLoad,09,LINUX_6_12:sha1_generic !LINUX_6_12:sha1)
AUTOLOAD:=$(call AutoLoad,09,sha1_generic@lt6.18 sha1@ge6.18)
$(call AddDepends/crypto)
endef
@@ -1069,7 +1069,7 @@ define KernelPackage/crypto-sha256
$(LINUX_DIR)/crypto/sha256_generic.ko@lt6.18 \
$(LINUX_DIR)/crypto/sha256.ko@ge6.18 \
$(LINUX_DIR)/lib/crypto/libsha256.ko
AUTOLOAD:=$(call AutoLoad,09,LINUX_6_12:sha256_generic !LINUX_6_12:sha256)
AUTOLOAD:=$(call AutoLoad,09,sha256_generic@lt6.18 sha256@ge6.18)
$(call AddDepends/crypto)
endef
@@ -1130,7 +1130,7 @@ define KernelPackage/crypto-sha512
FILES:=$(LINUX_DIR)/crypto/sha512_generic.ko@lt6.18 \
$(LINUX_DIR)/crypto/sha512.ko@ge6.18 \
$(LINUX_DIR)/lib/crypto/libsha512.ko@ge6.18
AUTOLOAD:=$(call AutoLoad,09,LINUX_6_12:sha512_generic !LINUX_6_12:sha512)
AUTOLOAD:=$(call AutoLoad,09,sha512_generic@lt6.18 sha512@ge6.18)
$(call AddDepends/crypto)
endef
package/kernel/linux/modules/netdevices.mk
+1 -1
View File
@@ -191,7 +191,7 @@ define KernelPackage/libphy
CONFIG_MDIO_BUS
FILES:=$(LINUX_DIR)/drivers/net/phy/libphy.ko \
$(LINUX_DIR)/drivers/net/phy/mdio-bus.ko@ge6.18
AUTOLOAD:=$(call AutoLoad,15,libphy !LINUX_6_12:mdio-bus,1)
AUTOLOAD:=$(call AutoLoad,15,libphy mdio-bus@ge6.18,1)
endef
define KernelPackage/libphy/description
package/kernel/linux/modules/usb.mk
+1 -1
View File
@@ -584,7 +584,7 @@ define KernelPackage/usb-dwc3-qcom
FILES:= \
$(LINUX_DIR)/drivers/usb/dwc3/dwc3-qcom.ko \
$(LINUX_DIR)/drivers/usb/dwc3/dwc3-qcom-legacy.ko@ge6.18
AUTOLOAD:=$(call AutoLoad,53,dwc3-qcom !LINUX_6_12:dwc3-qcom-legacy,1)
AUTOLOAD:=$(call AutoLoad,53,dwc3-qcom dwc3-qcom-legacy@ge6.18,1)
$(call AddDepends/usb)
endef
package/kernel/ntfs/Makefile
+53
View File
@@ -0,0 +1,53 @@
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=linux-ntfs
PKG_RELEASE:=1
PKG_BUILD_PARALLEL:=1
PKG_SOURCE_DATE:=2026-03-03
PKG_SOURCE_URL:=https://github.com/namjaejeon/linux-ntfs
PKG_SOURCE_PROTO:=git
PKG_SOURCE_VERSION:=6f6beff9ac623c691e8da7455a0e9b14bf957108
PKG_MIRROR_HASH:=b11f051e41e9993421753961bf948380bdf705a043a83f9b55dcbd7dc664fae2
PKG_LICENSE:=GPL-2.0-or-later
PKG_MAINTAINER:=Qingfang Deng <dqfext@gmail.com>
include $(INCLUDE_DIR)/package.mk
define KernelPackage/fs-ntfs
SECTION:=kernel
CATEGORY:=Kernel modules
SUBMENU:=Filesystems
TITLE:=NTFS file system support
DEPENDS:=+kmod-nls-base
URL:=$(PKG_SOURCE_URL)
FILES:=$(PKG_BUILD_DIR)/ntfs.ko
AUTOLOAD:=$(call AutoProbe,ntfs)
endef
define KernelPackage/fs-ntfs/description
NTFS is the file system of Microsoft Windows NT, 2000, XP and 2003.
This allows you to mount devices formatted with the ntfs file system.
endef
NOSTDINC_FLAGS += \
$(KERNEL_NOSTDINC_FLAGS) \
-DCONFIG_NTFS_FS_POSIX_ACL
EXTRA_KCONFIG:= \
CONFIG_NTFS_FS=m
MAKE_OPTS:= \
M="$(PKG_BUILD_DIR)" \
NOSTDINC_FLAGS="$(NOSTDINC_FLAGS)" \
$(EXTRA_KCONFIG)
define Build/Compile
+$(KERNEL_MAKE) $(PKG_JOBS) $(MAKE_OPTS) modules
endef
$(eval $(call KernelPackage,fs-ntfs))
package/libs/openssl/Makefile
+2 -2
View File
@@ -8,7 +8,7 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=openssl
PKG_VERSION:=3.5.5
PKG_VERSION:=3.5.6
PKG_RELEASE:=1
PKG_BUILD_FLAGS:=no-mips16 gc-sections no-lto
@@ -21,7 +21,7 @@ PKG_SOURCE_URL:= \
https://www.openssl.org/source/old/$(PKG_BASE)/ \
https://github.com/openssl/openssl/releases/download/$(PKG_NAME)-$(PKG_VERSION)/
PKG_HASH:=b28c91532a8b65a1f983b4c28b7488174e4a01008e29ce8e69bd789f28bc2a89
PKG_HASH:=deae7c80cba99c4b4f940ecadb3c3338b13cb77418409238e57d7f31f2a3b736
PKG_LICENSE:=Apache-2.0
PKG_LICENSE_FILES:=LICENSE.txt
package/network/config/wifi-scripts/files-ucode/usr/share/ucode/wifi/supplicant.uc
+7 -5
View File
@@ -16,20 +16,22 @@ function set_fixed_freq(data, config) {
set_default(config, 'fixed_freq', 1);
set_default(config, 'frequency', data.frequency);
if (data.htmode in [ 'VHT80', 'HE80' ])
if (data.htmode in [ 'VHT80', 'HE80', 'EHT80' ])
set_default(config, 'max_oper_chwidth', 1);
else if (data.htmode in [ 'VHT160', 'HE160' ])
else if (data.htmode in [ 'VHT160', 'HE160', 'EHT160' ])
set_default(config, 'max_oper_chwidth', 2);
else if (data.htmode in [ 'VHT20', 'VHT40', 'HE20', 'HE40' ])
else if (data.htmode in [ 'EHT320' ])
set_default(config, 'max_oper_chwidth', 9);
else if (data.htmode in [ 'VHT20', 'VHT40', 'HE20', 'HE40', 'EHT20', 'EHT40' ])
set_default(config, 'max_oper_chwidth', 0);
else
set_default(config, 'disable_vht', true);
if (data.htmode in [ 'NOHT' ])
set_default(config, 'disable_ht', true);
else if (data.htmode in [ 'HT20', 'VHT20', 'HE20' ])
else if (data.htmode in [ 'HT20', 'VHT20', 'HE20', 'EHT20' ])
set_default(config, 'disable_ht40', true);
else if (data.htmode in [ 'VHT40', 'VHT80', 'VHT160', 'HE40', 'HE80', 'HE160' ])
else if (data.htmode in [ 'VHT40', 'VHT80', 'VHT160', 'HE40', 'HE80', 'HE160', 'EHT40', 'EHT80', 'EHT160', 'EHT320' ])
set_default(config, 'ht40', true);
if (wildcard(data.htmode, 'VHT*'))
package/network/utils/ethtool/Makefile
+1 -4
View File
@@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=ethtool
PKG_VERSION:=6.19
PKG_RELEASE:=1
PKG_RELEASE:=2
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
@@ -61,9 +61,6 @@ else
CONFIGURE_ARGS += --disable-netlink --disable-pretty-dump
endif
# enable support for input_xfrm with kernels newer than 6.6
CONFIGURE_ARGS += --enable-rss-input-xfrm
define Package/ethtool/install
$(INSTALL_DIR) $(1)/usr/sbin
$(INSTALL_BIN) $(PKG_BUILD_DIR)/ethtool $(1)/usr/sbin
package/network/utils/ethtool/patches/0001-ethtool-make-building-for-RSS-input-xfrm-optional.patch
-72
View File
@@ -1,72 +0,0 @@
From c88eb6f4e9b2d8f71f3391db2bf0ec82ecccae81 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Wed, 12 Feb 2025 04:12:42 +0000
Subject: [PATCH] ethtool: make building for RSS input xfrm optional
Unfortunately there is no way to detect at runtime if the kernel the
support for RSS input transformation, and the default value
RXH_XFRM_NO_CHANGE (0xff) used by newer ethtool results in breakage
with older kernels.
As a stop-gap solution simply don't compile with support for input
xfrm by default.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
configure.ac | 10 ++++++++++
ethtool.c | 10 ++++++++++
2 files changed, 20 insertions(+)
--- a/configure.ac
+++ b/configure.ac
@@ -45,6 +45,16 @@ if test x$enable_pretty_dump = xyes; the
fi
AM_CONDITIONAL([ETHTOOL_ENABLE_PRETTY_DUMP], [test x$enable_pretty_dump = xyes])
+AC_ARG_ENABLE(rss-input-xfrm,
+ [ --enable-rss-input-xfrm build with support for RSS input transformation (disabled by default)],
+ ,
+ enable_rss_input_xfrm=no)
+if test x$enable_rss_input_xfrm = xyes; then
+ AC_DEFINE(ETHTOOL_ENABLE_RSS_INPUT_XFRM, 1,
+ [Define this to enable building with support for RSS input transformation.])
+fi
+AM_CONDITIONAL([ETHTOOL_ENABLE_RSS_INPUT_XFRM], [test x$enable_rss_input_xfrm = xyes])
+
AC_ARG_WITH([bash-completion-dir],
AS_HELP_STRING([--with-bash-completion-dir[=PATH]],
[Install the bash-completion script in this directory. @<:@default=yes@:>@]),
--- a/ethtool.c
+++ b/ethtool.c
@@ -4176,7 +4176,7 @@ static int do_grxfh(struct cmd_context *
}
if (rss->hfunc)
printf(" Unknown hash function: 0x%x\n", rss->hfunc);
-
+#ifdef ETHTOOL_ENABLE_RSS_INPUT_XFRM
printf("RSS input transformation:\n");
printf(" symmetric-xor: %s\n",
(rss->input_xfrm & RXH_XFRM_SYM_XOR) ? "on" : "off");
@@ -4188,6 +4188,7 @@ static int do_grxfh(struct cmd_context *
if (rss->input_xfrm)
printf(" Unknown bits in RSS input transformation: 0x%x\n",
rss->input_xfrm);
+#endif
out:
free(hfuncs);
@@ -4509,7 +4510,15 @@ static int do_srxfh(struct cmd_context *
rss->cmd = ETHTOOL_SRSSH;
rss->rss_context = rss_context;
rss->hfunc = req_hfunc;
+#ifdef ETHTOOL_ENABLE_RSS_INPUT_XFRM
rss->input_xfrm = req_input_xfrm;
+#else
+ if (req_input_xfrm != 0xff) {
+ perror("Compiled for kernel without support for input transformation");
+ err = 1;
+ goto free;
+ }
+#endif
if (delete) {
rss->indir_size = rss->key_size = 0;
} else {
package/system/procd/Makefile
+3 -3
View File
@@ -12,9 +12,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/procd.git
PKG_MIRROR_HASH:=8bd86938479609045e1ceebed904e4f5cb96fdb38220d41c3579b7e764fbb05b
PKG_SOURCE_DATE:=2026-03-13
PKG_SOURCE_VERSION:=58eb263d5abe03f8c1280bdfa65a3b052614215d
PKG_MIRROR_HASH:=cad2707975d99c861065516f250029c872c95441eb85da36024368f601f77b99
PKG_SOURCE_DATE:=2026-03-25
PKG_SOURCE_VERSION:=cd7a4e5f8b8e4e7ce38f7e2be577802b7ec4ff3e
CMAKE_INSTALL:=1
PKG_LICENSE:=GPL-2.0
scripts/ext-tools.sh
+4 -8
View File
@@ -4,10 +4,6 @@ TOOLS_TAR=""
HOST_BUILD_DIR=$(pwd)/"build_dir/host"
HOST_STAGING_DIR_STAMP=$(pwd)/"staging_dir/host/stamp"
refresh_timestamps() {
find -H "$1" -not -type l -print0 | xargs -0 touch
}
extract_prebuilt_tar() {
tar -xf "$1"
}
@@ -18,15 +14,15 @@ refresh_prebuilt_tools() {
exit 1
fi
refresh_timestamps "$HOST_BUILD_DIR"
sleep 1
if [ ! -d "$HOST_STAGING_DIR_STAMP" ]; then
echo "Can't find Host Staging Dir Stamp "$HOST_STAGING_DIR_STAMP"" >&2
exit 1
fi
refresh_timestamps "$HOST_STAGING_DIR_STAMP"
local now
now=$(date +%Y%m%d%H%M.%S)
find -H "$HOST_BUILD_DIR" "$HOST_STAGING_DIR_STAMP" \
-type f -empty -print0 | xargs -0 touch -t "$now"
return 0
}
target/linux/ath79/Makefile
+1
View File
@@ -9,6 +9,7 @@ SUBTARGETS:=generic mikrotik nand tiny
FEATURES:=ramdisk squashfs usbgadget
KERNEL_PATCHVER:=6.12
KERNEL_TESTING_PATCHVER:=6.18
include $(INCLUDE_DIR)/target.mk
target/linux/realtek/rtl930x/config-6.12 → target/linux/ath79/config-6.18
+70 -113
View File
@@ -1,20 +1,26 @@
CONFIG_AQUANTIA_PHY=y
# CONFIG_AG71XX is not set
CONFIG_AG71XX_LEGACY=y
# CONFIG_AG71XX_LEGACY_DEBUG is not set
CONFIG_AG71XX_LEGACY_DEBUG_FS=y
CONFIG_AR8216_PHY=y
CONFIG_AR8216_PHY_LEDS=y
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BOARD_SCACHE=y
CONFIG_AT803X_PHY=y
CONFIG_ATH79=y
CONFIG_ATH79_WDT=y
CONFIG_CEVT_R4K=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMDLINE="rootfstype=squashfs,jffs2"
CONFIG_CMDLINE_BOOL=y
# CONFIG_CMDLINE_OVERRIDE is not set
CONFIG_COMMON_CLK=y
# CONFIG_COMMON_CLK_REALTEK is not set
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CONSOLE_LOGLEVEL_DEFAULT=15
CONFIG_CPU_BIG_ENDIAN=y
CONFIG_CPU_GENERIC_DUMP_TLB=y
CONFIG_CPU_HAS_DIEI=y
@@ -22,29 +28,25 @@ CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_RIXI=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
CONFIG_CPU_MIPSR2=y
CONFIG_CPU_MIPSR2_IRQ_EI=y
CONFIG_CPU_MIPSR2_IRQ_VI=y
CONFIG_CPU_MITIGATIONS=y
CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
CONFIG_CPU_R4K_CACHE_TLB=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CPU_SUPPORTS_MSA=y
CONFIG_CRC_CCITT=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CSRC_R4K=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_SECTION_MISMATCH=y
CONFIG_DMA_NEED_SYNC=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DTC=y
CONFIG_EARLY_PRINTK=y
CONFIG_EARLY_PRINTK_8250=y
CONFIG_EEPROM_AT24=y
CONFIG_ETHERNET_PACKET_MANGLE=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_FIXED_PHY=y
CONFIG_FORCE_NR_CPUS=y
@@ -59,7 +61,6 @@ CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IOMAP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_LIB_ASHLDI3=y
@@ -76,104 +77,76 @@ CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_74X164=y
CONFIG_GPIO_ATH79=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_PCA953X=y
CONFIG_GPIO_REALTEK_OTTO=y
CONFIG_GRO_CELLS=y
# CONFIG_GPIO_LATCH_MIKROTIK is not set
# CONFIG_GPIO_RB91X_KEY is not set
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HIGHMEM=y
CONFIG_HWMON=y
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_GPIO=y
CONFIG_I2C_GPIO_SHARED=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_RTL9300=y
CONFIG_I2C_RTL9300=y
CONFIG_I2C_SMBUS=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
CONFIG_JFFS2_ZLIB=y
CONFIG_LEDS_GPIO=y
# CONFIG_LEDS_RTL8231 is not set
# CONFIG_LEDS_RESET is not set
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_MACH_REALTEK_RTL=y
CONFIG_MARVELL_PHY=y
CONFIG_MDIO_BITBANG=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MDIO_I2C=y
CONFIG_MDIO_REALTEK_OTTO=y
CONFIG_MDIO_REALTEK_OTTO_AUX=y
CONFIG_MDIO_REALTEK_OTTO_SERDES=y
CONFIG_MDIO_SMBUS=y
# CONFIG_MFD_HASIVO_STC8 is not set
CONFIG_MFD_RTL8231=y
CONFIG_MDIO_GPIO=y
# CONFIG_MFD_RB4XX_CPLD is not set
CONFIG_MFD_SYSCON=y
CONFIG_MIGRATION=y
CONFIG_MIPS=y
CONFIG_MIPS_ASID_BITS=8
CONFIG_MIPS_ASID_SHIFT=0
CONFIG_MIPS_CLOCK_VSYSCALL=y
# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set
# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
CONFIG_MIPS_CMDLINE_FROM_DTB=y
CONFIG_MIPS_CPU_SCACHE=y
CONFIG_MIPS_EXTERNAL_TIMER=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MIPS_MT=y
# CONFIG_MIPS_MT_FPAFF is not set
CONFIG_MIPS_MT_SMP=y
# CONFIG_MIPS_NO_APPENDED_DTB is not set
CONFIG_MIPS_NR_CPU_NR_MAP=2
CONFIG_MIPS_PERF_SHARED_TC_COUNTERS=y
CONFIG_MIPS_RAW_APPENDED_DTB=y
CONFIG_MIPS_SPRAM=y
CONFIG_MMU_LAZY_TLB_REFCOUNT=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_CFI_I2 is not set
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_JEDECPROBE=y
# CONFIG_MTD_NAND_ECC_REALTEK is not set
# CONFIG_MTD_SPI_NAND is not set
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
CONFIG_MTD_PARSER_CYBERTAN=y
# CONFIG_MTD_PARSER_TPLINK_SAFELOADER is not set
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPLIT_BRNIMAGE_FW=y
CONFIG_MTD_SPLIT_EVA_FW=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_ELF_FW=y
CONFIG_MTD_SPLIT_LZMA_FW=y
CONFIG_MTD_SPLIT_SEAMA_FW=y
CONFIG_MTD_SPLIT_TPLINK_FW=y
CONFIG_MTD_SPLIT_UIMAGE_FW=y
CONFIG_MTD_SPLIT_WRGG_FW=y
CONFIG_MTD_VIRT_CONCAT=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NET_DEVLINK=y
CONFIG_NET_DSA=y
CONFIG_NET_DSA_RTL83XX=y
# CONFIG_NET_DSA_RTL83XX_RTL930X_L3_OFFLOAD is not set
CONFIG_NET_DSA_TAG_RTL_OTTO=y
CONFIG_NET_EGRESS=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_INGRESS=y
CONFIG_NET_RTL838X=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_XGRESS=y
CONFIG_NO_EXCEPT_FILL=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
CONFIG_NR_CPUS=2
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_NVMEM_LAYOUT_U_BOOT_ENV=y
CONFIG_NVMEM_SYSFS=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
@@ -182,82 +155,66 @@ CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_PAGE_BLOCK_MAX_ORDER=10
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PCI=y
CONFIG_PCI_AR71XX=y
CONFIG_PCI_AR724X=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DRIVERS_LEGACY=y
CONFIG_PCS_RTL_OTTO=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
CONFIG_PHYLINK=y
# CONFIG_PHY_AR7100_USB is not set
# CONFIG_PHY_AR7200_USB is not set
# CONFIG_PHY_ATH79_USB is not set
CONFIG_PINCTRL=y
CONFIG_PINCTRL_RTL8231=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_GPIO_RESTART=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_QCOM_NET_PHYLIB=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RATIONAL=y
CONFIG_REALTEK_OTTO_TIMER=y
CONFIG_REALTEK_OTTO_WDT=y
CONFIG_REALTEK_PHY=y
CONFIG_REALTEK_PHY_HWMON=y
CONFIG_REALTEK_PHY_MULTIPORT=y
CONFIG_REALTEK_THERMAL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_MDIO=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGULATOR=y
CONFIG_RESET_ATH79=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
CONFIG_RTL8261N_PHY=y
# CONFIG_RTL838X is not set
# CONFIG_RTL839X is not set
CONFIG_RTL930X=y
# CONFIG_RTL931X is not set
CONFIG_SENSORS_GPIO_FAN=y
CONFIG_SERIAL_8250_NR_UARTS=1
CONFIG_SERIAL_8250_RUNTIME_UARTS=1
CONFIG_SERIAL_AR933X=y
CONFIG_SERIAL_AR933X_CONSOLE=y
CONFIG_SERIAL_AR933X_NR_UARTS=2
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SFP=y
CONFIG_SMP=y
CONFIG_SMP_UP=y
CONFIG_SPI=y
CONFIG_SPI_AR934X=y
CONFIG_SPI_ATH79=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
# CONFIG_SPI_REALTEK_SNAND is not set
# CONFIG_SPI_RB4XX is not set
# CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU is not set
CONFIG_SQUASHFS_COMPILE_DECOMP_SINGLE=y
CONFIG_SQUASHFS_DECOMP_SINGLE=y
CONFIG_SWCONFIG=y
CONFIG_SWCONFIG_LEDS=y
CONFIG_SWPHY=y
CONFIG_SYNC_R4K=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_HIGHMEM=y
CONFIG_SYS_SUPPORTS_MIPS16=y
CONFIG_SYS_SUPPORTS_MULTITHREADING=y
CONFIG_SYS_SUPPORTS_SCHED_SMT=y
CONFIG_SYS_SUPPORTS_SMP=y
CONFIG_SYS_SUPPORTS_ZBOOT=y
CONFIG_SYS_SUPPORTS_ZBOOT_UART_PROM=y
CONFIG_TARGET_ISA_REV=2
CONFIG_THERMAL=y
# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_HWMON=y
CONFIG_THERMAL_OF=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TINY_SRCU=y
CONFIG_USE_GENERIC_EARLY_PRINTK_8250=y
CONFIG_USB_SUPPORT=y
CONFIG_USE_OF=y
CONFIG_WATCHDOG_CORE=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZBOOT_LOAD_ADDRESS=0x0
target/linux/ath79/dts/ar7161_adtran_bsap1880.dtsi
+10
View File
@@ -75,6 +75,16 @@
&pcie0 {
status = "okay";
wifi@11,0 { /* 2.4 GHz */
compatible = "pci168c,0027";
reg = <0x8800 0 0 0 0>;
};
wifi@12,0 { /* 5 GHz */
compatible = "pci168c,0027";
reg = <0x9000 0 0 0 0>;
};
};
&spi {
target/linux/ath79/dts/ar7161_siemens_ws-ap3610.dts
+10
View File
@@ -69,6 +69,16 @@
&pcie0 {
status = "okay";
wifi@11,0 { /* 2.4 GHz */
compatible = "pci168c,0027";
reg = <0x8800 0 0 0 0>;
};
wifi@12,0 { /* 5 GHz */
compatible = "pci168c,0027";
reg = <0x9000 0 0 0 0>;
};
};
&mdio0 {
target/linux/ath79/files/drivers/gpio/gpio-latch-mikrotik.c
+8
View File
@@ -12,6 +12,7 @@
#include <linux/gpio/consumer.h>
#include <linux/gpio/driver.h>
#include <linux/platform_device.h>
#include <linux/version.h>
#define GPIO_LATCH_DRIVER_NAME "gpio-latch-mikrotik"
#define GPIO_LATCH_LINES 9
@@ -61,7 +62,11 @@ gpio_latch_get(struct gpio_chip *gc, unsigned offset)
return ret;
}
#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,17,0)
static int
#else
static void
#endif
gpio_latch_set(struct gpio_chip *gc, unsigned offset, int value)
{
struct gpio_latch_chip *glc = gpiochip_get_data(gc);
@@ -76,6 +81,9 @@ gpio_latch_set(struct gpio_chip *gc, unsigned offset, int value)
gpio_latch_lock(glc, enable_latch);
gpiod_set_raw_value_cansleep(glc->gpios[offset], value);
gpio_latch_unlock(glc, disable_latch);
#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,17,0)
return 0;
#endif
}
static int
target/linux/ath79/files/drivers/gpio/gpio-rb4xx.c
+10 -1
View File
@@ -18,6 +18,7 @@
#include <linux/gpio/driver.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/version.h>
#include <mfd/rb4xx-cpld.h>
@@ -93,10 +94,18 @@ static int rb4xx_gpio_get(struct gpio_chip *chip, unsigned int offset)
return ret;
}
static void rb4xx_gpio_set(struct gpio_chip *chip, unsigned int offset,
#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,17,0)
static int
#else
static void
#endif
rb4xx_gpio_set(struct gpio_chip *chip, unsigned int offset,
int value)
{
rb4xx_gpio_cpld_set(gpiochip_get_data(chip), offset, value);
#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,17,0)
return 0;
#endif
}
static int rb4xx_gpio_probe(struct platform_device *pdev)
target/linux/ath79/files/drivers/gpio/gpio-rb91x-key.c
+10 -1
View File
@@ -20,6 +20,7 @@
#include <linux/gpio/driver.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/version.h>
#define GPIO_RB91X_KEY_DRIVER_NAME "gpio-rb91x-key"
@@ -88,7 +89,12 @@ static int gpio_rb91x_key_direction_input(struct gpio_chip *gc, unsigned offset)
}
}
static void gpio_rb91x_key_set(struct gpio_chip *gc, unsigned offset, int value)
#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,17,0)
static int
#else
static void
#endif
gpio_rb91x_key_set(struct gpio_chip *gc, unsigned offset, int value)
{
struct gpio_rb91x_key *drvdata = gpiochip_get_data(gc);
struct gpio_desc *gpio = drvdata->gpio;
@@ -117,6 +123,9 @@ static void gpio_rb91x_key_set(struct gpio_chip *gc, unsigned offset, int value)
}
mutex_unlock(&drvdata->mutex);
#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,17,0)
return 0;
#endif
}
static int gpio_rb91x_key_direction_output(struct gpio_chip *gc, unsigned offset,
target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
+9
View File
@@ -15,6 +15,7 @@
#include <linux/of_net.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/version.h>
#include "ag71xx.h"
#define AG71XX_DEFAULT_MSG_ENABLE \
@@ -990,7 +991,11 @@ static void ag71xx_hw_disable(struct ag71xx *ag)
ag71xx_dma_reset(ag);
napi_disable(&ag->napi);
#if LINUX_VERSION_CODE < KERNEL_VERSION(6,16,0)
del_timer_sync(&ag->oom_timer);
#else
timer_delete_sync(&ag->oom_timer);
#endif
ag71xx_rings_cleanup(ag);
}
@@ -1170,7 +1175,11 @@ static int ag71xx_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
static void ag71xx_oom_timer_handler(struct timer_list *t)
{
#if LINUX_VERSION_CODE < KERNEL_VERSION(6,16,0)
struct ag71xx *ag = from_timer(ag, t, oom_timer);
#else
struct ag71xx *ag = timer_container_of(ag, t, oom_timer);
#endif
napi_schedule(&ag->napi);
}
target/linux/ath79/generic/config-default
+1
View File
@@ -18,6 +18,7 @@ CONFIG_MTD_SPI_NOR_SWP_DISABLE=y
# CONFIG_MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE is not set
CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y
CONFIG_MTD_SPLIT_EVA_FW=y
CONFIG_PHY_PACKAGE=y
CONFIG_REALTEK_PHY=y
CONFIG_REGMAP_I2C=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
target/linux/ath79/mikrotik/config-default
-2
View File
@@ -33,12 +33,10 @@ CONFIG_MTD_UBI_BLOCK=y
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_NET_DEVLINK=y
CONFIG_NET_DSA=y
# CONFIG_NVMEM_LAYOUT_MIKROTIK is not set
# CONFIG_NVMEM_LAYOUT_U_BOOT_ENV is not set
# CONFIG_NVMEM_SYSFS is not set
CONFIG_PHYLINK=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_SGL_ALLOC=y
CONFIG_SPI_RB4XX=y
CONFIG_UBIFS_FS=y
CONFIG_WATCHDOG_CORE=y
target/linux/ath79/nand/config-default
-1
View File
@@ -21,7 +21,6 @@ CONFIG_MTD_UBI_WL_THRESHOLD=4096
# CONFIG_PCI_AR71XX is not set
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_GPIO_RESTART=y
CONFIG_SGL_ALLOC=y
CONFIG_UBIFS_FS=y
CONFIG_XXHASH=y
CONFIG_ZLIB_DEFLATE=y
target/linux/ath79/patches-6.18/100-reset-ath79-read-back-reset-register.patch
+33
View File
@@ -0,0 +1,33 @@
From 661edfc3dab943a67c8821353b63cc23057f7ce9 Mon Sep 17 00:00:00 2001
From: David Bauer <mail@david-bauer.net>
Date: Tue, 9 Jan 2024 20:48:46 +0100
Subject: [PATCH] reset: ath79: read back reset register
Read back the reset register in order to flush the cache. This fixes
spurious reboot hangs on TP-Link TL-WDR3600 and TL-WDR4300 with Zentel
DRAM chips.
This issue was fixed in the past, but switching to the reset-driver
specific implementation removed the old fix.
Link: https://github.com/freifunk-gluon/gluon/issues/2904
Link: https://github.com/openwrt/openwrt/issues/13043
Link: https://dev.archive.openwrt.org/ticket/17839
Link: f8a7bfe1cb2c ("MIPS: ath79: fix system restart")
Signed-off-by: David Bauer <mail@david-bauer.net>
---
drivers/reset/reset-ath79.c | 2 ++
1 file changed, 2 insertions(+)
--- a/drivers/reset/reset-ath79.c
+++ b/drivers/reset/reset-ath79.c
@@ -37,6 +37,8 @@ static int ath79_reset_update(struct res
else
val &= ~BIT(id);
writel(val, ath79_reset->base);
+ /* Flush cache */
+ readl(ath79_reset->base);
spin_unlock_irqrestore(&ath79_reset->lock, flags);
return 0;
target/linux/ath79/patches-6.18/101-reset-ath79-reset-ETH-switch-for-AR9344.patch
+105
View File
@@ -0,0 +1,105 @@
From: David Bauer <mail@david-bauer.net>
Date: Tue, 2 Jan 2025 19:22:40 +0100
Subject: [PATCH] reset: ath79: reset ETH switch for AR9344
According to datasheet, on AR9344 the switch and switch analog need to
be reset first before initiating a full reset.
Resetting these systems fixes spurious reset hangs on Atheros AR9344
SoCs.
Link: https://github.com/freifunk-gluon/gluon/issues/2904
Signed-off-by: David Bauer <mail@david-bauer.net>
--- a/drivers/reset/reset-ath79.c
+++ b/drivers/reset/reset-ath79.c
@@ -12,8 +12,11 @@
#include <linux/platform_device.h>
#include <linux/reset-controller.h>
#include <linux/reboot.h>
+#include <linux/delay.h>
+#include <linux/of.h>
struct ath79_reset {
+ struct platform_device *pdev;
struct reset_controller_dev rcdev;
struct notifier_block restart_nb;
void __iomem *base;
@@ -21,16 +24,13 @@ struct ath79_reset {
};
#define FULL_CHIP_RESET 24
+#define ETH_SWITCH_RESET 8
+#define ETH_SWITCH_ARESET 12
-static int ath79_reset_update(struct reset_controller_dev *rcdev,
+static void __ath79_reset_update_unlocked(struct ath79_reset *ath79_reset,
unsigned long id, bool assert)
{
- struct ath79_reset *ath79_reset =
- container_of(rcdev, struct ath79_reset, rcdev);
- unsigned long flags;
u32 val;
-
- spin_lock_irqsave(&ath79_reset->lock, flags);
val = readl(ath79_reset->base);
if (assert)
val |= BIT(id);
@@ -39,6 +39,17 @@ static int ath79_reset_update(struct res
writel(val, ath79_reset->base);
/* Flush cache */
readl(ath79_reset->base);
+}
+
+static int ath79_reset_update(struct reset_controller_dev *rcdev,
+ unsigned long id, bool assert)
+{
+ struct ath79_reset *ath79_reset =
+ container_of(rcdev, struct ath79_reset, rcdev);
+ unsigned long flags;
+
+ spin_lock_irqsave(&ath79_reset->lock, flags);
+ __ath79_reset_update_unlocked(ath79_reset, id, assert);
spin_unlock_irqrestore(&ath79_reset->lock, flags);
return 0;
@@ -79,8 +90,28 @@ static int ath79_reset_restart_handler(s
{
struct ath79_reset *ath79_reset =
container_of(nb, struct ath79_reset, restart_nb);
+ unsigned long flags;
- ath79_reset_assert(&ath79_reset->rcdev, FULL_CHIP_RESET);
+ spin_lock_irqsave(&ath79_reset->lock, flags);
+
+ if (of_device_is_compatible(ath79_reset->pdev->dev.of_node, "qca,ar9340-reset")) {
+ /**
+ * AR9344 has been observed to hang on reboot in rare cases.
+ *
+ * Datasheet states to reset the ETH switch systems before asserting
+ * full chip reset. See page 111 of the AR9344 datasheet.
+ */
+ __ath79_reset_update_unlocked(ath79_reset, ETH_SWITCH_RESET, true);
+ mdelay(1);
+ __ath79_reset_update_unlocked(ath79_reset, ETH_SWITCH_ARESET, true);
+ mdelay(1);
+ __ath79_reset_update_unlocked(ath79_reset, FULL_CHIP_RESET, true);
+ mdelay(10);
+ } else {
+ __ath79_reset_update_unlocked(ath79_reset, FULL_CHIP_RESET, true);
+ }
+
+ spin_unlock_irqrestore(&ath79_reset->lock, flags);
return NOTIFY_DONE;
}
@@ -95,6 +126,8 @@ static int ath79_reset_probe(struct plat
if (!ath79_reset)
return -ENOMEM;
+ ath79_reset->pdev = pdev;
+
ath79_reset->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(ath79_reset->base))
return PTR_ERR(ath79_reset->base);
target/linux/ath79/patches-6.18/300-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch
+168
View File
@@ -0,0 +1,168 @@
From f3eacff2310a60348a755c50a8da6fc251fc8587 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Tue, 6 Mar 2018 09:55:13 +0100
Subject: [PATCH 07/33] irqchip/irq-ath79-intc: add irq cascade driver for
QCA9556 SoCs
Signed-off-by: John Crispin <john@phrozen.org>
---
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-ath79-intc.c | 142 +++++++++++++++++++++++++++++++++++++++
2 files changed, 143 insertions(+)
create mode 100644 drivers/irqchip/irq-ath79-intc.c
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -4,6 +4,7 @@ obj-$(CONFIG_IRQCHIP) += irqchip.o
obj-$(CONFIG_AL_FIC) += irq-al-fic.o
obj-$(CONFIG_ALPINE_MSI) += irq-alpine-msi.o
obj-$(CONFIG_ATH79) += irq-ath79-cpu.o
+obj-$(CONFIG_ATH79) += irq-ath79-intc.o
obj-$(CONFIG_ATH79) += irq-ath79-misc.o
obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o
--- /dev/null
+++ b/drivers/irqchip/irq-ath79-intc.c
@@ -0,0 +1,142 @@
+/*
+ * Atheros AR71xx/AR724x/AR913x specific interrupt handling
+ *
+ * Copyright (C) 2018 John Crispin <john@phrozen.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/interrupt.h>
+#include <linux/irqchip.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/irqdomain.h>
+
+#include <asm/irq_cpu.h>
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#define ATH79_MAX_INTC_CASCADE 3
+
+struct ath79_intc {
+ struct irq_chip chip;
+ u32 irq;
+ u32 pending_mask;
+ u32 int_status;
+ u32 irq_mask[ATH79_MAX_INTC_CASCADE];
+ u32 irq_wb_chan[ATH79_MAX_INTC_CASCADE];
+};
+
+static void ath79_intc_irq_handler(struct irq_desc *desc)
+{
+ struct irq_domain *domain = irq_desc_get_handler_data(desc);
+ struct ath79_intc *intc = domain->host_data;
+ u32 pending;
+
+ pending = ath79_reset_rr(intc->int_status);
+ pending &= intc->pending_mask;
+
+ if (pending) {
+ int i;
+
+ for (i = 0; i < domain->hwirq_max; i++)
+ if (pending & intc->irq_mask[i]) {
+ if (intc->irq_wb_chan[i] != 0xffffffff)
+ ath79_ddr_wb_flush(intc->irq_wb_chan[i]);
+ generic_handle_irq(irq_find_mapping(domain, i));
+ }
+ } else {
+ spurious_interrupt();
+ }
+}
+
+static void ath79_intc_irq_enable(struct irq_data *d)
+{
+ struct ath79_intc *intc = d->domain->host_data;
+ enable_irq(intc->irq);
+}
+
+static void ath79_intc_irq_disable(struct irq_data *d)
+{
+ struct ath79_intc *intc = d->domain->host_data;
+ disable_irq(intc->irq);
+}
+
+static int ath79_intc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
+{
+ struct ath79_intc *intc = d->host_data;
+
+ irq_set_chip_and_handler(irq, &intc->chip, handle_level_irq);
+
+ return 0;
+}
+
+static const struct irq_domain_ops ath79_irq_domain_ops = {
+ .xlate = irq_domain_xlate_onecell,
+ .map = ath79_intc_map,
+};
+
+static int __init ath79_intc_of_init(
+ struct device_node *node, struct device_node *parent)
+{
+ struct irq_domain *domain;
+ struct ath79_intc *intc;
+ int cnt, cntwb, i, err;
+
+ cnt = of_property_count_u32_elems(node, "qca,pending-bits");
+ if (cnt > ATH79_MAX_INTC_CASCADE)
+ panic("Too many INTC pending bits\n");
+
+ intc = kzalloc(sizeof(*intc), GFP_KERNEL);
+ if (!intc)
+ panic("Failed to allocate INTC memory\n");
+ intc->chip = dummy_irq_chip;
+ intc->chip.name = "INTC";
+ intc->chip.irq_disable = ath79_intc_irq_disable;
+ intc->chip.irq_enable = ath79_intc_irq_enable;
+
+ if (of_property_read_u32(node, "qca,int-status-addr", &intc->int_status) < 0) {
+ panic("Missing address of interrupt status register\n");
+ }
+
+ of_property_read_u32_array(node, "qca,pending-bits", intc->irq_mask, cnt);
+ for (i = 0; i < cnt; i++) {
+ intc->pending_mask |= intc->irq_mask[i];
+ intc->irq_wb_chan[i] = 0xffffffff;
+ }
+
+ cntwb = of_count_phandle_with_args(
+ node, "qca,ddr-wb-channels", "#qca,ddr-wb-channel-cells");
+
+ for (i = 0; i < cntwb; i++) {
+ struct of_phandle_args args;
+ u32 irq = i;
+
+ of_property_read_u32_index(
+ node, "qca,ddr-wb-channel-interrupts", i, &irq);
+ if (irq >= ATH79_MAX_INTC_CASCADE)
+ continue;
+
+ err = of_parse_phandle_with_args(
+ node, "qca,ddr-wb-channels",
+ "#qca,ddr-wb-channel-cells",
+ i, &args);
+ if (err)
+ return err;
+
+ intc->irq_wb_chan[irq] = args.args[0];
+ }
+
+ intc->irq = irq_of_parse_and_map(node, 0);
+ if (!intc->irq)
+ panic("Failed to get INTC IRQ");
+
+ domain = irq_domain_add_linear(node, cnt, &ath79_irq_domain_ops, intc);
+ irq_set_chained_handler_and_data(intc->irq, ath79_intc_irq_handler, domain);
+
+ return 0;
+}
+IRQCHIP_DECLARE(ath79_intc, "qca,ar9340-intc",
+ ath79_intc_of_init);
target/linux/ath79/patches-6.18/301-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch
+23
View File
@@ -0,0 +1,23 @@
From e029f998594f151008ecbfa024e2957edd2a5189 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Tue, 6 Mar 2018 09:58:19 +0100
Subject: [PATCH 08/33] irqchip/irq-ath79-cpu: drop !OF init helper
Signed-off-by: John Crispin <john@phrozen.org>
---
drivers/irqchip/irq-ath79-cpu.c | 7 -------
1 file changed, 7 deletions(-)
--- a/drivers/irqchip/irq-ath79-cpu.c
+++ b/drivers/irqchip/irq-ath79-cpu.c
@@ -85,10 +85,3 @@ static int __init ar79_cpu_intc_of_init(
}
IRQCHIP_DECLARE(ar79_cpu_intc, "qca,ar7100-cpu-intc",
ar79_cpu_intc_of_init);
-
-void __init ath79_cpu_irq_init(unsigned irq_wb_chan2, unsigned irq_wb_chan3)
-{
- irq_wb_chan[2] = irq_wb_chan2;
- irq_wb_chan[3] = irq_wb_chan3;
- mips_cpu_irq_init();
-}
target/linux/ath79/patches-6.18/310-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch
+57
View File
@@ -0,0 +1,57 @@
From 4a4f869ec58ed8910b9b2e68d0eee50957e9bb20 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Mon, 25 Jun 2018 15:52:10 +0200
Subject: [PATCH 17/33] dt-bindings: PCI: qcom,ar7100: adds binding doc
With the driver being converted from platform_data to pure OF, we need to
also add some docs.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: John Crispin <john@phrozen.org>
---
.../devicetree/bindings/pci/qcom,ar7100-pci.txt | 38 ++++++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/qcom,ar7100-pci.txt
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/qcom,ar7100-pci.txt
@@ -0,0 +1,38 @@
+* Qualcomm Atheros AR7100 PCI express root complex
+
+Required properties:
+- compatible: should contain "qcom,ar7100-pci" to identify the core.
+- reg: Should contain the register ranges as listed in the reg-names property.
+- reg-names: Definition: Must include the following entries
+ - "cfg_base" IO Memory
+- #address-cells: set to <3>
+- #size-cells: set to <2>
+- ranges: ranges for the PCI memory and I/O regions
+- interrupt-map-mask and interrupt-map: standard PCI
+ properties to define the mapping of the PCIe interface to interrupt
+ numbers.
+- #interrupt-cells: set to <1>
+- interrupt-controller: define to enable the builtin IRQ cascade.
+
+Optional properties:
+- interrupt-parent: phandle to the MIPS IRQ controller
+
+* Example for ar7100
+ pcie@180c0000 {
+ compatible = "qca,ar7100-pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x0 0x0>;
+ reg = <0x17010000 0x100>;
+ reg-names = "cfg_base";
+ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x07000000
+ 0x1000000 0 0x00000000 0x00000000 0 0x00000001>;
+ interrupt-parent = <&cpuintc>;
+ interrupts = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-map-mask = <0 0 0 1>;
+ interrupt-map = <0 0 0 0 &pcie0 0>;
+ };
target/linux/ath79/patches-6.18/311-MIPS-pci-ar71xx-convert-to-OF.patch
+206
View File
@@ -0,0 +1,206 @@
From 1855ab6b1d27f5b38a648baf57ff6a534afec26d Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Sat, 23 Jun 2018 15:07:23 +0200
Subject: [PATCH 18/33] MIPS: pci-ar71xx: convert to OF
With the ath79 target getting converted to pure OF, we can drop all the
platform data code and add the missing OF bits to the driver. We also add
a irq domain for the PCI/e controllers cascade, thus making it usable from
dts files.
Signed-off-by: John Crispin <john@phrozen.org>
---
arch/mips/pci/pci-ar71xx.c | 82 +++++++++++++++++++++++-----------------------
1 file changed, 41 insertions(+), 41 deletions(-)
--- a/arch/mips/pci/pci-ar71xx.c
+++ b/arch/mips/pci/pci-ar71xx.c
@@ -15,8 +15,11 @@
#include <linux/pci.h>
#include <linux/pci_regs.h>
#include <linux/interrupt.h>
+#include <linux/irqchip/chained_irq.h>
#include <linux/init.h>
#include <linux/platform_device.h>
+#include <linux/of_irq.h>
+#include <linux/of_pci.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include <asm/mach-ath79/ath79.h>
@@ -46,12 +49,13 @@
#define AR71XX_PCI_IRQ_COUNT 5
struct ar71xx_pci_controller {
+ struct device_node *np;
void __iomem *cfg_base;
int irq;
- int irq_base;
struct pci_controller pci_ctrl;
struct resource io_res;
struct resource mem_res;
+ struct irq_domain *domain;
};
/* Byte lane enable bits */
@@ -225,29 +229,30 @@ static struct pci_ops ar71xx_pci_ops = {
static void ar71xx_pci_irq_handler(struct irq_desc *desc)
{
- struct ar71xx_pci_controller *apc;
void __iomem *base = ath79_reset_base;
+ struct irq_chip *chip = irq_desc_get_chip(desc);
+ struct ar71xx_pci_controller *apc = irq_desc_get_handler_data(desc);
u32 pending;
- apc = irq_desc_get_handler_data(desc);
-
+ chained_irq_enter(chip, desc);
pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) &
__raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
if (pending & AR71XX_PCI_INT_DEV0)
- generic_handle_irq(apc->irq_base + 0);
+ generic_handle_irq(irq_find_mapping(apc->domain, 1));
else if (pending & AR71XX_PCI_INT_DEV1)
- generic_handle_irq(apc->irq_base + 1);
+ generic_handle_irq(irq_find_mapping(apc->domain, 2));
else if (pending & AR71XX_PCI_INT_DEV2)
- generic_handle_irq(apc->irq_base + 2);
+ generic_handle_irq(irq_find_mapping(apc->domain, 3));
else if (pending & AR71XX_PCI_INT_CORE)
- generic_handle_irq(apc->irq_base + 4);
+ generic_handle_irq(irq_find_mapping(apc->domain, 4));
else
spurious_interrupt();
+ chained_irq_exit(chip, desc);
}
static void ar71xx_pci_irq_unmask(struct irq_data *d)
@@ -258,7 +263,7 @@ static void ar71xx_pci_irq_unmask(struct
u32 t;
apc = irq_data_get_irq_chip_data(d);
- irq = d->irq - apc->irq_base;
+ irq = irq_find_mapping(apc->domain, d->irq);
t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
__raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
@@ -275,7 +280,7 @@ static void ar71xx_pci_irq_mask(struct i
u32 t;
apc = irq_data_get_irq_chip_data(d);
- irq = d->irq - apc->irq_base;
+ irq = irq_find_mapping(apc->domain, d->irq);
t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
__raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
@@ -291,24 +296,31 @@ static struct irq_chip ar71xx_pci_irq_ch
.irq_mask_ack = ar71xx_pci_irq_mask,
};
+static int ar71xx_pci_irq_map(struct irq_domain *d,
+ unsigned int irq, irq_hw_number_t hw)
+{
+ struct ar71xx_pci_controller *apc = d->host_data;
+
+ irq_set_chip_and_handler(irq, &ar71xx_pci_irq_chip, handle_level_irq);
+ irq_set_chip_data(irq, apc);
+
+ return 0;
+}
+
+static const struct irq_domain_ops ar71xx_pci_domain_ops = {
+ .xlate = irq_domain_xlate_onecell,
+ .map = ar71xx_pci_irq_map,
+};
+
static void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc)
{
void __iomem *base = ath79_reset_base;
- int i;
__raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE);
__raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS);
- BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT < AR71XX_PCI_IRQ_COUNT);
-
- apc->irq_base = ATH79_PCI_IRQ_BASE;
- for (i = apc->irq_base;
- i < apc->irq_base + AR71XX_PCI_IRQ_COUNT; i++) {
- irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip,
- handle_level_irq);
- irq_set_chip_data(i, apc);
- }
-
+ apc->domain = irq_domain_add_linear(apc->np, AR71XX_PCI_IRQ_COUNT,
+ &ar71xx_pci_domain_ops, apc);
irq_set_chained_handler_and_data(apc->irq, ar71xx_pci_irq_handler,
apc);
}
@@ -325,10 +337,14 @@ static void ar71xx_pci_reset(void)
mdelay(100);
}
+static const struct of_device_id ar71xx_pci_ids[] = {
+ { .compatible = "qca,ar7100-pci" },
+ {},
+};
+
static int ar71xx_pci_probe(struct platform_device *pdev)
{
struct ar71xx_pci_controller *apc;
- struct resource *res;
u32 t;
apc = devm_kzalloc(&pdev->dev, sizeof(struct ar71xx_pci_controller),
@@ -345,26 +361,6 @@ static int ar71xx_pci_probe(struct platf
if (apc->irq < 0)
return -EINVAL;
- res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base");
- if (!res)
- return -EINVAL;
-
- apc->io_res.parent = res;
- apc->io_res.name = "PCI IO space";
- apc->io_res.start = res->start;
- apc->io_res.end = res->end;
- apc->io_res.flags = IORESOURCE_IO;
-
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base");
- if (!res)
- return -EINVAL;
-
- apc->mem_res.parent = res;
- apc->mem_res.name = "PCI memory space";
- apc->mem_res.start = res->start;
- apc->mem_res.end = res->end;
- apc->mem_res.flags = IORESOURCE_MEM;
-
ar71xx_pci_reset();
/* setup COMMAND register */
@@ -377,9 +373,11 @@ static int ar71xx_pci_probe(struct platf
ar71xx_pci_irq_init(apc);
+ apc->np = pdev->dev.of_node;
apc->pci_ctrl.pci_ops = &ar71xx_pci_ops;
apc->pci_ctrl.mem_resource = &apc->mem_res;
apc->pci_ctrl.io_resource = &apc->io_res;
+ pci_load_of_ranges(&apc->pci_ctrl, pdev->dev.of_node);
register_pci_controller(&apc->pci_ctrl);
@@ -390,6 +388,7 @@ static struct platform_driver ar71xx_pci
.probe = ar71xx_pci_probe,
.driver = {
.name = "ar71xx-pci",
+ .of_match_table = ar71xx_pci_ids,
},
};
target/linux/ath79/patches-6.18/312-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch
+61
View File
@@ -0,0 +1,61 @@
From ea27764bc3ef2a05decf3ae05edffc289cd0d93c Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Mon, 25 Jun 2018 15:52:02 +0200
Subject: [PATCH 19/33] dt-bindings: PCI: qcom,ar7240: adds binding doc
With the driver being converted from platform_data to pure OF, we need to
also add some docs.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: John Crispin <john@phrozen.org>
---
.../devicetree/bindings/pci/qcom,ar7240-pci.txt | 42 ++++++++++++++++++++++
1 file changed, 42 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/qcom,ar7240-pci.txt
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/qcom,ar7240-pci.txt
@@ -0,0 +1,42 @@
+* Qualcomm Atheros AR724X PCI express root complex
+
+Required properties:
+- compatible: should contain "qcom,ar7240-pci" to identify the core.
+- reg: Should contain the register ranges as listed in the reg-names property.
+- reg-names: Definition: Must include the following entries
+ - "crp_base" Configuration registers
+ - "ctrl_base" Control registers
+ - "cfg_base" IO Memory
+- #address-cells: set to <3>
+- #size-cells: set to <2>
+- ranges: ranges for the PCI memory and I/O regions
+- interrupt-map-mask and interrupt-map: standard PCI
+ properties to define the mapping of the PCIe interface to interrupt
+ numbers.
+- #interrupt-cells: set to <1>
+- interrupt-parent: phandle to the MIPS IRQ controller
+
+Optional properties:
+- interrupt-controller: define to enable the builtin IRQ cascade.
+
+* Example for qca9557
+ pcie@180c0000 {
+ compatible = "qcom,ar7240-pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x0 0x0>;
+ reg = <0x180c0000 0x1000>,
+ <0x180f0000 0x100>,
+ <0x14000000 0x1000>;
+ reg-names = "crp_base", "ctrl_base", "cfg_base";
+ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000
+ 0x1000000 0 0x00000000 0x00000000 0 0x00000001>;
+ interrupt-parent = <&intc2>;
+ interrupts = <1>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-map-mask = <0 0 0 1>;
+ interrupt-map = <0 0 0 0 &pcie0 0>;
+ };
target/linux/ath79/patches-6.18/313-MIPS-pci-ar724x-convert-to-OF.patch
+213
View File
@@ -0,0 +1,213 @@
From a522ee0199d5d3ea114ca2e211f6ac398d3e8e0b Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Sat, 23 Jun 2018 15:07:37 +0200
Subject: [PATCH 20/33] MIPS: pci-ar724x: convert to OF
With the ath79 target getting converted to pure OF, we can drop all the
platform data code and add the missing OF bits to the driver. We also add
a irq domain for the PCI/e controllers cascade, thus making it usable from
dts files.
Signed-off-by: John Crispin <john@phrozen.org>
---
arch/mips/pci/pci-ar724x.c | 88 ++++++++++++++++++++++------------------------
1 file changed, 42 insertions(+), 46 deletions(-)
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -11,8 +11,11 @@
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
+#include <linux/irqchip/chained_irq.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
+#include <linux/of_irq.h>
+#include <linux/of_pci.h>
#define AR724X_PCI_REG_APP 0x00
#define AR724X_PCI_REG_RESET 0x18
@@ -42,17 +45,20 @@ struct ar724x_pci_controller {
void __iomem *crp_base;
int irq;
- int irq_base;
bool link_up;
bool bar0_is_cached;
u32 bar0_value;
+ struct device_node *np;
struct pci_controller pci_controller;
+ struct irq_domain *domain;
struct resource io_res;
struct resource mem_res;
};
+static struct irq_chip ar724x_pci_irq_chip;
+
static inline bool ar724x_pci_check_link(struct ar724x_pci_controller *apc)
{
u32 reset;
@@ -228,35 +234,31 @@ static struct pci_ops ar724x_pci_ops = {
static void ar724x_pci_irq_handler(struct irq_desc *desc)
{
- struct ar724x_pci_controller *apc;
- void __iomem *base;
+ struct irq_chip *chip = irq_desc_get_chip(desc);
+ struct ar724x_pci_controller *apc = irq_desc_get_handler_data(desc);
u32 pending;
- apc = irq_desc_get_handler_data(desc);
- base = apc->ctrl_base;
-
- pending = __raw_readl(base + AR724X_PCI_REG_INT_STATUS) &
- __raw_readl(base + AR724X_PCI_REG_INT_MASK);
+ chained_irq_enter(chip, desc);
+ pending = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_INT_STATUS) &
+ __raw_readl(apc->ctrl_base + AR724X_PCI_REG_INT_MASK);
if (pending & AR724X_PCI_INT_DEV0)
- generic_handle_irq(apc->irq_base + 0);
-
+ generic_handle_irq(irq_find_mapping(apc->domain, 1));
else
spurious_interrupt();
+ chained_irq_exit(chip, desc);
}
static void ar724x_pci_irq_unmask(struct irq_data *d)
{
struct ar724x_pci_controller *apc;
void __iomem *base;
- int offset;
u32 t;
apc = irq_data_get_irq_chip_data(d);
base = apc->ctrl_base;
- offset = apc->irq_base - d->irq;
- switch (offset) {
+ switch (irq_find_mapping(apc->domain, d->irq)) {
case 0:
t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
__raw_writel(t | AR724X_PCI_INT_DEV0,
@@ -270,14 +272,12 @@ static void ar724x_pci_irq_mask(struct i
{
struct ar724x_pci_controller *apc;
void __iomem *base;
- int offset;
u32 t;
apc = irq_data_get_irq_chip_data(d);
base = apc->ctrl_base;
- offset = apc->irq_base - d->irq;
- switch (offset) {
+ switch (irq_find_mapping(apc->domain, d->irq)) {
case 0:
t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
__raw_writel(t & ~AR724X_PCI_INT_DEV0,
@@ -302,26 +302,34 @@ static struct irq_chip ar724x_pci_irq_ch
.irq_mask_ack = ar724x_pci_irq_mask,
};
+static int ar724x_pci_irq_map(struct irq_domain *d,
+ unsigned int irq, irq_hw_number_t hw)
+{
+ struct ar724x_pci_controller *apc = d->host_data;
+
+ irq_set_chip_and_handler(irq, &ar724x_pci_irq_chip, handle_level_irq);
+ irq_set_chip_data(irq, apc);
+
+ return 0;
+}
+
+static const struct irq_domain_ops ar724x_pci_domain_ops = {
+ .xlate = irq_domain_xlate_onecell,
+ .map = ar724x_pci_irq_map,
+};
+
static void ar724x_pci_irq_init(struct ar724x_pci_controller *apc,
int id)
{
void __iomem *base;
- int i;
base = apc->ctrl_base;
__raw_writel(0, base + AR724X_PCI_REG_INT_MASK);
__raw_writel(0, base + AR724X_PCI_REG_INT_STATUS);
- apc->irq_base = ATH79_PCI_IRQ_BASE + (id * AR724X_PCI_IRQ_COUNT);
-
- for (i = apc->irq_base;
- i < apc->irq_base + AR724X_PCI_IRQ_COUNT; i++) {
- irq_set_chip_and_handler(i, &ar724x_pci_irq_chip,
- handle_level_irq);
- irq_set_chip_data(i, apc);
- }
-
+ apc->domain = irq_domain_add_linear(apc->np, 2,
+ &ar724x_pci_domain_ops, apc);
irq_set_chained_handler_and_data(apc->irq, ar724x_pci_irq_handler,
apc);
}
@@ -360,7 +368,6 @@ static void ar724x_pci_hw_init(struct ar
static int ar724x_pci_probe(struct platform_device *pdev)
{
struct ar724x_pci_controller *apc;
- struct resource *res;
int id;
id = pdev->id;
@@ -388,29 +395,11 @@ static int ar724x_pci_probe(struct platf
if (apc->irq < 0)
return -EINVAL;
- res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base");
- if (!res)
- return -EINVAL;
-
- apc->io_res.parent = res;
- apc->io_res.name = "PCI IO space";
- apc->io_res.start = res->start;
- apc->io_res.end = res->end;
- apc->io_res.flags = IORESOURCE_IO;
-
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base");
- if (!res)
- return -EINVAL;
-
- apc->mem_res.parent = res;
- apc->mem_res.name = "PCI memory space";
- apc->mem_res.start = res->start;
- apc->mem_res.end = res->end;
- apc->mem_res.flags = IORESOURCE_MEM;
-
+ apc->np = pdev->dev.of_node;
apc->pci_controller.pci_ops = &ar724x_pci_ops;
apc->pci_controller.io_resource = &apc->io_res;
apc->pci_controller.mem_resource = &apc->mem_res;
+ pci_load_of_ranges(&apc->pci_controller, pdev->dev.of_node);
/*
* Do the full PCIE Root Complex Initialization Sequence if the PCIe
@@ -432,10 +421,16 @@ static int ar724x_pci_probe(struct platf
return 0;
}
+static const struct of_device_id ar724x_pci_ids[] = {
+ { .compatible = "qcom,ar7240-pci" },
+ {},
+};
+
static struct platform_driver ar724x_pci_driver = {
.probe = ar724x_pci_probe,
.driver = {
.name = "ar724x-pci",
+ .of_match_table = ar724x_pci_ids,
},
};
target/linux/ath79/patches-6.18/314-MIPS-ath79-remove-irq-code-from-pci.patch
+149
View File
@@ -0,0 +1,149 @@
From: John Crispin <john@phrozen.org>
Subject: ath79: fix remove irq code from pci driver patch
This patch got mangled in the void while rebasing it.
Submitted-by: John Crispin <john@phrozen.org>
---
arch/mips/pci/pci-ar71xx.c | 107 ------------------
1 file changed, 141 deletions(-)
--- a/arch/mips/pci/pci-ar71xx.c
+++ b/arch/mips/pci/pci-ar71xx.c
@@ -51,11 +51,9 @@
struct ar71xx_pci_controller {
struct device_node *np;
void __iomem *cfg_base;
- int irq;
struct pci_controller pci_ctrl;
struct resource io_res;
struct resource mem_res;
- struct irq_domain *domain;
};
/* Byte lane enable bits */
@@ -227,104 +225,6 @@ static struct pci_ops ar71xx_pci_ops = {
.write = ar71xx_pci_write_config,
};
-static void ar71xx_pci_irq_handler(struct irq_desc *desc)
-{
- void __iomem *base = ath79_reset_base;
- struct irq_chip *chip = irq_desc_get_chip(desc);
- struct ar71xx_pci_controller *apc = irq_desc_get_handler_data(desc);
- u32 pending;
-
- chained_irq_enter(chip, desc);
- pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) &
- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
-
- if (pending & AR71XX_PCI_INT_DEV0)
- generic_handle_irq(irq_find_mapping(apc->domain, 1));
-
- else if (pending & AR71XX_PCI_INT_DEV1)
- generic_handle_irq(irq_find_mapping(apc->domain, 2));
-
- else if (pending & AR71XX_PCI_INT_DEV2)
- generic_handle_irq(irq_find_mapping(apc->domain, 3));
-
- else if (pending & AR71XX_PCI_INT_CORE)
- generic_handle_irq(irq_find_mapping(apc->domain, 4));
-
- else
- spurious_interrupt();
- chained_irq_exit(chip, desc);
-}
-
-static void ar71xx_pci_irq_unmask(struct irq_data *d)
-{
- struct ar71xx_pci_controller *apc;
- unsigned int irq;
- void __iomem *base = ath79_reset_base;
- u32 t;
-
- apc = irq_data_get_irq_chip_data(d);
- irq = irq_find_mapping(apc->domain, d->irq);
-
- t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
- __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
-
- /* flush write */
- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
-}
-
-static void ar71xx_pci_irq_mask(struct irq_data *d)
-{
- struct ar71xx_pci_controller *apc;
- unsigned int irq;
- void __iomem *base = ath79_reset_base;
- u32 t;
-
- apc = irq_data_get_irq_chip_data(d);
- irq = irq_find_mapping(apc->domain, d->irq);
-
- t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
- __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
-
- /* flush write */
- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
-}
-
-static struct irq_chip ar71xx_pci_irq_chip = {
- .name = "AR71XX PCI",
- .irq_mask = ar71xx_pci_irq_mask,
- .irq_unmask = ar71xx_pci_irq_unmask,
- .irq_mask_ack = ar71xx_pci_irq_mask,
-};
-
-static int ar71xx_pci_irq_map(struct irq_domain *d,
- unsigned int irq, irq_hw_number_t hw)
-{
- struct ar71xx_pci_controller *apc = d->host_data;
-
- irq_set_chip_and_handler(irq, &ar71xx_pci_irq_chip, handle_level_irq);
- irq_set_chip_data(irq, apc);
-
- return 0;
-}
-
-static const struct irq_domain_ops ar71xx_pci_domain_ops = {
- .xlate = irq_domain_xlate_onecell,
- .map = ar71xx_pci_irq_map,
-};
-
-static void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc)
-{
- void __iomem *base = ath79_reset_base;
-
- __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE);
- __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS);
-
- apc->domain = irq_domain_add_linear(apc->np, AR71XX_PCI_IRQ_COUNT,
- &ar71xx_pci_domain_ops, apc);
- irq_set_chained_handler_and_data(apc->irq, ar71xx_pci_irq_handler,
- apc);
-}
-
static void ar71xx_pci_reset(void)
{
ath79_device_reset_set(AR71XX_RESET_PCI_BUS | AR71XX_RESET_PCI_CORE);
@@ -357,10 +257,6 @@ static int ar71xx_pci_probe(struct platf
if (IS_ERR(apc->cfg_base))
return PTR_ERR(apc->cfg_base);
- apc->irq = platform_get_irq(pdev, 0);
- if (apc->irq < 0)
- return -EINVAL;
-
ar71xx_pci_reset();
/* setup COMMAND register */
@@ -371,8 +267,6 @@ static int ar71xx_pci_probe(struct platf
/* clear bus errors */
ar71xx_pci_check_error(apc, 1);
- ar71xx_pci_irq_init(apc);
-
apc->np = pdev->dev.of_node;
apc->pci_ctrl.pci_ops = &ar71xx_pci_ops;
apc->pci_ctrl.mem_resource = &apc->mem_res;
target/linux/ath79/patches-6.18/315-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch
+130
View File
@@ -0,0 +1,130 @@
From: David Bauer <mail@david-bauer.net>
Date: Sat, 11 Apr 2020 14:03:12 +0200
Subject: MIPS: pci-ar724x: add QCA9550 reset sequence
The QCA9550 family of SoCs have a slightly different reset
sequence compared to older chips.
Normally the bootloader performs this sequence, however
some bootloader implementation expect the operating system
to clear the reset.
Also get the resets from OF to support handling of the second
PCIe root-complex on the QCA9558.
Signed-off-by: David Bauer <mail@david-bauer.net>
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -390,6 +390,7 @@
#define QCA955X_PLL_CPU_CONFIG_REG 0x00
#define QCA955X_PLL_DDR_CONFIG_REG 0x04
#define QCA955X_PLL_CLK_CTRL_REG 0x08
+#define QCA955X_PLL_PCIE_CONFIG_REG 0x0c
#define QCA955X_PLL_ETH_XMII_CONTROL_REG 0x28
#define QCA955X_PLL_ETH_SGMII_CONTROL_REG 0x48
#define QCA955X_PLL_ETH_SGMII_SERDES_REG 0x4c
@@ -475,6 +476,9 @@
#define QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_CPUPLL BIT(21)
#define QCA956X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24)
+#define QCA955X_PLL_PCIE_CONFIG_PLL_PWD BIT(30)
+#define QCA955X_PLL_PCIE_CONFIG_PLL_BYPASS BIT(16)
+
#define QCA956X_PLL_SWITCH_CLOCK_SPARE_I2C_CLK_SELB BIT(5)
#define QCA956X_PLL_SWITCH_CLOCK_SPARE_MDIO_CLK_SEL0_1 BIT(6)
#define QCA956X_PLL_SWITCH_CLOCK_SPARE_UART1_CLK_SEL BIT(7)
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -8,6 +8,7 @@
#include <linux/irq.h>
#include <linux/pci.h>
+#include <linux/reset.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
@@ -55,6 +56,9 @@ struct ar724x_pci_controller {
struct irq_domain *domain;
struct resource io_res;
struct resource mem_res;
+
+ struct reset_control *hc_reset;
+ struct reset_control *phy_reset;
};
static struct irq_chip ar724x_pci_irq_chip;
@@ -340,18 +344,30 @@ static void ar724x_pci_hw_init(struct ar
int wait = 0;
/* deassert PCIe host controller and PCIe PHY reset */
- ath79_device_reset_clear(AR724X_RESET_PCIE);
- ath79_device_reset_clear(AR724X_RESET_PCIE_PHY);
+ reset_control_deassert(apc->hc_reset);
+ reset_control_deassert(apc->phy_reset);
- /* remove the reset of the PCIE PLL */
- ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG);
- ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET;
- ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
-
- /* deassert bypass for the PCIE PLL */
- ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG);
- ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS;
- ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
+ if (of_device_is_compatible(apc->np, "qcom,qca9550-pci")) {
+ /* remove the reset of the PCIE PLL */
+ ppl = ath79_pll_rr(QCA955X_PLL_PCIE_CONFIG_REG);
+ ppl &= ~QCA955X_PLL_PCIE_CONFIG_PLL_PWD;
+ ath79_pll_wr(QCA955X_PLL_PCIE_CONFIG_REG, ppl);
+
+ /* deassert bypass for the PCIE PLL */
+ ppl = ath79_pll_rr(QCA955X_PLL_PCIE_CONFIG_REG);
+ ppl &= ~QCA955X_PLL_PCIE_CONFIG_PLL_BYPASS;
+ ath79_pll_wr(QCA955X_PLL_PCIE_CONFIG_REG, ppl);
+ } else {
+ /* remove the reset of the PCIE PLL */
+ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG);
+ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET;
+ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
+
+ /* deassert bypass for the PCIE PLL */
+ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG);
+ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS;
+ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
+ }
/* set PCIE Application Control to ready */
app = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_APP);
@@ -395,6 +411,14 @@ static int ar724x_pci_probe(struct platf
if (apc->irq < 0)
return -EINVAL;
+ apc->hc_reset = devm_reset_control_get_exclusive(&pdev->dev, "hc");
+ if (IS_ERR(apc->hc_reset))
+ return PTR_ERR(apc->hc_reset);
+
+ apc->phy_reset = devm_reset_control_get_exclusive(&pdev->dev, "phy");
+ if (IS_ERR(apc->phy_reset))
+ return PTR_ERR(apc->phy_reset);
+
apc->np = pdev->dev.of_node;
apc->pci_controller.pci_ops = &ar724x_pci_ops;
apc->pci_controller.io_resource = &apc->io_res;
@@ -405,7 +429,7 @@ static int ar724x_pci_probe(struct platf
* Do the full PCIE Root Complex Initialization Sequence if the PCIe
* host controller is in reset.
*/
- if (ath79_reset_rr(AR724X_RESET_REG_RESET_MODULE) & AR724X_RESET_PCIE)
+ if (reset_control_status(apc->hc_reset))
ar724x_pci_hw_init(apc);
apc->link_up = ar724x_pci_check_link(apc);
@@ -423,6 +447,7 @@ static int ar724x_pci_probe(struct platf
static const struct of_device_id ar724x_pci_ids[] = {
{ .compatible = "qcom,ar7240-pci" },
+ { .compatible = "qcom,qca9550-pci" },
{},
};
target/linux/ath79/patches-6.18/316-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch
+109
View File
@@ -0,0 +1,109 @@
From: Gabor Juhos <juhosg@openwrt.org>
Subject: [PATCH] ar71xx: swizzle address for PCI byte/word access on AR71xx
Closes #11683.
SVN-Revision: 32639
---
.../mips/include/asm/mach-ath79/mangle-port.h | 111 ++++++++++++++++++
1 file changed, 111 insertions(+)
create mode 100644 arch/mips/include/asm/mach-ath79/mangle-port.h
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath79/mangle-port.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * This file was derived from: inlude/asm-mips/mach-generic/mangle-port.h
+ * Copyright (C) 2003, 2004 Ralf Baechle
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#ifndef __ASM_MACH_ATH79_MANGLE_PORT_H
+#define __ASM_MACH_ATH79_MANGLE_PORT_H
+
+#ifdef CONFIG_PCI_AR71XX
+extern unsigned long (ath79_pci_swizzle_b)(unsigned long port);
+extern unsigned long (ath79_pci_swizzle_w)(unsigned long port);
+#else
+#define ath79_pci_swizzle_b(port) (port)
+#define ath79_pci_swizzle_w(port) (port)
+#endif
+
+#define __swizzle_addr_b(port) ath79_pci_swizzle_b(port)
+#define __swizzle_addr_w(port) ath79_pci_swizzle_w(port)
+#define __swizzle_addr_l(port) (port)
+#define __swizzle_addr_q(port) (port)
+
+# define ioswabb(a, x) (x)
+# define __mem_ioswabb(a, x) (x)
+# define ioswabw(a, x) (x)
+# define __mem_ioswabw(a, x) cpu_to_le16(x)
+# define ioswabl(a, x) (x)
+# define __mem_ioswabl(a, x) cpu_to_le32(x)
+# define ioswabq(a, x) (x)
+# define __mem_ioswabq(a, x) cpu_to_le64(x)
+
+#endif /* __ASM_MACH_ATH79_MANGLE_PORT_H */
--- a/arch/mips/pci/pci-ar71xx.c
+++ b/arch/mips/pci/pci-ar71xx.c
@@ -68,6 +68,45 @@ static const u32 ar71xx_pci_read_mask[8]
0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0
};
+static unsigned long (*__ath79_pci_swizzle_b)(unsigned long port);
+static unsigned long (*__ath79_pci_swizzle_w)(unsigned long port);
+
+static inline bool ar71xx_is_pci_addr(unsigned long port)
+{
+ unsigned long phys = CPHYSADDR(port);
+
+ return (phys >= AR71XX_PCI_MEM_BASE &&
+ phys < AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE);
+}
+
+static unsigned long ar71xx_pci_swizzle_b(unsigned long port)
+{
+ return ar71xx_is_pci_addr(port) ? port ^ 3 : port;
+}
+
+static unsigned long ar71xx_pci_swizzle_w(unsigned long port)
+{
+ return ar71xx_is_pci_addr(port) ? port ^ 2 : port;
+}
+
+unsigned long ath79_pci_swizzle_b(unsigned long port)
+{
+ if (__ath79_pci_swizzle_b)
+ return __ath79_pci_swizzle_b(port);
+
+ return port;
+}
+EXPORT_SYMBOL(ath79_pci_swizzle_b);
+
+unsigned long ath79_pci_swizzle_w(unsigned long port)
+{
+ if (__ath79_pci_swizzle_w)
+ return __ath79_pci_swizzle_w(port);
+
+ return port;
+}
+EXPORT_SYMBOL(ath79_pci_swizzle_w);
+
static inline u32 ar71xx_pci_get_ble(int where, int size, int local)
{
u32 t;
@@ -275,6 +314,9 @@ static int ar71xx_pci_probe(struct platf
register_pci_controller(&apc->pci_ctrl);
+ __ath79_pci_swizzle_b = ar71xx_pci_swizzle_b;
+ __ath79_pci_swizzle_w = ar71xx_pci_swizzle_w;
+
return 0;
}
target/linux/ath79/patches-6.18/317-MIPS-pci-ar724x-clear-power-down-of-pll-on-AR934x.patch
+34
View File
@@ -0,0 +1,34 @@
From f2ca10b22ace3ce53b4e3f189bf1dd53a4482475 Mon Sep 17 00:00:00 2001
From: INAGAKI Hiroshi <musashino.open@gmail.com>
Date: Fri, 26 Apr 2024 23:53:58 +0900
Subject: [PATCH 1/2] MIPS: pci-ar724x: clear power down of pll on AR934x
Fix PCIe initialization on AR934x by clearing PLL_PWD bit in addition to
PPL_RESET bit of AR724x.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
---
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -347,6 +347,8 @@
#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21)
#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24)
+#define AR934X_PLL_PCIE_CONFIG_PLL_PWD BIT(30)
+
#define AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL BIT(6)
#define QCA953X_PLL_CPU_CONFIG_REG 0x00
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -360,7 +360,8 @@ static void ar724x_pci_hw_init(struct ar
} else {
/* remove the reset of the PCIE PLL */
ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG);
- ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET;
+ ppl &= ~(AR934X_PLL_PCIE_CONFIG_PLL_PWD |
+ AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET);
ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
/* deassert bypass for the PCIE PLL */
target/linux/ath79/patches-6.18/318-MIPS-pci-ar724x-deassert-the-reset-of-PCIe-endpoint.patch
+41
View File
@@ -0,0 +1,41 @@
From 859c93981a8994ffa69967b44b247d2e7d6a01f1 Mon Sep 17 00:00:00 2001
From: INAGAKI Hiroshi <musashino.open@gmail.com>
Date: Fri, 26 Apr 2024 23:54:57 +0900
Subject: [PATCH 2/2] MIPS: pci-ar724x: deassert the reset of PCIe endpoint
Fix PCIe initialization by de-assertion of PCIe endpoint reset.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
---
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -25,6 +25,7 @@
#define AR724X_PCI_APP_LTSSM_ENABLE BIT(0)
+#define AR724X_PCI_RESET_EP_RESET_L BIT(2)
#define AR724X_PCI_RESET_LINK_UP BIT(0)
#define AR724X_PCI_INT_DEV0 BIT(14)
@@ -340,7 +341,7 @@ static void ar724x_pci_irq_init(struct a
static void ar724x_pci_hw_init(struct ar724x_pci_controller *apc)
{
- u32 ppl, app;
+ u32 ppl, rst, app;
int wait = 0;
/* deassert PCIe host controller and PCIe PHY reset */
@@ -370,6 +371,11 @@ static void ar724x_pci_hw_init(struct ar
ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
}
+ /* deassert the reset state of the PCIE endpoint */
+ rst = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_RESET);
+ rst |= AR724X_PCI_RESET_EP_RESET_L;
+ __raw_writel(rst, apc->ctrl_base + AR724X_PCI_REG_RESET);
+
/* set PCIE Application Control to ready */
app = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_APP);
app |= AR724X_PCI_APP_LTSSM_ENABLE;
target/linux/ath79/patches-6.18/330-missing-registers.patch
+20
View File
@@ -0,0 +1,20 @@
From: Christian Lamparter <chunkeey@gmail.com>
Subject: [PATCH] ath79: gmac: add parsers for rxd(v)- and tx(d|en)-delay for
ath79: gmac: add parsers for rxd(v)- and tx(d|en)-delay for AR9344
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -1233,6 +1233,10 @@
#define AR934X_ETH_CFG_RDV_DELAY BIT(16)
#define AR934X_ETH_CFG_RDV_DELAY_MASK 0x3
#define AR934X_ETH_CFG_RDV_DELAY_SHIFT 16
+#define AR934X_ETH_CFG_TXD_DELAY_MASK 0x3
+#define AR934X_ETH_CFG_TXD_DELAY_SHIFT 18
+#define AR934X_ETH_CFG_TXE_DELAY_MASK 0x3
+#define AR934X_ETH_CFG_TXE_DELAY_SHIFT 20
/*
* QCA953X GMAC Interface
target/linux/ath79/patches-6.18/331-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch
+90
View File
@@ -0,0 +1,90 @@
From 60efe35257b063ce584968f9f80b437030ce6ba6 Mon Sep 17 00:00:00 2001
From: David Bauer <mail@david-bauer.net>
Date: Mon, 18 Mar 2019 00:54:06 +0100
Subject: [PATCH] MIPS: ath79: add missing QCA955x GMAC registers
This adds missing GMAC register definitions for the Qualcomm Atheros
QCA955X series MIPS SoCs.
They originate from the platforms U-Boot code and the AVM FRITZ!WLAN
Repeater 450E's GPL tarball.
Signed-off-by: David Bauer <mail@david-bauer.net>
---
.../mips/include/asm/mach-ath79/ar71xx_regs.h | 54 +++++++++++++++++++
1 file changed, 54 insertions(+)
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -1253,7 +1253,12 @@
*/
#define QCA955X_GMAC_REG_ETH_CFG 0x00
+#define QCA955X_GMAC_REG_SGMII_RESET 0x14
#define QCA955X_GMAC_REG_SGMII_SERDES 0x18
+#define QCA955X_GMAC_REG_MR_AN_CONTROL 0x1c
+#define QCA955X_GMAC_REG_MR_AN_STATUS 0x20
+#define QCA955X_GMAC_REG_SGMII_CONFIG 0x34
+#define QCA955X_GMAC_REG_SGMII_DEBUG 0x58
#define QCA955X_ETH_CFG_RGMII_EN BIT(0)
#define QCA955X_ETH_CFG_MII_GE0 BIT(1)
@@ -1275,9 +1280,58 @@
#define QCA955X_ETH_CFG_TXE_DELAY_MASK 0x3
#define QCA955X_ETH_CFG_TXE_DELAY_SHIFT 20
+#define QCA955X_SGMII_RESET_RX_CLK_N_RESET 0
+#define QCA955X_SGMII_RESET_RX_CLK_N BIT(0)
+#define QCA955X_SGMII_RESET_TX_CLK_N BIT(1)
+#define QCA955X_SGMII_RESET_RX_125M_N BIT(2)
+#define QCA955X_SGMII_RESET_TX_125M_N BIT(3)
+#define QCA955X_SGMII_RESET_HW_RX_125M_N BIT(4)
+
#define QCA955X_SGMII_SERDES_LOCK_DETECT_STATUS BIT(15)
#define QCA955X_SGMII_SERDES_RES_CALIBRATION_SHIFT 23
#define QCA955X_SGMII_SERDES_RES_CALIBRATION_MASK 0xf
+
+#define QCA955X_MR_AN_CONTROL_SPEED_SEL1 BIT(6)
+#define QCA955X_MR_AN_CONTROL_DUPLEX_MODE BIT(8)
+#define QCA955X_MR_AN_CONTROL_RESTART_AN BIT(9)
+#define QCA955X_MR_AN_CONTROL_POWER_DOWN BIT(11)
+#define QCA955X_MR_AN_CONTROL_AN_ENABLE BIT(12)
+#define QCA955X_MR_AN_CONTROL_SPEED_SEL0 BIT(13)
+#define QCA955X_MR_AN_CONTROL_LOOPBACK BIT(14)
+#define QCA955X_MR_AN_CONTROL_PHY_RESET BIT(15)
+
+#define QCA955X_MR_AN_STATUS_EXT_CAP BIT(0)
+#define QCA955X_MR_AN_STATUS_LINK_UP BIT(2)
+#define QCA955X_MR_AN_STATUS_AN_ABILITY BIT(3)
+#define QCA955X_MR_AN_STATUS_REMOTE_FAULT BIT(4)
+#define QCA955X_MR_AN_STATUS_AN_COMPLETE BIT(5)
+#define QCA955X_MR_AN_STATUS_NO_PREAMBLE BIT(6)
+#define QCA955X_MR_AN_STATUS_BASE_PAGE BIT(7)
+
+#define QCA955X_SGMII_CONFIG_MODE_CTRL_SHIFT 0
+#define QCA955X_SGMII_CONFIG_MODE_CTRL_MASK 0x7
+#define QCA955X_SGMII_CONFIG_ENABLE_SGMII_TX_PAUSE BIT(3)
+#define QCA955X_SGMII_CONFIG_MR_REG4_CHANGED BIT(4)
+#define QCA955X_SGMII_CONFIG_FORCE_SPEED BIT(5)
+#define QCA955X_SGMII_CONFIG_SPEED_SHIFT 6
+#define QCA955X_SGMII_CONFIG_SPEED_MASK 0xc0
+#define QCA955X_SGMII_CONFIG_REMOTE_PHY_LOOPBACK BIT(8)
+#define QCA955X_SGMII_CONFIG_NEXT_PAGE_LOADED BIT(9)
+#define QCA955X_SGMII_CONFIG_MDIO_ENABLE BIT(10)
+#define QCA955X_SGMII_CONFIG_MDIO_PULSE BIT(11)
+#define QCA955X_SGMII_CONFIG_MDIO_COMPLETE BIT(12)
+#define QCA955X_SGMII_CONFIG_PRBS_ENABLE BIT(13)
+#define QCA955X_SGMII_CONFIG_BERT_ENABLE BIT(14)
+
+#define QCA955X_SGMII_DEBUG_TX_STATE_MASK 0xff
+#define QCA955X_SGMII_DEBUG_TX_STATE_SHIFT 0
+#define QCA955X_SGMII_DEBUG_RX_STATE_MASK 0xff00
+#define QCA955X_SGMII_DEBUG_RX_STATE_SHIFT 8
+#define QCA955X_SGMII_DEBUG_RX_SYNC_STATE_MASK 0xff0000
+#define QCA955X_SGMII_DEBUG_RX_SYNC_STATE_SHIFT 16
+#define QCA955X_SGMII_DEBUG_ARB_STATE_MASK 0xf000000
+#define QCA955X_SGMII_DEBUG_ARB_STATE_SHIFT 24
+
/*
* QCA956X GMAC Interface
*/
target/linux/ath79/patches-6.18/332-ath79-sgmii-config.patch
+30
View File
@@ -0,0 +1,30 @@
From: David Bauer <mail@david-bauer.net>
Subject: [PATCH] ath79: force SGMII SerDes mode to MAC operation
The mode on the SGMII SerDes on the QCA9563 is 1000 Base-X by default.
This only allows for 1000 Mbit/s links, however when used with an SGMII
PHY in 100 Mbit/s link mode, the link remains dead.
This strictly has nothing to do with the SerDes calibration, however it
is done at the same point in the QCA reference U-Boot which is the
blueprint for everything happening here. As the current state is more or
less a hack, this should be fine.
This fixes the issues outlined above on a TP-Link EAP-225 Outdoor.
Reported-by: Tom Herbers <freifunk@tomherbers.de>
Tested-by: Tom Herbers <freifunk@tomherbers.de>
Submitted-by: David Bauer <mail@david-bauer.net>
---
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 +
1 files changed, 1 insertion(+)
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -1382,5 +1382,6 @@
#define QCA956X_SGMII_CONFIG_MODE_CTRL_SHIFT 0
#define QCA956X_SGMII_CONFIG_MODE_CTRL_MASK 0x7
+#define QCA956X_SGMII_CONFIG_MODE_CTRL_SGMII_MAC 0x2
#endif /* __ASM_MACH_AR71XX_REGS_H */
target/linux/ath79/patches-6.18/340-register_gpio_driver_earlier.patch
+26
View File
@@ -0,0 +1,26 @@
From: John Crispin <john@phrozen.org>
Subject: ath79: Register GPIO driver earlier
HACK: register the GPIO driver earlier to ensure that gpio_request calls
from mach files succeed.
Submitted-by: John Crispin <john@phrozen.org>
---
drivers/gpio/gpio-ath79.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
--- a/drivers/gpio/gpio-ath79.c
+++ b/drivers/gpio/gpio-ath79.c
@@ -287,7 +287,11 @@ static struct platform_driver ath79_gpio
.probe = ath79_gpio_probe,
};
-module_platform_driver(ath79_gpio_driver);
+static int __init ath79_gpio_init(void)
+{
+ return platform_driver_register(&ath79_gpio_driver);
+}
+postcore_initcall(ath79_gpio_init);
MODULE_DESCRIPTION("Atheros AR71XX/AR724X/AR913X GPIO API support");
MODULE_LICENSE("GPL v2");
target/linux/ath79/patches-6.18/341-wifi-ath9k-obtain-system-gpios.patch
+233
View File
@@ -0,0 +1,233 @@
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From: Linus Walleij <linus.walleij@linaro.org>
Date: Tue, 23 Apr 2024 14:12:33 +0200
Subject: [PATCH v2] wifi: ath9k: Obtain system GPIOS from descriptors
Precedence: bulk
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To: Kalle Valo <kvalo@kernel.org>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Arnd Bergmann <arnd@arndb.de>, Alban Bedel <albeu@free.fr>,
Bartosz Golaszewski <brgl@bgdev.pl>, =?utf-8?q?Toke_H=C3=B8iland-J=C3=B8rg?=
=?utf-8?q?ensen?= <toke@toke.dk>
Cc: linux-wireless@vger.kernel.org, brcm80211-dev-list.pdl@broadcom.com,
linux-gpio@vger.kernel.org, Linus Walleij <linus.walleij@linaro.org>
X-Mailer: b4 0.13.0
The ath9k has an odd use of system-wide GPIOs: if the chip
does not have internal GPIO capability, it will try to obtain a
GPIO line from the system GPIO controller:
if (BIT(gpio) & ah->caps.gpio_mask)
ath9k_hw_gpio_cfg_wmac(...);
else if (AR_SREV_SOC(ah))
ath9k_hw_gpio_cfg_soc(ah, gpio, out, label);
Where ath9k_hw_gpio_cfg_soc() will attempt to issue
gpio_request_one() passing the local GPIO number of the controller
(0..31) to gpio_request_one().
This is somewhat peculiar and possibly even dangerous: there is
nowadays no guarantee of the numbering of these system-wide
GPIOs, and assuming that GPIO 0..31 as used by ath9k would
correspond to GPIOs 0..31 on the system as a whole seems a bit
wild.
Register all 32 GPIOs at index 0..31 directly in the ATH79K
GPIO driver and associate with WIFI if and only if we are probing
ATH79K wifi from the AHB bus (used for SoCs).
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
Changes in v2:
- Define all the descriptors directly in the ATH79K
GPIO driver in case the driver want to request them directly.
- Link to v1: https://lore.kernel.org/r/20240131-descriptors-wireless-v1-0-e1c7c5d68746@linaro.org
---
drivers/gpio/gpio-ath79.c | 47 ++++++++++++++++++++++++++++++++++++-
drivers/net/wireless/ath/ath9k/hw.c | 29 ++++++++++++-----------
drivers/net/wireless/ath/ath9k/hw.h | 3 ++-
3 files changed, 63 insertions(+), 16 deletions(-)
---
base-commit: 4cece764965020c22cff7665b18a012006359095
change-id: 20240122-descriptors-wireless-b8da95dcab35
Best regards,
--- a/drivers/gpio/gpio-ath79.c
+++ b/drivers/gpio/gpio-ath79.c
@@ -11,6 +11,7 @@
#include <linux/device.h>
#include <linux/gpio/driver.h>
#include <linux/gpio/generic.h>
+#include <linux/gpio/machine.h> /* For WLAN GPIOs */
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/mod_devicetable.h>
@@ -214,6 +215,37 @@ static const struct of_device_id ath79_g
};
MODULE_DEVICE_TABLE(of, ath79_gpio_of_match);
+/*
+ * This registers all of the ath79k GPIOs as descriptors to be picked
+ * directly from the ATH79K wifi driver if the two are jitted together
+ * in the same SoC.
+ */
+#define ATH79K_WIFI_DESCS 32
+static int ath79_gpio_register_wifi_descriptors(struct device *dev,
+ const char *label)
+{
+ struct gpiod_lookup_table *lookup;
+ int i;
+
+ /* Create a gpiod lookup using gpiochip-local offsets + 1 for NULL */
+ lookup = devm_kzalloc(dev,
+ struct_size(lookup, table, ATH79K_WIFI_DESCS + 1),
+ GFP_KERNEL);
+
+ if (!lookup)
+ return -ENOMEM;
+
+ for (i = 0; i < ATH79K_WIFI_DESCS; i++) {
+ lookup->table[i] = (struct gpiod_lookup)
+ GPIO_LOOKUP_IDX(label, i, "ath9k", i,
+ GPIO_ACTIVE_HIGH);
+ }
+
+ gpiod_add_lookup_table(lookup);
+
+ return 0;
+}
+
static int ath79_gpio_probe(struct platform_device *pdev)
{
struct gpio_generic_chip_config config;
@@ -276,7 +308,11 @@ static int ath79_gpio_probe(struct platf
girq->handler = handle_simple_irq;
}
- return devm_gpiochip_add_data(dev, &ctrl->chip.gc, ctrl);
+ err = devm_gpiochip_add_data(dev, &ctrl->chip.gc, ctrl);
+ if (err)
+ return err;
+
+ return ath79_gpio_register_wifi_descriptors(dev, ctrl->chip.gc.label);
}
static struct platform_driver ath79_gpio_driver = {
target/linux/ath79/patches-6.18/350-MIPS-ath79-ath9k-exports.patch
+36
View File
@@ -0,0 +1,36 @@
From: John Crispin <john@phrozen.org>
Subject: [PATCH] ath79: make ahb wifi work
Submitted-by: John Crispin <john@phrozen.org>
---
arch/mips/ath79/common.c | 3 +++
mips/include/asm/mach-ath79/ath79.h | 1+
1 file changed, 4 insertions(+)
--- a/arch/mips/ath79/common.c
+++ b/arch/mips/ath79/common.c
@@ -31,11 +31,13 @@ EXPORT_SYMBOL_GPL(ath79_ddr_freq);
enum ath79_soc_type ath79_soc;
unsigned int ath79_soc_rev;
+EXPORT_SYMBOL_GPL(ath79_soc_rev);
void __iomem *ath79_pll_base;
void __iomem *ath79_reset_base;
EXPORT_SYMBOL_GPL(ath79_reset_base);
-static void __iomem *ath79_ddr_base;
+void __iomem *ath79_ddr_base;
+EXPORT_SYMBOL_GPL(ath79_ddr_base);
static void __iomem *ath79_ddr_wb_flush_base;
static void __iomem *ath79_ddr_pci_win_base;
--- a/arch/mips/include/asm/mach-ath79/ath79.h
+++ b/arch/mips/include/asm/mach-ath79/ath79.h
@@ -149,6 +149,7 @@ void ath79_ddr_wb_flush(unsigned int reg
void ath79_ddr_set_pci_windows(void);
extern void __iomem *ath79_pll_base;
+extern void __iomem *ath79_ddr_base;
extern void __iomem *ath79_reset_base;
static inline void ath79_pll_wr(unsigned reg, u32 val)
target/linux/ath79/patches-6.18/351-MIPS-ath79-common-exports.patch
+26
View File
@@ -0,0 +1,26 @@
From: Luiz Angelo Daros de Luca <luizluca@gmail.com>
Subject: [PATCH] ath79: export ath79_pll_base
This symbol is declared as extern but nobody exported it.
Any module including arch/mips/include/asm/mach-ath79/ath79.h
will not build. Without this export, ag71xx.ko will not build
as a module and the build will fail like this:
ERROR: modpost: "ath79_pll_base" [drivers/net/ethernet/atheros/ag71xx/ag71xx.ko] undefined!
The ath79_pll_base symbol is accessed in the ath79_pll_wr() inline function.
---
arch/mips/ath79/common.c | 1 +
1 file changed, 1 insertions(+)
--- a/arch/mips/ath79/common.c
+++ b/arch/mips/ath79/common.c
@@ -34,6 +34,7 @@ unsigned int ath79_soc_rev;
EXPORT_SYMBOL_GPL(ath79_soc_rev);
void __iomem *ath79_pll_base;
+EXPORT_SYMBOL_GPL(ath79_pll_base);
void __iomem *ath79_reset_base;
EXPORT_SYMBOL_GPL(ath79_reset_base);
void __iomem *ath79_ddr_base;
target/linux/ath79/patches-6.18/360-MIPS-ath79-export-UART1-reference-clock.patch
+67
View File
@@ -0,0 +1,67 @@
From: Daniel Golle <daniel@makrotopia.org>
Subject: [PATCH] ath79: add support for Atheros AR934x HS UART
AR934x chips also got the 'old' qca,ar9330-uart in addition to the
'new' ns16550a compatible one. Add support for UART1 clock selector as
well as device-tree bindings in ar934x.dtsi to make use of that uart.
Reported-by: Piotr Dymacz <pepe2k@gmail.com>
Submitted-by: Daniel Golle <daniel@makrotopia.org>
---
arch/mips/ath79/clock.c | 7 +++++++
.../mips/include/asm/mach-ath79/ar71xx_regs.h | 1 +
include/dt-bindings/clock/ath79-clk.h | 3 ++-
3 files changed, 10 insertions(+), 1 deletion(-)
--- a/arch/mips/ath79/clock.c
+++ b/arch/mips/ath79/clock.c
@@ -40,6 +40,7 @@ static const char * const clk_names[ATH7
[ATH79_CLK_AHB] = "ahb",
[ATH79_CLK_REF] = "ref",
[ATH79_CLK_MDIO] = "mdio",
+ [ATH79_CLK_UART1] = "uart1",
};
static const char * __init ath79_clk_name(int type)
@@ -344,6 +345,9 @@ static void __init ar934x_clocks_init(vo
if (clk_ctrl & AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL)
ath79_set_clk(ATH79_CLK_MDIO, 100 * 1000 * 1000);
+ if (clk_ctrl & AR934X_PLL_SWITCH_CLOCK_CONTROL_UART1_CLK_SEL)
+ ath79_set_clk(ATH79_CLK_UART1, 100 * 1000 * 1000);
+
iounmap(dpll_base);
}
@@ -649,6 +653,9 @@ static void __init ath79_clocks_init_dt(
if (!clks[ATH79_CLK_MDIO])
clks[ATH79_CLK_MDIO] = clks[ATH79_CLK_REF];
+ if (!clks[ATH79_CLK_UART1])
+ clks[ATH79_CLK_UART1] = clks[ATH79_CLK_REF];
+
if (of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data)) {
pr_err("%pOF: could not register clk provider\n", np);
goto err_iounmap;
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -350,6 +350,7 @@
#define AR934X_PLL_PCIE_CONFIG_PLL_PWD BIT(30)
#define AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL BIT(6)
+#define AR934X_PLL_SWITCH_CLOCK_CONTROL_UART1_CLK_SEL BIT(7)
#define QCA953X_PLL_CPU_CONFIG_REG 0x00
#define QCA953X_PLL_DDR_CONFIG_REG 0x04
--- a/include/dt-bindings/clock/ath79-clk.h
+++ b/include/dt-bindings/clock/ath79-clk.h
@@ -11,7 +11,8 @@
#define ATH79_CLK_AHB 2
#define ATH79_CLK_REF 3
#define ATH79_CLK_MDIO 4
+#define ATH79_CLK_UART1 5
-#define ATH79_CLK_END 5
+#define ATH79_CLK_END 6
#endif /* __DT_BINDINGS_ATH79_CLK_H */
target/linux/ath79/patches-6.18/370-MIPS-ath79-sanitize-symbols.patch
+77
View File
@@ -0,0 +1,77 @@
From 3fc8585cf76022dba7496627074d42af88c30718 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Sat, 23 Jun 2018 15:16:55 +0200
Subject: [PATCH 32/33] MIPS: ath79: sanitize symbols
We no longer need to select which SoCs are supported as the whole arch
code is always built. So lets drop all the SoC symbols
Signed-off-by: John Crispin <john@phrozen.org>
---
arch/mips/Kconfig | 2 ++
arch/mips/ath79/Kconfig | 44 +++++---------------------------------------
arch/mips/pci/Makefile | 2 +-
3 files changed, 8 insertions(+), 40 deletions(-)
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -243,6 +243,8 @@ config ATH79
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_MIPS16
select SYS_SUPPORTS_ZBOOT_UART_PROM
+ select HAVE_PCI
+ select USB_ARCH_HAS_EHCI
select USE_OF
select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
help
--- a/arch/mips/ath79/Kconfig
+++ b/arch/mips/ath79/Kconfig
@@ -1,32 +1,14 @@
# SPDX-License-Identifier: GPL-2.0
if ATH79
-config SOC_AR71XX
- select HAVE_PCI
- def_bool n
-
-config SOC_AR724X
- select HAVE_PCI
- select PCI_AR724X if PCI
- def_bool n
-
-config SOC_AR913X
- def_bool n
-
-config SOC_AR933X
- def_bool n
-
-config SOC_AR934X
- select HAVE_PCI
- select PCI_AR724X if PCI
- def_bool n
-
-config SOC_QCA955X
- select HAVE_PCI
- select PCI_AR724X if PCI
+config PCI_AR71XX
+ bool "PCI support for AR7100 type SoCs"
+ depends on PCI
def_bool n
config PCI_AR724X
+ bool "PCI support for AR724x type SoCs"
+ depends on PCI
def_bool n
endif
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -19,7 +19,7 @@ obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o
ops-bcm63xx.o
obj-$(CONFIG_MIPS_ALCHEMY) += pci-alchemy.o
obj-$(CONFIG_PCI_AR2315) += pci-ar2315.o
-obj-$(CONFIG_SOC_AR71XX) += pci-ar71xx.o
+obj-$(CONFIG_PCI_AR71XX) += pci-ar71xx.o
obj-$(CONFIG_PCI_AR724X) += pci-ar724x.o
obj-$(CONFIG_PCI_XTALK_BRIDGE) += pci-xtalk-bridge.o
#
target/linux/ath79/patches-6.18/400-mtd-nor-support-mtd-name-from-device-tree.patch
+53
View File
@@ -0,0 +1,53 @@
From f32bc2aa01edcba2f2ed5db151cf183eac9ef919 Mon Sep 17 00:00:00 2001
From: Abhimanyu Vishwakarma <Abhimanyu.Vishwakarma@imgtec.com>
Date: Sat, 25 Feb 2017 16:42:50 +0000
Subject: mtd: nor: support mtd name from device tree
Signed-off-by: Abhimanyu Vishwakarma <Abhimanyu.Vishwakarma@imgtec.com>
---
drivers/mtd/spi-nor/spi-nor.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -3503,12 +3503,19 @@ static int spi_nor_set_mtd_info(struct s
{
struct mtd_info *mtd = &nor->mtd;
struct device *dev = nor->dev;
+ struct device_node *np = spi_nor_get_flash_node(nor);
+ const char __maybe_unused *of_mtd_name = NULL;
spi_nor_set_mtd_locking_ops(nor);
spi_nor_set_mtd_otp_ops(nor);
mtd->dev.parent = dev;
- if (!mtd->name)
+#ifdef CONFIG_MTD_OF_PARTS
+ of_property_read_string(np, "linux,mtd-name", &of_mtd_name);
+#endif
+ if (of_mtd_name)
+ mtd->name = of_mtd_name;
+ else if (!mtd->name)
mtd->name = dev_name(dev);
mtd->type = MTD_NORFLASH;
mtd->flags = MTD_CAP_NORFLASH;
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -902,6 +902,17 @@ out_error:
*/
static void mtd_set_dev_defaults(struct mtd_info *mtd)
{
+#ifdef CONFIG_MTD_OF_PARTS
+ const char __maybe_unused *of_mtd_name = NULL;
+ struct device_node *np;
+
+ np = mtd_get_of_node(mtd);
+ if (np && !mtd->name) {
+ of_property_read_string(np, "linux,mtd-name", &of_mtd_name);
+ if (of_mtd_name)
+ mtd->name = of_mtd_name;
+ } else
+#endif
if (mtd->dev.parent) {
if (!mtd->owner && mtd->dev.parent->driver)
mtd->owner = mtd->dev.parent->driver->owner;
target/linux/ath79/patches-6.18/410-mtd-cybertan-trx-parser.patch
+45
View File
@@ -0,0 +1,45 @@
From: Christian Lamparter <chunkeey@gmail.com>
Subject: [PATCH] ath79: port cybertan_part from ar71xx
This patch ports the cybertan_part code from ar71xx and converts the
driver to a DT-supported mtd parser. As a result, it will no longer
add the u-boot, nvram and art partitions, which were never part of
the special Cybertan header.
Instead these partitions have to be specified in the DT, which has the
upside of making it possible to add properties (i.e.: read-only), labels
and references to these important partitions.
Submitted-by: Christian Lamparter <chunkeey@gmail.com>
---
drivers/mtd/parsers/Makefile | 1 +
drivers/mtd/parsers/Kconfig | 8 ++++++++
2 files changed, 9 insertions(+)
--- a/drivers/mtd/parsers/Makefile
+++ b/drivers/mtd/parsers/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o
ofpart-y += ofpart_core.o
ofpart-$(CONFIG_MTD_OF_PARTS_BCM4908) += ofpart_bcm4908.o
ofpart-$(CONFIG_MTD_OF_PARTS_LINKSYS_NS)+= ofpart_linksys_ns.o
+obj-$(CONFIG_MTD_PARSER_CYBERTAN) += parser_cybertan.o
obj-$(CONFIG_MTD_PARSER_IMAGETAG) += parser_imagetag.o
obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
obj-$(CONFIG_MTD_PARSER_TPLINK_SAFELOADER) += tplink_safeloader.o
--- a/drivers/mtd/parsers/Kconfig
+++ b/drivers/mtd/parsers/Kconfig
@@ -107,6 +107,14 @@ config MTD_OF_PARTS_LINKSYS_NS
two "firmware" partitions. Currently used firmware has to be detected
using CFE environment variable.
+config MTD_PARSER_CYBERTAN
+ tristate "Parser for Cybertan format partitions"
+ depends on MTD && (ATH79 || COMPILE_TEST)
+ help
+ Cybertan has a proprietory header than encompasses a Broadcom trx
+ header. This driver will parse the header and take care of the
+ special offsets that result in the extra headers.
+
config MTD_PARSER_IMAGETAG
tristate "Parser for BCM963XX Image Tag format partitions"
depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST
target/linux/ath79/patches-6.18/430-mtd-ar934x-nand-driver.patch
+34
View File
@@ -0,0 +1,34 @@
From: Gabor Juhos <juhosg@openwrt.org>
Subject: ar71xx: ar934x_nfc: experimental NAND Flash Controller driver for AR934x
SVN-Revision: 33385
---
drivers/mtd/nand/raw/Kconfig | 8 ++++++++
drivers/mtd/nand/raw/Makefile | 1 +
2 files changed, 9 insertions(+)
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -537,4 +537,12 @@ config MTD_NAND_DISKONCHIP_BBTWRITE
load time (assuming you build diskonchip as a module) with the module
parameter "inftl_bbt_write=1".
+config MTD_NAND_AR934X
+ tristate "Support for NAND controller on Qualcomm Atheros AR934x/QCA955x SoCs"
+ depends on ATH79 || COMPILE_TEST
+ depends on HAS_IOMEM
+ help
+ Enables support for NAND controller on Qualcomm Atheros SoCs.
+ This controller is found on AR934x and QCA955x SoCs.
+
endif # MTD_RAW_NAND
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
@@ -59,6 +59,7 @@ obj-$(CONFIG_MTD_NAND_PL35X) += pl35x-n
obj-$(CONFIG_MTD_NAND_RENESAS) += renesas-nand-controller.o
obj-$(CONFIG_MTD_NAND_NUVOTON_MA35) += nuvoton-ma35d1-nand-controller.o
obj-$(CONFIG_MTD_NAND_LOONGSON) += loongson-nand-controller.o
+obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o
nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o
nand-objs += nand_onfi.o
target/linux/ath79/patches-6.18/450-mtd-spi-nor-macronix-locking-support-for-mx25l64-ser.patch
+49
View File
@@ -0,0 +1,49 @@
From: Shiji Yang <yangshiji66@outlook.com>
Date: Wed, 28 Jan 2026 22:50:18 +0800
Subject: [PATCH] mtd: spi-nor: macronix: locking support for MX25L6405D
Macronix MX25L6405D supports locking with four block-protection bits.
The old revision chips only have status register 1. Hence we also have
to clear the 16BIT_SR flag so that the SR1 can be updated correctly.
Co-authored-by: Nick Hainke <vincent@systemli.org>
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
---
drivers/mtd/spi-nor/macronix.c | 11 +++++++++++
1 file changed, 11 insertions(+)
--- a/drivers/mtd/spi-nor/macronix.c
+++ b/drivers/mtd/spi-nor/macronix.c
@@ -25,6 +25,11 @@
SPI_MEM_OP_NO_DUMMY, \
SPI_MEM_OP_DATA_OUT(ndata, buf, 0))
+static void macronix_no_16bit_sr_default_init(struct spi_nor *nor)
+{
+ nor->flags &= ~SNOR_F_HAS_16BIT_SR;
+}
+
static int
mx25l25635_post_bfpt_fixups(struct spi_nor *nor,
const struct sfdp_parameter_header *bfpt_header,
@@ -83,6 +88,10 @@ mx25l3255e_late_init_fixups(struct spi_n
return 0;
}
+static const struct spi_nor_fixups mx25l64_fixups = {
+ .default_init = macronix_no_16bit_sr_default_init,
+};
+
static const struct spi_nor_fixups mx25l25635_fixups = {
.post_bfpt = mx25l25635_post_bfpt_fixups,
.post_sfdp = macronix_qpp4b_post_sfdp_fixups,
@@ -128,7 +137,9 @@ static const struct flash_info macronix_
.id = SNOR_ID(0xc2, 0x20, 0x17),
.name = "mx25l6405d",
.size = SZ_8M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP,
.no_sfdp_flags = SECT_4K,
+ .fixups = &mx25l64_fixups,
}, {
/* MX25L12805D */
.id = SNOR_ID(0xc2, 0x20, 0x18),
target/linux/ath79/patches-6.18/700-phy-add-ath79-usb-phys.patch
+281
View File
@@ -0,0 +1,281 @@
From 08c9d6ceef01893678a5d2e8a15517c745417f21 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Tue, 6 Mar 2018 10:04:05 +0100
Subject: [PATCH 04/27] phy: add ath79 usb phys
Signed-off-by: John Crispin <john@phrozen.org>
---
drivers/phy/Kconfig | 16 ++++++
drivers/phy/Makefile | 2 +
drivers/phy/phy-ar7100-usb.c | 124 +++++++++++++++++++++++++++++++++++++++++++
drivers/phy/phy-ar7200-usb.c | 108 +++++++++++++++++++++++++++++++++++++
4 files changed, 250 insertions(+)
create mode 100644 drivers/phy/phy-ar7100-usb.c
create mode 100644 drivers/phy/phy-ar7200-usb.c
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -25,6 +25,22 @@ config GENERIC_PHY_MIPI_DPHY
Provides a number of helpers a core functions for MIPI D-PHY
drivers to us.
+config PHY_AR7100_USB
+ tristate "Atheros AR7100 USB PHY driver"
+ depends on ATH79 || COMPILE_TEST
+ default y if USB_EHCI_HCD_PLATFORM
+ select GENERIC_PHY
+ help
+ Enable this to support the USB PHY on Atheros AR7100 SoCs.
+
+config PHY_AR7200_USB
+ tristate "Atheros AR7200 USB PHY driver"
+ depends on ATH79 || COMPILE_TEST
+ default y if USB_EHCI_HCD_PLATFORM
+ select GENERIC_PHY
+ help
+ Enable this to support the USB PHY on Atheros AR7200 SoCs.
+
config PHY_LPC18XX_USB_OTG
tristate "NXP LPC18xx/43xx SoC USB OTG PHY driver"
depends on OF && (ARCH_LPC18XX || COMPILE_TEST)
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -4,6 +4,8 @@
#
obj-$(CONFIG_GENERIC_PHY) += phy-core.o
+obj-$(CONFIG_PHY_AR7100_USB) += phy-ar7100-usb.o
+obj-$(CONFIG_PHY_AR7200_USB) += phy-ar7200-usb.o
obj-$(CONFIG_GENERIC_PHY_MIPI_DPHY) += phy-core-mipi-dphy.o
obj-$(CONFIG_PHY_CAN_TRANSCEIVER) += phy-can-transceiver.o
obj-$(CONFIG_PHY_LPC18XX_USB_OTG) += phy-lpc18xx-usb-otg.o
--- /dev/null
+++ b/drivers/phy/phy-ar7100-usb.c
@@ -0,0 +1,115 @@
+/*
+ * Copyright (C) 2018 John Crispin <john@phrozen.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/phy/phy.h>
+#include <linux/delay.h>
+#include <linux/reset.h>
+
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+struct ar7100_usb_phy {
+ struct reset_control *rst_phy;
+ struct reset_control *rst_host;
+ struct reset_control *rst_ohci_dll;
+ void __iomem *io_base;
+ struct phy *phy;
+};
+
+static int ar7100_usb_phy_power_off(struct phy *phy)
+{
+ struct ar7100_usb_phy *priv = phy_get_drvdata(phy);
+ int err = 0;
+
+ err |= reset_control_assert(priv->rst_host);
+ err |= reset_control_assert(priv->rst_phy);
+ err |= reset_control_assert(priv->rst_ohci_dll);
+
+ return err;
+}
+
+static int ar7100_usb_phy_power_on(struct phy *phy)
+{
+ struct ar7100_usb_phy *priv = phy_get_drvdata(phy);
+ int err = 0;
+
+ err |= ar7100_usb_phy_power_off(phy);
+ mdelay(100);
+ err |= reset_control_deassert(priv->rst_ohci_dll);
+ err |= reset_control_deassert(priv->rst_phy);
+ err |= reset_control_deassert(priv->rst_host);
+ mdelay(500);
+ iowrite32(0xf0000, priv->io_base + AR71XX_USB_CTRL_REG_CONFIG);
+ iowrite32(0x20c00, priv->io_base + AR71XX_USB_CTRL_REG_FLADJ);
+
+ return err;
+}
+
+static const struct phy_ops ar7100_usb_phy_ops = {
+ .power_on = ar7100_usb_phy_power_on,
+ .power_off = ar7100_usb_phy_power_off,
+ .owner = THIS_MODULE,
+};
+
+static int ar7100_usb_phy_probe(struct platform_device *pdev)
+{
+ struct phy_provider *phy_provider;
+ struct ar7100_usb_phy *priv;
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ priv->io_base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(priv->io_base))
+ return PTR_ERR(priv->io_base);
+
+ priv->rst_phy = devm_reset_control_get(&pdev->dev, "phy");
+ if (IS_ERR(priv->rst_phy))
+ return dev_err_probe(&pdev->dev, PTR_ERR(priv->rst_phy), "phy reset is missing");
+
+ priv->rst_host = devm_reset_control_get(&pdev->dev, "host");
+ if (IS_ERR(priv->rst_host))
+ return dev_err_probe(&pdev->dev, PTR_ERR(priv->rst_host), "host reset is missing");
+
+ priv->rst_ohci_dll = devm_reset_control_get(&pdev->dev, "usb-ohci-dll");
+ if (IS_ERR(priv->rst_ohci_dll))
+ return dev_err_probe(&pdev->dev, PTR_ERR(priv->rst_host), "ohci-dll reset is missing");
+
+ priv->phy = devm_phy_create(&pdev->dev, NULL, &ar7100_usb_phy_ops);
+ if (IS_ERR(priv->phy))
+ return dev_err_probe(&pdev->dev, PTR_ERR(priv->phy), "failed to create PHY");
+
+ phy_set_drvdata(priv->phy, priv);
+
+ phy_provider = devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate);
+
+ return PTR_ERR_OR_ZERO(phy_provider);
+}
+
+static const struct of_device_id ar7100_usb_phy_of_match[] = {
+ { .compatible = "qca,ar7100-usb-phy" },
+ {}
+};
+MODULE_DEVICE_TABLE(of, ar7100_usb_phy_of_match);
+
+static struct platform_driver ar7100_usb_phy_driver = {
+ .probe = ar7100_usb_phy_probe,
+ .driver = {
+ .of_match_table = ar7100_usb_phy_of_match,
+ .name = "ar7100-usb-phy",
+ }
+};
+module_platform_driver(ar7100_usb_phy_driver);
+
+MODULE_DESCRIPTION("ATH79 USB PHY driver");
+MODULE_AUTHOR("Alban Bedel <albeu@free.fr>");
+MODULE_LICENSE("GPL");
--- /dev/null
+++ b/drivers/phy/phy-ar7200-usb.c
@@ -0,0 +1,109 @@
+/*
+ * Copyright (C) 2015 Alban Bedel <albeu@free.fr>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/phy/phy.h>
+#include <linux/reset.h>
+
+struct ar7200_usb_phy {
+ struct reset_control *rst_phy;
+ struct reset_control *rst_phy_analog;
+ struct reset_control *suspend_override;
+ struct phy *phy;
+};
+
+static int ar7200_usb_phy_power_on(struct phy *phy)
+{
+ struct ar7200_usb_phy *priv = phy_get_drvdata(phy);
+ int err = 0;
+
+ if (priv->suspend_override)
+ err = reset_control_assert(priv->suspend_override);
+ if (priv->rst_phy)
+ err |= reset_control_deassert(priv->rst_phy);
+ if (priv->rst_phy_analog)
+ err |= reset_control_deassert(priv->rst_phy_analog);
+
+ return err;
+}
+
+static int ar7200_usb_phy_power_off(struct phy *phy)
+{
+ struct ar7200_usb_phy *priv = phy_get_drvdata(phy);
+ int err = 0;
+
+ if (priv->suspend_override)
+ err = reset_control_deassert(priv->suspend_override);
+ if (priv->rst_phy)
+ err |= reset_control_assert(priv->rst_phy);
+ if (priv->rst_phy_analog)
+ err |= reset_control_assert(priv->rst_phy_analog);
+
+ return err;
+}
+
+static const struct phy_ops ar7200_usb_phy_ops = {
+ .power_on = ar7200_usb_phy_power_on,
+ .power_off = ar7200_usb_phy_power_off,
+ .owner = THIS_MODULE,
+};
+
+static int ar7200_usb_phy_probe(struct platform_device *pdev)
+{
+ struct phy_provider *phy_provider;
+ struct ar7200_usb_phy *priv;
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ priv->rst_phy = devm_reset_control_get(&pdev->dev, "phy");
+ if (IS_ERR(priv->rst_phy))
+ return dev_err_probe(&pdev->dev, PTR_ERR(priv->rst_phy), "phy reset is missing");
+
+ priv->rst_phy_analog = devm_reset_control_get_optional(
+ &pdev->dev, "phy-analog");
+ if (IS_ERR(priv->rst_phy_analog))
+ return PTR_ERR(priv->rst_phy_analog);
+
+ priv->suspend_override = devm_reset_control_get_optional(
+ &pdev->dev, "suspend-override");
+ if (IS_ERR(priv->suspend_override))
+ return PTR_ERR(priv->suspend_override);
+
+ priv->phy = devm_phy_create(&pdev->dev, NULL, &ar7200_usb_phy_ops);
+ if (IS_ERR(priv->phy))
+ return dev_err_probe(&pdev->dev, PTR_ERR(priv->phy), "failed to create PHY");
+
+ phy_set_drvdata(priv->phy, priv);
+
+ phy_provider = devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate);
+
+ return PTR_ERR_OR_ZERO(phy_provider);
+}
+
+static const struct of_device_id ar7200_usb_phy_of_match[] = {
+ { .compatible = "qca,ar7200-usb-phy" },
+ {}
+};
+MODULE_DEVICE_TABLE(of, ar7200_usb_phy_of_match);
+
+static struct platform_driver ar7200_usb_phy_driver = {
+ .probe = ar7200_usb_phy_probe,
+ .driver = {
+ .of_match_table = ar7200_usb_phy_of_match,
+ .name = "ar7200-usb-phy",
+ }
+};
+module_platform_driver(ar7200_usb_phy_driver);
+
+MODULE_DESCRIPTION("ATH79 USB PHY driver");
+MODULE_AUTHOR("Alban Bedel <albeu@free.fr>");
+MODULE_LICENSE("GPL");
target/linux/ath79/patches-6.18/701-usb-add-more-OF-quirk-properties.patch
+24
View File
@@ -0,0 +1,24 @@
From 2201818e5bd33f389beceb3943fdfcf5a698fc5b Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Tue, 6 Mar 2018 10:01:43 +0100
Subject: [PATCH 05/27] usb: add more OF/quirk properties
Signed-off-by: John Crispin <john@phrozen.org>
---
drivers/usb/host/ehci-platform.c | 5 +++++
1 file changed, 5 insertions(+)
--- a/drivers/usb/host/ehci-platform.c
+++ b/drivers/usb/host/ehci-platform.c
@@ -275,6 +275,11 @@ static int ehci_platform_probe(struct pl
ehci = hcd_to_ehci(hcd);
if (pdata == &ehci_platform_defaults && dev->dev.of_node) {
+ of_property_read_u32(dev->dev.of_node, "caps-offset", &pdata->caps_offset);
+
+ if (of_property_read_bool(dev->dev.of_node, "has-synopsys-hc-bug"))
+ pdata->has_synopsys_hc_bug = 1;
+
if (of_property_read_bool(dev->dev.of_node, "big-endian-regs"))
ehci->big_endian_mmio = 1;
target/linux/ath79/patches-6.18/710-net-use-downstream-ag71xx.patch
+34
View File
@@ -0,0 +1,34 @@
From: John Crispin <john@phrozen.org>
Subject: [PATCH] ath79: add new OF only target for QCA MIPS silicon
This target aims to replace ar71xx mid-term. The big part that is still
missing is making the MMIO/AHB wifi work using OF. NAND and mikrotik
subtargets will follow.
Submitted-by: John Crispin <john@phrozen.org>
---
drivers/net/ethernet/atheros/Kconfig | 8 +-------
drivers/net/ethernet/atheros/Makefile | 2 +-
2 files changed, 2 insertions(+), 8 deletions(-)
--- a/drivers/net/ethernet/atheros/Kconfig
+++ b/drivers/net/ethernet/atheros/Kconfig
@@ -26,6 +26,8 @@ config AG71XX
If you wish to compile a kernel for AR7XXX/91XXX and enable
ethernet support, then you should always answer Y to this.
+source "drivers/net/ethernet/atheros/ag71xx/Kconfig"
+
config ATL2
tristate "Atheros L2 Fast Ethernet support"
depends on PCI
--- a/drivers/net/ethernet/atheros/Makefile
+++ b/drivers/net/ethernet/atheros/Makefile
@@ -4,6 +4,7 @@
#
obj-$(CONFIG_AG71XX) += ag71xx.o
+obj-$(CONFIG_AG71XX_LEGACY) += ag71xx/
obj-$(CONFIG_ATL1) += atlx/
obj-$(CONFIG_ATL2) += atlx/
obj-$(CONFIG_ATL1E) += atl1e/
target/linux/ath79/patches-6.18/720-mdio_bitbang_ignore_ta_value.patch
+40
View File
@@ -0,0 +1,40 @@
From: Jonas Gorski <jogo@openwrt.org>
Subject: ar71xx: add a workaround for ar8316 not always driving the TA bit to low
AR8316 behind a GPIO bitbanged MDIO bus fails to drive the turnaround bit
to low despite returning a valid value. Ignore it and just use the
returned value anyway.
SVN-Revision: 28422
---
drivers/net/mdio/mdio-bitbang.c | 16 ++-----------------
1 file changed, 2 insertions(+), 14 deletions(-)
--- a/drivers/net/mdio/mdio-bitbang.c
+++ b/drivers/net/mdio/mdio-bitbang.c
@@ -148,23 +148,11 @@ static void mdiobb_cmd_addr(struct mdiob
static int mdiobb_read_common(struct mii_bus *bus, int phy)
{
struct mdiobb_ctrl *ctrl = bus->priv;
- int ret, i;
+ int ret;
ctrl->ops->set_mdio_dir(ctrl, 0);
- /* check the turnaround bit: the PHY should be driving it to zero, if this
- * PHY is listed in phy_ignore_ta_mask as having broken TA, skip that
- */
- if (mdiobb_get_bit(ctrl) != 0 &&
- !(bus->phy_ignore_ta_mask & (1 << phy))) {
- /* PHY didn't drive TA low -- flush any bits it
- * may be trying to send.
- */
- for (i = 0; i < 32; i++)
- mdiobb_get_bit(ctrl);
-
- return 0xffff;
- }
+ mdiobb_get_bit(ctrl);
ret = mdiobb_get_num(ctrl, 16);
mdiobb_get_bit(ctrl);
target/linux/ath79/patches-6.18/721-phy-mdio-bitbang-prevent-rescheduling-during-command.patch
+94
View File
@@ -0,0 +1,94 @@
From 66e584435ac0de6e0abeb6d7166fe4fe25d6bb73 Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jogo@openwrt.org>
Date: Tue, 16 Jun 2015 13:15:08 +0200
Subject: [PATCH] phy/mdio-bitbang: prevent rescheduling during command
It seems some phys have some maximum timings for accessing the MDIO line,
resulting in bit errors under cpu stress. Prevent this from happening by
disabling interrupts when sending commands.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
---
drivers/net/mdio/mdio-bitbang.c | 9 +++++++++
1 file changed, 9 insertions(+)
--- a/drivers/net/mdio/mdio-bitbang.c
+++ b/drivers/net/mdio/mdio-bitbang.c
@@ -14,6 +14,7 @@
* Vitaly Bordug <vbordug@ru.mvista.com>
*/
+#include <linux/irqflags.h>
#include <linux/delay.h>
#include <linux/mdio-bitbang.h>
#include <linux/module.h>
@@ -161,22 +162,32 @@ static int mdiobb_read_common(struct mii
int mdiobb_read_c22(struct mii_bus *bus, int phy, int reg)
{
+ int ret;
+ unsigned long flags;
struct mdiobb_ctrl *ctrl = bus->priv;
+ local_irq_save(flags);
mdiobb_cmd(ctrl, ctrl->op_c22_read, phy, reg);
- return mdiobb_read_common(bus, phy);
+ ret = mdiobb_read_common(bus, phy);
+ local_irq_restore(flags);
+ return ret;
}
EXPORT_SYMBOL(mdiobb_read_c22);
int mdiobb_read_c45(struct mii_bus *bus, int phy, int devad, int reg)
{
+ int ret;
+ unsigned long flags;
struct mdiobb_ctrl *ctrl = bus->priv;
+ local_irq_save(flags);
mdiobb_cmd_addr(ctrl, phy, devad, reg);
mdiobb_cmd(ctrl, MDIO_C45_READ, phy, devad);
- return mdiobb_read_common(bus, phy);
+ ret = mdiobb_read_common(bus, phy);
+ local_irq_restore(flags);
+ return ret;
}
EXPORT_SYMBOL(mdiobb_read_c45);
@@ -197,22 +208,32 @@ static int mdiobb_write_common(struct mi
int mdiobb_write_c22(struct mii_bus *bus, int phy, int reg, u16 val)
{
+ int ret;
+ unsigned long flags;
struct mdiobb_ctrl *ctrl = bus->priv;
+ local_irq_save(flags);
mdiobb_cmd(ctrl, ctrl->op_c22_write, phy, reg);
- return mdiobb_write_common(bus, val);
+ ret = mdiobb_write_common(bus, val);
+ local_irq_restore(flags);
+ return ret;
}
EXPORT_SYMBOL(mdiobb_write_c22);
int mdiobb_write_c45(struct mii_bus *bus, int phy, int devad, int reg, u16 val)
{
+ int ret;
+ unsigned long flags;
struct mdiobb_ctrl *ctrl = bus->priv;
+ local_irq_save(flags);
mdiobb_cmd_addr(ctrl, phy, devad, reg);
mdiobb_cmd(ctrl, MDIO_C45_WRITE, phy, devad);
- return mdiobb_write_common(bus, val);
+ ret = mdiobb_write_common(bus, val);
+ local_irq_restore(flags);
+ return ret;
}
EXPORT_SYMBOL(mdiobb_write_c45);
target/linux/ath79/patches-6.18/730-ar8216-make-reg-access-atomic.patch
+59
View File
@@ -0,0 +1,59 @@
From b3797d1a92afe97c173b00fdb7824cedba24eef0 Mon Sep 17 00:00:00 2001
From: Chuanhong Guo <gch981213@gmail.com>
Date: Sun, 20 Sep 2020 01:00:45 +0800
Subject: [PATCH] ath79: ar8216: make switch register access atomic
due to some unknown reason these register accesses sometimes fail
on the integrated switch without this patch.
THIS ONLY WORKS ON ATH79 AND MAY BREAK THE DRIVER ON OTHER PLATFORMS!
The mdio bus on ath79 works in polling mode and doesn't rely on
any interrupt. This patch breaks the driver on any mdio master
with interrupts used.
---
--- a/drivers/net/phy/ar8216.c
+++ b/drivers/net/phy/ar8216.c
@@ -250,6 +250,7 @@ ar8xxx_mii_write32(struct ar8xxx_priv *p
u32
ar8xxx_read(struct ar8xxx_priv *priv, int reg)
{
+ unsigned long flags;
struct mii_bus *bus = priv->mii_bus;
u16 r1, r2, page;
u32 val;
@@ -257,11 +258,13 @@ ar8xxx_read(struct ar8xxx_priv *priv, in
split_addr((u32) reg, &r1, &r2, &page);
mutex_lock(&bus->mdio_lock);
+ local_irq_save(flags);
bus->write(bus, 0x18, 0, page);
wait_for_page_switch();
val = ar8xxx_mii_read32(priv, 0x10 | r2, r1);
+ local_irq_restore(flags);
mutex_unlock(&bus->mdio_lock);
return val;
@@ -270,17 +273,20 @@ ar8xxx_read(struct ar8xxx_priv *priv, in
void
ar8xxx_write(struct ar8xxx_priv *priv, int reg, u32 val)
{
+ unsigned long flags;
struct mii_bus *bus = priv->mii_bus;
u16 r1, r2, page;
split_addr((u32) reg, &r1, &r2, &page);
mutex_lock(&bus->mdio_lock);
+ local_irq_save(flags);
bus->write(bus, 0x18, 0, page);
wait_for_page_switch();
ar8xxx_mii_write32(priv, 0x10 | r2, r1, val);
+ local_irq_restore(flags);
mutex_unlock(&bus->mdio_lock);
}
target/linux/ath79/patches-6.18/800-leds-add-reset-controller-based-driver.patch
+186
View File
@@ -0,0 +1,186 @@
From ecbd9c87f073f097d9fe56390353e64e963e866a Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Tue, 6 Mar 2018 10:03:03 +0100
Subject: [PATCH 03/27] leds: add reset-controller based driver
Signed-off-by: John Crispin <john@phrozen.org>
---
drivers/leds/Kconfig | 11 ++++
drivers/leds/Makefile | 1 +
drivers/leds/leds-reset.c | 137 ++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 149 insertions(+)
create mode 100644 drivers/leds/leds-reset.c
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -1028,6 +1028,17 @@ source "drivers/leds/flash/Kconfig"
comment "RGB LED drivers"
source "drivers/leds/rgb/Kconfig"
+config LEDS_RESET
+ tristate "LED support for reset-controller API"
+ depends on LEDS_CLASS
+ depends on RESET_CONTROLLER
+ help
+ This option enables support for LEDs connected to pins driven by reset
+ controllers. Yes, DNI actual built HW like that.
+
+ To compile this driver as a module, choose M here: the module
+ will be called leds-reset.
+
comment "LED Triggers"
source "drivers/leds/trigger/Kconfig"
--- /dev/null
+++ b/drivers/leds/leds-reset.c
@@ -0,0 +1,140 @@
+/*
+ * Copyright (C) 2018 John Crispin <john@phrozen.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#include <linux/err.h>
+#include <linux/reset.h>
+#include <linux/kernel.h>
+#include <linux/leds.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/reset.h>
+
+struct reset_led_data {
+ struct led_classdev cdev;
+ struct reset_control *rst;
+};
+
+static inline struct reset_led_data *
+ cdev_to_reset_led_data(struct led_classdev *led_cdev)
+{
+ return container_of(led_cdev, struct reset_led_data, cdev);
+}
+
+static void reset_led_set(struct led_classdev *led_cdev,
+ enum led_brightness value)
+{
+ struct reset_led_data *led_dat = cdev_to_reset_led_data(led_cdev);
+
+ if (value == LED_OFF)
+ reset_control_assert(led_dat->rst);
+ else
+ reset_control_deassert(led_dat->rst);
+}
+
+struct reset_leds_priv {
+ int num_leds;
+ struct reset_led_data leds[];
+};
+
+static inline int sizeof_reset_leds_priv(int num_leds)
+{
+ return sizeof(struct reset_leds_priv) +
+ (sizeof(struct reset_led_data) * num_leds);
+}
+
+static struct reset_leds_priv *reset_leds_create(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct fwnode_handle *child;
+ struct reset_leds_priv *priv;
+ int count, ret;
+
+ count = device_get_child_node_count(dev);
+ if (!count)
+ return ERR_PTR(-ENODEV);
+
+ priv = devm_kzalloc(dev, sizeof_reset_leds_priv(count), GFP_KERNEL);
+ if (!priv)
+ return ERR_PTR(-ENOMEM);
+
+ device_for_each_child_node(dev, child) {
+ struct reset_led_data *led = &priv->leds[priv->num_leds];
+ struct device_node *np = to_of_node(child);
+
+ ret = fwnode_property_read_string(child, "label", &led->cdev.name);
+ if (!led->cdev.name) {
+ fwnode_handle_put(child);
+ return ERR_PTR(-EINVAL);
+ }
+ led->rst = __of_reset_control_get(np, NULL, 0, RESET_CONTROL_EXCLUSIVE);
+ if (IS_ERR(led->rst))
+ return ERR_PTR(-EINVAL);
+
+ fwnode_property_read_string(child, "linux,default-trigger",
+ &led->cdev.default_trigger);
+
+ led->cdev.brightness_set = reset_led_set;
+ ret = devm_led_classdev_register(&pdev->dev, &led->cdev);
+ if (ret < 0)
+ return ERR_PTR(ret);
+ led->cdev.dev->of_node = np;
+ priv->num_leds++;
+ }
+
+ return priv;
+}
+
+static const struct of_device_id of_reset_leds_match[] = {
+ { .compatible = "reset-leds", },
+ {},
+};
+
+MODULE_DEVICE_TABLE(of, of_reset_leds_match);
+
+static int reset_led_probe(struct platform_device *pdev)
+{
+ struct reset_leds_priv *priv;
+
+ priv = reset_leds_create(pdev);
+ if (IS_ERR(priv))
+ return PTR_ERR(priv);
+
+ platform_set_drvdata(pdev, priv);
+
+ return 0;
+}
+
+static void reset_led_shutdown(struct platform_device *pdev)
+{
+ struct reset_leds_priv *priv = platform_get_drvdata(pdev);
+ int i;
+
+ for (i = 0; i < priv->num_leds; i++) {
+ struct reset_led_data *led = &priv->leds[i];
+
+ if (!(led->cdev.flags & LED_RETAIN_AT_SHUTDOWN))
+ reset_led_set(&led->cdev, LED_OFF);
+ }
+}
+
+static struct platform_driver reset_led_driver = {
+ .probe = reset_led_probe,
+ .shutdown = reset_led_shutdown,
+ .driver = {
+ .name = "leds-reset",
+ .of_match_table = of_reset_leds_match,
+ },
+};
+
+module_platform_driver(reset_led_driver);
+
+MODULE_AUTHOR("John Crispin <john@phrozen.org>");
+MODULE_DESCRIPTION("reset controller LED driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:leds-reset");
--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
@@ -98,6 +98,7 @@ obj-$(CONFIG_LEDS_UPBOARD) += leds-upbo
obj-$(CONFIG_LEDS_WM831X_STATUS) += leds-wm831x-status.o
obj-$(CONFIG_LEDS_WM8350) += leds-wm8350.o
obj-$(CONFIG_LEDS_WRAP) += leds-wrap.o
+obj-$(CONFIG_LEDS_RESET) += leds-reset.o
# Kinetic ExpressWire Protocol
obj-$(CONFIG_LEDS_EXPRESSWIRE) += leds-expresswire.o
target/linux/ath79/patches-6.18/810-ath79-ignore-the-abused-interrupt-map-on-pcie-node.patch
+33
View File
@@ -0,0 +1,33 @@
From: Shiji Yang <yangshiji66@outlook.com>
Date: Wed, 31 May 2023 00:15:23 +0000
Subject: [PATCH] ath79: ignore the abused interrupt-map on pcie node
ath79 PCIe interrupt controller has stopped working correctly. This
is because the DT exposing a non-sensical interrupt-map property,
and their drivers relying on the kernel ignoring this property[1].
This patch fix the pcie init error:
ath9k 0000:00:00.0: of_irq_parse_pci: failed with rc=-14
Notice:
This is just a workaround, not a fix. PCIe driver and related dts
node need to be rewritten.
[1] https://lore.kernel.org/all/20211201114102.13446-1-maz@kernel.org/
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
---
drivers/of/irq.c | 2 ++
1 file changed, 2 insertions(+)
--- a/drivers/of/irq.c
+++ b/drivers/of/irq.c
@@ -94,6 +94,8 @@ EXPORT_SYMBOL_GPL(of_irq_find_parent);
* drawing board.
*/
static const char * const of_irq_imap_abusers[] = {
+ "qca,ar7100-pci",
+ "qcom,ar7240-pci",
"CBEA,platform-spider-pic",
"sti,platform-spider-pic",
"realtek,rtl-intc",
target/linux/ath79/patches-6.18/820-mfd-syscon-support-skip-reset-control-for-syscon-devices.patch
+37
View File
@@ -0,0 +1,37 @@
From: Shiji Yang <yangshiji66@outlook.com>
Date: Wed, 13 Mar 2024 22:36:31 +0800
Subject: [PATCH] mfd: syscon: support skip reset control for syscon devices
Some platform device drivers(e.g. ag71xx) expect exclusive reset
control. Fetching reset controller for syscon[1] will break these
drivers. This patch introduces a new property 'syscon-no-reset'
to skip it.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit?id=7d1e3bd94828ad9fc86f55253cd6fec8edd65394
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
---
drivers/mfd/syscon.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
--- a/drivers/mfd/syscon.c
+++ b/drivers/mfd/syscon.c
@@ -46,7 +46,7 @@ static struct syscon *of_syscon_register
int ret;
struct regmap_config syscon_config = syscon_regmap_config;
struct resource res;
- struct reset_control *reset;
+ struct reset_control *reset = NULL;
resource_size_t res_size;
WARN_ON(!mutex_is_locked(&syscon_list_lock));
@@ -135,7 +135,8 @@ static struct syscon *of_syscon_register
goto err_attach_clk;
}
- reset = of_reset_control_get_optional_exclusive(np, NULL);
+ if (!of_property_read_bool(np, "syscon-no-reset"))
+ reset = of_reset_control_get_optional_exclusive(np, NULL);
if (IS_ERR(reset)) {
ret = PTR_ERR(reset);
goto err_attach_clk;
target/linux/ath79/patches-6.18/900-unaligned_access_hacks.patch
+918
View File
@@ -0,0 +1,918 @@
From: Felix Fietkau <nbd@openwrt.org>
Subject: [PATCH] ar71xx: fix unaligned access in a few more places
SVN-Revision: 35130
---
arch/mips/include/asm/checksum.h | 83 +++---------------
include/uapi/linux/ip.h | 2 +-
include/uapi/linux/ipv6.h | 2 +-
include/uapi/linux/tcp.h | 4 ++--
include/uapi/linux/udp.h | 2 +-
net/netfilter/nf_conntrack_core.c | 4 ++--
include/uapi/linux/icmp.h | 2 +-
include/uapi/linux/in6.h | 2 +-
net/ipv6/tcp_ipv6.c | 9 +++--
net/ipv6/datagram.c | 6 ++--
net/ipv6/exthdrs.c | 2 +-
include/linux/types.h | 5 +++
net/ipv4/af_inet.c | 4 ++--
net/ipv4/tcp_output.c | 69 +++++++++--------
include/uapi/linux/igmp.h | 8 +++---
net/core/flow_dissector.c | 2 +-
include/uapi/linux/icmpv6.h | 2 +-
include/net/ndisc.h | 10 ++++----
net/sched/cls_u32.c | 6 +++---
net/ipv6/ip6_offload.c | 2 +-
include/net/addrconf.h | 2 +-
include/net/inet_ecn.h | 4 ++--
include/net/ipv6.h | 23 +++++----
include/net/secure_seq.h | 1 +
include/uapi/linux/in.h | 2 +-
net/ipv6/ip6_fib.h | 2 +-
net/netfilter/nf_conntrack_proto_tcp.c | 2 +-
net/xfrm/xfrm_input.c | 4 ++--
net/ipv4/tcp_input.c | 12 ++++---
include/uapi/linux/if_pppox.h | 1 +
net/ipv6/netfilter/nf_log_ipv6.c | 4 ++--
include/net/neighbour.h | 6 +++--
include/uapi/linux/netfilter_arp/arp_tables.h | 2 +-
net/core/utils.c | 10 +++++--
include/linux/etherdevice.h | 11 ++++---
net/ipv4/tcp_offload.c | 6 +++---
net/ipv6/netfilter/ip6table_mangle.c | 4 ++--
37 file changed, 171 insertions(+), 141 deletions(-)
--- a/arch/mips/include/asm/checksum.h
+++ b/arch/mips/include/asm/checksum.h
@@ -100,26 +100,30 @@ static inline __sum16 ip_fast_csum(const
const unsigned int *stop = word + ihl;
unsigned int csum;
int carry;
+ unsigned int w;
- csum = word[0];
- csum += word[1];
- carry = (csum < word[1]);
+ csum = net_hdr_word(word++);
+
+ w = net_hdr_word(word++);
+ csum += w;
+ carry = (csum < w);
csum += carry;
- csum += word[2];
- carry = (csum < word[2]);
+ w = net_hdr_word(word++);
+ csum += w;
+ carry = (csum < w);
csum += carry;
- csum += word[3];
- carry = (csum < word[3]);
+ w = net_hdr_word(word++);
+ csum += w;
+ carry = (csum < w);
csum += carry;
- word += 4;
do {
- csum += *word;
- carry = (csum < *word);
+ w = net_hdr_word(word++);
+ csum += w;
+ carry = (csum < w);
csum += carry;
- word++;
} while (word != stop);
return csum_fold(csum);
@@ -179,74 +183,6 @@ static inline __sum16 ip_compute_csum(co
return csum_fold(csum_partial(buff, len, 0));
}
-#define _HAVE_ARCH_IPV6_CSUM
-static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
- const struct in6_addr *daddr,
- __u32 len, __u8 proto,
- __wsum sum)
-{
- __wsum tmp;
-
- __asm__(
- " .set push # csum_ipv6_magic\n"
- " .set noreorder \n"
- " .set noat \n"
- " addu %0, %5 # proto (long in network byte order)\n"
- " sltu $1, %0, %5 \n"
- " addu %0, $1 \n"
-
- " addu %0, %6 # csum\n"
- " sltu $1, %0, %6 \n"
- " lw %1, 0(%2) # four words source address\n"
- " addu %0, $1 \n"
- " addu %0, %1 \n"
- " sltu $1, %0, %1 \n"
-
- " lw %1, 4(%2) \n"
- " addu %0, $1 \n"
- " addu %0, %1 \n"
- " sltu $1, %0, %1 \n"
-
- " lw %1, 8(%2) \n"
- " addu %0, $1 \n"
- " addu %0, %1 \n"
- " sltu $1, %0, %1 \n"
-
- " lw %1, 12(%2) \n"
- " addu %0, $1 \n"
- " addu %0, %1 \n"
- " sltu $1, %0, %1 \n"
-
- " lw %1, 0(%3) \n"
- " addu %0, $1 \n"
- " addu %0, %1 \n"
- " sltu $1, %0, %1 \n"
-
- " lw %1, 4(%3) \n"
- " addu %0, $1 \n"
- " addu %0, %1 \n"
- " sltu $1, %0, %1 \n"
-
- " lw %1, 8(%3) \n"
- " addu %0, $1 \n"
- " addu %0, %1 \n"
- " sltu $1, %0, %1 \n"
-
- " lw %1, 12(%3) \n"
- " addu %0, $1 \n"
- " addu %0, %1 \n"
- " sltu $1, %0, %1 \n"
-
- " addu %0, $1 # Add final carry\n"
- " .set pop"
- : "=&r" (sum), "=&r" (tmp)
- : "r" (saddr), "r" (daddr),
- "0" (htonl(len)), "r" (htonl(proto)), "r" (sum)
- : "memory");
-
- return csum_fold(sum);
-}
-
#include <asm-generic/checksum.h>
#endif /* CONFIG_GENERIC_CSUM */
--- a/include/uapi/linux/ip.h
+++ b/include/uapi/linux/ip.h
@@ -106,7 +106,7 @@ struct iphdr {
__be32 daddr;
);
/*The options start here. */
-};
+} __attribute__((packed, aligned(2)));
struct ip_auth_hdr {
--- a/include/uapi/linux/ipv6.h
+++ b/include/uapi/linux/ipv6.h
@@ -135,7 +135,7 @@ struct ipv6hdr {
struct in6_addr saddr;
struct in6_addr daddr;
);
-};
+} __attribute__((packed, aligned(2)));
/* index values for the variables in ipv6_devconf */
--- a/include/uapi/linux/tcp.h
+++ b/include/uapi/linux/tcp.h
@@ -57,7 +57,7 @@ struct tcphdr {
__be16 window;
__sum16 check;
__be16 urg_ptr;
-};
+} __attribute__((packed, aligned(2)));
/*
* The union cast uses a gcc extension to avoid aliasing problems
@@ -67,7 +67,7 @@ struct tcphdr {
union tcp_word_hdr {
struct tcphdr hdr;
__be32 words[5];
-};
+} __attribute__((packed, aligned(2)));
#define tcp_flag_word(tp) (((union tcp_word_hdr *)(tp))->words[3])
--- a/include/uapi/linux/udp.h
+++ b/include/uapi/linux/udp.h
@@ -25,7 +25,7 @@ struct udphdr {
__be16 dest;
__be16 len;
__sum16 check;
-};
+} __attribute__((packed, aligned(2)));
/* UDP socket options */
#define UDP_CORK 1 /* Never send partially complete segments */
--- a/net/netfilter/nf_conntrack_core.c
+++ b/net/netfilter/nf_conntrack_core.c
@@ -298,8 +298,8 @@ nf_ct_get_tuple(const struct sk_buff *sk
switch (l3num) {
case NFPROTO_IPV4:
- tuple->src.u3.ip = ap[0];
- tuple->dst.u3.ip = ap[1];
+ tuple->src.u3.ip = net_hdr_word(ap++);
+ tuple->dst.u3.ip = net_hdr_word(ap);
break;
case NFPROTO_IPV6:
memcpy(tuple->src.u3.ip6, ap, sizeof(tuple->src.u3.ip6));
--- a/include/uapi/linux/icmp.h
+++ b/include/uapi/linux/icmp.h
@@ -102,7 +102,7 @@ struct icmphdr {
} frag;
__u8 reserved[4];
} un;
-};
+} __attribute__((packed, aligned(2)));
/*
--- a/include/uapi/linux/in6.h
+++ b/include/uapi/linux/in6.h
@@ -43,7 +43,7 @@ struct in6_addr {
#define s6_addr16 in6_u.u6_addr16
#define s6_addr32 in6_u.u6_addr32
#endif
-};
+} __attribute__((packed, aligned(2)));
#endif /* __UAPI_DEF_IN6_ADDR */
#if __UAPI_DEF_SOCKADDR_IN6
--- a/net/ipv6/tcp_ipv6.c
+++ b/net/ipv6/tcp_ipv6.c
@@ -35,6 +35,7 @@
#include <linux/ipsec.h>
#include <linux/times.h>
#include <linux/slab.h>
+#include <linux/unaligned.h>
#include <linux/uaccess.h>
#include <linux/ipv6.h>
#include <linux/icmpv6.h>
@@ -917,10 +918,10 @@ static void tcp_v6_send_response(const s
topt = (__be32 *)(t1 + 1);
if (tsecr) {
- *topt++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) |
- (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP);
- *topt++ = htonl(tsval);
- *topt++ = htonl(tsecr);
+ put_unaligned_be32((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) |
+ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP, topt++);
+ put_unaligned_be32(tsval, topt++);
+ put_unaligned_be32(tsecr, topt++);
}
if (mrst)
--- a/include/linux/ipv6.h
+++ b/include/linux/ipv6.h
@@ -7,6 +7,7 @@
#define ipv6_optlen(p) (((p)->hdrlen+1) << 3)
#define ipv6_authlen(p) (((p)->hdrlen+2) << 2)
+
/*
* This structure contains configuration options per IPv6 link.
*/
--- a/net/ipv6/datagram.c
+++ b/net/ipv6/datagram.c
@@ -498,7 +498,7 @@ int ipv6_recv_error(struct sock *sk, str
ipv6_iface_scope_id(&sin->sin6_addr,
IP6CB(skb)->iif);
} else {
- ipv6_addr_set_v4mapped(*(__be32 *)(nh + serr->addr_offset),
+ ipv6_addr_set_v4mapped(net_hdr_word(nh + serr->addr_offset),
&sin->sin6_addr);
sin->sin6_scope_id = 0;
}
@@ -852,12 +852,12 @@ int ip6_datagram_send_ctl(struct net *ne
}
if (fl6->flowlabel&IPV6_FLOWINFO_MASK) {
- if ((fl6->flowlabel^*(__be32 *)CMSG_DATA(cmsg))&~IPV6_FLOWINFO_MASK) {
+ if ((fl6->flowlabel^net_hdr_word(CMSG_DATA(cmsg)))&~IPV6_FLOWINFO_MASK) {
err = -EINVAL;
goto exit_f;
}
}
- fl6->flowlabel = IPV6_FLOWINFO_MASK & *(__be32 *)CMSG_DATA(cmsg);
+ fl6->flowlabel = IPV6_FLOWINFO_MASK & net_hdr_word(CMSG_DATA(cmsg));
break;
case IPV6_2292HOPOPTS:
--- a/net/ipv6/exthdrs.c
+++ b/net/ipv6/exthdrs.c
@@ -984,7 +984,7 @@ static bool ipv6_hop_jumbo(struct sk_buf
goto drop;
}
- pkt_len = ntohl(*(__be32 *)(nh + optoff + 2));
+ pkt_len = ntohl(net_hdr_word(nh + optoff + 2));
if (pkt_len <= IPV6_MAXPLEN) {
icmpv6_param_prob_reason(skb, ICMPV6_HDR_FIELD, optoff + 2,
SKB_DROP_REASON_IP_INHDR);
--- a/include/linux/types.h
+++ b/include/linux/types.h
@@ -265,5 +265,11 @@ struct rcuwait {
struct task_struct __rcu *task;
};
+struct net_hdr_word {
+ u32 words[1];
+} __attribute__((packed, aligned(2)));
+
+#define net_hdr_word(_p) (((struct net_hdr_word *) (_p))->words[0])
+
#endif /* __ASSEMBLY__ */
#endif /* _LINUX_TYPES_H */
--- a/net/ipv4/af_inet.c
+++ b/net/ipv4/af_inet.c
@@ -1492,7 +1492,7 @@ struct sk_buff *inet_gro_receive(struct
goto out;
NAPI_GRO_CB(skb)->proto = proto;
- flush = (u16)((ntohl(*(__be32 *)iph) ^ skb_gro_len(skb)) | (ntohl(*(__be32 *)&iph->id) & ~IP_DF));
+ flush = (u16)((ntohl(net_hdr_word(iph)) ^ skb_gro_len(skb)) | (ntohl(net_hdr_word(&iph->id)) & ~IP_DF));
list_for_each_entry(p, head, list) {
struct iphdr *iph2;
--- a/net/ipv4/tcp_output.c
+++ b/net/ipv4/tcp_output.c
@@ -638,8 +638,9 @@ static void tcp_options_write(struct tcp
u16 options = opts->options; /* mungable copy */
if (tcp_key_is_md5(key)) {
- *ptr++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) |
- (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG);
+ net_hdr_word(ptr++) =
+ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) |
+ (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG);
/* overload cookie hash location */
opts->hash_location = (__u8 *)ptr;
ptr += 4;
@@ -647,26 +648,28 @@ static void tcp_options_write(struct tcp
ptr = process_tcp_ao_options(tp, tcprsk, opts, key, ptr);
}
if (unlikely(opts->mss)) {
- *ptr++ = htonl((TCPOPT_MSS << 24) |
- (TCPOLEN_MSS << 16) |
- opts->mss);
+ net_hdr_word(ptr++) =
+ htonl((TCPOPT_MSS << 24) | (TCPOLEN_MSS << 16) |
+ opts->mss);
}
if (likely(OPTION_TS & options)) {
if (unlikely(OPTION_SACK_ADVERTISE & options)) {
- *ptr++ = htonl((TCPOPT_SACK_PERM << 24) |
- (TCPOLEN_SACK_PERM << 16) |
- (TCPOPT_TIMESTAMP << 8) |
- TCPOLEN_TIMESTAMP);
+ net_hdr_word(ptr++) =
+ htonl((TCPOPT_SACK_PERM << 24) |
+ (TCPOLEN_SACK_PERM << 16) |
+ (TCPOPT_TIMESTAMP << 8) |
+ TCPOLEN_TIMESTAMP);
options &= ~OPTION_SACK_ADVERTISE;
} else {
- *ptr++ = htonl((TCPOPT_NOP << 24) |
- (TCPOPT_NOP << 16) |
- (TCPOPT_TIMESTAMP << 8) |
- TCPOLEN_TIMESTAMP);
+ net_hdr_word(ptr++) =
+ htonl((TCPOPT_NOP << 24) |
+ (TCPOPT_NOP << 16) |
+ (TCPOPT_TIMESTAMP << 8) |
+ TCPOLEN_TIMESTAMP);
}
- *ptr++ = htonl(opts->tsval);
- *ptr++ = htonl(opts->tsecr);
+ net_hdr_word(ptr++) = htonl(opts->tsval);
+ net_hdr_word(ptr++) = htonl(opts->tsecr);
}
if (OPTION_ACCECN & options) {
@@ -717,10 +720,11 @@ static void tcp_options_write(struct tcp
}
if (unlikely(OPTION_SACK_ADVERTISE & options)) {
- *ptr++ = htonl((leftover_highbyte << 24) |
- (leftover_lowbyte << 16) |
- (TCPOPT_SACK_PERM << 8) |
- TCPOLEN_SACK_PERM);
+ net_hdr_word(ptr++) =
+ htonl((leftover_highbyte << 24) |
+ (leftover_lowbyte << 16) |
+ (TCPOPT_SACK_PERM << 8) |
+ TCPOLEN_SACK_PERM);
leftover_highbyte = TCPOPT_NOP;
leftover_lowbyte = TCPOPT_NOP;
}
@@ -737,10 +741,11 @@ static void tcp_options_write(struct tcp
highbyte = leftover_highbyte;
leftover_highbyte = TCPOPT_NOP;
}
- *ptr++ = htonl((highbyte << 24) |
- (TCPOPT_WINDOW << 16) |
- (TCPOLEN_WINDOW << 8) |
- opts->ws);
+ net_hdr_word(ptr++) =
+ htonl((highbyte << 24) |
+ (TCPOPT_WINDOW << 16) |
+ (TCPOLEN_WINDOW << 8) |
+ opts->ws);
}
if (unlikely(opts->num_sack_blocks)) {
@@ -748,18 +753,19 @@ static void tcp_options_write(struct tcp
tp->duplicate_sack : tp->selective_acks;
int this_sack;
- *ptr++ = htonl((leftover_highbyte << 24) |
- (leftover_lowbyte << 16) |
- (TCPOPT_SACK << 8) |
- (TCPOLEN_SACK_BASE + (opts->num_sack_blocks *
+ net_hdr_word(ptr++) =
+ htonl((leftover_highbyte << 24) |
+ (leftover_lowbyte << 16) |
+ (TCPOPT_SACK << 8) |
+ (TCPOLEN_SACK_BASE + (opts->num_sack_blocks *
TCPOLEN_SACK_PERBLOCK)));
leftover_highbyte = TCPOPT_NOP;
leftover_lowbyte = TCPOPT_NOP;
for (this_sack = 0; this_sack < opts->num_sack_blocks;
++this_sack) {
- *ptr++ = htonl(sp[this_sack].start_seq);
- *ptr++ = htonl(sp[this_sack].end_seq);
+ net_hdr_word(ptr++) = htonl(sp[this_sack].start_seq);
+ net_hdr_word(ptr++) = htonl(sp[this_sack].end_seq);
}
tp->rx_opt.dsack = 0;
@@ -780,13 +786,14 @@ static void tcp_options_write(struct tcp
if (foc->exp) {
len = TCPOLEN_EXP_FASTOPEN_BASE + foc->len;
- *ptr = htonl((TCPOPT_EXP << 24) | (len << 16) |
+ net_hdr_word(ptr) =
+ htonl((TCPOPT_EXP << 24) | (len << 16) |
TCPOPT_FASTOPEN_MAGIC);
p += TCPOLEN_EXP_FASTOPEN_BASE;
} else {
len = TCPOLEN_FASTOPEN_BASE + foc->len;
- *p++ = TCPOPT_FASTOPEN;
- *p++ = len;
+ net_hdr_word(p++) = TCPOPT_FASTOPEN;
+ net_hdr_word(p++) = len;
}
memcpy(p, foc->val, foc->len);
--- a/include/uapi/linux/igmp.h
+++ b/include/uapi/linux/igmp.h
@@ -33,7 +33,7 @@ struct igmphdr {
__u8 code; /* For newer IGMP */
__sum16 csum;
__be32 group;
-};
+} __attribute__((packed, aligned(2)));
/* V3 group record types [grec_type] */
#define IGMPV3_MODE_IS_INCLUDE 1
@@ -49,7 +49,7 @@ struct igmpv3_grec {
__be16 grec_nsrcs;
__be32 grec_mca;
__be32 grec_src[];
-};
+} __attribute__((packed, aligned(2)));
struct igmpv3_report {
__u8 type;
@@ -58,7 +58,7 @@ struct igmpv3_report {
__be16 resv2;
__be16 ngrec;
struct igmpv3_grec grec[];
-};
+} __attribute__((packed, aligned(2)));
struct igmpv3_query {
__u8 type;
@@ -79,7 +79,7 @@ struct igmpv3_query {
__u8 qqic;
__be16 nsrcs;
__be32 srcs[];
-};
+} __attribute__((packed, aligned(2)));
#define IGMP_HOST_MEMBERSHIP_QUERY 0x11 /* From RFC1112 */
#define IGMP_HOST_MEMBERSHIP_REPORT 0x12 /* Ditto */
--- a/net/core/flow_dissector.c
+++ b/net/core/flow_dissector.c
@@ -132,7 +132,7 @@ __be32 skb_flow_get_ports(const struct s
ports = __skb_header_pointer(skb, thoff + poff,
sizeof(_ports), data, hlen, &_ports);
if (ports)
- return *ports;
+ return (__be32)net_hdr_word(ports);
}
return 0;
--- a/include/uapi/linux/icmpv6.h
+++ b/include/uapi/linux/icmpv6.h
@@ -78,7 +78,7 @@ struct icmp6hdr {
#define icmp6_addrconf_other icmp6_dataun.u_nd_ra.other
#define icmp6_rt_lifetime icmp6_dataun.u_nd_ra.rt_lifetime
#define icmp6_router_pref icmp6_dataun.u_nd_ra.router_pref
-};
+} __attribute__((packed, aligned(2)));
#define ICMPV6_ROUTER_PREF_LOW 0x3
--- a/include/net/ndisc.h
+++ b/include/net/ndisc.h
@@ -84,7 +84,7 @@ struct ra_msg {
struct icmp6hdr icmph;
__be32 reachable_time;
__be32 retrans_timer;
-};
+} __attribute__((packed, aligned(2)));
struct rd_msg {
struct icmp6hdr icmph;
@@ -348,10 +348,10 @@ static inline u32 ndisc_hashfn(const voi
{
const u32 *p32 = pkey;
- return (((p32[0] ^ hash32_ptr(dev)) * hash_rnd[0]) +
- (p32[1] * hash_rnd[1]) +
- (p32[2] * hash_rnd[2]) +
- (p32[3] * hash_rnd[3]));
+ return (((net_hdr_word(&p32[0]) ^ hash32_ptr(dev)) * hash_rnd[0]) +
+ (net_hdr_word(&p32[1]) * hash_rnd[1]) +
+ (net_hdr_word(&p32[2]) * hash_rnd[2]) +
+ (net_hdr_word(&p32[3]) * hash_rnd[3]));
}
static inline struct neighbour *__ipv6_neigh_lookup_noref(struct net_device *dev, const void *pkey)
--- a/net/sched/cls_u32.c
+++ b/net/sched/cls_u32.c
@@ -165,7 +165,7 @@ next_knode:
&hdata);
if (!data)
goto out;
- if ((*data ^ key->val) & key->mask) {
+ if ((net_hdr_word(data) ^ key->val) & key->mask) {
n = rcu_dereference_bh(n->next);
goto next_knode;
}
@@ -217,8 +217,8 @@ check_terminal:
4, &hdata);
if (!data)
goto out;
- sel = ht->divisor & u32_hash_fold(*data, &n->sel,
- n->fshift);
+ sel = ht->divisor & u32_hash_fold(net_hdr_word(data),
+ &n->sel, n->fshift);
}
if (!(n->sel.flags & (TC_U32_VAROFFSET | TC_U32_OFFSET | TC_U32_EAT)))
goto next_ht;
--- a/net/ipv6/ip6_offload.c
+++ b/net/ipv6/ip6_offload.c
@@ -271,7 +271,7 @@ INDIRECT_CALLABLE_SCOPE struct sk_buff *
continue;
iph2 = (struct ipv6hdr *)(p->data + off);
- first_word = *(__be32 *)iph ^ *(__be32 *)iph2;
+ first_word = net_hdr_word(iph) ^ net_hdr_word(iph2);
/* All fields must match except length and Traffic Class.
* XXX skbs on the gro_list have all been parsed and pulled
--- a/include/net/addrconf.h
+++ b/include/net/addrconf.h
@@ -57,7 +57,7 @@ struct prefix_info {
__be32 reserved2;
struct in6_addr prefix;
-};
+} __attribute__((packed, aligned(2)));
/* rfc4861 4.6.2: IPv6 PIO is 32 bytes in size */
static_assert(sizeof(struct prefix_info) == 32);
--- a/include/net/inet_ecn.h
+++ b/include/net/inet_ecn.h
@@ -152,9 +152,9 @@ static inline int IP6_ECN_set_ce(struct
if (INET_ECN_is_not_ect(ipv6_get_dsfield(iph)))
return 0;
- from = *(__be32 *)iph;
+ from = net_hdr_word(iph);
to = from | htonl(INET_ECN_CE << 20);
- *(__be32 *)iph = to;
+ net_hdr_word(iph) = to;
if (skb->ip_summed == CHECKSUM_COMPLETE)
skb->csum = csum_add(csum_sub(skb->csum, (__force __wsum)from),
(__force __wsum)to);
--- a/include/net/ipv6.h
+++ b/include/net/ipv6.h
@@ -149,7 +149,7 @@ struct frag_hdr {
__u8 reserved;
__be16 frag_off;
__be32 identification;
-};
+} __attribute__((packed, aligned(2)));
/*
* Jumbo payload option, as described in RFC 2675 2.
@@ -650,8 +650,8 @@ static inline void __ipv6_addr_set_half(
}
#endif
#endif
- addr[0] = wh;
- addr[1] = wl;
+ net_hdr_word(&addr[0]) = wh;
+ net_hdr_word(&addr[1]) = wl;
}
static inline void ipv6_addr_set(struct in6_addr *addr,
@@ -710,6 +710,8 @@ static inline bool ipv6_prefix_equal(con
const __be32 *a1 = addr1->s6_addr32;
const __be32 *a2 = addr2->s6_addr32;
unsigned int pdw, pbi;
+ /* Used for last <32-bit fraction of prefix */
+ u32 pbia1, pbia2;
/* check complete u32 in prefix */
pdw = prefixlen >> 5;
@@ -718,7 +720,9 @@ static inline bool ipv6_prefix_equal(con
/* check incomplete u32 in prefix */
pbi = prefixlen & 0x1f;
- if (pbi && ((a1[pdw] ^ a2[pdw]) & htonl((0xffffffff) << (32 - pbi))))
+ pbia1 = net_hdr_word(&a1[pdw]);
+ pbia2 = net_hdr_word(&a2[pdw]);
+ if (pbi && ((pbia1 ^ pbia2) & htonl((0xffffffff) << (32 - pbi))))
return false;
return true;
@@ -835,13 +839,13 @@ static inline void ipv6_addr_set_v4mappe
*/
static inline int __ipv6_addr_diff32(const void *token1, const void *token2, int addrlen)
{
- const __be32 *a1 = token1, *a2 = token2;
+ const struct in6_addr *a1 = token1, *a2 = token2;
int i;
addrlen >>= 2;
for (i = 0; i < addrlen; i++) {
- __be32 xb = a1[i] ^ a2[i];
+ __be32 xb = a1->s6_addr32[i] ^ a2->s6_addr32[i];
if (xb)
return i * 32 + 31 - __fls(ntohl(xb));
}
@@ -1036,17 +1040,18 @@ static inline u32 ip6_multipath_hash_fie
static inline void ip6_flow_hdr(struct ipv6hdr *hdr, unsigned int tclass,
__be32 flowlabel)
{
- *(__be32 *)hdr = htonl(0x60000000 | (tclass << 20)) | flowlabel;
+ net_hdr_word((__be32 *)hdr) =
+ htonl(0x60000000 | (tclass << 20)) | flowlabel;
}
static inline __be32 ip6_flowinfo(const struct ipv6hdr *hdr)
{
- return *(__be32 *)hdr & IPV6_FLOWINFO_MASK;
+ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWINFO_MASK;
}
static inline __be32 ip6_flowlabel(const struct ipv6hdr *hdr)
{
- return *(__be32 *)hdr & IPV6_FLOWLABEL_MASK;
+ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWLABEL_MASK;
}
static inline u8 ip6_tclass(__be32 flowinfo)
--- a/include/net/secure_seq.h
+++ b/include/net/secure_seq.h
@@ -3,6 +3,7 @@
#define _NET_SECURE_SEQ
#include <linux/types.h>
+#include <linux/in6.h>
struct net;
extern struct net init_net;
--- a/include/uapi/linux/in.h
+++ b/include/uapi/linux/in.h
@@ -95,7 +95,7 @@ enum {
/* Internet address. */
struct in_addr {
__be32 s_addr;
-};
+} __attribute__((packed, aligned(2)));
#endif
#define IP_TOS 1
--- a/net/ipv6/ip6_fib.c
+++ b/net/ipv6/ip6_fib.c
@@ -141,7 +141,7 @@ static __be32 addr_bit_set(const void *t
* See include/asm-generic/bitops/le.h.
*/
return (__force __be32)(1 << ((~fn_bit ^ BITOP_BE32_SWIZZLE) & 0x1f)) &
- addr[fn_bit >> 5];
+ net_hdr_word(&addr[fn_bit >> 5]);
}
struct fib6_info *fib6_info_alloc(gfp_t gfp_flags, bool with_fib6_nh)
--- a/net/netfilter/nf_conntrack_proto_tcp.c
+++ b/net/netfilter/nf_conntrack_proto_tcp.c
@@ -406,7 +406,7 @@ static void tcp_sack(const struct sk_buf
/* Fast path for timestamp-only option */
if (length == TCPOLEN_TSTAMP_ALIGNED
- && *(__be32 *)ptr == htonl((TCPOPT_NOP << 24)
+ && net_hdr_word(ptr) == htonl((TCPOPT_NOP << 24)
| (TCPOPT_NOP << 16)
| (TCPOPT_TIMESTAMP << 8)
| TCPOLEN_TIMESTAMP))
--- a/net/xfrm/xfrm_input.c
+++ b/net/xfrm/xfrm_input.c
@@ -169,8 +169,8 @@ int xfrm_parse_spi(struct sk_buff *skb,
if (!pskb_may_pull(skb, hlen))
return -EINVAL;
- *spi = *(__be32 *)(skb_transport_header(skb) + offset);
- *seq = *(__be32 *)(skb_transport_header(skb) + offset_seq);
+ *spi = net_hdr_word(skb_transport_header(skb) + offset);
+ *seq = net_hdr_word(skb_transport_header(skb) + offset_seq);
return 0;
}
EXPORT_SYMBOL(xfrm_parse_spi);
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
@@ -4413,14 +4413,16 @@ static bool tcp_parse_aligned_timestamp(
{
const __be32 *ptr = (const __be32 *)(th + 1);
- if (*ptr == htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16)
- | (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) {
+ if (net_hdr_word(ptr) ==
+ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) |
+ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) {
tp->rx_opt.saw_tstamp = 1;
++ptr;
- tp->rx_opt.rcv_tsval = ntohl(*ptr);
+ tp->rx_opt.rcv_tsval = get_unaligned_be32(ptr);
++ptr;
- if (*ptr)
- tp->rx_opt.rcv_tsecr = ntohl(*ptr) - tp->tsoffset;
+ if (net_hdr_word(ptr))
+ tp->rx_opt.rcv_tsecr = get_unaligned_be32(ptr) -
+ tp->tsoffset;
else
tp->rx_opt.rcv_tsecr = 0;
return true;
--- a/include/uapi/linux/if_pppox.h
+++ b/include/uapi/linux/if_pppox.h
@@ -51,6 +51,7 @@ struct pppoe_addr {
*/
struct pptp_addr {
__u16 call_id;
+ __u16 pad;
struct in_addr sin_addr;
};
--- a/include/net/neighbour.h
+++ b/include/net/neighbour.h
@@ -294,8 +294,10 @@ static inline bool neigh_key_eq128(const
const u32 *n32 = (const u32 *)n->primary_key;
const u32 *p32 = pkey;
- return ((n32[0] ^ p32[0]) | (n32[1] ^ p32[1]) |
- (n32[2] ^ p32[2]) | (n32[3] ^ p32[3])) == 0;
+ return ((n32[0] ^ net_hdr_word(&p32[0])) |
+ (n32[1] ^ net_hdr_word(&p32[1])) |
+ (n32[2] ^ net_hdr_word(&p32[2])) |
+ (n32[3] ^ net_hdr_word(&p32[3]))) == 0;
}
static inline struct neighbour *___neigh_lookup_noref(
--- a/include/uapi/linux/netfilter_arp/arp_tables.h
+++ b/include/uapi/linux/netfilter_arp/arp_tables.h
@@ -70,7 +70,7 @@ struct arpt_arp {
__u8 flags;
/* Inverse flags */
__u16 invflags;
-};
+} __attribute__((aligned(4)));
/* Values for "flag" field in struct arpt_ip (general arp structure).
* No flags defined yet.
--- a/net/core/utils.c
+++ b/net/core/utils.c
@@ -460,8 +460,14 @@ void inet_proto_csum_replace16(__sum16 *
bool pseudohdr)
{
__be32 diff[] = {
- ~from[0], ~from[1], ~from[2], ~from[3],
- to[0], to[1], to[2], to[3],
+ ~net_hdr_word(&from[0]),
+ ~net_hdr_word(&from[1]),
+ ~net_hdr_word(&from[2]),
+ ~net_hdr_word(&from[3]),
+ net_hdr_word(&to[0]),
+ net_hdr_word(&to[1]),
+ net_hdr_word(&to[2]),
+ net_hdr_word(&to[3]),
};
if (skb->ip_summed != CHECKSUM_PARTIAL) {
*sum = csum_fold(csum_partial(diff, sizeof(diff),
--- a/include/linux/etherdevice.h
+++ b/include/linux/etherdevice.h
@@ -560,7 +560,7 @@ static inline bool is_etherdev_addr(cons
* @b: Pointer to Ethernet header
*
* Compare two Ethernet headers, returns 0 if equal.
- * This assumes that the network header (i.e., IP header) is 4-byte
+ * This assumes that the network header (i.e., IP header) is 2-byte
* aligned OR the platform can handle unaligned access. This is the
* case for all packets coming into netif_receive_skb or similar
* entry points.
@@ -583,11 +583,12 @@ static inline unsigned long compare_ethe
fold |= *(unsigned long *)(a + 6) ^ *(unsigned long *)(b + 6);
return fold;
#else
- u32 *a32 = (u32 *)((u8 *)a + 2);
- u32 *b32 = (u32 *)((u8 *)b + 2);
+ const u16 *a16 = a;
+ const u16 *b16 = b;
- return (*(u16 *)a ^ *(u16 *)b) | (a32[0] ^ b32[0]) |
- (a32[1] ^ b32[1]) | (a32[2] ^ b32[2]);
+ return (a16[0] ^ b16[0]) | (a16[1] ^ b16[1]) | (a16[2] ^ b16[2]) |
+ (a16[3] ^ b16[3]) | (a16[4] ^ b16[4]) | (a16[5] ^ b16[5]) |
+ (a16[6] ^ b16[6]);
#endif
}
--- a/net/ipv4/tcp_offload.c
+++ b/net/ipv4/tcp_offload.c
@@ -66,7 +66,7 @@ static struct sk_buff *__tcpv4_gso_segme
th2 = tcp_hdr(seg->next);
iph2 = ip_hdr(seg->next);
- if (!(*(const u32 *)&th->source ^ *(const u32 *)&th2->source) &&
+ if (!(net_hdr_word(&th->source) ^ net_hdr_word(&th2->source)) &&
iph->daddr == iph2->daddr && iph->saddr == iph2->saddr)
return segs;
@@ -272,7 +272,7 @@ struct sk_buff *tcp_gro_lookup(struct li
continue;
th2 = tcp_hdr(p);
- if (*(u32 *)&th->source ^ *(u32 *)&th2->source) {
+ if (net_hdr_word(&th->source) ^ net_hdr_word(&th2->source)) {
NAPI_GRO_CB(p)->same_flow = 0;
continue;
}
@@ -336,8 +336,8 @@ struct sk_buff *tcp_gro_receive(struct l
~(TCP_FLAG_FIN | TCP_FLAG_PSH));
flush |= (__force int)(th->ack_seq ^ th2->ack_seq);
for (i = sizeof(*th); i < thlen; i += 4)
- flush |= *(u32 *)((u8 *)th + i) ^
- *(u32 *)((u8 *)th2 + i);
+ flush |= net_hdr_word((u8 *)th + i) ^
+ net_hdr_word((u8 *)th2 + i);
flush |= gro_receive_network_flush(th, th2, p);
--- a/net/ipv6/netfilter/ip6table_mangle.c
+++ b/net/ipv6/netfilter/ip6table_mangle.c
@@ -44,7 +44,7 @@ ip6t_mangle_out(void *priv, struct sk_bu
hop_limit = ipv6_hdr(skb)->hop_limit;
/* flowlabel and prio (includes version, which shouldn't change either */
- flowlabel = *((u_int32_t *)ipv6_hdr(skb));
+ flowlabel = net_hdr_word(ipv6_hdr(skb));
ret = ip6t_do_table(priv, skb, state);
verdict = ret & NF_VERDICT_MASK;
@@ -54,7 +54,7 @@ ip6t_mangle_out(void *priv, struct sk_bu
!ipv6_addr_equal(&ipv6_hdr(skb)->daddr, &daddr) ||
skb->mark != mark ||
ipv6_hdr(skb)->hop_limit != hop_limit ||
- flowlabel != *((u_int32_t *)ipv6_hdr(skb)))) {
+ flowlabel != net_hdr_word(ipv6_hdr(skb)))) {
err = ip6_route_me_harder(state->net, state->sk, skb);
if (err < 0)
ret = NF_DROP_ERR(err);
target/linux/ath79/patches-6.18/910-mikrotik-rb4xx.patch
+121
View File
@@ -0,0 +1,121 @@
From: Christopher Hill <ch6574@gmail.com>
Subject: [PATCH] ath79: add Mikrotik rb4xx series drivers
This adds 3 Mikrotik rb4xx series drivers as follows:
rb4xx-cpld: This is in the mfd subsystem, and is the parent CPLD device
that interfaces between the SoC SPI bus and its two children below.
rb4xx-gpio: This is the GPIO expander.
rb4xx-nand: This is the NAND driver.
The history of this code comes in three phases.
1. The first is a May 2015 attempt to push the equivalient ar71xx rb4xx
drivers upstream. See https://lore.kernel.org/patchwork/patch/940880/.
Module-author: Gabor Juhos <juhosg@openwrt.org>
Module-author: Imre Kaloz <kaloz@openwrt.org>
Module-author: Bert Vermeulen <bert@biot.com>
2. Next several ar71xx patches were applied bringing the code current.
commit 7bbf4117c6fe4b764d9d7c62fb2bcf6dd93bff2c
Submitted-by: Hauke Mehrtens <hauke@hauke-m.de>
commit af79fdbe4af32a287798b579141204bda056b8aa
commit 889272d92db689fd9c910243635e44c9d8323095
commit e21cb649a235180563363b8af5ba8296b9ac0baa
commit 7c09fa4a7492ca436f2c94bd9a465b7c5bbeed6f
Submitted-by: Felix Fietkau <nbd@nbd.name>
3. Finally a heavy refactor to split the driver into the three new
subsystems, and updated to work with the device tree configuration, plus
updates and review feedback incorporated
Reviewed-by: Thibaut VARÈNE <hacks@slashdirt.org>
Submitted-by: Christopher Hill <ch6574@gmail.com>
---
drivers/mfd/Kconfig | 8 ++++++++
drivers/mfd/Makefile | 1 +
drivers/gpio/Kconfig | 6 ++++++
drivers/gpio/Makefile | 1 +
drivers/mtd/nand/raw/Kconfig | 7 +++++++
drivers/mtd/nand/raw/Makefile | 1 +
6 files changed, 24 insertions(+)
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -2436,6 +2436,14 @@ config RAVE_SP_CORE
Select this to get support for the Supervisory Processor
device found on several devices in RAVE line of hardware.
+config MFD_RB4XX_CPLD
+ tristate "CPLD driver for Mikrotik RB4xx series boards"
+ select MFD_CORE
+ depends on ATH79 || COMPILE_TEST
+ help
+ Enables support for the CPLD chip (NAND & GPIO) on Mikrotik
+ Routerboard RB4xx series.
+
config SGI_MFD_IOC3
bool "SGI IOC3 core driver"
depends on PCI && MIPS && 64BIT
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -282,6 +282,7 @@ obj-$(CONFIG_MFD_KHADAS_MCU) += khadas-
obj-$(CONFIG_MFD_ACER_A500_EC) += acer-ec-a500.o
obj-$(CONFIG_MFD_QCOM_PM8008) += qcom-pm8008.o
+obj-$(CONFIG_MFD_RB4XX_CPLD) += rb4xx-cpld.o
obj-$(CONFIG_SGI_MFD_IOC3) += ioc3.o
obj-$(CONFIG_MFD_SIMPLE_MFD_I2C) += simple-mfd-i2c.o
obj-$(CONFIG_MFD_SMPRO) += smpro-core.o
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -1872,6 +1872,12 @@ config GPIO_SODAVILLE
help
Say Y here to support Intel Sodaville GPIO.
+config GPIO_RB4XX
+ tristate "GPIO expander for Mikrotik RB4xx series boards"
+ depends on MFD_RB4XX_CPLD
+ help
+ GPIO driver for Mikrotik Routerboard RB4xx series.
+
endmenu
menu "SPI GPIO expanders"
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -148,6 +148,7 @@ obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio
obj-$(CONFIG_GPIO_POLARFIRE_SOC) += gpio-mpfs.o
obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o
obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o
+obj-$(CONFIG_GPIO_RB4XX) += gpio-rb4xx.o
obj-$(CONFIG_GPIO_RC5T583) += gpio-rc5t583.o
obj-$(CONFIG_GPIO_RCAR) += gpio-rcar.o
obj-$(CONFIG_GPIO_RDA) += gpio-rda.o
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -545,4 +545,11 @@ config MTD_NAND_AR934X
Enables support for NAND controller on Qualcomm Atheros SoCs.
This controller is found on AR934x and QCA955x SoCs.
+config MTD_NAND_RB4XX
+ tristate "Support for NAND driver for Mikrotik RB4xx series boards"
+ depends on MFD_RB4XX_CPLD
+ help
+ Enables support for the NAND flash chip on Mikrotik Routerboard
+ RB4xx series.
+
endif # MTD_RAW_NAND
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
@@ -60,6 +60,7 @@ obj-$(CONFIG_MTD_NAND_RENESAS) += renes
obj-$(CONFIG_MTD_NAND_NUVOTON_MA35) += nuvoton-ma35d1-nand-controller.o
obj-$(CONFIG_MTD_NAND_LOONGSON) += loongson-nand-controller.o
obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o
+obj-$(CONFIG_MTD_NAND_RB4XX) += nand_rb4xx.o
nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o
nand-objs += nand_onfi.o
target/linux/ath79/patches-6.18/911-mikrotik-rb91x.patch
+96
View File
@@ -0,0 +1,96 @@
From: Denis Kalashnikov <denis281089@gmail.com>
Subject: [PATCH] ath79: add support for reset key on MikroTik RB912UAG-2HPnD
On MikroTik RB91x board series a reset key shares SoC gpio
line #15 with NAND ALE and NAND IO7. So we need a custom
gpio driver to manage this non-trivial connection schema.
Also rb91x-nand needs to have an ability to disable a polling
of the key while it works with NAND.
While we've been integrating rb91x-key into a firmware, we've
figured out that:
* In the gpio-latch driver we need to add a "cansleep" suffix to
several gpiolib calls,
* When gpio-latch and rb91x-nand fail to get a gpio and an error
is -EPROBE_DEFER, they shouldn't report about this, since this
actually is not an error and occurs when the gpio-latch probe
function is called before the rb91x-key probe.
We fix these related things here too.
Submitted-by: Denis Kalashnikov <denis281089@gmail.com>
Reviewed-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Tested-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
---
drivers/gpio/Kconfig | 11 +++++++++++
drivers/gpio/Makefile | 2 ++
drivers/mtd/nand/raw/Kconfig | 6 ++++++
drivers/mtd/nand/raw/Makefile | 1 +
7 files changed, 20 insertions(+)
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -418,6 +418,12 @@ config GPIO_IXP4XX
If unsure, say N.
+config GPIO_LATCH_MIKROTIK
+ tristate "MikroTik RouterBOARD GPIO latch support"
+ depends on ATH79
+ help
+ GPIO driver for latch on some MikroTik RouterBOARDs.
+
config GPIO_LOGICVC
tristate "Xylon LogiCVC GPIO support"
depends on MFD_SYSCON && OF
@@ -583,6 +589,10 @@ config GPIO_PXA
help
Say yes here to support the PXA GPIO device.
+config GPIO_RB91X_KEY
+ tristate "MikroTik RB91x board series reset key support"
+ depends on ATH79
+
config GPIO_RCAR
tristate "Renesas R-Car and RZ/G GPIO support"
depends on ARCH_RENESAS || COMPILE_TEST
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -89,6 +89,7 @@ obj-$(CONFIG_GPIO_IXP4XX) += gpio-ixp4x
obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz-ttl.o
obj-$(CONFIG_GPIO_KEMPLD) += gpio-kempld.o
obj-$(CONFIG_GPIO_LATCH) += gpio-latch.o
+obj-$(CONFIG_GPIO_LATCH_MIKROTIK) += gpio-latch-mikrotik.o
obj-$(CONFIG_GPIO_LINE_MUX) += gpio-line-mux.o
obj-$(CONFIG_GPIO_LJCA) += gpio-ljca.o
obj-$(CONFIG_GPIO_LOGICVC) += gpio-logicvc.o
@@ -149,6 +150,7 @@ obj-$(CONFIG_GPIO_POLARFIRE_SOC) += gpio
obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o
obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o
obj-$(CONFIG_GPIO_RB4XX) += gpio-rb4xx.o
+obj-$(CONFIG_GPIO_RB91X_KEY) += gpio-rb91x-key.o
obj-$(CONFIG_GPIO_RC5T583) += gpio-rc5t583.o
obj-$(CONFIG_GPIO_RCAR) += gpio-rcar.o
obj-$(CONFIG_GPIO_RDA) += gpio-rda.o
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -552,4 +552,10 @@ config MTD_NAND_RB4XX
Enables support for the NAND flash chip on Mikrotik Routerboard
RB4xx series.
+config MTD_NAND_RB91X
+ tristate "MikroTik RB91x NAND driver support"
+ depends on ATH79 && MTD_RAW_NAND
+ help
+ Enables support for the NAND flash chip on MikroTik RB91x series.
+
endif # MTD_RAW_NAND
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
@@ -61,6 +61,7 @@ obj-$(CONFIG_MTD_NAND_NUVOTON_MA35) += n
obj-$(CONFIG_MTD_NAND_LOONGSON) += loongson-nand-controller.o
obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o
obj-$(CONFIG_MTD_NAND_RB4XX) += nand_rb4xx.o
+obj-$(CONFIG_MTD_NAND_RB91X) += rb91x_nand.o
nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o
nand-objs += nand_onfi.o
target/linux/gemini/Makefile
+1
View File
@@ -12,6 +12,7 @@ CPU_TYPE:=fa526
SUBTARGETS:=generic
KERNEL_PATCHVER:=6.12
KERNEL_TESTING_PATCHVER:=6.18
define Target/Description
Build firmware images for the StorLink/Cortina Gemini CS351x ARM FA526 CPU
target/linux/gemini/config-6.18
+439
View File
@@ -0,0 +1,439 @@
CONFIG_ALIGNMENT_TRAP=y
CONFIG_AMBA_PL08X=y
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_GEMINI=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
# CONFIG_ARCH_MOXART is not set
CONFIG_ARCH_MULTIPLATFORM=y
CONFIG_ARCH_MULTI_V4=y
# CONFIG_ARCH_MULTI_V4T is not set
CONFIG_ARCH_MULTI_V4_V5=y
# CONFIG_ARCH_MULTI_V5 is not set
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_STACKWALK=y
CONFIG_ARM=y
CONFIG_ARM_AMBA=y
CONFIG_ARM_APPENDED_DTB=y
# CONFIG_ARM_ATAG_DTB_COMPAT is not set
CONFIG_ARM_HAS_GROUP_RELOCS=y
CONFIG_ARM_L1_CACHE_SHIFT=5
CONFIG_ARM_PATCH_PHYS_VIRT=y
CONFIG_ARM_UNWIND=y
CONFIG_ATA=y
CONFIG_ATAGS=y
CONFIG_ATA_FORCE=y
CONFIG_ATA_VERBOSE_ERROR=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_PM=y
CONFIG_BOUNCE=y
CONFIG_BUFFER_HEAD=y
CONFIG_CACHESTAT_SYSCALL=y
CONFIG_CC_HAVE_STACKPROTECTOR_TLS=y
CONFIG_CLKSRC_MMIO=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMA=y
CONFIG_CMA_ALIGNMENT=8
CONFIG_CMA_AREAS=7
# CONFIG_CMA_DEBUGFS is not set
CONFIG_CMA_SIZE_PERCENTAGE=10
# CONFIG_CMA_SIZE_SEL_MAX is not set
# CONFIG_CMA_SIZE_SEL_MBYTES is not set
# CONFIG_CMA_SIZE_SEL_MIN is not set
CONFIG_CMA_SIZE_SEL_PERCENTAGE=y
# CONFIG_CMA_SYSFS is not set
CONFIG_COMMON_CLK=y
CONFIG_COMMON_CLK_GEMINI=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_CONTIG_ALLOC=y
CONFIG_COREDUMP=y
CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
CONFIG_CPU_CACHE_FA=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_COPY_FA=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
CONFIG_CPU_FA526=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_MITIGATIONS=y
CONFIG_CPU_NO_EFFICIENT_FFS=y
CONFIG_CPU_PABRT_LEGACY=y
CONFIG_CPU_THERMAL=y
CONFIG_CPU_TLB_FA=y
CONFIG_CPU_USE_DOMAINS=y
CONFIG_CRC16=y
CONFIG_CRC_CCITT=y
CONFIG_CRC_ITU_T=y
CONFIG_CROSS_MEMORY_ATTACH=y
CONFIG_CRYPTO_CMAC=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_DEV_SL3516=y
# CONFIG_CRYPTO_DEV_SL3516_DEBUG is not set
CONFIG_CRYPTO_DRBG=y
CONFIG_CRYPTO_DRBG_HMAC=y
CONFIG_CRYPTO_DRBG_MENU=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_ECHAINIV=y
CONFIG_CRYPTO_ENGINE=y
CONFIG_CRYPTO_GENIV=y
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_JITTERENTROPY=y
CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKS=64
CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32
CONFIG_CRYPTO_JITTERENTROPY_OSR=1
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_DES=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_LIB_UTILS=y
# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
# CONFIG_CRYPTO_MANAGER_EXTRA_TESTS is not set
CONFIG_CRYPTO_MD4=y
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG_DEFAULT=y
CONFIG_CRYPTO_SEQIV=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA3=y
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_USER=y
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
CONFIG_DEBUG_MEMORY_INIT=y
CONFIG_DECOMPRESS_BZIP2=y
CONFIG_DECOMPRESS_GZIP=y
CONFIG_DECOMPRESS_LZ4=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DECOMPRESS_LZO=y
CONFIG_DECOMPRESS_XZ=y
CONFIG_DMADEVICES=y
CONFIG_DMATEST=y
CONFIG_DMA_CMA=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_ENGINE_RAID=y
CONFIG_DMA_NEED_SYNC=y
CONFIG_DMA_OF=y
CONFIG_DMA_OPS_HELPERS=y
CONFIG_DMA_SHARED_BUFFER=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
CONFIG_DRM=y
CONFIG_DRM_BRIDGE=y
CONFIG_DRM_FBDEV_EMULATION=y
CONFIG_DRM_FBDEV_OVERALLOC=100
CONFIG_DRM_GEM_DMA_HELPER=y
CONFIG_DRM_KMS_HELPER=y
CONFIG_DRM_PANEL=y
CONFIG_DRM_PANEL_BRIDGE=y
CONFIG_DRM_PANEL_ILITEK_IL9322=y
CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y
CONFIG_DRM_TVE200=y
CONFIG_DTC=y
CONFIG_DUMMY_CONSOLE=y
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EEPROM_93CX6=y
CONFIG_ELF_CORE=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
# CONFIG_EXPERT is not set
CONFIG_EXT4_FS=y
CONFIG_EXTCON=y
CONFIG_FARADAY_FTINTC010=y
CONFIG_FB=y
CONFIG_FB_CORE=y
CONFIG_FB_DEFERRED_IO=y
CONFIG_FB_DMAMEM_HELPERS=y
CONFIG_FB_DMAMEM_HELPERS_DEFERRED=y
CONFIG_FB_SYSMEM_FOPS=y
CONFIG_FB_SYSMEM_HELPERS=y
CONFIG_FB_SYSMEM_HELPERS_DEFERRED=y
CONFIG_FB_SYS_COPYAREA=y
CONFIG_FB_SYS_FILLRECT=y
CONFIG_FB_SYS_IMAGEBLIT=y
CONFIG_FHANDLE=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FONT_8x16=y
CONFIG_FONT_8x8=y
CONFIG_FONT_SUPPORT=y
CONFIG_FORCE_NR_CPUS=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FTTMR010_TIMER=y
CONFIG_FTWDT010_WATCHDOG=y
CONFIG_FUNCTION_ALIGNMENT=0
CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set
CONFIG_GEMINI_ETHERNET=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_DEVICES=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GLOB=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_FTGPIO010=y
CONFIG_GPIO_GENERIC=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HDMI=y
CONFIG_HIGHMEM=y
CONFIG_HIGHPTE=y
CONFIG_HWMON=y
CONFIG_HW_RANDOM=y
CONFIG_HZ_FIXED=0
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_GPIO=y
CONFIG_I2C_HELPER_AUTO=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INPUT=y
CONFIG_INPUT_KEYBOARD=y
CONFIG_IO_URING=y
CONFIG_IPC_NS=y
CONFIG_IRQCHIP=y
CONFIG_IRQSTACKS=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
# CONFIG_ISDN is not set
CONFIG_JBD2=y
CONFIG_KALLSYMS=y
CONFIG_KCMP=y
CONFIG_KERNEL_LZMA=y
# CONFIG_KERNEL_XZ is not set
CONFIG_KEXEC=y
CONFIG_KEXEC_CORE=y
CONFIG_KEYBOARD_DLINK_DIR685=y
CONFIG_KMAP_LOCAL=y
CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y
# CONFIG_LDM_DEBUG is not set
CONFIG_LDM_PARTITION=y
CONFIG_LEDS_TRIGGER_DISK=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOGO=y
CONFIG_LOGO_LINUX_CLUT224=y
# CONFIG_LOGO_LINUX_MONO is not set
CONFIG_LOGO_LINUX_VGA16=y
CONFIG_LZ4_DECOMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MARVELL_PHY=y
CONFIG_MDIO_BITBANG=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MDIO_GPIO=y
CONFIG_MEMORY_ISOLATION=y
CONFIG_MFD_SYSCON=y
CONFIG_MIGRATION=y
CONFIG_MMU_LAZY_TLB_REFCOUNT=y
CONFIG_MODULES_USE_ELF_REL=y
# CONFIG_MODULE_UNLOAD is not set
CONFIG_MQ_IOSCHED_DEADLINE=y
CONFIG_MQ_IOSCHED_KYBER=y
CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_GEMINI=y
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_OPENWRT_PROLOG=y
CONFIG_MTD_SPLIT_WRGG_FW=y
CONFIG_NAMESPACES=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_KUSER_HELPERS=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NET_DEVMEM=y
CONFIG_NET_EGRESS=y
CONFIG_NET_INGRESS=y
CONFIG_NET_NS=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_XGRESS=y
CONFIG_NLS=y
CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_PAGE_BLOCK_MAX_ORDER=10
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_ON_OOPS_VALUE=0
CONFIG_PANIC_TIMEOUT=0
CONFIG_PATA_FTIDE010=y
CONFIG_PCI=y
CONFIG_PCIEASPM=y
CONFIG_PCIEASPM_DEFAULT=y
# CONFIG_PCIEASPM_PERFORMANCE is not set
# CONFIG_PCIEASPM_POWERSAVE is not set
# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PCI_FTPCI100=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
CONFIG_PID_NS=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_GEMINI=y
# CONFIG_PINCTRL_SINGLE is not set
CONFIG_PM=y
CONFIG_PM_CLK=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_GEMINI_POWEROFF=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_PROC_PAGE_MONITOR=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RATIONAL=y
CONFIG_RD_BZIP2=y
CONFIG_RD_GZIP=y
CONFIG_RD_LZ4=y
CONFIG_RD_LZMA=y
CONFIG_RD_LZO=y
CONFIG_RD_XZ=y
CONFIG_REALTEK_PHY=y
CONFIG_REALTEK_PHY_HWMON=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_RELAY=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RSEQ=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_FTRTC010=y
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RTC_MC146818_LIB=y
CONFIG_RTC_NVMEM=y
CONFIG_SATA_GEMINI=y
CONFIG_SATA_HOST=y
CONFIG_SATA_PMP=y
CONFIG_SCSI=y
CONFIG_SCSI_COMMON=y
# CONFIG_SCSI_LOWLEVEL is not set
# CONFIG_SCSI_PROC_FS is not set
CONFIG_SENSORS_DRIVETEMP=y
CONFIG_SENSORS_GPIO_FAN=y
CONFIG_SENSORS_LM75=y
CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
CONFIG_SERIAL_8250_EXAR=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_NR_UARTS=1
CONFIG_SERIAL_8250_PCI=y
CONFIG_SERIAL_8250_PCILIB=y
CONFIG_SERIAL_8250_RUNTIME_UARTS=1
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIO=y
CONFIG_SERIO_LIBPS2=y
CONFIG_SERIO_SERPORT=y
CONFIG_SGL_ALLOC=y
CONFIG_SG_POOL=y
CONFIG_SLUB_DEBUG=y
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SPARSE_IRQ=y
CONFIG_SPI=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_MASTER=y
CONFIG_STACKDEPOT=y
CONFIG_STACKTRACE=y
# CONFIG_STRIP_ASM_SYMS is not set
CONFIG_SWPHY=y
CONFIG_SYNC_FILE=y
CONFIG_SYSFS_SYSCALL=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_THERMAL=y
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_HWMON=y
CONFIG_THERMAL_OF=y
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TINY_SRCU=y
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
CONFIG_UNWINDER_ARM=y
CONFIG_USB_COMMON=y
# CONFIG_USB_FOTG210 is not set
CONFIG_USB_GADGET=y
CONFIG_USB_GPIO_VBUS=y
CONFIG_USB_PHY=y
CONFIG_USB_SUPPORT=y
CONFIG_USER_NS=y
CONFIG_USE_OF=y
CONFIG_UTS_NS=y
CONFIG_VGA_ARB=y
CONFIG_VGA_ARB_MAX_GPUS=16
CONFIG_VIDEO=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_WATCHDOG_CORE=y
# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_ARM64=y
CONFIG_XZ_DEC_ARMTHUMB=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_XZ_DEC_POWERPC=y
CONFIG_XZ_DEC_RISCV=y
CONFIG_XZ_DEC_SPARC=y
CONFIG_XZ_DEC_X86=y
CONFIG_ZBOOT_ROM_BSS=0
CONFIG_ZBOOT_ROM_TEXT=0
CONFIG_ZLIB_INFLATE=y
target/linux/gemini/patches-6.18/0001-ARM-dts-gemini-Fix-partition-offsets.patch
+41
View File
@@ -0,0 +1,41 @@
From 771db4a77c5fb6da4908825e65f500ad67f86e5f Mon Sep 17 00:00:00 2001
From: Linus Walleij <linusw@kernel.org>
Date: Fri, 23 Jan 2026 16:24:49 +0100
Subject: [PATCH] ARM: dts: gemini: Fix partition offsets
These FIS partition offsets were never right: the comment clearly
states the FIS index is at 0xfe0000 and 0x7f * 0x200000 is
0xfe0000.
Tested on the iTian SQ201.
Fixes: d88b11ef91b1 ("ARM: dts: Fix up SQ201 flash access")
Fixes: b5a923f8c739 ("ARM: dts: gemini: Switch to redboot partition parsing")
Signed-off-by: Linus Walleij <linusw@kernel.org>
---
arch/arm/boot/dts/gemini/gemini-sl93512r.dts | 2 +-
arch/arm/boot/dts/gemini/gemini-sq201.dts | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
--- a/arch/arm/boot/dts/gemini/gemini-sl93512r.dts
+++ b/arch/arm/boot/dts/gemini/gemini-sl93512r.dts
@@ -146,7 +146,7 @@
partitions {
compatible = "redboot-fis";
/* Eraseblock at 0xfe0000 */
- fis-index-block = <0x1fc>;
+ fis-index-block = <0x7f>;
};
};
--- a/arch/arm/boot/dts/gemini/gemini-sq201.dts
+++ b/arch/arm/boot/dts/gemini/gemini-sq201.dts
@@ -134,7 +134,7 @@
partitions {
compatible = "redboot-fis";
/* Eraseblock at 0xfe0000 */
- fis-index-block = <0x1fc>;
+ fis-index-block = <0x7f>;
};
};
target/linux/gemini/patches-6.18/0002-ARM-dts-Add-a-Verbatim-Gigabit-NAS-DTS.patch
+253
View File
@@ -0,0 +1,253 @@
From 46267aeb78cc7aba845da4c17acff1d46b694647 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linusw@kernel.org>
Date: Wed, 14 Jan 2026 09:29:48 +0100
Subject: [PATCH 1/2] ARM: dts: Add a Verbatim Gigabit NAS DTS
This adds a device tree for the Verbatim S08V1901-D1 NAS
which also has the product names "Gigabit Network Hard Drive"
"Gigabit NAS" and maybe other names.
Signed-off-by: Linus Walleij <linusw@kernel.org>
---
arch/arm/boot/dts/gemini/Makefile | 1 +
.../gemini/gemini-verbatim-s08v1901-d1.dts | 225 ++++++++++++++++++
2 files changed, 226 insertions(+)
create mode 100644 arch/arm/boot/dts/gemini/gemini-verbatim-s08v1901-d1.dts
--- a/arch/arm/boot/dts/gemini/Makefile
+++ b/arch/arm/boot/dts/gemini/Makefile
@@ -8,5 +8,6 @@ dtb-$(CONFIG_ARCH_GEMINI) += \
gemini-sl93512r.dtb \
gemini-sq201.dtb \
gemini-ssi1328.dtb \
+ gemini-verbatim-s08v1901-d1.dtb \
gemini-wbd111.dtb \
gemini-wbd222.dtb
--- /dev/null
+++ b/arch/arm/boot/dts/gemini/gemini-verbatim-s08v1901-d1.dts
@@ -0,0 +1,225 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree file for the Verbatim S08V1901-D1
+ * on product packaging called "Verbatim Gigabit Ethernet Hard Drive"
+ */
+
+/dts-v1/;
+
+#include "gemini.dtsi"
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Verbatim Gigabit Ethernet Hard Drive S08V1901-D1";
+ compatible = "verbatim,s08v1901-d1", "cortina,gemini";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ memory@0 {
+ /* 64MB SDRAM in 2 x Hynix HY5DU561622ETP-D43 */
+ device_type = "memory";
+ reg = <0x00000000 0x4000000>;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait";
+ stdout-path = &uart0;
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+
+ button-reset {
+ debounce-interval = <50>;
+ wakeup-source;
+ linux,code = <KEY_RESTART>;
+ label = "reset";
+ gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ led-green-harddisk {
+ function = LED_FUNCTION_DISK_ACTIVITY;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ linux,default-trigger = "disk-activity";
+ };
+ };
+
+ /*
+ * Fan control candidates: gpio0 10, gpio1 28
+ */
+
+ mdio0: mdio {
+ compatible = "virtual,mdio-gpio";
+ /* Uses MDC and MDIO */
+ gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
+ <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* This is a Realtek RTL8211CL ethernet PHY */
+ phy0: ethernet-phy@1 {
+ reg = <1>;
+ };
+ };
+
+ /*
+ * I haven't found a way to control the fan, it appears to be
+ * always on.
+ */
+ thermal-zones {
+ chassis-thermal {
+ /* Poll every 20 seconds */
+ polling-delay = <20000>;
+ /* Poll every 2nd second when cooling */
+ polling-delay-passive = <2000>;
+ /* Use the thermal sensor in the hard drive */
+ thermal-sensors = <&drive0>;
+
+ /* Tripping points from the fan.script in the rootfs */
+ trips {
+ alert: chassis-alert {
+ /* At 43 degrees turn on the fan */
+ temperature = <43000>;
+ hysteresis = <3000>;
+ type = "active";
+ };
+ crit: chassis-crit {
+ /* Just shut down at 60 degrees */
+ temperature = <60000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+ };
+
+ soc {
+ flash@30000000 {
+ /*
+ * This is a Spansion S29GL128P11TFI01 852FB245 A
+ * 128Mbit (16MB) Flash memory.
+ */
+ status = "okay";
+ reg = <0x30000000 0x01000000>;
+
+ partitions {
+ compatible = "redboot-fis";
+ /* Eraseblock at 0xfe0000 */
+ fis-index-block = <0x7f>;
+ };
+ };
+
+ syscon: syscon@40000000 {
+ pinctrl {
+ /*
+ * gpio0agrp cover line 0-4 as line 1 is used for the LED
+ * gpio0hgrp cover line 21, 22 used by MDIO for Marvell PHY
+ */
+ gpio0_default_pins: pinctrl-gpio0 {
+ mux {
+ function = "gpio0";
+ groups = "gpio0agrp", "gpio0hgrp";
+ };
+ };
+ gpio1_default_pins: pinctrl-gpio1 {
+ /*
+ * Free up the TVC pins at GPIO1 offset 28,29,30,31
+ * line 31 is used for reset key
+ */
+ mux {
+ function = "gpio1";
+ groups = "gpio1dgrp";
+ };
+ };
+ pinctrl-gmii {
+ mux {
+ function = "gmii";
+ groups = "gmii_gmac0_grp";
+ };
+ /* TODO: investigate vendor registers on boot */
+ conf0 {
+ pins = "V8 GMAC0 RXDV";
+ skew-delay = <0>;
+ };
+ conf1 {
+ pins = "Y7 GMAC0 RXC";
+ skew-delay = <15>;
+ };
+ conf2 {
+ pins = "T8 GMAC0 TXEN";
+ skew-delay = <7>;
+ };
+ conf3 {
+ pins = "U8 GMAC0 TXC";
+ skew-delay = <10>;
+ };
+ conf4 {
+ /* The data lines all have default skew */
+ pins = "W8 GMAC0 RXD0", "V9 GMAC0 RXD1",
+ "Y8 GMAC0 RXD2", "U9 GMAC0 RXD3",
+ "T7 GMAC0 TXD0", "U6 GMAC0 TXD1",
+ "V7 GMAC0 TXD2", "U7 GMAC0 TXD3";
+ skew-delay = <7>;
+ };
+ };
+ };
+ };
+
+ /* Both interfaces brought out on SATA connectors */
+ sata: sata@46000000 {
+ cortina,gemini-ata-muxmode = <0>;
+ cortina,gemini-enable-sata-bridge;
+ status = "okay";
+ };
+
+ gpio0: gpio@4d000000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio0_default_pins>;
+ };
+
+ gpio1: gpio@4e000000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio1_default_pins>;
+ };
+
+ ethernet@60000000 {
+ status = "okay";
+
+ ethernet-port@0 {
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+ };
+
+ ide@63000000 {
+ status = "okay";
+ /*
+ * This drive may have a temperature sensor with a
+ * thermal zone we can use for thermal control of the
+ * chassis temperature using the fan.
+ */
+ drive0: ide-port@0 {
+ reg = <0>;
+ #thermal-sensor-cells = <0>;
+ };
+ };
+
+ ide@63400000 {
+ status = "okay";
+ };
+
+ usb@68000000 {
+ status = "okay";
+ };
+
+ usb@69000000 {
+ status = "okay";
+ };
+ };
+};
target/linux/gemini/patches-6.18/0003-ARM-dts-Add-a-Raidsonic-IB-4210-B-DTS.patch
+234
View File
@@ -0,0 +1,234 @@
From e6619c1d068dea0d4d29cf770a85bb8bfcfd104b Mon Sep 17 00:00:00 2001
From: Linus Walleij <linusw@kernel.org>
Date: Thu, 12 Feb 2026 00:17:53 +0100
Subject: [PATCH 1/2] ARM: dts: Add a Raidsonic IB-4210-B DTS
This adds a device tree for the Raidsonic IB-4210-B NAS, a slightly
under-powered version of IB-4220-B with half the memory and
the cheaper version of the SoC.
Signed-off-by: Linus Walleij <linusw@kernel.org>
---
arch/arm/boot/dts/gemini/Makefile | 1 +
arch/arm/boot/dts/gemini/gemini-nas4210b.dts | 205 +++++++++++++++++++
2 files changed, 206 insertions(+)
create mode 100644 arch/arm/boot/dts/gemini/gemini-nas4210b.dts
--- a/arch/arm/boot/dts/gemini/Makefile
+++ b/arch/arm/boot/dts/gemini/Makefile
@@ -2,6 +2,7 @@
dtb-$(CONFIG_ARCH_GEMINI) += \
gemini-dlink-dir-685.dtb \
gemini-dlink-dns-313.dtb \
+ gemini-nas4210b.dtb \
gemini-nas4220b.dtb \
gemini-ns2502.dtb \
gemini-rut1xx.dtb \
--- /dev/null
+++ b/arch/arm/boot/dts/gemini/gemini-nas4210b.dts
@@ -0,0 +1,205 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree file for the Gemini-based Raidsonic NAS IB-4210-B
+ * Based on the NAS Forum experiments by user "CptSpock".
+ */
+
+/dts-v1/;
+
+#include "gemini.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Raidsonic NAS IB-4210-B";
+ compatible = "raidsonic,ib-4210-b", "cortina,gemini";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ memory@0 { /* 64 MB */
+ device_type = "memory";
+ reg = <0x00000000 0x4000000>;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait";
+ stdout-path = &uart0;
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+
+ button-setup {
+ debounce-interval = <100>;
+ wakeup-source;
+ linux,code = <KEY_SETUP>;
+ label = "Backup button";
+ /* Conflict with TVC */
+ gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
+ };
+ button-restart {
+ debounce-interval = <100>;
+ wakeup-source;
+ linux,code = <KEY_RESTART>;
+ label = "Softreset button";
+ /* Conflict with TVC */
+ gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ led-orange-hdd {
+ label = "nas4220b:orange:hdd";
+ /* Conflict with TVC */
+ gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ linux,default-trigger = "disk-activity";
+ };
+ led-green-os {
+ label = "nas4220b:green:os";
+ /* Conflict with TVC */
+ gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ mdio0: mdio {
+ compatible = "virtual,mdio-gpio";
+ gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
+ <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* Realtek RTL8211B */
+ phy0: ethernet-phy@1 {
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ soc {
+ flash@30000000 {
+ status = "okay";
+ /* 16MB of flash */
+ reg = <0x30000000 0x01000000>;
+
+ partitions {
+ compatible = "redboot-fis";
+ /* Eraseblock at 0xfe0000 */
+ fis-index-block = <0x7f>;
+ };
+ };
+
+ syscon: syscon@40000000 {
+ pinctrl {
+ gpio0_default_pins: pinctrl-gpio0 {
+ mux {
+ function = "gpio0";
+ groups =
+ "gpio0egrp",
+ /* Used by MDIO */
+ "gpio0igrp";
+ };
+ };
+ gpio1_default_pins: pinctrl-gpio1 {
+ mux {
+ function = "gpio1";
+ /* Lines 28-31 used by LEDs and buttons */
+ groups = "gpio1dgrp";
+ };
+ };
+ pinctrl-gmii {
+ mux {
+ function = "gmii";
+ groups = "gmii_gmac0_grp";
+ };
+ conf0 {
+ pins = "R8 GMAC0 RXDV", "U11 GMAC1 RXDV";
+ skew-delay = <0>;
+ };
+ conf1 {
+ pins = "T8 GMAC0 RXC";
+ skew-delay = <10>;
+ };
+ conf2 {
+ pins = "T11 GMAC1 RXC";
+ skew-delay = <15>;
+ };
+ conf3 {
+ pins = "P8 GMAC0 TXEN", "V11 GMAC1 TXEN";
+ skew-delay = <7>;
+ };
+ conf4 {
+ pins = "V7 GMAC0 TXC", "P10 GMAC1 TXC";
+ skew-delay = <10>;
+ };
+ conf5 {
+ /* The data lines all have default skew */
+ pins = "U8 GMAC0 RXD0", "V8 GMAC0 RXD1",
+ "P9 GMAC0 RXD2", "R9 GMAC0 RXD3",
+ "R11 GMAC1 RXD0", "P11 GMAC1 RXD1",
+ "V12 GMAC1 RXD2", "U12 GMAC1 RXD3",
+ "R10 GMAC1 TXD0", "T10 GMAC1 TXD1",
+ "U10 GMAC1 TXD2", "V10 GMAC1 TXD3";
+ skew-delay = <7>;
+ };
+ conf6 {
+ pins = "U7 GMAC0 TXD0", "T7 GMAC0 TXD1",
+ "R7 GMAC0 TXD2", "P7 GMAC0 TXD3";
+ skew-delay = <5>;
+ };
+ /* Set up drive strength on GMAC0 to 16 mA */
+ conf7 {
+ groups = "gmii_gmac0_grp";
+ drive-strength = <16>;
+ };
+ };
+ };
+ };
+
+ sata: sata@46000000 {
+ cortina,gemini-ata-muxmode = <0>;
+ cortina,gemini-enable-sata-bridge;
+ status = "okay";
+ };
+
+ gpio0: gpio@4d000000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio0_default_pins>;
+ };
+
+ gpio1: gpio@4e000000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio1_default_pins>;
+ };
+
+ ethernet@60000000 {
+ status = "okay";
+
+ ethernet-port@0 {
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+ ethernet-port@1 {
+ /* Not used in this platform */
+ };
+ };
+
+ ide@63000000 {
+ status = "okay";
+ };
+
+ ide@63400000 {
+ status = "okay";
+ };
+
+ usb@68000000 {
+ status = "okay";
+ };
+
+ usb@69000000 {
+ status = "okay";
+ };
+ };
+};
target/linux/gemini/patches-6.18/0004-ARM-dts-gemini-Correct-the-RUT1xx.patch
+60
View File
@@ -0,0 +1,60 @@
From 1cf93e2435f0d7a7e8c9fd0d4355e6a521f72fc1 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linusw@kernel.org>
Date: Sat, 14 Feb 2026 00:12:51 +0100
Subject: [PATCH 1/2] ARM: dts: gemini: Correct the RUT1xx
Fix two problems with the RUT1xx device tree:
- The memory is 32MB not 128MB
- The console is 19200 BPS
- Activate the PCI
- Disable the unused USB ports
Signed-off-by: Linus Walleij <linusw@kernel.org>
---
arch/arm/boot/dts/gemini/gemini-rut1xx.dts | 18 +++++++-----------
1 file changed, 7 insertions(+), 11 deletions(-)
--- a/arch/arm/boot/dts/gemini/gemini-rut1xx.dts
+++ b/arch/arm/boot/dts/gemini/gemini-rut1xx.dts
@@ -14,13 +14,13 @@
#address-cells = <1>;
#size-cells = <1>;
- memory@0 { /* 128 MB */
+ memory@0 { /* 32 MB */
device_type = "memory";
- reg = <0x00000000 0x8000000>;
+ reg = <0x00000000 0x2000000>;
};
chosen {
- bootargs = "console=ttyS0,115200n8";
+ bootargs = "console=ttyS0,19200n8";
stdout-path = &uart0;
};
@@ -113,6 +113,10 @@
pinctrl-0 = <&gpio1_default_pins>;
};
+ pci@50000000 {
+ status = "okay";
+ };
+
ethernet@60000000 {
status = "okay";
@@ -124,13 +128,5 @@
/* Not used in this platform */
};
};
-
- usb@68000000 {
- status = "okay";
- };
-
- usb@69000000 {
- status = "okay";
- };
};
};
target/linux/gemini/patches-6.18/300-ARM-dts-Augment-DIR-685-partition-table-for-OpenWrt.patch
+37
View File
@@ -0,0 +1,37 @@
From 0890faebd0155f57ef34fb1e766fd3ed8a127595 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Mon, 11 Mar 2019 15:44:29 +0100
Subject: [PATCH 2/2] ARM: dts: Augment DIR-685 partition table for OpenWrt
Rename the firmware partition so that the firmware MTD
splitter will do its job, drop the rootfs arguments as
the MTD splitter will set this up automatically.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/gemini/gemini-dlink-dir-685.dts | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
--- a/arch/arm/boot/dts/gemini/gemini-dlink-dir-685.dts
+++ b/arch/arm/boot/dts/gemini/gemini-dlink-dir-685.dts
@@ -20,7 +20,7 @@
};
chosen {
- bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait consoleblank=300";
+ bootargs = "console=ttyS0,19200n8 consoleblank=300";
stdout-path = "uart0:19200n8";
};
@@ -317,9 +317,9 @@
* this is called "upgrade" on the vendor system.
*/
partition@40000 {
- label = "upgrade";
+ compatible = "wrg";
+ label = "firmware";
reg = <0x00040000 0x01f40000>;
- read-only;
};
/* RGDB, Residental Gateway Database? */
partition@1f80000 {
target/linux/gemini/patches-6.18/302-ARM-dts-gemini-Tag-disk-led-for-disk-activity.patch
+23
View File
@@ -0,0 +1,23 @@
From a4ea0ccf0f630b5fb0ccd2ddbb237c37ef0fc5a9 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linusw@kernel.org>
Date: Mon, 26 Jan 2026 08:14:22 +0100
Subject: [PATCH] ARM: dts: gemini: Tag disk led for disk-activity
Linux now has a trigger specifically for all disk activity
and this is what the LED is used for so tag it like such.
Signed-off-by: Linus Walleij <linusw@kernel.org>
---
arch/arm/boot/dts/gemini/gemini-nas4220b.dts | 1 +
1 file changed, 1 insertion(+)
--- a/arch/arm/boot/dts/gemini/gemini-nas4220b.dts
+++ b/arch/arm/boot/dts/gemini/gemini-nas4220b.dts
@@ -52,6 +52,7 @@
/* Conflict with TVC */
gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
default-state = "on";
+ linux,default-trigger = "disk-activity";
};
led-green-os {
label = "nas4220b:green:os";
target/linux/gemini/patches-6.18/303-gemini-augment-DTS-with-botched-partitions.patch
+80
View File
@@ -0,0 +1,80 @@
From 1b5c6be7b6dc6c096e1fd55ce10809d350e3afab Mon Sep 17 00:00:00 2001
From: Linus Walleij <linusw@kernel.org>
Date: Mon, 26 Jan 2026 08:09:04 +0100
Subject: [PATCH] gemini: augment DTS with botched partitions
We override the RedBoot FIS partition table with a custom one
using fixed-partitions.
Mostly this is a 1-to-1 copy, but the three partitions called
"Kern", "Ramdisk" and "Application" are combined into one
called "firmware" which is optimal for OpenWrt.
The RedBoot bootloader still sees the three partitions and will
load the first two into memory to boot the system, which
is fine: the kernel will still be there.
To avoid confusing the MTD partition splitter we also need to
remove any command line root partition arguments.
Signed-off-by: Linus Walleij <linusw@kernel.org>
---
arch/arm/boot/dts/gemini/gemini-nas4220b.dts | 39 ++++++++++++++++++--
1 file changed, 35 insertions(+), 4 deletions(-)
--- a/arch/arm/boot/dts/gemini/gemini-nas4220b.dts
+++ b/arch/arm/boot/dts/gemini/gemini-nas4220b.dts
@@ -20,7 +20,7 @@
};
chosen {
- bootargs = "console=ttyS0,19200n8 root=/dev/mtdblock3 rw rootfstype=squashfs,jffs2 rootwait";
+ bootargs = "console=ttyS0,19200n8";
stdout-path = &uart0;
};
@@ -82,10 +82,41 @@
/* 16MB of flash */
reg = <0x30000000 0x01000000>;
+ /*
+ * Override the RedBoot partition table with fixed partitions
+ * in order to create a coherent "firmware" partition so that
+ * we can have optimal flash usage with OpenWrt in a big
+ * MTD-splitted "firmware" partition.
+ */
partitions {
- compatible = "redboot-fis";
- /* Eraseblock at 0xfe0000 */
- fis-index-block = <0x7f>;
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "BOOT";
+ reg = <0x00000000 0x00020000>;
+ read-only;
+ };
+ partition@1 {
+ compatible = "openwrt,executable-prolog";
+ label = "firmware";
+ reg = <0x00020000 0x00f00000>;
+ };
+ partition@2 {
+ label = "VCTL";
+ reg = <0x00f20000 0x00020000>;
+ read-only;
+ };
+ partition@3 {
+ label = "CurConf";
+ reg = <0x00f40000 0x000a0000>;
+ read-only;
+ };
+ partition@4 {
+ label = "FIS directory";
+ reg = <0x00fe0000 0x00020000>;
+ read-only;
+ };
};
};
target/linux/gemini/patches-6.18/304-gemini-augment-SQ201-DTS-with-botched-partitions.patch
+68
View File
@@ -0,0 +1,68 @@
From e0881008b49ecbec1c88f1f96c62a6a37c808df4 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linusw@kernel.org>
Date: Sun, 1 Feb 2026 00:21:08 +0100
Subject: [PATCH] gemini: augment SQ201 DTS with botched partitions
Same botched partitions as the Raidsonic IB-4220-B.
Signed-off-by: Linus Walleij <linusw@kernel.org>
---
arch/arm/boot/dts/gemini/gemini-sq201.dts | 39 ++++++++++++++++++++---
1 file changed, 35 insertions(+), 4 deletions(-)
--- a/arch/arm/boot/dts/gemini/gemini-sq201.dts
+++ b/arch/arm/boot/dts/gemini/gemini-sq201.dts
@@ -20,7 +20,7 @@
};
chosen {
- bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock2 rw rootfstype=squashfs,jffs2 rootwait";
+ bootargs = "console=ttyS0,115200n8";
stdout-path = &uart0;
};
@@ -131,10 +131,41 @@
/* 16MB of flash */
reg = <0x30000000 0x01000000>;
+ /*
+ * Override the RedBoot partition table with fixed partitions
+ * in order to create a coherent "firmware" partition so that
+ * we can have optimal flash usage with OpenWrt in a big
+ * MTD-splitted "firmware" partition.
+ */
partitions {
- compatible = "redboot-fis";
- /* Eraseblock at 0xfe0000 */
- fis-index-block = <0x7f>;
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "BOOT";
+ reg = <0x00000000 0x00016000>;
+ read-only;
+ };
+ partition@1 {
+ compatible = "openwrt,executable-prolog";
+ label = "firmware";
+ reg = <0x00120000 0x00e00000>;
+ };
+ partition@2 {
+ label = "VCTL";
+ reg = <0x00f20000 0x00020000>;
+ read-only;
+ };
+ partition@3 {
+ label = "CurConf";
+ reg = <0x00f40000 0x000a0000>;
+ read-only;
+ };
+ partition@4 {
+ label = "FIS directory";
+ reg = <0x00fe0000 0x00020000>;
+ read-only;
+ };
};
};
target/linux/gemini/patches-6.18/305-gemini-augment-SL93512R-DTS-with-botched-partitions.patch
+68
View File
@@ -0,0 +1,68 @@
From b5732601a7ff5457cb1e3a9389761aa23a81f54d Mon Sep 17 00:00:00 2001
From: Linus Walleij <linusw@kernel.org>
Date: Sun, 1 Feb 2026 10:20:56 +0100
Subject: [PATCH] gemini: augment SL93512R DTS with botched partitions
Same botched partitions as the Raidsonic IB-4220-B.
Signed-off-by: Linus Walleij <linusw@kernel.org>
---
arch/arm/boot/dts/gemini/gemini-sl93512r.dts | 39 ++++++++++++++++++--
1 file changed, 35 insertions(+), 4 deletions(-)
--- a/arch/arm/boot/dts/gemini/gemini-sl93512r.dts
+++ b/arch/arm/boot/dts/gemini/gemini-sl93512r.dts
@@ -24,7 +24,7 @@
};
chosen {
- bootargs = "console=ttyS0,19200n8 root=/dev/mtdblock3 rw rootfstype=squashfs,jffs2 rootwait";
+ bootargs = "console=ttyS0,19200n8";
stdout-path = &uart0;
};
@@ -143,10 +143,41 @@
/* 16MB of flash */
reg = <0x30000000 0x01000000>;
+ /*
+ * Override the RedBoot partition table with fixed partitions
+ * in order to create a coherent "firmware" partition so that
+ * we can have optimal flash usage with OpenWrt in a big
+ * MTD-splitted "firmware" partition.
+ */
partitions {
- compatible = "redboot-fis";
- /* Eraseblock at 0xfe0000 */
- fis-index-block = <0x7f>;
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "BOOT";
+ reg = <0x00000000 0x00020000>;
+ read-only;
+ };
+ partition@1 {
+ compatible = "openwrt,executable-prolog";
+ label = "firmware";
+ reg = <0x00020000 0x00f00000>;
+ };
+ partition@2 {
+ label = "VCTL";
+ reg = <0x00f20000 0x00020000>;
+ read-only;
+ };
+ partition@3 {
+ label = "CurConf";
+ reg = <0x00f40000 0x000a0000>;
+ read-only;
+ };
+ partition@4 {
+ label = "FIS directory";
+ reg = <0x00fe0000 0x00020000>;
+ read-only;
+ };
};
};
target/linux/gemini/patches-6.18/306-gemini-augment-Verbatim-DTS-with-botched-partitions.patch
+68
View File
@@ -0,0 +1,68 @@
From 590d33c31529aae924fc38e356e93beca684e3be Mon Sep 17 00:00:00 2001
From: Linus Walleij <linusw@kernel.org>
Date: Sun, 1 Feb 2026 23:10:25 +0100
Subject: [PATCH 2/2] gemini: augment Verbatim DTS with botched partitions
Same botched partitions as the Raidsonic IB-4220-B.
Signed-off-by: Linus Walleij <linusw@kernel.org>
---
.../gemini/gemini-verbatim-s08v1901-d1.dts | 39 +++++++++++++++++--
1 file changed, 35 insertions(+), 4 deletions(-)
--- a/arch/arm/boot/dts/gemini/gemini-verbatim-s08v1901-d1.dts
+++ b/arch/arm/boot/dts/gemini/gemini-verbatim-s08v1901-d1.dts
@@ -23,7 +23,7 @@
};
chosen {
- bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait";
+ bootargs = "console=ttyS0,19200n8";
stdout-path = &uart0;
};
@@ -108,10 +108,41 @@
status = "okay";
reg = <0x30000000 0x01000000>;
+ /*
+ * Override the RedBoot partition table with fixed partitions
+ * in order to create a coherent "firmware" partition so that
+ * we can have optimal flash usage with OpenWrt in a big
+ * MTD-splitted "firmware" partition.
+ */
partitions {
- compatible = "redboot-fis";
- /* Eraseblock at 0xfe0000 */
- fis-index-block = <0x7f>;
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "BOOT";
+ reg = <0x00000000 0x00020000>;
+ read-only;
+ };
+ partition@1 {
+ compatible = "openwrt,executable-prolog";
+ label = "firmware";
+ reg = <0x00020000 0x00f00000>;
+ };
+ partition@2 {
+ label = "VCTL";
+ reg = <0x00f20000 0x00020000>;
+ read-only;
+ };
+ partition@3 {
+ label = "CurConf";
+ reg = <0x00f40000 0x000a0000>;
+ read-only;
+ };
+ partition@4 {
+ label = "FIS directory";
+ reg = <0x00fe0000 0x00020000>;
+ read-only;
+ };
};
};
target/linux/gemini/patches-6.18/307-gemini-augment-NAS4210-DTS-with-botched-partitions.patch
+59
View File
@@ -0,0 +1,59 @@
From fdfaeca6b5eed05e446f298c5e597df39b96629a Mon Sep 17 00:00:00 2001
From: Linus Walleij <linusw@kernel.org>
Date: Thu, 12 Feb 2026 00:22:30 +0100
Subject: [PATCH 2/2] gemini: augment NAS4210 DTS with botched partitions
Same botched partitions as the Raidsonic IB-4220-B.
Signed-off-by: Linus Walleij <linusw@kernel.org>
---
arch/arm/boot/dts/gemini/gemini-nas4210b.dts | 37 ++++++++++++++++++--
1 file changed, 34 insertions(+), 3 deletions(-)
--- a/arch/arm/boot/dts/gemini/gemini-nas4210b.dts
+++ b/arch/arm/boot/dts/gemini/gemini-nas4210b.dts
@@ -84,10 +84,41 @@
/* 16MB of flash */
reg = <0x30000000 0x01000000>;
+ /*
+ * Override the RedBoot partition table with fixed partitions
+ * in order to create a coherent "firmware" partition so that
+ * we can have optimal flash usage with OpenWrt in a big
+ * MTD-splitted "firmware" partition.
+ */
partitions {
- compatible = "redboot-fis";
- /* Eraseblock at 0xfe0000 */
- fis-index-block = <0x7f>;
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "BOOT";
+ reg = <0x00000000 0x00020000>;
+ read-only;
+ };
+ partition@1 {
+ compatible = "openwrt,executable-prolog";
+ label = "firmware";
+ reg = <0x00020000 0x00f00000>;
+ };
+ partition@2 {
+ label = "VCTL";
+ reg = <0x00f20000 0x00020000>;
+ read-only;
+ };
+ partition@3 {
+ label = "CurConf";
+ reg = <0x00f40000 0x000a0000>;
+ read-only;
+ };
+ partition@4 {
+ label = "FIS directory";
+ reg = <0x00fe0000 0x00020000>;
+ read-only;
+ };
};
};
target/linux/gemini/patches-6.18/308-gemini-augment-RUT1xx-DTS-with-botched-partitions.patch
+58
View File
@@ -0,0 +1,58 @@
From 0b6bed71689664080e1e9ec95aecf45279dde6ee Mon Sep 17 00:00:00 2001
From: Linus Walleij <linusw@kernel.org>
Date: Sat, 14 Feb 2026 00:21:13 +0100
Subject: [PATCH 2/2] gemini: augment RUT1xx DTS with botched partitions
Same botched partitions as the Raidsonic IB-4220-B.
Signed-off-by: Linus Walleij <linusw@kernel.org>
---
arch/arm/boot/dts/gemini/gemini-rut1xx.dts | 37 +++++++++++++++++++++-
1 file changed, 36 insertions(+), 1 deletion(-)
--- a/arch/arm/boot/dts/gemini/gemini-rut1xx.dts
+++ b/arch/arm/boot/dts/gemini/gemini-rut1xx.dts
@@ -74,7 +74,42 @@
status = "okay";
/* 8MB of flash */
reg = <0x30000000 0x00800000>;
- /* TODO: add flash partitions here */
+ /*
+ * Override the RedBoot partition table with fixed partitions
+ * in order to create a coherent "firmware" partition so that
+ * we can have optimal flash usage with OpenWrt in a big
+ * MTD-splitted "firmware" partition.
+ */
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "BOOT";
+ reg = <0x00000000 0x00020000>;
+ read-only;
+ };
+ partition@1 {
+ compatible = "openwrt,executable-prolog";
+ label = "firmware";
+ reg = <0x00020000 0x007a0000>;
+ };
+ partition@2 {
+ label = "VCTL";
+ reg = <0x007c0000 0x00010000>;
+ read-only;
+ };
+ partition@3 {
+ label = "cfg";
+ reg = <0x007d0000 0x00020000>;
+ read-only;
+ };
+ partition@4 {
+ label = "FIS directory";
+ reg = <0x007f0000 0x00010000>;
+ read-only;
+ };
+ };
};
syscon: syscon@40000000 {
target/linux/generic/config-6.18
+3
View File
@@ -1587,6 +1587,7 @@ CONFIG_DQL=y
# CONFIG_DRM_I915_GVT_KVMGT is not set
# CONFIG_DRM_I915_REPLAY_GPU_HANGS_API is not set
# CONFIG_DRM_IMX_LCDIF is not set
# CONFIG_DRM_ITE_IT6263 is not set
# CONFIG_DRM_ITE_IT6505 is not set
# CONFIG_DRM_ITE_IT66121 is not set
# CONFIG_DRM_KOMEDA is not set
@@ -1732,6 +1733,7 @@ CONFIG_DQL=y
# CONFIG_DRM_SIL_SII8620 is not set
# CONFIG_DRM_SIMPLEDRM is not set
# CONFIG_DRM_SIMPLE_BRIDGE is not set
# CONFIG_DRM_SOLOMON_SSD2825 is not set
# CONFIG_DRM_SSD130X is not set
# CONFIG_DRM_ST7571_I2C is not set
# CONFIG_DRM_ST7586 is not set
@@ -1747,6 +1749,7 @@ CONFIG_DQL=y
# CONFIG_DRM_TI_SN65DSI86 is not set
# CONFIG_DRM_TI_TFP410 is not set
# CONFIG_DRM_TI_TPD12S015 is not set
# CONFIG_DRM_TI_TDP158 is not set
# CONFIG_DRM_TOSHIBA_TC358762 is not set
# CONFIG_DRM_TOSHIBA_TC358764 is not set
# CONFIG_DRM_TOSHIBA_TC358767 is not set
target/linux/generic/files/drivers/net/phy/ar8216.c
+2 -7
View File
@@ -23,7 +23,7 @@
#include <linux/skbuff.h>
#include <linux/netdevice.h>
#include <linux/netlink.h>
#include <linux/of_device.h>
#include <linux/of.h>
#include <linux/of_mdio.h>
#include <linux/of_net.h>
#include <linux/bitops.h>
@@ -2757,23 +2757,18 @@ static const struct of_device_id ar8xxx_mdiodev_of_match[] = {
static int
ar8xxx_mdiodev_probe(struct mdio_device *mdiodev)
{
const struct of_device_id *match;
struct ar8xxx_priv *priv;
struct switch_dev *swdev;
struct device_node *mdio_node;
int ret;
match = of_match_device(ar8xxx_mdiodev_of_match, &mdiodev->dev);
if (!match)
return -EINVAL;
priv = ar8xxx_create();
if (priv == NULL)
return -ENOMEM;
priv->mii_bus = mdiodev->bus;
priv->pdev = &mdiodev->dev;
priv->chip = (const struct ar8xxx_chip *) match->data;
priv->chip = of_device_get_match_data(&mdiodev->dev);
ret = of_property_read_u32(priv->pdev->of_node, "qca,mib-poll-interval",
&priv->mib_poll_interval);
target/linux/generic/files/drivers/net/phy/ar8327.c
-1
View File
@@ -23,7 +23,6 @@
#include <linux/lockdep.h>
#include <linux/workqueue.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/leds.h>
#include <linux/mdio.h>
target/linux/ipq40xx/dts/qcom-ipq4018-a42.dts
+4 -6
View File
@@ -52,13 +52,11 @@
};
aliases {
// TODO: Verify if the ethernet0 alias is needed
ethernet0 = &gmac;
led-boot = &led_status_green;
led-failsafe = &led_status_green;
led-running = &led_status_green;
led-upgrade = &led_status_green;
label-mac-device = &swport5;
label-mac-device = &gmac;
};
leds {
@@ -201,6 +199,9 @@
&gmac {
status = "okay";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_gmac0>;
};
&switch {
@@ -218,9 +219,6 @@
&swport5 {
status = "okay";
label = "ethernet1";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_gmac0>;
};
&wifi0 {
target/linux/ipq40xx/dts/qcom-ipq4018-gl-a1300.dts
+4 -5
View File
@@ -11,13 +11,11 @@
compatible = "glinet,gl-a1300", "qcom,ipq4019";
aliases {
// TODO: Verify if the ethernet0 alias is needed
ethernet0 = &gmac;
led-boot = &led_run;
led-failsafe = &led_run;
led-running = &led_run;
led-upgrade = &led_run;
label-mac-device = &swport4;
label-mac-device = &gmac;
};
chosen {
@@ -302,6 +300,9 @@
&gmac {
status = "okay";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_gmac0 0>;
};
&switch {
@@ -320,8 +321,6 @@
status = "okay";
label = "lan1";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_gmac0 0>;
};
&swport5 {
target/linux/ipq40xx/dts/qcom-ipq4018-pa1200.dts
+4 -6
View File
@@ -52,13 +52,11 @@
};
aliases {
// TODO: Verify if the ethernet0 alias is needed
ethernet0 = &gmac;
led-boot = &led_status_purple;
led-failsafe = &led_status_yellow;
led-running = &led_status_cyan;
led-upgrade = &led_status_yellow;
label-mac-device = &swport5;
label-mac-device = &gmac;
};
leds {
@@ -193,6 +191,9 @@
&gmac {
status = "okay";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_gmac0>;
};
&switch {
@@ -210,9 +211,6 @@
&swport5 {
status = "okay";
label = "ethernet1";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_gmac0>;
};
&wifi0 {
target/linux/ipq40xx/dts/qcom-ipq4018-rt-ac58u.dts
+1 -2
View File
@@ -16,8 +16,6 @@
};
aliases {
// TODO: Verify if the ethernet0 alias is needed
ethernet0 = &gmac;
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
@@ -327,6 +325,7 @@
&gmac {
status = "okay";
nvmem-cells = <&macaddr_factory_5006>;
nvmem-cell-names = "mac-address";
};
target/linux/ipq40xx/dts/qcom-ipq4019-a62.dts
+4 -6
View File
@@ -52,13 +52,11 @@
};
aliases {
// TODO: Verify if the ethernet0 alias is needed
ethernet0 = &gmac;
led-boot = &led_status_green;
led-failsafe = &led_status_green;
led-running = &led_status_green;
led-upgrade = &led_status_green;
label-mac-device = &swport4;
label-mac-device = &gmac;
};
leds {
@@ -229,6 +227,9 @@
&gmac {
status = "okay";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_gmac0>;
};
&switch {
@@ -238,9 +239,6 @@
&swport4 {
status = "okay";
label = "ethernet1";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_gmac0>;
};
&swport5 {
target/linux/ipq40xx/dts/qcom-ipq4019-deco-m5.dtsi
+4 -4
View File
@@ -12,7 +12,7 @@
};
aliases {
label-mac-device = &swport4;
label-mac-device = &gmac;
};
keys {
@@ -341,6 +341,9 @@
&gmac {
status = "okay";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_gmac0 0>;
};
&switch {
@@ -350,9 +353,6 @@
&swport4 {
status = "okay";
label = "lan";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_gmac0 0>;
};
&swport5 {
target/linux/ipq40xx/dts/qcom-ipq4019-pa2200.dts
+4 -6
View File
@@ -44,13 +44,11 @@
};
aliases {
// TODO: Verify if the ethernet0 alias is needed
ethernet0 = &gmac;
led-boot = &led_power_orange;
led-failsafe = &led_status_blue;
led-running = &led_power_orange;
led-upgrade = &led_status_blue;
label-mac-device = &swport4;
label-mac-device = &gmac;
};
leds {
@@ -209,6 +207,9 @@
&gmac {
status = "okay";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_gmac0>;
};
&switch {
@@ -218,9 +219,6 @@
&swport4 {
status = "okay";
label = "ethernet1";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_gmac0>;
};
&swport5 {
target/linux/ipq40xx/dts/qcom-ipq4029-gl-b1300.dts
+4 -5
View File
@@ -25,13 +25,11 @@
compatible = "glinet,gl-b1300";
aliases {
// TODO: Verify if the ethernet0 alias is needed
ethernet0 = &gmac;
led-boot = &power;
led-failsafe = &power;
led-running = &power;
led-upgrade = &power;
label-mac-device = &swport4;
label-mac-device = &gmac;
};
memory {
@@ -287,6 +285,9 @@
&gmac {
status = "okay";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_gmac0 0>;
};
&switch {
@@ -305,8 +306,6 @@
status = "okay";
label = "lan1";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_gmac0 0>;
};
&swport5 {
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/amazonse.dtsi → target/linux/lantiq/dts/amazonse.dtsi
View File
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/amazonse_allnet_all0333cj.dts → target/linux/lantiq/dts/amazonse_allnet_all0333cj.dts
View File

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