Merge Official Source

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
2026-06-10 11:36:02 +08:00
45 changed files with 1188 additions and 60 deletions
+1 -1
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@@ -224,7 +224,7 @@ define Package/iwlwifi-firmware-be200/install
endef endef
$(eval $(call BuildPackage,iwlwifi-firmware-be200)) $(eval $(call BuildPackage,iwlwifi-firmware-be200))
Package/e100-firmware = $(call Package/firmware-default,Intel e100) Package/e100-firmware = $(call Package/firmware-default,Firmware for Intel e100 PCI 10/100 Ethernet chipsets)
define Package/e100-firmware/install define Package/e100-firmware/install
$(INSTALL_DIR) $(1)/lib/firmware/e100 $(INSTALL_DIR) $(1)/lib/firmware/e100
$(INSTALL_DATA) $(PKG_BUILD_DIR)/e100/d101m_ucode.bin $(1)/lib/firmware/e100/ $(INSTALL_DATA) $(PKG_BUILD_DIR)/e100/d101m_ucode.bin $(1)/lib/firmware/e100/
+4 -4
View File
@@ -1,4 +1,4 @@
Package/mwl8k-firmware = $(call Package/firmware-default,Marvell 8366/8687 firmware,,LICENCE.Marvell) Package/mwl8k-firmware = $(call Package/firmware-default,Firmware for Marvell 88W8366/88W8687 TopDog PCIe WiFi ICs,,LICENCE.Marvell)
define Package/mwl8k-firmware/install define Package/mwl8k-firmware/install
$(INSTALL_DIR) $(1)/lib/firmware/mwl8k $(INSTALL_DIR) $(1)/lib/firmware/mwl8k
$(INSTALL_DATA) \ $(INSTALL_DATA) \
@@ -11,7 +11,7 @@ define Package/mwl8k-firmware/install
endef endef
$(eval $(call BuildPackage,mwl8k-firmware)) $(eval $(call BuildPackage,mwl8k-firmware))
Package/mwifiex-pcie-firmware = $(call Package/firmware-default,Marvell 8897 firmware,,LICENCE.Marvell) Package/mwifiex-pcie-firmware = $(call Package/firmware-default,Firmware for Marvell/NXP 88W8897 PCIe Bluetooth/NFC/WiFi ICs,,LICENCE.Marvell)
define Package/mwifiex-pcie-firmware/install define Package/mwifiex-pcie-firmware/install
$(INSTALL_DIR) $(1)/lib/firmware/mrvl $(INSTALL_DIR) $(1)/lib/firmware/mrvl
$(INSTALL_DATA) \ $(INSTALL_DATA) \
@@ -20,7 +20,7 @@ define Package/mwifiex-pcie-firmware/install
endef endef
$(eval $(call BuildPackage,mwifiex-pcie-firmware)) $(eval $(call BuildPackage,mwifiex-pcie-firmware))
Package/mwifiex-sdio-firmware = $(call Package/firmware-default,Marvell 8887/8997 firmware,,LICENCE.Marvell) Package/mwifiex-sdio-firmware = $(call Package/firmware-default,Firmware for Marvell/NXP 88W8887/88W8997 SDIO Bluetooth/WiFi ICs,,LICENCE.Marvell)
define Package/mwifiex-sdio-firmware/install define Package/mwifiex-sdio-firmware/install
$(INSTALL_DIR) $(1)/lib/firmware/mrvl $(INSTALL_DIR) $(1)/lib/firmware/mrvl
$(INSTALL_DATA) \ $(INSTALL_DATA) \
@@ -31,7 +31,7 @@ define Package/mwifiex-sdio-firmware/install
endef endef
$(eval $(call BuildPackage,mwifiex-sdio-firmware)) $(eval $(call BuildPackage,mwifiex-sdio-firmware))
Package/libertas-usb-firmware = $(call Package/firmware-default,Marvell 8388/8682 USB firmware,,LICENCE.Marvell) Package/libertas-usb-firmware = $(call Package/firmware-default,Firmware for Marvell 88W8388/88W8682 USB WiFi ICs,,LICENCE.Marvell)
define Package/libertas-usb-firmware/install define Package/libertas-usb-firmware/install
$(INSTALL_DIR) $(1)/lib/firmware/libertas $(INSTALL_DIR) $(1)/lib/firmware/libertas
$(INSTALL_DATA) \ $(INSTALL_DATA) \
+1 -1
View File
@@ -1,4 +1,4 @@
Package/eip197-mini-firmware = $(call Package/firmware-default,Inside Secure EIP197 mini firmware) Package/eip197-mini-firmware = $(call Package/firmware-default,Inside Secure EIP197 mini cryptographic accelerator IP block firmware)
define Package/eip197-mini-firmware/install define Package/eip197-mini-firmware/install
$(INSTALL_DIR) $(1)/lib/firmware/inside-secure/eip197_minifw $(INSTALL_DIR) $(1)/lib/firmware/inside-secure/eip197_minifw
$(INSTALL_DATA) \ $(INSTALL_DATA) \
+5 -5
View File
@@ -1,4 +1,4 @@
Package/ar3k-firmware = $(call Package/firmware-default,ath3k firmware,,LICENSE.QualcommAtheros_ar3k) Package/ar3k-firmware = $(call Package/firmware-default,Firmware for Qualcomm/Atheros AR3011/AR3012 Bluetooth ICs,,LICENSE.QualcommAtheros_ar3k)
define Package/ar3k-firmware/install define Package/ar3k-firmware/install
$(INSTALL_DIR) $(1)/lib/firmware/ar3k $(INSTALL_DIR) $(1)/lib/firmware/ar3k
$(CP) \ $(CP) \
@@ -12,7 +12,7 @@ endef
$(eval $(call BuildPackage,ar3k-firmware)) $(eval $(call BuildPackage,ar3k-firmware))
Package/ath6k-firmware = $(call Package/firmware-default,AR600X firmware) Package/ath6k-firmware = $(call Package/firmware-default,Firmware for Qualcomm/Atheros AR600x SDIO WiFi ICs)
define Package/ath6k-firmware/install define Package/ath6k-firmware/install
$(INSTALL_DIR) $(1)/lib/firmware/ath6k $(INSTALL_DIR) $(1)/lib/firmware/ath6k
$(CP) \ $(CP) \
@@ -21,7 +21,7 @@ define Package/ath6k-firmware/install
endef endef
$(eval $(call BuildPackage,ath6k-firmware)) $(eval $(call BuildPackage,ath6k-firmware))
Package/ath9k-htc-firmware = $(call Package/firmware-default,AR9271/AR7010 firmware,,LICENCE.open-ath9k-htc-firmware) Package/ath9k-htc-firmware = $(call Package/firmware-default,Firmware for Qualcomm/Atheros AR9271/AR7010 USB WiFi adapters,,LICENCE.open-ath9k-htc-firmware)
define Package/ath9k-htc-firmware/install define Package/ath9k-htc-firmware/install
$(INSTALL_DIR) $(1)/lib/firmware/ath9k_htc $(INSTALL_DIR) $(1)/lib/firmware/ath9k_htc
$(INSTALL_DATA) \ $(INSTALL_DATA) \
@@ -31,14 +31,14 @@ define Package/ath9k-htc-firmware/install
endef endef
$(eval $(call BuildPackage,ath9k-htc-firmware)) $(eval $(call BuildPackage,ath9k-htc-firmware))
Package/carl9170-firmware = $(call Package/firmware-default,AR9170 firmware,,carl9170fw/GPL) Package/carl9170-firmware = $(call Package/firmware-default,Firmware for Qualcomm/Atheros AR9170 USB WiFi adapters,,carl9170fw/GPL)
define Package/carl9170-firmware/install define Package/carl9170-firmware/install
$(INSTALL_DIR) $(1)/lib/firmware $(INSTALL_DIR) $(1)/lib/firmware
$(INSTALL_DATA) $(PKG_BUILD_DIR)/carl9170-1.fw $(1)/lib/firmware $(INSTALL_DATA) $(PKG_BUILD_DIR)/carl9170-1.fw $(1)/lib/firmware
endef endef
$(eval $(call BuildPackage,carl9170-firmware)) $(eval $(call BuildPackage,carl9170-firmware))
Package/wil6210-firmware = $(call Package/firmware-default,wil6210 firmware) Package/wil6210-firmware = $(call Package/firmware-default,Firmware for Qualcomm Atheros Wilocity 60GHz band 802.11ad WiGig ICs)
define Package/wil6210-firmware/install define Package/wil6210-firmware/install
$(INSTALL_DIR) $(1)/lib/firmware $(INSTALL_DIR) $(1)/lib/firmware
$(INSTALL_DATA) $(PKG_BUILD_DIR)/wil6210.fw $(1)/lib/firmware $(INSTALL_DATA) $(PKG_BUILD_DIR)/wil6210.fw $(1)/lib/firmware
+16
View File
@@ -115,6 +115,22 @@ endef
$(eval $(call KernelPackage,industrialio-triggered-buffer)) $(eval $(call KernelPackage,industrialio-triggered-buffer))
define KernelPackage/iio-ad7405
TITLE:=Analog Devices AD7405 ADC Driver
KCONFIG:=CONFIG_AD7405
FILES:=$(LINUX_DIR)/drivers/iio/adc/ad7405.ko
AUTOLOAD:=$(call AutoLoad,56,ad7405)
$(call AddDepends/iio, +kmod-industrialio-backend)
endef
define KernelPackage/iio-ad7405/description
This driver adds support for Analog Devices AD7405, ADUM7701, ADUM7702,
ADUM7703 ADCs.
endef
$(eval $(call KernelPackage,iio-ad7405))
define KernelPackage/iio-ad799x define KernelPackage/iio-ad799x
DEPENDS:=+kmod-i2c-core +kmod-industrialio-triggered-buffer DEPENDS:=+kmod-i2c-core +kmod-industrialio-triggered-buffer
TITLE:=Analog Devices AD799x ADC driver TITLE:=Analog Devices AD799x ADC driver
+3 -3
View File
@@ -5,9 +5,9 @@ PKG_RELEASE=1
PKG_SOURCE_PROTO:=git PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/uclient.git PKG_SOURCE_URL=$(PROJECT_GIT)/project/uclient.git
PKG_MIRROR_HASH:=2cf67278aae713d6087b74fd29caa75e79e83023ee0ad91048f00b378f7e29c9 PKG_MIRROR_HASH:=35c51545ee092b816249799d283838ffba904292636c495818d864c56b554fe0
PKG_SOURCE_DATE:=2026-02-20 PKG_SOURCE_DATE:=2026-06-07
PKG_SOURCE_VERSION:=7a0aa2e4afb4993b7985094aa6847b9fcb04fae8 PKG_SOURCE_VERSION:=daad21fa2c17cae54d37149bf27bb3dd78e50a3f
CMAKE_INSTALL:=1 CMAKE_INSTALL:=1
PKG_BUILD_DEPENDS:=ustream-ssl PKG_BUILD_DEPENDS:=ustream-ssl
+19 -5
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@@ -183,8 +183,14 @@ int mtd_erase_block(int fd, int offset)
int mtd_write_buffer(int fd, const char *buf, int offset, int length) int mtd_write_buffer(int fd, const char *buf, int offset, int length)
{ {
lseek(fd, offset, SEEK_SET); if (lseek(fd, offset, SEEK_SET) != offset) {
write(fd, buf, length); fprintf(stderr, "Failed to seek MTD device: %s\n", strerror(errno));
return -1;
}
if (write(fd, buf, length) != length) {
fprintf(stderr, "Short write to MTD device\n");
return -1;
}
return 0; return 0;
} }
@@ -263,6 +269,11 @@ static int mtd_check(const char *mtd)
if (!buf) if (!buf)
buf = malloc(erasesize); buf = malloc(erasesize);
if (!buf) {
close(fd);
free(str);
return 0;
}
close(fd); close(fd);
mtd = next; mtd = next;
@@ -356,7 +367,7 @@ mtd_dump(const char *mtd, int part_offset, int size)
{ {
int ret = 0, offset = 0; int ret = 0, offset = 0;
int fd; int fd;
char *buf; char *buf = NULL;
if (quiet < 2) if (quiet < 2)
fprintf(stderr, "Dumping %s ...\n", mtd); fprintf(stderr, "Dumping %s ...\n", mtd);
@@ -374,8 +385,10 @@ mtd_dump(const char *mtd, int part_offset, int size)
lseek(fd, part_offset, SEEK_SET); lseek(fd, part_offset, SEEK_SET);
buf = malloc(erasesize); buf = malloc(erasesize);
if (!buf) if (!buf) {
return -1; ret = -1;
goto out;
}
do { do {
int len = (size > erasesize) ? (erasesize) : (size); int len = (size > erasesize) ? (erasesize) : (size);
@@ -399,6 +412,7 @@ mtd_dump(const char *mtd, int part_offset, int size)
} while (size > 0); } while (size > 0);
out: out:
free(buf);
close(fd); close(fd);
return ret; return ret;
} }
@@ -24,13 +24,17 @@
cal_art_1000: calibration@1000 { cal_art_1000: calibration@1000 {
reg = <0x1000 0xeb8>; reg = <0x1000 0xeb8>;
}; };
macaddr_art_1000: macaddr@1000 {
reg = <0x1000 0x6>;
};
}; };
&pcie { &pcie {
wifi: wifi@0,0 { wifi: wifi@0,0 {
compatible = "pci168c,002a"; compatible = "pci168c,002a";
reg = <0x0000 0 0 0 0>; reg = <0x0000 0 0 0 0>;
nvmem-cells = <&cal_art_1000>; nvmem-cells = <&cal_art_1000>, <&macaddr_art_1000>;
nvmem-cell-names = "calibration"; nvmem-cell-names = "calibration", "mac-address";
}; };
}; };
@@ -14,7 +14,7 @@
led-failsafe = &led_globe; led-failsafe = &led_globe;
led-running = &led_globe; led-running = &led_globe;
led-upgrade = &led_globe; led-upgrade = &led_globe;
label-mac-device = &wifi; label-mac-device = &ath9k;
}; };
leds { leds {
@@ -37,6 +37,10 @@
cal_art_1000: calibration@1000 { cal_art_1000: calibration@1000 {
reg = <0x1000 0x200>; reg = <0x1000 0x200>;
}; };
macaddr_art_1000: macaddr@1000 {
reg = <0x1000 0x6>;
};
}; };
&usb_phy { &usb_phy {
@@ -48,10 +52,10 @@
}; };
&pcie { &pcie {
wifi: wifi@0,0 { ath9k: wifi@0,0 {
compatible = "pci168c,002b"; compatible = "pci168c,002b";
reg = <0x0000 0 0 0 0>; reg = <0x0000 0 0 0 0>;
nvmem-cells = <&cal_art_1000>; nvmem-cells = <&cal_art_1000>, <&macaddr_art_1000>;
nvmem-cell-names = "calibration"; nvmem-cell-names = "calibration", "mac-address";
}; };
}; };
@@ -17,13 +17,17 @@
cal_art_1000: calibration@1000 { cal_art_1000: calibration@1000 {
reg = <0x1000 0xeb8>; reg = <0x1000 0xeb8>;
}; };
macaddr_art_1000: macaddr@1000 {
reg = <0x1000 0x6>;
};
}; };
&pcie { &pcie {
wifi: wifi@0,0 { wifi: wifi@0,0 {
compatible = "pci168c,002a"; compatible = "pci168c,002a";
reg = <0x0000 0 0 0 0>; reg = <0x0000 0 0 0 0>;
nvmem-cells = <&cal_art_1000>; nvmem-cells = <&cal_art_1000>, <&macaddr_art_1000>;
nvmem-cell-names = "calibration"; nvmem-cell-names = "calibration", "mac-address";
}; };
}; };
@@ -17,13 +17,17 @@
cal_art_1000: calibration@1000 { cal_art_1000: calibration@1000 {
reg = <0x1000 0xeb8>; reg = <0x1000 0xeb8>;
}; };
macaddr_art_1000: macaddr@1000 {
reg = <0x1000 0x6>;
};
}; };
&pcie { &pcie {
wifi: wifi@0,0 { wifi: wifi@0,0 {
compatible = "pci168c,002a"; compatible = "pci168c,002a";
reg = <0x0000 0 0 0 0>; reg = <0x0000 0 0 0 0>;
nvmem-cells = <&cal_art_1000>; nvmem-cells = <&cal_art_1000>, <&macaddr_art_1000>;
nvmem-cell-names = "calibration"; nvmem-cell-names = "calibration", "mac-address";
}; };
}; };
@@ -17,13 +17,17 @@
cal_art_1000: calibration@1000 { cal_art_1000: calibration@1000 {
reg = <0x1000 0x3d8>; reg = <0x1000 0x3d8>;
}; };
macaddr_art_1000: macaddr@1000 {
reg = <0x1000 0x6>;
};
}; };
&pcie { &pcie {
wifi: wifi@0,0 { wifi: wifi@0,0 {
compatible = "pci168c,002e"; compatible = "pci168c,002e";
reg = <0x0000 0 0 0 0>; reg = <0x0000 0 0 0 0>;
nvmem-cells = <&cal_art_1000>; nvmem-cells = <&cal_art_1000>, <&macaddr_art_1000>;
nvmem-cell-names = "calibration"; nvmem-cell-names = "calibration", "mac-address";
}; };
}; };
@@ -13,13 +13,17 @@
cal_art_1000: calibration@1000 { cal_art_1000: calibration@1000 {
reg = <0x1000 0xeb8>; reg = <0x1000 0xeb8>;
}; };
macaddr_art_1000: macaddr@1000 {
reg = <0x1000 0x6>;
};
}; };
&pcie { &pcie {
wifi: wifi@0,0 { wifi: wifi@0,0 {
compatible = "pci168c,002a"; compatible = "pci168c,002a";
reg = <0x0000 0 0 0 0>; reg = <0x0000 0 0 0 0>;
nvmem-cells = <&cal_art_1000>; nvmem-cells = <&cal_art_1000>, <&macaddr_art_1000>;
nvmem-cell-names = "calibration"; nvmem-cell-names = "calibration", "mac-address";
}; };
}; };
@@ -17,13 +17,17 @@
cal_art_1000: calibration@1000 { cal_art_1000: calibration@1000 {
reg = <0x1000 0xeb8>; reg = <0x1000 0xeb8>;
}; };
macaddr_art_1000: macaddr@1000 {
reg = <0x1000 0x6>;
};
}; };
&pcie { &pcie {
wifi: wifi@0,0 { wifi: wifi@0,0 {
compatible = "pci168c,002a"; compatible = "pci168c,002a";
reg = <0x0000 0 0 0 0>; reg = <0x0000 0 0 0 0>;
nvmem-cells = <&cal_art_1000>; nvmem-cells = <&cal_art_1000>, <&macaddr_art_1000>;
nvmem-cell-names = "calibration"; nvmem-cell-names = "calibration", "mac-address";
}; };
}; };
@@ -17,13 +17,17 @@
cal_art_1000: calibration@1000 { cal_art_1000: calibration@1000 {
reg = <0x1000 0xeb8>; reg = <0x1000 0xeb8>;
}; };
macaddr_art_1000: macaddr@1000 {
reg = <0x1000 0x6>;
};
}; };
&pcie { &pcie {
wifi: wifi@0,0 { wifi: wifi@0,0 {
compatible = "pci168c,002a"; compatible = "pci168c,002a";
reg = <0x0000 0 0 0 0>; reg = <0x0000 0 0 0 0>;
nvmem-cells = <&cal_art_1000>; nvmem-cells = <&cal_art_1000>, <&macaddr_art_1000>;
nvmem-cell-names = "calibration"; nvmem-cell-names = "calibration", "mac-address";
}; };
}; };
@@ -25,13 +25,17 @@
cal_art_1000: calibration@1000 { cal_art_1000: calibration@1000 {
reg = <0x1000 0xeb8>; reg = <0x1000 0xeb8>;
}; };
macaddr_art_1000: macaddr@1000 {
reg = <0x1000 0x6>;
};
}; };
&pcie { &pcie {
wifi: wifi@0,0 { wifi: wifi@0,0 {
compatible = "pci168c,002a"; compatible = "pci168c,002a";
reg = <0x0000 0 0 0 0>; reg = <0x0000 0 0 0 0>;
nvmem-cells = <&cal_art_1000>; nvmem-cells = <&cal_art_1000>, <&macaddr_art_1000>;
nvmem-cell-names = "calibration"; nvmem-cell-names = "calibration", "mac-address";
}; };
}; };
@@ -118,6 +118,16 @@
label = "art"; label = "art";
reg = <0x7f0000 0x10000>; reg = <0x7f0000 0x10000>;
read-only; read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
cal_art_1000: calibration@1000 {
reg = <0x1000 0x440>;
};
};
}; };
}; };
}; };
@@ -129,8 +139,8 @@
ath9k: wifi@0,0 { ath9k: wifi@0,0 {
compatible = "pci168c,0030"; compatible = "pci168c,0030";
reg = <0x0000 0 0 0 0>; reg = <0x0000 0 0 0 0>;
qca,no-eeprom; nvmem-cells = <&cal_art_1000>;
/* wifi MAC is stored in nvram */ nvmem-cell-names = "calibration";
}; };
}; };
@@ -25,10 +25,6 @@ case "$FIRMWARE" in
avm,fritz300e) avm,fritz300e)
caldata_extract_reverse "urloader" 0x1541 0x440 caldata_extract_reverse "urloader" 0x1541 0x440
;; ;;
wd,mynet-wifi-rangeextender)
caldata_extract "art" 0x1000 0x440
ath9k_patch_mac $(nvram get wl0_hwaddr)
;;
*) *)
caldata_die "board $board is not supported yet" caldata_die "board $board is not supported yet"
;; ;;
@@ -110,6 +110,9 @@ case "$board" in
[ "$PHYNBR" -eq 1 ] && \ [ "$PHYNBR" -eq 1 ] && \
macaddr_add $base_mac 1 > /sys${DEVPATH}/macaddress macaddr_add $base_mac 1 > /sys${DEVPATH}/macaddress
;; ;;
wd,mynet-wifi-rangeextender)
echo $(nvram get wl0_hwaddr) > /sys${DEVPATH}/macaddress
;;
wd,mynet-n600|\ wd,mynet-n600|\
wd,mynet-n750) wd,mynet-n750)
[ "$PHYNBR" -eq 0 ] && \ [ "$PHYNBR" -eq 0 ] && \
@@ -314,6 +314,7 @@
phy1: ethernet-phy@1 { phy1: ethernet-phy@1 {
reg = <1>; reg = <1>;
qca,disable-hibernation-mode;
}; };
phy2: ethernet-phy@2 { phy2: ethernet-phy@2 {
@@ -38,7 +38,6 @@ CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y
CONFIG_ARM_AMBA=y CONFIG_ARM_AMBA=y
CONFIG_ARM_ARCH_TIMER=y CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
# CONFIG_ARM_DMA350 is not set
CONFIG_ARM_GIC=y CONFIG_ARM_GIC=y
CONFIG_ARM_GIC_ITS_PARENT=y CONFIG_ARM_GIC_ITS_PARENT=y
CONFIG_ARM_GIC_V3=y CONFIG_ARM_GIC_V3=y
@@ -255,7 +254,6 @@ CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_TICK_CPU_ACCOUNTING=y CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y CONFIG_TIMER_PROBE=y
CONFIG_TOOLS_SUPPORT_RELR=y
CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y
CONFIG_TREE_RCU=y CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y CONFIG_TREE_SRCU=y
@@ -0,0 +1,30 @@
From 65d6d1fa50933a056305ba3f743dfb9d74cead39 Mon Sep 17 00:00:00 2001
From: Robert Marko <robert.marko@sartura.hr>
Date: Fri, 15 May 2026 14:05:40 +0200
Subject: [PATCH] net: phy: micrel: use dev_err_probe()
Currently, during probe defferal the driver will print multiple times:
mscc-miim e20101a8.mdio: Cannot register MDIO bus (-517)
So, lets silence that by using the dev_err_probe() for printing the probe
error as it handles probe defferal.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/20260515120608.706361-1-robert.marko@sartura.hr
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/mdio/mdio-mscc-miim.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/mdio/mdio-mscc-miim.c
+++ b/drivers/net/mdio/mdio-mscc-miim.c
@@ -330,7 +330,7 @@ static int mscc_miim_probe(struct platfo
ret = of_mdiobus_register(bus, np);
if (ret < 0) {
- dev_err(dev, "Cannot register MDIO bus (%d)\n", ret);
+ dev_err_probe(dev, ret, "Cannot register MDIO bus\n");
goto out_disable_clk;
}
@@ -1,12 +1,14 @@
From 2d275ce15f57f3b61fdb06d65b7d159e9581203b Mon Sep 17 00:00:00 2001 From 7db0b82754140c76774ce01f6110ff0d1c0f2b67 Mon Sep 17 00:00:00 2001
From: Robert Marko <robert.marko@sartura.hr> From: Robert Marko <robert.marko@sartura.hr>
Date: Tue, 5 Nov 2024 17:57:37 +0100 Date: Thu, 2 Apr 2026 14:34:24 +0200
Subject: [PATCH] hwmon: sparx5: make it selectable for ARCH_MICROCHIP Subject: [PATCH] hwmon: (sparx5) Make it selectable for ARCH_LAN969X
LAN969x uses the same sensor and driver, so make it selectable for LAN969x uses the same sensor and driver, so make it selectable for
ARCH_MICROCHIP. ARCH_LAN969X.
Signed-off-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Link: https://lore.kernel.org/r/20260402123436.47856-1-robert.marko@sartura.hr
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
--- ---
drivers/hwmon/Kconfig | 2 +- drivers/hwmon/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-) 1 file changed, 1 insertion(+), 1 deletion(-)
@@ -18,7 +20,7 @@ Signed-off-by: Robert Marko <robert.marko@sartura.hr>
config SENSORS_SPARX5 config SENSORS_SPARX5
tristate "Sparx5 SoC temperature sensor" tristate "Sparx5 SoC temperature sensor"
- depends on ARCH_SPARX5 || COMPILE_TEST - depends on ARCH_SPARX5 || COMPILE_TEST
+ depends on ARCH_MICROCHIP || COMPILE_TEST + depends on ARCH_SPARX5 || ARCH_LAN969X || COMPILE_TEST
help help
If you say yes here you get support for temperature monitoring If you say yes here you get support for temperature monitoring
with the Microchip Sparx5 SoC. with the Microchip Sparx5 SoC.
@@ -1,6 +1,6 @@
From 7ec8c81eae48ceb1e07a00be65716769827b747e Mon Sep 17 00:00:00 2001 From 0b9467918f64d573f491089f7132c0f77ac62aec Mon Sep 17 00:00:00 2001
From: Horatiu Vultur <horatiu.vultur@microchip.com> From: Horatiu Vultur <horatiu.vultur@microchip.com>
Date: Wed, 3 Jan 2024 11:10:44 +0100 Date: Fri, 15 May 2026 13:59:08 +0200
Subject: [PATCH] nvmem: lan9662-otp: add support for LAN969x Subject: [PATCH] nvmem: lan9662-otp: add support for LAN969x
Microchip LAN969x provides OTP with the same control logic, only the size Microchip LAN969x provides OTP with the same control logic, only the size
@@ -8,6 +8,7 @@ differs as LAN969x has 16KB of OTP instead of 8KB like on LAN966x.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Srinivas Kandagatla <srini@kernel.org>
--- ---
drivers/nvmem/Kconfig | 2 +- drivers/nvmem/Kconfig | 2 +-
drivers/nvmem/lan9662-otpc.c | 12 +++++++++--- drivers/nvmem/lan9662-otpc.c | 12 +++++++++---
@@ -1,11 +1,14 @@
From 477b5c9af4bb7c68bd4ec4807c94dac5a90dcd2f Mon Sep 17 00:00:00 2001 From 8071815790141d3f05e32b972a6c79fdbbb88cfa Mon Sep 17 00:00:00 2001
From: Robert Marko <robert.marko@sartura.hr> From: Robert Marko <robert.marko@sartura.hr>
Date: Fri, 24 Oct 2025 18:46:46 +0200 Date: Fri, 15 May 2026 13:59:09 +0200
Subject: [PATCH 124/124] arm64: dts: microchip: lan969x: add OTP node Subject: [PATCH] arm64: dts: microchip: lan969x: add OTP node
Add the required OTP on LAN969x. Add the required OTP on LAN969x.
Signed-off-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Link: https://lore.kernel.org/r/20260515115954.701155-3-robimarko@gmail.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
--- ---
arch/arm64/boot/dts/microchip/lan9691.dtsi | 5 +++++ arch/arm64/boot/dts/microchip/lan9691.dtsi | 5 +++++
1 file changed, 5 insertions(+) 1 file changed, 5 insertions(+)
@@ -12,7 +12,7 @@ Signed-off-by: Robert Marko <robert.marko@sartura.hr>
--- a/arch/arm64/boot/dts/microchip/lan9691.dtsi --- a/arch/arm64/boot/dts/microchip/lan9691.dtsi
+++ b/arch/arm64/boot/dts/microchip/lan9691.dtsi +++ b/arch/arm64/boot/dts/microchip/lan9691.dtsi
@@ -391,6 +391,36 @@ @@ -396,6 +396,36 @@
clock-names = "cpu", "ddr", "sys"; clock-names = "cpu", "ddr", "sys";
}; };
@@ -12,7 +12,7 @@ Signed-off-by: Robert Marko <robert.marko@sartura.hr>
--- a/arch/arm64/boot/dts/microchip/lan9691.dtsi --- a/arch/arm64/boot/dts/microchip/lan9691.dtsi
+++ b/arch/arm64/boot/dts/microchip/lan9691.dtsi +++ b/arch/arm64/boot/dts/microchip/lan9691.dtsi
@@ -406,6 +406,28 @@ @@ -411,6 +411,28 @@
status = "disabled"; status = "disabled";
}; };
@@ -93,6 +93,7 @@ realtek_setup_macs()
plasmacloud,psx8|\ plasmacloud,psx8|\
plasmacloud,psx10|\ plasmacloud,psx10|\
plasmacloud,psx28|\ plasmacloud,psx28|\
sirivision,sr-st3408f|\
zyxel,gs1920-24hp-v2) zyxel,gs1920-24hp-v2)
lan_mac="$(get_mac_label)" lan_mac="$(get_mac_label)"
;; ;;
@@ -0,0 +1,261 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/dts-v1/;
#include "rtl930x.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/phy/phy.h>
/ {
compatible = "sirivision,sr-st3408f", "realtek,rtl9303-soc";
model = "Sirivision SR-ST3408F";
memory@0 {
device_type = "memory";
reg = <0x00000000 0x10000000>, /* first 256 MiB */
<0x20000000 0x10000000>; /* remaining 256 MiB */
};
chosen {
stdout-path = "serial0:115200n8";
};
aliases {
led-boot = &led_sys;
led-failsafe = &led_sys;
led-running = &led_sys;
led-upgrade = &led_sys;
label-mac-device = &ethernet0;
};
keys {
compatible = "gpio-keys";
button-reset {
label = "reset";
gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
led_sys: led-0 {
gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
};
};
led_set {
compatible = "realtek,rtl9300-leds";
active-low;
led_set0 = <
(RTL93XX_LED_SET_10G | RTL93XX_LED_SET_LINK)
(RTL93XX_LED_SET_10G | RTL93XX_LED_SET_5G | RTL93XX_LED_SET_2P5G |
RTL93XX_LED_SET_1G | RTL93XX_LED_SET_100M | RTL93XX_LED_SET_10M |
RTL93XX_LED_SET_LINK | RTL93XX_LED_SET_ACT)
>;
led_set1 = <
(RTL93XX_LED_SET_NONE) /* odd outputs are not connected */
(RTL93XX_LED_SET_10G | RTL93XX_LED_SET_5G | RTL93XX_LED_SET_2P5G |
RTL93XX_LED_SET_1G | RTL93XX_LED_SET_100M | RTL93XX_LED_SET_10M |
RTL93XX_LED_SET_LINK | RTL93XX_LED_SET_ACT)
>;
};
sfp0: sfp-p5 {
compatible = "sff,sfp";
i2c-bus = <&i2c4>;
tx-disable-gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpio1 13 GPIO_ACTIVE_LOW>;
los-gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <2000>;
#thermal-sensor-cells = <0>;
};
sfp1: sfp-p6 {
compatible = "sff,sfp";
i2c-bus = <&i2c5>;
tx-disable-gpio = <&gpio1 21 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpio1 22 GPIO_ACTIVE_LOW>;
los-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <2000>;
#thermal-sensor-cells = <0>;
};
sfp2: sfp-p7 {
compatible = "sff,sfp";
i2c-bus = <&i2c6>;
tx-disable-gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpio1 25 GPIO_ACTIVE_LOW>;
los-gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <2000>;
#thermal-sensor-cells = <0>;
};
sfp3: sfp-p8 {
compatible = "sff,sfp";
i2c-bus = <&i2c7>;
tx-disable-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpio1 28 GPIO_ACTIVE_LOW>;
los-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <2000>;
#thermal-sensor-cells = <0>;
};
};
&i2c_mst1 {
status = "okay";
i2c4: i2c@4 { reg = <4>; };
i2c5: i2c@5 { reg = <5>; };
i2c6: i2c@6 { reg = <6>; };
i2c7: i2c@7 { reg = <7>; };
};
&mdio_aux {
status = "okay";
gpio1: gpio@0 {
compatible = "realtek,rtl8231";
reg = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&gpio1 0 0 37>;
led-controller {
compatible = "realtek,rtl8231-leds";
status = "disabled";
};
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0xe0000>;
read-only;
};
partition@e0000 {
label = "u-boot-env";
reg = <0xe0000 0x10000>;
nvmem-layout {
compatible = "u-boot,env";
macaddr_ubootenv_ethaddr: ethaddr {
#nvmem-cell-cells = <1>;
};
};
};
partition@f0000 {
label = "u-boot-env2";
reg = <0xf0000 0x10000>;
read-only;
};
partition@100000 {
label = "jffs";
reg = <0x100000 0x100000>;
};
partition@200000 {
label = "jffs2";
reg = <0x200000 0x100000>;
};
partition@300000 {
label = "firmware";
reg = <0x300000 0xd00000>;
compatible = "openwrt,uimage", "denx,uimage";
openwrt,ih-magic = <0x93000000>;
};
};
};
};
/* serdes for 10G PHYs have TX polarity inverted */
&serdes2 { tx-polarity = <PHY_POL_INVERT>; };
&serdes3 { tx-polarity = <PHY_POL_INVERT>; };
&serdes4 { tx-polarity = <PHY_POL_INVERT>; };
&serdes5 { tx-polarity = <PHY_POL_INVERT>; };
&mdio_bus0 {
PHY_C45(0, 0)
PHY_C45(8, 1)
PHY_C45(16, 2)
PHY_C45(20, 3)
};
&ethernet0 {
nvmem-cells = <&macaddr_ubootenv_ethaddr 0>;
nvmem-cell-names = "mac-address";
};
&switch0 {
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
/* RJ45 ports, lan1-4 */
SWITCH_PORT_LED(0, 1, 2, 0, 0, usxgmii)
SWITCH_PORT_LED(8, 2, 3, 0, 0, usxgmii)
SWITCH_PORT_LED(16, 3, 4, 0, 0, usxgmii)
SWITCH_PORT_LED(20, 4, 5, 0, 0, usxgmii)
/* SFP+ ports, lan5-8 */
SWITCH_PORT_SFP(24, 5, 6, 1, 0)
SWITCH_PORT_SFP(25, 6, 7, 1, 1)
SWITCH_PORT_SFP(26, 7, 8, 1, 2)
SWITCH_PORT_SFP(27, 8, 9, 1, 3)
/* CPU port */
port@28 {
ethernet = <&ethernet0>;
reg = <28>;
phy-mode = "internal";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
&thermal_zones {
sfp-thermal {
polling-delay-passive = <10000>;
polling-delay = <10000>;
thermal-sensors = <&sfp0>, <&sfp1>, <&sfp2>, <&sfp3>;
trips {
sfp-crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
};
};
+11
View File
@@ -12,6 +12,17 @@ define Device/d-link_dgs-1250-28x
endef endef
TARGET_DEVICES += d-link_dgs-1250-28x TARGET_DEVICES += d-link_dgs-1250-28x
define Device/sirivision_sr-st3408f
SOC := rtl9303
UIMAGE_MAGIC := 0x93000000
DEVICE_VENDOR := Sirivision
DEVICE_MODEL := SR-ST3408F
DEVICE_PACKAGES := kmod-phy-realtek rtl8261n-firmware
IMAGE_SIZE := 13312k
$(Device/kernel-lzma)
endef
TARGET_DEVICES += sirivision_sr-st3408f
define Device/hasivo_f1100w-4sx-4xgt-common define Device/hasivo_f1100w-4sx-4xgt-common
SOC := rtl9303 SOC := rtl9303
DEVICE_VENDOR := Hasivo DEVICE_VENDOR := Hasivo
+1
View File
@@ -12,6 +12,7 @@ SUBTARGETS:=stm32mp1
CPU_TYPE:= CPU_TYPE:=
KERNEL_PATCHVER:=6.12 KERNEL_PATCHVER:=6.12
KERNEL_TESTING_PATCHVER:=6.18
include $(INCLUDE_DIR)/target.mk include $(INCLUDE_DIR)/target.mk
+53
View File
@@ -128,6 +128,34 @@ endef
$(eval $(call KernelPackage,spi-stm32)) $(eval $(call KernelPackage,spi-stm32))
define KernelPackage/spi-stm32-ospi
SUBMENU=$(SPI_MENU)
TITLE:=STMicroelectronics STM32 OCTO SPI controller
DEPENDS:=@LINUX_6_18 \
@TARGET_stm32
KCONFIG:=CONFIG_SPI_STM32_OSPI \
CONFIG_SPI_MEM=y
FILES:=$(LINUX_DIR)/drivers/spi/spi-stm32-ospi.ko
AUTOLOAD:=$(call AutoProbe,spi-stm32-ospi)
endef
$(eval $(call KernelPackage,spi-stm32-ospi))
define KernelPackage/spi-stm32-qspi
SUBMENU=$(SPI_MENU)
TITLE:=STMicroelectronics STM32 QUAD SPI controller
DEPENDS:=@LINUX_6_18 \
@TARGET_stm32
KCONFIG:=CONFIG_SPI_STM32_QSPI \
CONFIG_SPI_MEM=y
FILES:=$(LINUX_DIR)/drivers/spi/spi-stm32-qspi.ko
AUTOLOAD:=$(call AutoProbe,spi-stm32-qspi)
endef
$(eval $(call KernelPackage,spi-stm32-qspi))
define KernelPackage/stm32-adc define KernelPackage/stm32-adc
TITLE:=STM32 ADC TITLE:=STM32 ADC
KCONFIG:=CONFIG_STM32_ADC_CORE \ KCONFIG:=CONFIG_STM32_ADC_CORE \
@@ -165,6 +193,17 @@ endef
$(eval $(call KernelPackage,stm32-cryp)) $(eval $(call KernelPackage,stm32-cryp))
define KernelPackage/stm32-csi
TITLE:=STM32 Camera Serial Interface (CSI) support
KCONFIG:=CONFIG_VIDEO_STM32_CSI
FILES:=$(LINUX_DIR)/drivers/media/platform/st/stm32/stm32-csi.ko
AUTOLOAD:=$(call AutoProbe,stm32-csi)
$(call AddDepends/video,@LINUX_6_18 @TARGET_stm32 +kmod-video-async +kmod-video-fwnode)
endef
$(eval $(call KernelPackage,stm32-csi))
define KernelPackage/stm32-dac define KernelPackage/stm32-dac
TITLE:=STM32 DAC TITLE:=STM32 DAC
DEPENDS:=@TARGET_stm32 DEPENDS:=@TARGET_stm32
@@ -240,6 +279,20 @@ endef
$(eval $(call KernelPackage,stm32-hash)) $(eval $(call KernelPackage,stm32-hash))
define KernelPackage/stm32-omm
SUBMENU:=$(OTHER_MENU)
TITLE:=STM32 Octo Memory Manager
DEPENDS:=@LINUX_6_18 \
@TARGET_stm32 \
+kmod-spi-stm32-ospi
KCONFIG:=CONFIG_STM32_OMM
FILES:=$(LINUX_DIR)/drivers/memory/stm32_omm.ko
AUTOLOAD:=$(call AutoProbe,stm32_omm)
endef
$(eval $(call KernelPackage,stm32-omm))
define KernelPackage/stm32-timers define KernelPackage/stm32-timers
TITLE:=STM32 Timers TITLE:=STM32 Timers
DEPENDS:=@TARGET_stm32 +kmod-mfd DEPENDS:=@TARGET_stm32 +kmod-mfd
@@ -68,7 +68,7 @@ Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
+ dev_err(dev, "fail to disable phy-supply\n"); + dev_err(dev, "fail to disable phy-supply\n");
+ } + }
+ +
+ return 0; + return ret;
+} +}
+ +
+ +
@@ -0,0 +1,107 @@
From 7bfe3404a02923ca3858abf56b18a098b4be33b2 Mon Sep 17 00:00:00 2001
From: Christophe Roullier <christophe.roullier@st.com>
Date: Wed, 10 Nov 2021 17:39:40 +0100
Subject: [PATCH] net: ethernet: stmmac: stm32: support the phy-supply
regulator binding
Configure the phy regulator if defined by the "phy-supply" DT phandle.
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
---
.../net/ethernet/stmicro/stmmac/dwmac-stm32.c | 51 ++++++++++++++++++-
1 file changed, 50 insertions(+), 1 deletion(-)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
@@ -14,6 +14,7 @@
#include <linux/of_net.h>
#include <linux/phy.h>
#include <linux/platform_device.h>
+#include <linux/regulator/consumer.h>
#include <linux/pm_wakeirq.h>
#include <linux/regmap.h>
#include <linux/slab.h>
@@ -103,6 +104,7 @@ struct stm32_dwmac {
u32 mode_reg; /* MAC glue-logic mode register */
u32 mode_mask;
struct regmap *regmap;
+ struct regulator *regulator;
u32 speed;
const struct stm32_ops *ops;
struct device *dev;
@@ -433,6 +435,16 @@ static int stm32_dwmac_parse_data(struct
}
}
+ dwmac->regulator = devm_regulator_get_optional(dev, "phy");
+ if (IS_ERR(dwmac->regulator)) {
+ if (PTR_ERR(dwmac->regulator) == -EPROBE_DEFER) {
+ dev_dbg(dev, "phy regulator is not available yet, deferred probing\n");
+ return -EPROBE_DEFER;
+ }
+ dev_dbg(dev, "no regulator found\n");
+ dwmac->regulator = NULL;
+ }
+
return err;
}
@@ -518,6 +530,28 @@ static int stm32_dwmac_resume(struct dev
return stm32_dwmac_init(priv->plat);
}
+static int phy_power_on(struct stm32_dwmac *bsp_priv, bool enable)
+{
+ int ret;
+ struct device *dev = bsp_priv->dev;
+
+ if (!bsp_priv->regulator)
+ return 0;
+
+ if (enable) {
+ ret = regulator_enable(bsp_priv->regulator);
+ if (ret)
+ dev_err(dev, "fail to enable phy-supply\n");
+ } else {
+ ret = regulator_disable(bsp_priv->regulator);
+ if (ret)
+ dev_err(dev, "fail to disable phy-supply\n");
+ }
+
+ return ret;
+}
+
+
static int stm32_dwmac_probe(struct platform_device *pdev)
{
struct plat_stmmacenet_data *plat_dat;
@@ -572,12 +606,19 @@ static int stm32_dwmac_probe(struct plat
goto err_clk_disable;
}
- ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
+ ret = phy_power_on(plat_dat->bsp_priv, true);
if (ret)
goto err_clk_disable_suspend;
+ ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
+ if (ret)
+ goto err_gmac_powerdown;
+
return 0;
+err_gmac_powerdown:
+ phy_power_on(plat_dat->bsp_priv, false);
+
err_clk_disable_suspend:
if (dwmac->ops->clk_rx_enable_in_suspend)
clk_disable_unprepare(dwmac->clk_rx);
@@ -610,6 +651,8 @@ static void stm32_dwmac_remove(struct pl
dev_pm_clear_wake_irq(&pdev->dev);
device_init_wakeup(&pdev->dev, false);
}
+
+ phy_power_on(priv->plat->bsp_priv, false);
}
static int stm32mp1_suspend(struct stm32_dwmac *dwmac)
@@ -0,0 +1,53 @@
From 63c84f846ec5b794a6c90a1c5813cdb0ae75daf6 Mon Sep 17 00:00:00 2001
From: Thomas Richard <thomas.richard@bootlin.com>
Date: Thu, 26 Sep 2024 16:48:52 +0200
Subject: [PATCH] ARM: dts: stm32: add ethernet2 for STM32MP135F-DK board
This patch is based on the stm32mp135f-dk devicetree from 6.6 ST kernel.
Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
---
arch/arm/boot/dts/st/stm32mp135f-dk.dts | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
--- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts
+++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts
@@ -20,6 +20,7 @@
aliases {
ethernet0 = &ethernet1;
+ ethernet1 = &ethernet2;
serial0 = &uart4;
serial1 = &usart1;
serial2 = &uart8;
@@ -208,6 +209,30 @@
};
};
+&ethernet2 {
+ status = "okay";
+ pinctrl-0 = <&eth2_rmii_pins_a>;
+ pinctrl-1 = <&eth2_rmii_sleep_pins_a>;
+ pinctrl-names = "default", "sleep";
+ phy-mode = "rmii";
+ phy-handle = <&phy0_eth2>;
+ st,ext-phyclk;
+ phy-supply = <&scmi_v3v3_sw>;
+
+ mdio1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ phy0_eth2: ethernet-phy@0 {
+ compatible = "ethernet-phy-id0007.c131";
+ reset-gpios = <&mcp23017 10 GPIO_ACTIVE_LOW>;
+ reg = <0>;
+ };
+ };
+};
+
+
+
&i2c1 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c1_pins_a>;
@@ -0,0 +1,26 @@
From 6e10eb83e20e3a31bef8580bb4197240b0a28888 Mon Sep 17 00:00:00 2001
From: Thomas Richard <thomas.richard@bootlin.com>
Date: Thu, 17 Oct 2024 19:51:32 +0200
Subject: [PATCH] ARM: dts: stm32: add missing eth_wake_irq interrupt for the
ethernet on STM32MP157
Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
---
arch/arm/boot/dts/st/stm32mp151.dtsi | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
--- a/arch/arm/boot/dts/st/stm32mp151.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp151.dtsi
@@ -1771,8 +1771,10 @@
compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
reg = <0x5800a000 0x2000>;
reg-names = "stmmaceth";
- interrupts-extended = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
+ interrupts-extended = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
+ <&exti 70 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq",
+ "eth_wake_irq";
clock-names = "stmmaceth",
"mac-clk-tx",
"mac-clk-rx",
+505
View File
@@ -0,0 +1,505 @@
CONFIG_ALIGNMENT_TRAP=y
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_FORCE_MAX_ORDER=12
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MULTIPLATFORM=y
CONFIG_ARCH_MULTI_V6_V7=y
CONFIG_ARCH_MULTI_V7=y
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_STACKWALK=y
CONFIG_ARCH_STM32=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_USES_CFI_GENERIC_LLVM_PASS=y
CONFIG_ARM=y
CONFIG_ARM_AMBA=y
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
CONFIG_ARM_CPU_SUSPEND=y
CONFIG_ARM_ERRATA_430973=y
CONFIG_ARM_ERRATA_643719=y
CONFIG_ARM_ERRATA_720789=y
CONFIG_ARM_ERRATA_754322=y
CONFIG_ARM_ERRATA_754327=y
CONFIG_ARM_ERRATA_764369=y
CONFIG_ARM_ERRATA_775420=y
CONFIG_ARM_ERRATA_798181=y
CONFIG_ARM_ERRATA_814220=y
CONFIG_ARM_GIC=y
CONFIG_ARM_HAS_GROUP_RELOCS=y
# CONFIG_ARM_HIGHBANK_CPUIDLE is not set
CONFIG_ARM_L1_CACHE_SHIFT=6
CONFIG_ARM_L1_CACHE_SHIFT_6=y
CONFIG_ARM_PAN=y
CONFIG_ARM_PATCH_IDIV=y
CONFIG_ARM_PATCH_PHYS_VIRT=y
# CONFIG_ARM_PL172_MPMC is not set
CONFIG_ARM_PSCI=y
CONFIG_ARM_PSCI_CPUIDLE=y
CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y
CONFIG_ARM_PSCI_FW=y
CONFIG_ARM_SCMI_CPUFREQ=y
# CONFIG_ARM_SCMI_DEBUG_COUNTERS is not set
CONFIG_ARM_SCMI_HAVE_MSG=y
CONFIG_ARM_SCMI_HAVE_SHMEM=y
CONFIG_ARM_SCMI_HAVE_TRANSPORT=y
CONFIG_ARM_SCMI_PERF_DOMAIN=y
# CONFIG_ARM_SCMI_POWER_CONTROL is not set
CONFIG_ARM_SCMI_POWER_DOMAIN=y
CONFIG_ARM_SCMI_PROTOCOL=y
CONFIG_ARM_SCMI_QUIRKS=y
# CONFIG_ARM_SCMI_RAW_MODE_SUPPORT is not set
CONFIG_ARM_SCMI_TRANSPORT_OPTEE=y
CONFIG_ARM_SCMI_TRANSPORT_SMC=y
# CONFIG_ARM_SCMI_TRANSPORT_SMC_ATOMIC_ENABLE is not set
CONFIG_ARM_SMCCC_SOC_ID=y
CONFIG_ARM_SMC_WATCHDOG=y
# CONFIG_ARM_SMMU is not set
CONFIG_ARM_THUMB=y
CONFIG_ARM_THUMBEE=y
CONFIG_ARM_UNWIND=y
CONFIG_ARM_VIRT_EXT=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_PM=y
CONFIG_BOUNCE=y
CONFIG_BUFFER_HEAD=y
# CONFIG_CACHE_L2X0 is not set
CONFIG_CC_HAVE_STACKPROTECTOR_TLS=y
CONFIG_CHR_DEV_SG=y
CONFIG_CLKSRC_MMIO=y
CONFIG_CLKSRC_STM32=y
CONFIG_CLK_ICST=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMA=y
CONFIG_CMA_ALIGNMENT=8
CONFIG_CMA_AREAS=7
# CONFIG_CMA_DEBUGFS is not set
CONFIG_CMA_SIZE_MBYTES=64
# CONFIG_CMA_SIZE_SEL_MAX is not set
CONFIG_CMA_SIZE_SEL_MBYTES=y
# CONFIG_CMA_SIZE_SEL_MIN is not set
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
# CONFIG_CMA_SYSFS is not set
CONFIG_CMDLINE_PARTITION=y
CONFIG_COMMON_CLK=y
CONFIG_COMMON_CLK_SCMI=y
CONFIG_COMMON_CLK_STM32MP=y
CONFIG_COMMON_CLK_STM32MP135=y
CONFIG_COMMON_CLK_STM32MP157=y
# CONFIG_COMMON_CLK_STM32MP215 is not set
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_CONTEXT_TRACKING=y
CONFIG_CONTEXT_TRACKING_IDLE=y
CONFIG_CONTIG_ALLOC=y
CONFIG_COREDUMP=y
CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
CONFIG_CPUFREQ_DT=y
CONFIG_CPUFREQ_DT_PLATDEV=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_32v7=y
CONFIG_CPU_ABRT_EV7=y
CONFIG_CPU_CACHE_V7=y
CONFIG_CPU_CACHE_VIPT=y
CONFIG_CPU_COPY_V6=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
CONFIG_CPU_FREQ_GOV_COMMON=y
# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_HAS_ASID=y
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
CONFIG_CPU_ISOLATION=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_MITIGATIONS=y
CONFIG_CPU_PABRT_V7=y
CONFIG_CPU_PM=y
CONFIG_CPU_RMAP=y
CONFIG_CPU_SPECTRE=y
CONFIG_CPU_THUMB_CAPABLE=y
CONFIG_CPU_TLB_V7=y
CONFIG_CPU_V7=y
CONFIG_CRC16=y
CONFIG_CRC32_ARCH=y
CONFIG_CROSS_MEMORY_ATTACH=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_LIB_BLAKE2S_ARCH=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_SHA1_ARCH=y
CONFIG_CRYPTO_LIB_SHA256_ARCH=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CRYPTO_SHA1=y
CONFIG_CURRENT_POINTER_IN_TPIDRURO=y
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DEBUG_ALIGN_RODATA=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
CONFIG_DEVFREQ_GOV_PASSIVE=y
# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set
# CONFIG_DEVFREQ_GOV_POWERSAVE is not set
CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
# CONFIG_DEVFREQ_GOV_USERSPACE is not set
CONFIG_DMADEVICES=y
CONFIG_DMA_CMA=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_NEED_SYNC=y
CONFIG_DMA_OF=y
CONFIG_DMA_OPS_HELPERS=y
CONFIG_DMA_SHARED_BUFFER=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
CONFIG_DNOTIFY=y
CONFIG_DTC=y
CONFIG_DT_IDLE_GENPD=y
CONFIG_DT_IDLE_STATES=y
CONFIG_DUMMY_CONSOLE=y
CONFIG_DWMAC_DWC_QOS_ETH=y
CONFIG_DWMAC_GENERIC=y
CONFIG_DWMAC_STM32=y
CONFIG_DW_DMAC=y
CONFIG_DW_DMAC_CORE=y
CONFIG_EDAC=y
CONFIG_EDAC_ATOMIC_SCRUB=y
# CONFIG_EDAC_DEBUG is not set
# CONFIG_EDAC_ECS is not set
CONFIG_EDAC_LEGACY_SYSFS=y
# CONFIG_EDAC_MEM_REPAIR is not set
# CONFIG_EDAC_SCRUB is not set
CONFIG_EDAC_SUPPORT=y
CONFIG_ELF_CORE=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_EXT4_FS=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FREEZER=y
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FUNCTION_ALIGNMENT=0
CONFIG_FWNODE_MDIO=y
CONFIG_FW_CACHE=y
# CONFIG_FW_LOADER_USER_HELPER is not set
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ARCH_TOPOLOGY=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_DEVICES=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_MIGRATION=y
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GLOB=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_GENERIC_PLATFORM=y
CONFIG_GPIO_SYSCON=y
# CONFIG_GPIO_SYSFS is not set
CONFIG_HARDEN_BRANCH_PREDICTOR=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HAVE_SMP=y
CONFIG_HIGHMEM=y
CONFIG_HIGHPTE=y
CONFIG_HOTPLUG_CORE_SYNC=y
CONFIG_HOTPLUG_CORE_SYNC_DEAD=y
CONFIG_HOTPLUG_CPU=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_OPTEE=y
CONFIG_HW_RANDOM_STM32=y
CONFIG_HZ_FIXED=0
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_DEMUX_PINCTRL=y
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_GPIO=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_I2C_MUX_PINCTRL=y
CONFIG_I2C_SLAVE=y
# CONFIG_I2C_SLAVE_TESTUNIT is not set
CONFIG_I2C_SMBUS=y
# CONFIG_I2C_STM32F4 is not set
CONFIG_I2C_STM32F7=y
CONFIG_INPUT=y
# CONFIG_INPUT_STPMIC1_ONKEY is not set
# CONFIG_IOMMUFD is not set
# CONFIG_IOMMU_DEBUGFS is not set
CONFIG_IOMMU_IO_PGTABLE=y
# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
CONFIG_IOMMU_IO_PGTABLE_LPAE=y
# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set
CONFIG_IOMMU_SUPPORT=y
CONFIG_IRQCHIP=y
CONFIG_IRQSTACKS=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_JBD2=y
CONFIG_KERNEL_GZIP=y
# CONFIG_KERNEL_XZ is not set
CONFIG_KMAP_LOCAL=y
CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y
# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_LEDS_TRIGGER_ONESHOT=y
CONFIG_LEDS_TRIGGER_TRANSIENT=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_LOG_BUF_SHIFT=16
# CONFIG_LRU_GEN is not set
CONFIG_LZO_DECOMPRESS=y
CONFIG_MACH_STM32MP13=y
CONFIG_MACH_STM32MP157=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_MAGIC_SYSRQ_SERIAL=y
CONFIG_MDIO_BITBANG=y
CONFIG_MDIO_BUS=y
# CONFIG_MDIO_GPIO is not set
CONFIG_MEMORY=y
CONFIG_MEMORY_ISOLATION=y
CONFIG_MFD_CORE=y
# CONFIG_MFD_STM32_LPTIMER is not set
# CONFIG_MFD_STM32_TIMERS is not set
CONFIG_MFD_STPMIC1=y
CONFIG_MFD_SYSCON=y
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
CONFIG_MIGRATION=y
CONFIG_MMC=y
CONFIG_MMC_ARMMMCI=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_BLOCK_MINORS=16
CONFIG_MMC_STM32_SDMMC=y
CONFIG_MMU_LAZY_TLB_REFCOUNT=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SRCU_NMI_SAFE=y
CONFIG_NEON=y
CONFIG_NET_DEVMEM=y
CONFIG_NET_EGRESS=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_INGRESS=y
CONFIG_NET_PTP_CLASSIFY=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_XGRESS=y
CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
CONFIG_NR_CPUS=2
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_DYNAMIC=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OF_OVERLAY=y
CONFIG_OF_RESOLVE=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_OPTEE=y
CONFIG_PADATA=y
CONFIG_PAGE_BLOCK_MAX_ORDER=12
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_PAGE_POOL=y
CONFIG_PAGE_POOL_STATS=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_TIMEOUT=0
CONFIG_PCS_XPCS=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PER_VMA_LOCK=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
CONFIG_PHYLINK=y
CONFIG_PHY_COMMON_PROPS=y
# CONFIG_PHY_STM32_COMBOPHY is not set
# CONFIG_PHY_STM32_USBPHYC is not set
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MCP23S08=y
CONFIG_PINCTRL_MCP23S08_I2C=y
# CONFIG_PINCTRL_SCMI is not set
CONFIG_PINCTRL_STM32=y
CONFIG_PINCTRL_STM32MP135=y
CONFIG_PINCTRL_STM32MP157=y
# CONFIG_PINCTRL_STM32MP257 is not set
# CONFIG_PINCTRL_STM32_HDP is not set
# CONFIG_PL353_SMC is not set
CONFIG_PM=y
CONFIG_PM_CLK=y
CONFIG_PM_DEVFREQ=y
CONFIG_PM_DEVFREQ_EVENT=y
CONFIG_PM_GENERIC_DOMAINS=y
CONFIG_PM_GENERIC_DOMAINS_OF=y
CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
CONFIG_PM_OPP=y
CONFIG_PM_SLEEP=y
CONFIG_PM_SLEEP_SMP=y
CONFIG_POSIX_MQUEUE=y
CONFIG_POSIX_MQUEUE_SYSCTL=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_GPIO=y
CONFIG_POWER_RESET_GPIO_RESTART=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_POWER_RESET_SYSCON_POWEROFF=y
CONFIG_POWER_SUPPLY=y
CONFIG_PPS=y
CONFIG_PRINTK_TIME=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RAS=y
CONFIG_RATIONAL=y
# CONFIG_RAVE_SP_CORE is not set
CONFIG_REALTEK_PHY=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_IRQ=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_ARM_SCMI=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_GPIO=y
# CONFIG_REGULATOR_STM32_BOOSTER is not set
CONFIG_REGULATOR_STM32_PWR=y
# CONFIG_REGULATOR_STM32_VREFBUF is not set
CONFIG_REGULATOR_STPMIC1=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RESET_SCMI=y
CONFIG_RESET_SIMPLE=y
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
CONFIG_RTC_CLASS=y
# CONFIG_RTC_DRV_CMOS is not set
# CONFIG_RTC_DRV_OPTEE is not set
CONFIG_RTC_DRV_STM32=y
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_SCSI=y
CONFIG_SCSI_COMMON=y
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_DEV_BUS=y
CONFIG_SERIAL_DEV_CTRL_TTYPORT=y
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_STM32=y
CONFIG_SERIAL_STM32_CONSOLE=y
CONFIG_SERIO=y
CONFIG_SERIO_LIBPS2=y
CONFIG_SERIO_SERPORT=y
CONFIG_SG_POOL=y
CONFIG_SMP=y
CONFIG_SMP_ON_UP=y
CONFIG_SMSC_PHY=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_SOC_BUS=y
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SPARSE_IRQ=y
# CONFIG_SQUASHFS_EMBEDDED is not set
CONFIG_SQUASHFS_FILE_CACHE=y
# CONFIG_SQUASHFS_FILE_DIRECT is not set
CONFIG_SQUASHFS_LZO=y
CONFIG_SQUASHFS_ZLIB=y
CONFIG_STM32MP_EXTI=y
CONFIG_STM32_DMA=y
# CONFIG_STM32_DMA3 is not set
CONFIG_STM32_DMAMUX=y
CONFIG_STM32_FIREWALL=y
# CONFIG_STM32_FMC2_EBI is not set
CONFIG_STM32_MDMA=y
CONFIG_STM32_WATCHDOG=y
CONFIG_STMMAC_ETH=y
CONFIG_STMMAC_PLATFORM=y
# CONFIG_STPMIC1_WATCHDOG is not set
# CONFIG_STRIP_ASM_SYMS is not set
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
CONFIG_SWPHY=y
CONFIG_SWP_EMULATE=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_TEE=y
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
CONFIG_TRUSTED_FOUNDATIONS=y
# CONFIG_UCLAMP_TASK is not set
# CONFIG_UEVENT_HELPER is not set
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
CONFIG_UNWINDER_ARM=y
CONFIG_USB_SUPPORT=y
CONFIG_USE_OF=y
CONFIG_VFP=y
CONFIG_VFPv3=y
CONFIG_VMAP_STACK=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_VT_CONSOLE_SLEEP=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_WATCHDOG_CORE=y
# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
CONFIG_XPS=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_ARMTHUMB=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y