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rockchip: add PHY LED configuration for ninetripod x3568-v4

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Fix mdio address while at it.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
2025-10-29 20:03:29 +08:00
parent a36b577370
commit d8d91416fc
3 changed files with 54 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files
package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-x3568-v4.dts
+4 -4
View File
@@ -589,9 +589,9 @@
};
&mdio0 {
rgmii_phy0: ethernet-phy@0 {
rgmii_phy0: ethernet-phy@3 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
reg = <3>;
reset-assert-us = <20000>;
reset-deassert-us = <100000>;
reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
@@ -599,9 +599,9 @@
};
&mdio1 {
rgmii_phy1: ethernet-phy@0 {
rgmii_phy1: ethernet-phy@2 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
reg = <2>;
reset-assert-us = <20000>;
reset-deassert-us = <100000>;
reset-gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
target/linux/rockchip/armv8/base-files/etc/init.d/phy-leds
+6
View File
@@ -75,6 +75,12 @@ boot() {
netled_set "stmmac-1:01:amber:lan" "lan2" "link_10 link_100 link_1000" "0" "rx tx" "1"
netled_set "stmmac-1:01:green:lan" "lan2" "link_10 link_100 link_1000" "1" "rx tx" "0"
;;
ninetripod,x3568-v4)
netled_set "stmmac-0:03:amber:lan" "eth1" "link_10 link_100 link_1000" "1" "rx tx" "1"
netled_set "stmmac-0:03:green:lan" "eth1" "link_10 link_100 link_1000" "1" "rx tx" "0"
netled_set "stmmac-1:02:amber:wan" "eth0" "link_10 link_100 link_1000" "1" "rx tx" "1"
netled_set "stmmac-1:02:green:wan" "eth0" "link_10 link_100 link_1000" "1" "rx tx" "0"
;;
radxa,rock3a)
netled_set "stmmac-1:01:amber:lan" "eth0" "link_10 link_100 link_1000" "0" "rx tx" "1"
netled_set "stmmac-1:01:green:lan" "eth0" "link_10 link_100 link_1000" "1" "rx tx" "0"
target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-x3568-v4.dts
+44 -4
View File
@@ -593,22 +593,62 @@
};
&mdio0 {
rgmii_phy0: ethernet-phy@0 {
rgmii_phy0: ethernet-phy@3 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
reg = <3>;
reset-assert-us = <20000>;
reset-deassert-us = <100000>;
reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
leds {
#address-cells = <1>;
#size-cells = <0>;
led@1 {
reg = <1>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
default-state = "keep";
};
/* Note: The LED polarity is inverted */
led@2 {
reg = <2>;
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_LAN;
default-state = "keep";
};
};
};
};
&mdio1 {
rgmii_phy1: ethernet-phy@0 {
rgmii_phy1: ethernet-phy@2 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
reg = <2>;
reset-assert-us = <20000>;
reset-deassert-us = <100000>;
reset-gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
leds {
#address-cells = <1>;
#size-cells = <0>;
led@1 {
reg = <1>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WAN;
default-state = "keep";
};
/* Note: The LED polarity is inverted */
led@2 {
reg = <2>;
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_WAN;
default-state = "keep";
};
};
};
};