Introduce fix which prevents the kernel from crashing in case the mxl862xx
driver fails to probe due to outdated firmware running on the switch.
Cancel all pending work and prevent rescheduling of counter polling in case
the driver errors out during probe.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Add the RTL8231 controlling the port LEDs to the devicetree, so users
can enable them. Using the appropriate link name, the netdev trigger can
be used to reflect the port status. As no hardware port status
offloading is supported, blinking on traffic could result in increased
load due to the numerous LED updates.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
To enable the use of the RTL8231 to control (port) LEDs, the driver
needs to be enabled in the build. Incorporate it into the kernel, so any
LED consumers also work in failsafe mode.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Add a pinctrl-single node to the switch GPIO/LED control register that
disables the port LED peripheral when selected. When an RTL8231 is
instantiated, this is required to prevent the user config from being
overwritten by the peripheral.
As this is technically not a pin mux operation, but rather a peripheral
disable, using pinctrl-single for this purpose is bit of a hack, but it
does the job.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
It may be possible that the bootloader has left an RTL8231 expander
configured for synchronous operation, which requires the user to signal
that the new GPIO/LED states should be latched.
As drivers typically perform one operation at a time for the higher
level kernel framework, this would require a latch on every update,
which is not very useful. Disable synchronous operation to keeps things
simple.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The allocated regmap_field object is not stored as a const reference, so
the helper function allocating the object should not return it as such.
Drop 'const' so the build doesn't complain about discarding the
qualifier.
Fixes: 6ef6014887 ("realtek: Add pinctrl support for RTL8231")
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The loop scanning the available toggle rates would stop when the
requested interval exceeded the tested interval. Since the intervals are
searched from small to large, this would always trigger on the shortest
interval, or skip to the largest interval for small requested values.
To correctly clamp (ceil) the toggle rate, the loop needs to continue
until the condition is met, instead of breaking the loop.
Fixes: 6ef6014887 ("realtek: Add pinctrl support for RTL8231")
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The code in 800-gpio-regmap-Bypass-cache-for-shadowed-outputs.patch
was accepted upstream as commit 897396b418d1 ("gpio: regmap: Bypass
cache for aliased inputs"). Update the filename to reflect the first
release containing this change.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Hardware specification
----------------------
* RTL9301 SoC, 1 MIPS 34KEc core @ 800MHz
* 512MB DRAM
* 64MB NAND Flash
* 24 x 10/100/1000BASE-T ports
* 4 x 10G SFP+ ports
* Power LED, Console LED, Fan Fault LED
* Reset button on front panel
* LM75 temperature sensor
* Atmel AT24C02 2kb eeprom
* fan (controllable via gpio for on/off and LM75 for low/high speed)
* UART (115200 8N1) via RJ45
Installation using serial interface
-----------------------------------
1. Prepare TFTP server & connect to serial port.
2. Connect DGS-1250 to your computer or network with one of the
1G ports. All of them will be fine.
3. Power on DGS-1250 and interrupt autoboot with "&".
4. Change U-Boot startup sequence
> setenv silent
> setenv bootcmd 'cp.l 0xb4200000 0x84000000 0x300000; bootm 0x84000000'
> saveenv
5. Enable networking within U-Boot.
> rtk network on
6. Set switch IP and TFTP server IP (optional, adjust to your setup).
> setenv ipaddr <ip>
> setenv serverip <ip>
7. Download initramfs image from TFTP server.
> tftpboot 0x84000000 <image name>
8. Boot with the downloaded image.
> bootm 0x84000000
9. With rambooted OpenWrt, backup the stock firmware.
THIS IS CRITICAL! /dev/mtd3 contains data that is not provided
in the downloadable vendor firmware images.
10. Copy sysupgrade image to the device.
11. Perform sysupgrade with the sysupgrade image.
12. After reboot, you should have functional OpenWrt.
Installation using OEM webinterface
-----------------------------------
This is not possible because the vendor image uses a ubifs based
loading technique with encrypted images. To be precise the boot
sequence basically runs as follows.
1. U-Boot starts
2. U-Boot mounts 62MB ubifs from mtd3
3. U-Boot reads Linux kernel from file uImage inside ubifs
4. Linux starts (this is a initramfs image)
5. Linux mounts ubifs
6. Linux calls a loader binary
7. Depending on current configuration first (file Image1) or
second firmware image (file Image2) is loaded and decrypted
8. Inside the decrpyted firmware image there is a executable
named “switch”
9. "switch" executable is run and the switch comes alive
Reverting to stock firmware
---------------------------
1. Boot OpenWrt from initramfs (like in installation section above)
2. Restore partition /dev/mtd3 from backup
3. Erase Openwrt special U-Boot env
# mtd erase mtd1
4. reboot
Further information
-------------------
Wiki: https://openwrt.org/toh/d-link/dgs-1250
Forum: https://forum.openwrt.org/t/support-for-d-link-dgs-1250-switches
Partition dumps: https://github.com/plappermaul/realtek-doc/tree/main/DGS-1250
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22530
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
CONFIG_TOOLS_SUPPORT_RELR is set during runtime by the kernel so it should
not end up in our static configs.
So, filter it out by default.
Signed-off-by: Robert Marko <robimarko@gmail.com>
If DSA support is enabled, then these will pop up.
So instead of ending up in target configs, add them to the generic configs.
Signed-off-by: Robert Marko <robimarko@gmail.com>
The four TGRX pages are currently mapped into the page range 4-7 for even
10G serdes. This is only partly right. TGRX0/1 better aligns with RTL93xx
pages TGX_STD_0/TGX_STD_1. Change the mapping. No code update needed as
the pages are not yet used anywhere.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22633
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The ANA_RG pages of the RTL839x SerDes are a wild mix of WDIG, ANA_MISC
and ANA_1G2 data. Its current mapping to the TGX_STD_0 register does
not match at all. From the coding it makes most sense to remap it to the
ANA_1G2/ANA_1G2_EXT range. Adapt all consumers in the pcs driver
accordingly.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22633
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
With all the recent development about RTL93xx serdes it has become
clear that the RTL839x ANA_TG page mapping is not perfect. Until
know it is mapped to pages 10/11. As its naming suggests these are
serdes analogous register settings for 10G. Map it to the appropriate
ANA_10G pages to align better with RTL93xx. Adapt all consumers
in the pcs driver accordingly.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22633
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The initial page naming of the debugfs page registers in the mdio
serdes driver was a mix of RTL839x and RTL93xx. Developing the
Realtek pcs driver, it was discovered that the RTL93xx IP block
shares a lot of the registers with the RTL8295 PHY.
The RTL839x serdes development is quite okay and currently on hold.
Thus drop the RTL839x derived page names and substitute them for
their RTL93xx counterpart.
This is only a cosmetic change for better readability.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22633
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Realtek switches have a very simple network adapter for the SOC.
They can ship packets via DMA without further offloading features.
Even on the RTL931x devices they can barely reach 50MB/s. In the
dts there is a mix of 1G/10G definitions. To be consistent and
better reflect the performance set the link speed to 1000.
This is only cosmetic.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22639
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Drop airoha,x2-mode related property from the DTSI and enable them only in
the relevant devices that use a PCIe0 line. x2-mode should be enabled only
for the WiFi card that would use it as it might cause problem for WiFi card
that expect 2 single PCIe x1 line instead of a single PCIe x2 line.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The signature of phylink_pcs get_state has changed, and we need to set
.supported_interfaces.
Both has been removed when backporting the driver to Linux 6.12, readd
to make it build and work with Linux 6.18.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Link: https://github.com/openwrt/openwrt/pull/22668
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add patches that extends the upstream smbus support in sfp driver. This
only supports SMBus byte operations and in that case, disables hwmon and
prints warnings because of that. Using the word/block capability of our
I2C controller is totally fine for all that functionality.
The patches are currently pending upstream.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21181
Signed-off-by: Robert Marko <robimarko@gmail.com>
Between 6.12 and 6.18, several DSA switch ops have changed.
phylink_mac_* ops were moved out of dsa_switch_ops into dsa_switch using
phylink_mac_ops. Add new definitions for that and adjust the callbacks
accordingly to work with the different signatures.
get_mac_eee() has been dropped and support_eee() was added.
remove_new() has been dropped completely, allowing us to use remove()
again.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21181
Signed-off-by: Robert Marko <robimarko@gmail.com>
Between v6.12 and v6.18, struct phy_package_shared was moved from
include/linux/phylib.h to drivers/net/phy/phy_package.c and thus made
internal/unavailable for other drivers.
Our PHY driver used a helper to access the shared priv. With v6.18, it
doesn't work anymore (due to missing access to internal fields of struct
phy_package_shared) but upstream has an equivalent helper for that. Drop
ours and use the upstream helper.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21181
Signed-off-by: Robert Marko <robimarko@gmail.com>
Refresh and adapt the remaining patches as needed.
- 024-02-v7.1-net-phy-realtek-add-RTL8224-pair-order-support.patch
needed addition of '#include "../phylib.h"'
- 314-irqchip-irq-realtek-rtl-add-VPE-support.patch needed manual
adoption
- 700-dsa-mdio-increase-max-ports-for-rtl839x-rtl931x.patch needed
manual fix
- 810-lm75-alert-polarity-swap.patch needed adoption to changed probe
function upstream
All other patches were automatically refreshed.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21181
Signed-off-by: Robert Marko <robimarko@gmail.com>
Adapt our downstream patches for SMBus SFP functionality to kernel 6.18.
Upstream gained support for SMBus byte access on SFP and a patch to
extend that to word and block access is pending.
These downstream patches aren't acceptable for upstream and will need to
be adapted. However, keep them for now to maintain functionality.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21181
Signed-off-by: Robert Marko <robimarko@gmail.com>
Tianling Shen