Tianling Shen
5f89c80883
Patches are taken from Armbian. Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
188 lines
5.5 KiB
Diff
188 lines
5.5 KiB
Diff
From 205a24e34751220c3ba04f0ac6ecc734e56ed225 Mon Sep 17 00:00:00 2001
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From: Jon Lin <jon.lin@rock-chips.com>
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Date: Sun, 17 Oct 2021 09:59:10 +0800
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Subject: [PATCH] mtd: spinand: Support fmsh
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FM25S01A, FM25S02A, FM25S01, FM25G02B
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Change-Id: I7e0ceec39c57dc591d77a4ebde599ad326cf25b7
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Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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---
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drivers/mtd/nand/spi/Makefile | 2 +-
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drivers/mtd/nand/spi/core.c | 1 +
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drivers/mtd/nand/spi/fmsh.c | 213 ++++++++++++++++++++++++++++++++++
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include/linux/mtd/spinand.h | 1 +
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4 files changed, 216 insertions(+), 1 deletion(-)
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create mode 100644 drivers/mtd/nand/spi/fmsh.c
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--- a/drivers/mtd/nand/spi/fmsh.c
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+++ b/drivers/mtd/nand/spi/fmsh.c
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@@ -187,6 +187,115 @@ static const struct mtd_ooblayout_ops fm
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.free = fm25s01bi3_ooblayout_free,
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};
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+static int fm25s01_ooblayout_ecc(struct mtd_info *mtd, int section,
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+ struct mtd_oob_region *region)
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+{
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+ if (section)
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+ return -ERANGE;
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+
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+ region->offset = 64;
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+ region->length = 64;
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+
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+ return 0;
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+}
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+
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+static int fm25s01_ooblayout_free(struct mtd_info *mtd, int section,
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+ struct mtd_oob_region *region)
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+{
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+ if (section)
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+ return -ERANGE;
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+
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+ region->offset = 2;
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+ region->length = 62;
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+
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+ return 0;
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+}
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+
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+static const struct mtd_ooblayout_ops fm25s01_ooblayout = {
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+ .ecc = fm25s01_ooblayout_ecc,
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+ .free = fm25s01_ooblayout_free,
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+};
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+
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+/*
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+ * ecc bits: 0xC0[4,6]
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+ * [0b000], No bit errors were detected;
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+ * [0b001] and [0b011], 1~6 Bit errors were detected and corrected. Not
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+ * reach Flipping Bits;
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+ * [0b101], Bit error count equals the bit flip
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+ * detection threshold
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+ * [0b010], Multiple bit errors were detected and
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+ * not corrected.
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+ * others, Reserved.
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+ */
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+static int fm25s01bi3_ecc_ecc_get_status(struct spinand_device *spinand,
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+ u8 status)
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+{
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+ struct nand_device *nand = spinand_to_nand(spinand);
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+ u8 eccsr = (status & GENMASK(6, 4)) >> 4;
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+
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+ if (eccsr <= 1 || eccsr == 3)
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+ return eccsr;
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+ else if (eccsr == 5)
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+ return nanddev_get_ecc_requirements(nand)->strength;
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+ else
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+ return -EBADMSG;
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+}
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+
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+static int fm25g0xd_ooblayout_ecc(struct mtd_info *mtd, int section,
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+ struct mtd_oob_region *region)
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+{
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+ if (section)
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+ return -ERANGE;
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+
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+ region->offset = 64;
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+ region->length = 64;
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+
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+ return 0;
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+}
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+
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+static int fm25g0xd_ooblayout_free(struct mtd_info *mtd, int section,
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+ struct mtd_oob_region *region)
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+{
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+ if (section)
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+ return -ERANGE;
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+
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+ /* Reserve 2 bytes for the BBM. */
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+ region->offset = 2;
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+ region->length = 62;
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+
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+ return 0;
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+}
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+
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+static const struct mtd_ooblayout_ops fm25g0xd_ooblayout = {
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+ .ecc = fm25g0xd_ooblayout_ecc,
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+ .free = fm25g0xd_ooblayout_free,
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+};
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+
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+/*
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+ * ecc bits: 0xC0[4,6]
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+ * [0x0], No bit errors were detected;
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+ * [0x001, 0x011], Bit errors were detected and corrected. Not
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+ * reach Flipping Bits;
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+ * [0x100], Bit error count equals the bit flip
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+ * detectionthreshold
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+ * [0x101, 0x110], Reserved;
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+ * [0x111], Multiple bit errors were detected and
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+ * not corrected.
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+ */
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+static int fm25g0xd_ecc_get_status(struct spinand_device *spinand,
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+ u8 status)
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+{
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+ struct nand_device *nand = spinand_to_nand(spinand);
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+ u8 eccsr = (status & GENMASK(6, 4)) >> 4;
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+
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+ if (eccsr <= 3)
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+ return 0;
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+ else if (eccsr == 4)
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+ return nanddev_get_ecc_requirements(nand)->strength;
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+ else
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+ return -EBADMSG;
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+}
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+
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static const struct spinand_info fmsh_spinand_table[] = {
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SPINAND_INFO("FM25G01B",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xd1),
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@@ -227,6 +336,51 @@ static const struct spinand_info fmsh_sp
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&fm25s01bi3_ooblayout,
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fm25s01bi3_ecc_get_status)),
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+ SPINAND_INFO("FM25S02A",
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+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE5),
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+ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1),
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+ NAND_ECCREQ(1, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_variants,
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+ &update_cache_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)),
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+ SPINAND_INFO("FM25S01",
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+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA1),
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+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
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+ NAND_ECCREQ(1, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_variants,
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+ &update_cache_variants),
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+ 0,
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+ SPINAND_ECCINFO(&fm25s01_ooblayout, NULL)),
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+ SPINAND_INFO("FM25LS01",
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+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA5),
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+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
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+ NAND_ECCREQ(1, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_variants,
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+ &update_cache_variants),
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+ 0,
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+ SPINAND_ECCINFO(&fm25s01_ooblayout, NULL)),
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+ SPINAND_INFO("FM25S02BI3-DND-A-G3",
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+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD6),
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+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_variants,
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+ &update_cache_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&fm25s01_ooblayout, fm25s01bi3_ecc_ecc_get_status)),
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+ SPINAND_INFO("FM25G02D",
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+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF2),
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+ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
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+ NAND_ECCREQ(4, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_variants,
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+ &update_cache_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&fm25g0xd_ooblayout, fm25g0xd_ecc_get_status)),
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};
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static const struct spinand_manufacturer_ops fmsh_spinand_manuf_ops = {
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