mt7981: add jcg q30 and livinet zr-3020 support (#5)
* mt7981: add livinet zr-3020 support Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org> * mt7981: add jcg q30 support Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org> * mt7981: add cetron ct3003 support Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org> --------- Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
@@ -0,0 +1,5 @@
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CONFIG_PLAT_MT7981=y
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CONFIG_TARGET_ALL_NO_SEC_BOOT=y
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CONFIG_FLASH_DEVICE_SPIM_NAND=y
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CONFIG_BGA=y
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CONFIG_LOG_LEVEL_INFO=y
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5
atf-20220606-637ba581b/configs/mt7981_jcg_q30_defconfig
Normal file
5
atf-20220606-637ba581b/configs/mt7981_jcg_q30_defconfig
Normal file
@@ -0,0 +1,5 @@
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CONFIG_PLAT_MT7981=y
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CONFIG_TARGET_ALL_NO_SEC_BOOT=y
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CONFIG_FLASH_DEVICE_SPIM_NAND=y
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CONFIG_BGA=y
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CONFIG_LOG_LEVEL_INFO=y
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@@ -0,0 +1,5 @@
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CONFIG_PLAT_MT7981=y
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CONFIG_TARGET_ALL_NO_SEC_BOOT=y
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CONFIG_FLASH_DEVICE_SPIM_NAND=y
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CONFIG_BGA=y
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CONFIG_LOG_LEVEL_INFO=y
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114
uboot-mtk-20220606/arch/arm/dts/mt7981-cetron_ct3003.dts
Normal file
114
uboot-mtk-20220606/arch/arm/dts/mt7981-cetron_ct3003.dts
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@@ -0,0 +1,114 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "mt7981.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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model = "mt7981-cetron_ct3003";
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compatible = "mediatek,mt7981", "mediatek,mt7981-rfb";
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chosen {
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stdout-path = &uart0;
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tick-timer = &timer0;
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};
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config {
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bootcmd = "mtkboardboot";
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blink_led = "red:status";
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system_led = "green:status";
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};
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gpio-keys {
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compatible = "gpio-keys";
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button-reset {
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label = "reset";
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gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
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};
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button-wps {
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label = "wps";
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gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
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};
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};
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leds {
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compatible = "gpio-leds";
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status_red_led: led-0 {
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label = "red:status";
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gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
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};
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status_green_led: led-1 {
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label = "green:status";
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gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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ð {
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status = "okay";
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mediatek,gmac-id = <0>;
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phy-mode = "sgmii";
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mediatek,switch = "mt7531";
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reset-gpios = <&gpio 39 GPIO_ACTIVE_HIGH>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&pinctrl {
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spi_flash_pins: spi0-pins-func-1 {
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mux {
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function = "flash";
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groups = "spi0", "spi0_wp_hold";
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};
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conf-pu {
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pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
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};
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conf-pd {
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pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
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};
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};
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};
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&spi0 {
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&spi_flash_pins>;
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status = "okay";
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must_tx;
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enhance_timing;
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dma_ext;
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ipm_design;
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support_quad;
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tick_dly = <2>;
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sample_sel = <0>;
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spi_nand@0 {
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compatible = "spi-nand";
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reg = <0>;
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spi-max-frequency = <52000000>;
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};
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};
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&watchdog {
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status = "disabled";
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};
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114
uboot-mtk-20220606/arch/arm/dts/mt7981-jcg_q30.dts
Normal file
114
uboot-mtk-20220606/arch/arm/dts/mt7981-jcg_q30.dts
Normal file
@@ -0,0 +1,114 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "mt7981.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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model = "mt7981-jcg_q30";
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compatible = "mediatek,mt7981", "mediatek,mt7981-rfb";
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chosen {
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stdout-path = &uart0;
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tick-timer = &timer0;
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};
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config {
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bootcmd = "mtkboardboot";
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blink_led = "red:status";
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system_led = "blue:status";
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};
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gpio-keys {
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compatible = "gpio-keys";
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button-reset {
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label = "reset";
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gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
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};
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button-wps {
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label = "wps";
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gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
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};
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};
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leds {
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compatible = "gpio-leds";
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status_red_led: led-0 {
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label = "red:status";
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gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
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};
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status_blue_led: led-1 {
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label = "blue:status";
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gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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ð {
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status = "okay";
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mediatek,gmac-id = <0>;
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phy-mode = "sgmii";
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mediatek,switch = "mt7531";
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reset-gpios = <&gpio 39 GPIO_ACTIVE_HIGH>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&pinctrl {
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spi_flash_pins: spi0-pins-func-1 {
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mux {
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function = "flash";
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groups = "spi0", "spi0_wp_hold";
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};
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conf-pu {
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pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
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};
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conf-pd {
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pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
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};
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};
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};
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&spi0 {
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&spi_flash_pins>;
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status = "okay";
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must_tx;
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enhance_timing;
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dma_ext;
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ipm_design;
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support_quad;
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tick_dly = <2>;
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sample_sel = <0>;
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spi_nand@0 {
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compatible = "spi-nand";
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reg = <0>;
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spi-max-frequency = <52000000>;
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};
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};
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&watchdog {
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status = "disabled";
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};
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142
uboot-mtk-20220606/arch/arm/dts/mt7981-livinet_zr-3020.dts
Normal file
142
uboot-mtk-20220606/arch/arm/dts/mt7981-livinet_zr-3020.dts
Normal file
@@ -0,0 +1,142 @@
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/dts-v1/;
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#include "mt7981.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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model = "mt7981-livinet_zr-3020";
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compatible = "mediatek,mt7981", "mediatek,mt7981-rfb";
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chosen {
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stdout-path = &uart0;
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tick-timer = &timer0;
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};
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config {
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bootcmd = "mtkboardboot";
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blink_led = "red:d8";
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system_led = "green:upgrade";
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};
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gpio-keys {
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compatible = "gpio-keys";
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button-reset {
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label = "reset";
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gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
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};
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button-wps {
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label = "wps";
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gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led-0 {
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label = "red:d8";
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gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
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};
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led-1 {
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label = "blue:internet";
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gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
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};
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running_led: led-2 {
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label = "blue:running";
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gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
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};
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upgrade_led: led-3 {
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label = "green:upgrade";
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gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
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};
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boot_led: led-4 {
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label = "red:boot";
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gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
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};
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led-6 {
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label = "blue:d7";
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gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
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};
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led-7 {
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label = "blue:wlan2g";
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gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
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};
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led-8 {
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label = "blue:wlan5g";
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gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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ð {
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status = "okay";
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mediatek,gmac-id = <0>;
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phy-mode = "sgmii";
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mediatek,switch = "mt7531";
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reset-gpios = <&gpio 39 GPIO_ACTIVE_HIGH>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&pinctrl {
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spi_flash_pins: spi0-pins-func-1 {
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mux {
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function = "flash";
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groups = "spi0", "spi0_wp_hold";
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};
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conf-pu {
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pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
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};
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conf-pd {
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pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
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};
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};
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};
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&spi0 {
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&spi_flash_pins>;
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status = "okay";
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must_tx;
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enhance_timing;
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dma_ext;
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ipm_design;
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support_quad;
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tick_dly = <2>;
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sample_sel = <0>;
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spi_nand@0 {
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compatible = "spi-nand";
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reg = <0>;
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spi-max-frequency = <52000000>;
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};
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};
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&watchdog {
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status = "disabled";
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};
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89
uboot-mtk-20220606/configs/mt7981_cetron_ct3003_defconfig
Normal file
89
uboot-mtk-20220606/configs/mt7981_cetron_ct3003_defconfig
Normal file
@@ -0,0 +1,89 @@
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CONFIG_ARM=y
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CONFIG_POSITION_INDEPENDENT=y
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CONFIG_ARCH_MEDIATEK=y
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CONFIG_SYS_TEXT_BASE=0x41e00000
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CONFIG_SYS_MALLOC_F_LEN=0x4000
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_SIZE=0x20000
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CONFIG_ENV_OFFSET=0x100000
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CONFIG_DEFAULT_DEVICE_TREE="mt7981-cetron_ct3003"
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CONFIG_TARGET_MT7981=y
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CONFIG_ENABLE_NAND_NMBM=y
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CONFIG_MEDIATEK_BOOTMENU=y
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CONFIG_MEDIATEK_BOOTMENU_DELAY=3
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CONFIG_MEDIATEK_LOAD_FROM_RAM=y
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CONFIG_MT7981_BOOTMENU_UBI=y
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CONFIG_DEBUG_UART_BASE=0x11002000
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CONFIG_DEBUG_UART_CLOCK=40000000
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CONFIG_SYS_LOAD_ADDR=0x46000000
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CONFIG_DEBUG_UART=y
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CONFIG_BOOTDELAY=0
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CONFIG_AUTOBOOT_MENU_SHOW=y
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CONFIG_AUTOBOOT_MENU_MTK_SHOW=y
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CONFIG_DEFAULT_FDT_FILE="mt7981-spim-nand-rfb"
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CONFIG_LOGLEVEL=7
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CONFIG_LOG=y
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CONFIG_POLLER=y
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CONFIG_HUSH_PARSER=y
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CONFIG_SYS_PROMPT="MT7981> "
|
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# CONFIG_BOOTM_NETBSD is not set
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# CONFIG_BOOTM_PLAN9 is not set
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# CONFIG_BOOTM_RTEMS is not set
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# CONFIG_BOOTM_VXWORKS is not set
|
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CONFIG_CMD_MEMINFO=y
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||||
# CONFIG_CMD_UNLZ4 is not set
|
||||
# CONFIG_CMD_UNZIP is not set
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||||
# CONFIG_CMD_FLASH is not set
|
||||
CONFIG_CMD_GPIO=y
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||||
CONFIG_CMD_GPIO_READ=y
|
||||
CONFIG_CMD_MTD=y
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# CONFIG_CMD_NAND_EXT is not set
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CONFIG_CMD_NMBM=y
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CONFIG_CMD_TFTPPUT=y
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# CONFIG_CMD_NFS is not set
|
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CONFIG_CMD_PING=y
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CONFIG_CMD_LED_BLINK=y
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CONFIG_CMD_SMC=y
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CONFIG_CMD_MTDPARTS=y
|
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CONFIG_MTDIDS_DEFAULT="nmbm0=nmbm0"
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||||
CONFIG_MTDPARTS_DEFAULT="nmbm0:1024k(BL2),512k(u-boot-env),1024k(art),1024k(Factory),2048k(FIP),113152k(ubi)"
|
||||
CONFIG_CMD_UBI=y
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||||
CONFIG_CMD_GL_BTN=y
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CONFIG_OF_EMBED=y
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||||
CONFIG_ENV_OVERWRITE=y
|
||||
CONFIG_ENV_IS_IN_MTD=y
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||||
CONFIG_ENV_MTD_NAME="nmbm0"
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||||
CONFIG_ENV_SIZE_REDUND=0x80000
|
||||
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_BUTTON=y
|
||||
CONFIG_BUTTON_GPIO=y
|
||||
CONFIG_CLK=y
|
||||
# CONFIG_I2C is not set
|
||||
# CONFIG_INPUT is not set
|
||||
CONFIG_LED=y
|
||||
CONFIG_LED_BLINK=y
|
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CONFIG_LED_GPIO=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_DM_MTD=y
|
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CONFIG_MTD_SPI_NAND=y
|
||||
CONFIG_PHY_FIXED=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_MEDIATEK_ETH=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCONF=y
|
||||
CONFIG_PINCTRL_MT7981=y
|
||||
CONFIG_POWER_DOMAIN=y
|
||||
CONFIG_MTK_POWER_DOMAIN=y
|
||||
CONFIG_RAM=y
|
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CONFIG_DM_SERIAL=y
|
||||
CONFIG_MTK_SERIAL=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_MTK_SPIM=y
|
||||
CONFIG_TIMER=y
|
||||
CONFIG_MTK_TIMER=y
|
||||
CONFIG_HEXDUMP=y
|
||||
CONFIG_WEBUI_FAILSAFE=y
|
||||
89
uboot-mtk-20220606/configs/mt7981_jcg_q30_defconfig
Normal file
89
uboot-mtk-20220606/configs/mt7981_jcg_q30_defconfig
Normal file
@@ -0,0 +1,89 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_POSITION_INDEPENDENT=y
|
||||
CONFIG_ARCH_MEDIATEK=y
|
||||
CONFIG_SYS_TEXT_BASE=0x41e00000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x4000
|
||||
CONFIG_NR_DRAM_BANKS=1
|
||||
CONFIG_ENV_SIZE=0x20000
|
||||
CONFIG_ENV_OFFSET=0x100000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="mt7981-jcg_q30"
|
||||
CONFIG_TARGET_MT7981=y
|
||||
CONFIG_ENABLE_NAND_NMBM=y
|
||||
CONFIG_MEDIATEK_BOOTMENU=y
|
||||
CONFIG_MEDIATEK_BOOTMENU_DELAY=3
|
||||
CONFIG_MEDIATEK_LOAD_FROM_RAM=y
|
||||
CONFIG_MT7981_BOOTMENU_UBI=y
|
||||
CONFIG_DEBUG_UART_BASE=0x11002000
|
||||
CONFIG_DEBUG_UART_CLOCK=40000000
|
||||
CONFIG_SYS_LOAD_ADDR=0x46000000
|
||||
CONFIG_DEBUG_UART=y
|
||||
CONFIG_BOOTDELAY=0
|
||||
CONFIG_AUTOBOOT_MENU_SHOW=y
|
||||
CONFIG_AUTOBOOT_MENU_MTK_SHOW=y
|
||||
CONFIG_DEFAULT_FDT_FILE="mt7981-spim-nand-rfb"
|
||||
CONFIG_LOGLEVEL=7
|
||||
CONFIG_LOG=y
|
||||
CONFIG_POLLER=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_SYS_PROMPT="MT7981> "
|
||||
# CONFIG_BOOTM_NETBSD is not set
|
||||
# CONFIG_BOOTM_PLAN9 is not set
|
||||
# CONFIG_BOOTM_RTEMS is not set
|
||||
# CONFIG_BOOTM_VXWORKS is not set
|
||||
CONFIG_CMD_MEMINFO=y
|
||||
# CONFIG_CMD_UNLZ4 is not set
|
||||
# CONFIG_CMD_UNZIP is not set
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_GPIO_READ=y
|
||||
CONFIG_CMD_MTD=y
|
||||
# CONFIG_CMD_NAND_EXT is not set
|
||||
CONFIG_CMD_NMBM=y
|
||||
CONFIG_CMD_TFTPPUT=y
|
||||
# CONFIG_CMD_NFS is not set
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_LED_BLINK=y
|
||||
CONFIG_CMD_SMC=y
|
||||
CONFIG_CMD_MTDPARTS=y
|
||||
CONFIG_MTDIDS_DEFAULT="nmbm0=nmbm0"
|
||||
CONFIG_MTDPARTS_DEFAULT="nmbm0:1024k(BL2),512k(u-boot-env),2048k(Factory),2048k(FIP),113152k(ubi)"
|
||||
CONFIG_CMD_UBI=y
|
||||
CONFIG_CMD_GL_BTN=y
|
||||
CONFIG_OF_EMBED=y
|
||||
CONFIG_ENV_OVERWRITE=y
|
||||
CONFIG_ENV_IS_IN_MTD=y
|
||||
CONFIG_ENV_MTD_NAME="nmbm0"
|
||||
CONFIG_ENV_SIZE_REDUND=0x80000
|
||||
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_BUTTON=y
|
||||
CONFIG_BUTTON_GPIO=y
|
||||
CONFIG_CLK=y
|
||||
# CONFIG_I2C is not set
|
||||
# CONFIG_INPUT is not set
|
||||
CONFIG_LED=y
|
||||
CONFIG_LED_BLINK=y
|
||||
CONFIG_LED_GPIO=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_DM_MTD=y
|
||||
CONFIG_MTD_SPI_NAND=y
|
||||
CONFIG_PHY_FIXED=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_MEDIATEK_ETH=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCONF=y
|
||||
CONFIG_PINCTRL_MT7981=y
|
||||
CONFIG_POWER_DOMAIN=y
|
||||
CONFIG_MTK_POWER_DOMAIN=y
|
||||
CONFIG_RAM=y
|
||||
CONFIG_DM_SERIAL=y
|
||||
CONFIG_MTK_SERIAL=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_MTK_SPIM=y
|
||||
CONFIG_TIMER=y
|
||||
CONFIG_MTK_TIMER=y
|
||||
CONFIG_HEXDUMP=y
|
||||
CONFIG_WEBUI_FAILSAFE=y
|
||||
89
uboot-mtk-20220606/configs/mt7981_livinet_zr-3020_defconfig
Normal file
89
uboot-mtk-20220606/configs/mt7981_livinet_zr-3020_defconfig
Normal file
@@ -0,0 +1,89 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_POSITION_INDEPENDENT=y
|
||||
CONFIG_ARCH_MEDIATEK=y
|
||||
CONFIG_SYS_TEXT_BASE=0x41e00000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x4000
|
||||
CONFIG_NR_DRAM_BANKS=1
|
||||
CONFIG_ENV_SIZE=0x20000
|
||||
CONFIG_ENV_OFFSET=0x100000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="mt7981-livinet_zr-3020"
|
||||
CONFIG_TARGET_MT7981=y
|
||||
CONFIG_ENABLE_NAND_NMBM=y
|
||||
CONFIG_MEDIATEK_BOOTMENU=y
|
||||
CONFIG_MEDIATEK_BOOTMENU_DELAY=3
|
||||
CONFIG_MEDIATEK_LOAD_FROM_RAM=y
|
||||
CONFIG_MT7981_BOOTMENU_UBI=y
|
||||
CONFIG_DEBUG_UART_BASE=0x11002000
|
||||
CONFIG_DEBUG_UART_CLOCK=40000000
|
||||
CONFIG_SYS_LOAD_ADDR=0x46000000
|
||||
CONFIG_DEBUG_UART=y
|
||||
CONFIG_BOOTDELAY=0
|
||||
CONFIG_AUTOBOOT_MENU_SHOW=y
|
||||
CONFIG_AUTOBOOT_MENU_MTK_SHOW=y
|
||||
CONFIG_DEFAULT_FDT_FILE="mt7981-spim-nand-rfb"
|
||||
CONFIG_LOGLEVEL=7
|
||||
CONFIG_LOG=y
|
||||
CONFIG_POLLER=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_SYS_PROMPT="MT7981> "
|
||||
# CONFIG_BOOTM_NETBSD is not set
|
||||
# CONFIG_BOOTM_PLAN9 is not set
|
||||
# CONFIG_BOOTM_RTEMS is not set
|
||||
# CONFIG_BOOTM_VXWORKS is not set
|
||||
CONFIG_CMD_MEMINFO=y
|
||||
# CONFIG_CMD_UNLZ4 is not set
|
||||
# CONFIG_CMD_UNZIP is not set
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_GPIO_READ=y
|
||||
CONFIG_CMD_MTD=y
|
||||
# CONFIG_CMD_NAND_EXT is not set
|
||||
CONFIG_CMD_NMBM=y
|
||||
CONFIG_CMD_TFTPPUT=y
|
||||
# CONFIG_CMD_NFS is not set
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_LED_BLINK=y
|
||||
CONFIG_CMD_SMC=y
|
||||
CONFIG_CMD_MTDPARTS=y
|
||||
CONFIG_MTDIDS_DEFAULT="nmbm0=nmbm0"
|
||||
CONFIG_MTDPARTS_DEFAULT="nmbm0:1024k(BL2),512k(u-boot-env),2048k(Factory),2048k(FIP),65536k(ubi),32768k(firmware_backup),1024k(zrsave),1024k(config2)"
|
||||
CONFIG_CMD_UBI=y
|
||||
CONFIG_CMD_GL_BTN=y
|
||||
CONFIG_OF_EMBED=y
|
||||
CONFIG_ENV_OVERWRITE=y
|
||||
CONFIG_ENV_IS_IN_MTD=y
|
||||
CONFIG_ENV_MTD_NAME="nmbm0"
|
||||
CONFIG_ENV_SIZE_REDUND=0x80000
|
||||
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_BUTTON=y
|
||||
CONFIG_BUTTON_GPIO=y
|
||||
CONFIG_CLK=y
|
||||
# CONFIG_I2C is not set
|
||||
# CONFIG_INPUT is not set
|
||||
CONFIG_LED=y
|
||||
CONFIG_LED_BLINK=y
|
||||
CONFIG_LED_GPIO=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_DM_MTD=y
|
||||
CONFIG_MTD_SPI_NAND=y
|
||||
CONFIG_PHY_FIXED=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_MEDIATEK_ETH=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCONF=y
|
||||
CONFIG_PINCTRL_MT7981=y
|
||||
CONFIG_POWER_DOMAIN=y
|
||||
CONFIG_MTK_POWER_DOMAIN=y
|
||||
CONFIG_RAM=y
|
||||
CONFIG_DM_SERIAL=y
|
||||
CONFIG_MTK_SERIAL=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_MTK_SPIM=y
|
||||
CONFIG_TIMER=y
|
||||
CONFIG_MTK_TIMER=y
|
||||
CONFIG_HEXDUMP=y
|
||||
CONFIG_WEBUI_FAILSAFE=y
|
||||
Reference in New Issue
Block a user