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uboot-mtk-20250711: switch to pending en8811h phy driver

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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
2025-08-13 18:23:04 +08:00
committed by hanwckf
parent 34da03f67c
commit ca1f0493f5
3 changed files with 734 additions and 605 deletions
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25
uboot-mtk-20250711/drivers/net/phy/Kconfig
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@@ -100,31 +100,6 @@ config PHY_AIROHA_EN8811H
help
AIROHA EN8811H supported.
choice
prompt "Location of the Airoha PHY firmware"
default PHY_AIROHA_FW_IN_MMC
depends on PHY_AIROHA_EN8811H
config PHY_AIROHA_FW_IN_MMC
bool "Airoha firmware in MMC boot1 partition"
endchoice
config AIROHA_FW_ADDR
hex "Airoha Firmware Address"
depends on PHY_AIROHA_EN8811H
default 0x0
config AIROHA_MD32_DM_SIZE
hex "Airoha Firmware MD32 DM Size"
depends on PHY_AIROHA_EN8811H
default 0x4000
config AIROHA_MD32_DSP_SIZE
hex "Airoha Firmware MD32 DSP Size"
depends on PHY_AIROHA_EN8811H
default 0x20000
menuconfig PHY_AQUANTIA
bool "Aquantia Ethernet PHYs support"
select PHY_GIGE

1134
uboot-mtk-20250711/drivers/net/phy/air_en8811h.c
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File diff suppressed because it is too large Load Diff

180
uboot-mtk-20250711/drivers/net/phy/air_en8811h.h
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@@ -1,180 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*************************************************
* FILE NAME: air_en8811h.h
* PURPOSE:
* EN8811H PHY Driver for Uboot
* NOTES:
*
* Copyright (C) 2023 Airoha Technology Corp.
*************************************************/
#ifndef __EN8811H_H
#define __EN8811H_H
#define AIR_UBOOT_REVISION ((((U_BOOT_VERSION_NUM / 1000) % 10) << 20) | \
(((U_BOOT_VERSION_NUM / 100) % 10) << 16) | \
(((U_BOOT_VERSION_NUM / 10) % 10) << 12) | \
((U_BOOT_VERSION_NUM % 10) << 8) | \
(((U_BOOT_VERSION_NUM_PATCH / 10) % 10) << 4) | \
((U_BOOT_VERSION_NUM_PATCH % 10) << 0))
#define EN8811H_PHY_ID1 0x03a2
#define EN8811H_PHY_ID2 0xa411
#define EN8811H_PHY_ID ((EN8811H_PHY_ID1 << 16) | EN8811H_PHY_ID2)
#define EN8811H_SPEED_2500 0x03
#define EN8811H_PHY_READY 0x02
#define MAX_RETRY 25
#define EN8811H_TX_POLARITY_NORMAL 0x1
#define EN8811H_TX_POLARITY_REVERSE 0x0
#define EN8811H_RX_POLARITY_NORMAL (0x0 << 1)
#define EN8811H_RX_POLARITY_REVERSE (0x1 << 1)
#ifndef BIT
#define BIT(nr) (1UL << (nr))
#endif
/* CL45 MDIO control */
#define MII_MMD_ACC_CTL_REG 0x0d
#define MII_MMD_ADDR_DATA_REG 0x0e
#define MMD_OP_MODE_DATA BIT(14)
/* MultiGBASE-T AN register */
#define MULTIG_ANAR_2500M (0x0080)
#define MULTIG_LPAR_2500M (0x0020)
#define EN8811H_DRIVER_VERSION "v1.0.6"
/* MII Registers */
#define AIR_AUX_CTRL_STATUS 0x1d
#define AIR_AUX_CTRL_STATUS_SPEED_MASK 0x1c
#define AIR_AUX_CTRL_STATUS_SPEED_100 0x4
#define AIR_AUX_CTRL_STATUS_SPEED_1000 0x8
#define AIR_AUX_CTRL_STATUS_SPEED_2500 0xc
#define EN8811H_CLK_CGM 0xcf958
#define EN8811H_CLK_CGM_CKO BIT(26)
#define EN8811H_HWTRAP1 0xcf914
#define EN8811H_HWTRAP1_CKO BIT(12)
#define EN8811H_POLARITY_MASK 0x3
#define EN8811H_POLARITY 0xca0f8
#define EN8811H_POLARITY_TX_NORMAL BIT(0)
#define EN8811H_POLARITY_RX_REVERSE BIT(1)
#define EN8811H_FW_VERSION 0x3b3c
/************************************************************
* For reference only
* LED0 Link 2500/Blink 2500 TxRx (GPIO5) <-> BASE_T_LED0,
* LED1 Link 1000/Blink 1000 TxRx (GPIO4) <-> BASE_T_LED1,
* LED2 Link 100/Blink 100 TxRx (GPIO3) <-> BASE_T_LED2,
************************************************************/
/* User-defined.B */
#define AIR_LED0_ON (LED_ON_EVT_LINK_2500M)
#define AIR_LED0_BLK (LED_BLK_EVT_2500M_TX_ACT | LED_BLK_EVT_2500M_RX_ACT)
#define AIR_LED1_ON (LED_ON_EVT_LINK_1000M)
#define AIR_LED1_BLK (LED_BLK_EVT_1000M_TX_ACT | LED_BLK_EVT_1000M_RX_ACT)
#define AIR_LED2_ON (LED_ON_EVT_LINK_100M)
#define AIR_LED2_BLK (LED_BLK_EVT_100M_TX_ACT | LED_BLK_EVT_100M_RX_ACT)
/* User-defined.E */
#define LED_ON_CTRL(i) (0x024 + ((i)*2))
#define LED_ON_EN (1 << 15)
#define LED_ON_POL (1 << 14)
#define LED_ON_EVT_MASK (0x1ff)
/* LED ON Event Option.B */
#define LED_ON_EVT_LINK_2500M (1 << 8)
#define LED_ON_EVT_FORCE (1 << 6)
#define LED_ON_EVT_HDX (1 << 5)
#define LED_ON_EVT_FDX (1 << 4)
#define LED_ON_EVT_LINK_DOWN (1 << 3)
#define LED_ON_EVT_LINK_100M (1 << 1)
#define LED_ON_EVT_LINK_1000M (1 << 0)
/* LED ON Event Option.E */
#define LED_BLK_CTRL(i) (0x025 + ((i)*2))
#define LED_BLK_EVT_MASK (0xfff)
/* LED Blinking Event Option.B*/
#define LED_BLK_EVT_2500M_RX_ACT (1 << 11)
#define LED_BLK_EVT_2500M_TX_ACT (1 << 10)
#define LED_BLK_EVT_FORCE (1 << 9)
#define LED_BLK_EVT_100M_RX_ACT (1 << 3)
#define LED_BLK_EVT_100M_TX_ACT (1 << 2)
#define LED_BLK_EVT_1000M_RX_ACT (1 << 1)
#define LED_BLK_EVT_1000M_TX_ACT (1 << 0)
/* LED Blinking Event Option.E*/
#define LED_ENABLE 1
#define LED_DISABLE 0
#define EN8811H_LED_COUNT 3
#define LED_BCR (0x021)
#define LED_BCR_EXT_CTRL (1 << 15)
#define LED_BCR_CLK_EN (1 << 3)
#define LED_BCR_TIME_TEST (1 << 2)
#define LED_BCR_MODE_MASK (3)
#define LED_BCR_MODE_DISABLE (0)
#define LED_BCR_MODE_2LED (1)
#define LED_BCR_MODE_3LED_1 (2)
#define LED_BCR_MODE_3LED_2 (3)
#define LED_ON_DUR (0x022)
#define LED_ON_DUR_MASK (0xffff)
#define LED_BLK_DUR (0x023)
#define LED_BLK_DUR_MASK (0xffff)
#define LED_GPIO_SEL_MASK 0x7FFFFFF
#define UNIT_LED_BLINK_DURATION 1024
#define INVALID_DATA 0xffff
#define PBUS_INVALID_DATA 0xffffffff
struct air_base_t_led_cfg_s {
u16 en;
u16 gpio;
u16 pol;
u16 on_cfg;
u16 blk_cfg;
};
enum {
AIR_LED2_GPIO3 = 3,
AIR_LED1_GPIO4,
AIR_LED0_GPIO5,
AIR_LED_LAST
};
enum {
AIR_BASE_T_LED0,
AIR_BASE_T_LED1,
AIR_BASE_T_LED2,
AIR_BASE_T_LED3
};
enum {
AIR_LED_BLK_DUR_32M,
AIR_LED_BLK_DUR_64M,
AIR_LED_BLK_DUR_128M,
AIR_LED_BLK_DUR_256M,
AIR_LED_BLK_DUR_512M,
AIR_LED_BLK_DUR_1024M,
AIR_LED_BLK_DUR_LAST
};
enum {
AIR_ACTIVE_LOW,
AIR_ACTIVE_HIGH,
};
enum {
AIR_LED_MODE_DISABLE,
AIR_LED_MODE_USER_DEFINE,
AIR_LED_MODE_LAST
};
#endif /* End of __EN8811H_MD32_H */