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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
2026-05-15 14:29:05 +08:00
parent 062579351e 8d844758c2
commit 2cfe204346
72 changed files with 3027 additions and 233 deletions
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package/boot/uboot-mediatek/Makefile
+1 -1
View File
@@ -543,7 +543,7 @@ define U-Boot/mt7981_livinet_zr-3020
endef
define U-Boot/mt7981_netis_nx30v2
NAME:=Netis NX30V2
NAME:=netis NX30 V2
BUILD_SUBTARGET:=filogic
BUILD_DEVICES:=netis_nx30v2
UBOOT_CONFIG:=mt7981_netis_nx30v2
package/boot/uboot-mediatek/patches/461-add-netis-nx30v2.patch
+4 -4
View File
@@ -9,7 +9,7 @@
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Netis NX30V2";
+ model = "netis NX30 V2";
+ compatible = "mediatek,mt7981", "mediatek,mt7981-rfb";
+ chosen {
+ stdout-path = &uart0;
@@ -385,10 +385,10 @@
+
+#netconsole
+netconsole=setenv stdout serial,nc;setenv stdin serial,nc
+nonetconcole=setenv stdout serial;setenv stdin serial
+nonetconsole=setenv stdout serial;setenv stdin serial
+
+# button commands
+button_cmd_0=run netconsole led_on; sleep 5; if button wps; then run nonetconcole offical_upgrade; fi
+button_cmd_0=run netconsole led_on; sleep 5; if button wps; then run nonetconsole offical_upgrade; fi
+button_cmd_0_name=wps
+button_cmd_1=run netconsole led_on reset_all; sleep 5; if button reset; then run nonetconcole; while true; do run upgrade_fw && run boot_nand; done; fi
+button_cmd_1=run netconsole led_on reset_all; sleep 5; if button reset; then run nonetconsole; while true; do run upgrade_fw && run boot_nand; done; fi
+button_cmd_1_name=reset
package/boot/uboot-rockchip/Makefile
+8
View File
@@ -398,6 +398,13 @@ define U-Boot/generic-rk3576
friendlyarm_nanopi-r76s
endef
define U-Boot/nanopi-m5-rk3576
$(U-Boot/rk3576/Default)
NAME:=NanoPi M5
BUILD_DEVICES:= \
friendlyarm_nanopi-m5
endef
define U-Boot/photonicat2-rk3576
$(U-Boot/rk3576/Default)
NAME:=Photonicat2
@@ -555,6 +562,7 @@ UBOOT_TARGETS := \
rock-3b-rk3568 \
sige3-rk3568 \
generic-rk3576 \
nanopi-m5-rk3576 \
photonicat2-rk3576 \
rock-4d-rk3576 \
cyber3588-aib-rk3588 \
package/kernel/linux/modules/input.mk
+16
View File
@@ -53,6 +53,22 @@ endef
$(eval $(call KernelPackage,hid-alps))
define KernelPackage/input-adc-keys
SUBMENU:=$(INPUT_MODULES_MENU)
TITLE:=ADC Ladder Buttons support
DEPENDS:=+kmod-input-core +kmod-iio-core
KCONFIG:= \
CONFIG_KEYBOARD_ADC \
CONFIG_INPUT_KEYBOARD=y
FILES:=$(LINUX_DIR)/drivers/input/keyboard/adc-keys.ko
AUTOLOAD:=$(call AutoProbe,adc-keys,1)
endef
define KernelPackage/input-adc-keys/description
Buttons/keys input driver for resistor ladder connected on ADC
endef
$(eval $(call KernelPackage,input-adc-keys))
define KernelPackage/input-core
SUBMENU:=$(INPUT_MODULES_MENU)
package/kernel/linux/modules/netdevices.mk
+1 -1
View File
@@ -1492,7 +1492,7 @@ define KernelPackage/ixgbe
CONFIG_IXGBE_DCA=n \
CONFIG_IXGBE_DCB=y
FILES:=$(LINUX_DIR)/drivers/net/ethernet/intel/ixgbe/ixgbe.ko
AUTOLOAD:=$(call AutoLoad,35,ixgbe)
AUTOLOAD:=$(call AutoLoad,35,ixgbe,1)
endef
define KernelPackage/ixgbe/description
package/kernel/ntfs/Makefile
+3 -3
View File
@@ -5,11 +5,11 @@ PKG_NAME:=linux-ntfs
PKG_RELEASE:=1
PKG_BUILD_PARALLEL:=1
PKG_SOURCE_DATE:=2026-04-25
PKG_SOURCE_DATE:=2026-05-03
PKG_SOURCE_URL:=https://github.com/namjaejeon/linux-ntfs
PKG_SOURCE_PROTO:=git
PKG_SOURCE_VERSION:=ce7495f3e5c6a0b85d3350c18bbc06370cdcceb5
PKG_MIRROR_HASH:=0815623624dae868c3ca0ae82cf57ebf5d19e6b42778e2b9d241f85369fe348f
PKG_SOURCE_VERSION:=9e031cf453d8b3c226aac7cb7105af46efd79690
PKG_MIRROR_HASH:=142b99c910b1dbf35ec97abee65f5f497e4a4fdf4619999f83742ed4f2e83d79
PKG_LICENSE:=GPL-2.0-or-later
package/kernel/ntfs/patches/001-conditionally-enable-posix-acl.patch
-11
View File
@@ -1,11 +0,0 @@
--- a/Makefile
+++ b/Makefile
@@ -9,7 +9,7 @@ ntfs-y := aops.o attrib.o collate.o dir.
iomap.o debug.o sysctl.o quota.o object_id.o bdev-io.o
ccflags-$(CONFIG_NTFS_DEBUG) += -DDEBUG
-ccflags-y += -DCONFIG_NTFS_FS_POSIX_ACL
+ccflags-$(CONFIG_FS_POSIX_ACL) += -DCONFIG_NTFS_FS_POSIX_ACL
else
# Called from external kernel module build
package/kernel/r8168/Makefile
+3 -3
View File
@@ -1,12 +1,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=r8168
PKG_VERSION:=8.055.00
PKG_RELEASE:=5
PKG_VERSION:=8.056.02
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
PKG_SOURCE_URL:=https://github.com/openwrt/rtl8168/releases/download/$(PKG_VERSION)
PKG_HASH:=61deb2a9cb7d6b08748ad51734b108da95d629712b64b204e2e6bd3f16d0a48f
PKG_HASH:=38c48129c41d1dc38681cb83e87c70bda12873384899d94ecc26bb79903829ce
PKG_BUILD_PARALLEL:=1
PKG_LICENSE:=GPLv2
package/kernel/r8168/patches/001-r8168_n-fix-proc_dump_rx_desc_2-on-32-bits.patch
+1 -1
View File
@@ -13,7 +13,7 @@ Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
--- a/src/r8168_n.c
+++ b/src/r8168_n.c
@@ -1668,9 +1668,9 @@ static int proc_dump_rx_desc_2(struct se
@@ -1671,9 +1671,9 @@ static int proc_dump_rx_desc_2(struct se
j, k);
for (i=0; i<(tp->RxDescLength/4); i++) {
if (!(i % 4))
package/kernel/r8168/patches/002-Makefile-fix-CFLAGS-with-linux-6.15.patch
-26
View File
@@ -1,26 +0,0 @@
From b5a3eaec6a4ba859602a286fcb5034cf3f25fc55 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
Date: Tue, 30 Dec 2025 14:35:03 +0100
Subject: [PATCH] Makefile: fix CFLAGS with linux 6.15+
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Ensure EXTRA_CFLAGS are taken into account.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
src/Makefile | 2 ++
1 file changed, 2 insertions(+)
--- a/src/Makefile
+++ b/src/Makefile
@@ -121,6 +121,8 @@ ifneq ($(KERNELRELEASE),)
ifeq ($(ENABLE_GIGA_LITE), y)
EXTRA_CFLAGS += -DENABLE_GIGA_LITE
endif
+
+ ccflags-y += $(EXTRA_CFLAGS)
else
BASEDIR := /lib/modules/$(shell uname -r)
KERNELDIR ?= $(BASEDIR)/build
package/kernel/r8168/patches/110-r8168-print-link-speed-and-duplex-mode.patch
+2 -2
View File
@@ -37,7 +37,7 @@ Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/delay.h>
@@ -5396,6 +5397,38 @@ rtl8168_link_down_patch(struct net_devic
@@ -5527,6 +5528,38 @@ rtl8168_link_down_patch(struct net_devic
#endif
}
@@ -76,7 +76,7 @@ Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
static void
rtl8168_check_link_status(struct net_device *dev)
{
@@ -5415,11 +5448,18 @@ rtl8168_check_link_status(struct net_dev
@@ -5546,11 +5579,18 @@ rtl8168_check_link_status(struct net_dev
if (link_status_on) {
rtl8168_link_on_patch(dev);
target/linux/airoha/dts/an7581-w1700k-ubi.dts
+10 -8
View File
@@ -351,10 +351,10 @@
compatible = "ethernet-phy-ieee802.3-c45";
reg = <5>;
reset-gpios = <&en7581_pinctrl 46 GPIO_ACTIVE_LOW>;
reset-assert-us = <40000>;
reset-deassert-us = <150000>;
interrupt-parent = <&en7581_pinctrl>;
interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
reset-assert-us = <200000>;
reset-deassert-us = <200000>;
// interrupt-parent = <&en7581_pinctrl>;
// interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
realtek,pnswap-tx;
realtek,pnswap-rx;
};
@@ -363,10 +363,10 @@
compatible = "ethernet-phy-ieee802.3-c45";
reg = <8>;
reset-gpios = <&en7581_pinctrl 31 GPIO_ACTIVE_LOW>;
reset-assert-us = <40000>;
reset-deassert-us = <150000>;
interrupt-parent = <&en7581_pinctrl>;
interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
reset-assert-us = <200000>;
reset-deassert-us = <200000>;
// interrupt-parent = <&en7581_pinctrl>;
// interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
realtek,pnswap-tx;
realtek,pnswap-rx;
};
@@ -375,6 +375,7 @@
&gsw_phy1 {
status = "okay";
interrupts = <1>;
pinctrl-names = "gbe-led";
pinctrl-0 = <&gswp1_led0_pins>;
};
@@ -386,6 +387,7 @@
&gsw_phy2 {
status = "okay";
interrupts = <2>;
pinctrl-names = "gbe-led";
pinctrl-0 = <&gswp2_led0_pins>;
};
target/linux/airoha/dts/an7581.dtsi
-4
View File
@@ -1056,7 +1056,6 @@
gsw_phy1: ethernet-phy@9 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <9>;
interrupts = <1>;
phy-mode = "internal";
status = "disabled";
@@ -1079,7 +1078,6 @@
gsw_phy2: ethernet-phy@a {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <10>;
interrupts = <2>;
phy-mode = "internal";
status = "disabled";
@@ -1102,7 +1100,6 @@
gsw_phy3: ethernet-phy@b {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <11>;
interrupts = <3>;
phy-mode = "internal";
status = "disabled";
@@ -1125,7 +1122,6 @@
gsw_phy4: ethernet-phy@c {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <12>;
interrupts = <4>;
phy-mode = "internal";
status = "disabled";
target/linux/apm821xx/dts/meraki-mr24.dts
-26
View File
@@ -64,21 +64,8 @@
* blocks (64KiB) in order to have spares
* around for bad block management
*/
compatible = "fixed-partitions";
label = "u-boot-env";
reg = <0x00150000 0x00010000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x0 0x10000>;
label = "u-boot-env-main";
status = "disabled";
nvmem-layout {
compatible = "u-boot,env-redundant-count";
};
};
};
partition@160000 {
@@ -87,21 +74,8 @@
* has to be kept it in sync with the
* data in "u-boot-env".
*/
compatible = "fixed-partitions";
label = "u-boot-env-redundant";
reg = <0x00160000 0x00010000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x0 0x10000>;
label = "u-boot-env-redundant";
status = "disabled";
nvmem-layout {
compatible = "u-boot,env-redundant-count";
};
};
};
partition@170000 {
target/linux/ath79/dts/qca955x_senao_router-dual.dtsi
-2
View File
@@ -77,8 +77,6 @@
nvmem-layout {
compatible = "u-boot,env";
#address-cells = <1>;
#size-cells = <1>;
macaddr_uboot_eth: ethaddr {
#nvmem-cell-cells = <1>;
target/linux/ath79/files/drivers/gpio/gpio-latch-mikrotik.c
+1 -1
View File
@@ -44,7 +44,7 @@ static void gpio_latch_unlock(struct gpio_latch_chip *glc, bool disable)
mutex_unlock(&glc->latch_mutex);
if (disable)
glc->latch_enabled = true;
glc->latch_enabled = false;
mutex_unlock(&glc->mutex);
}
target/linux/econet/Makefile
+1 -1
View File
@@ -7,7 +7,7 @@ include $(TOPDIR)/rules.mk
BOARD:=econet
BOARDNAME:=EcoNet EN75xx MIPS
FEATURES:=dt source-only squashfs nand usb
SUBTARGETS:=en751221 en7528
SUBTARGETS:=en751221 en751627 en7528
KERNEL_PATCHVER:=6.12
target/linux/econet/base-files/etc/board.d/02_network
+43
View File
@@ -0,0 +1,43 @@
. /lib/functions/system.sh
. /lib/functions/uci-defaults.sh
econet_setup_interfaces()
{
local board="$1"
case "$board" in
*)
# econet lacks DSA support now
ucidef_set_interface_lan "eth0"
;;
esac
}
econet_setup_macs()
{
local board="$1"
local lan_mac=""
local wan_mac=""
local label_mac=""
case "$board" in
huawei,hg2821t-u)
local conffile="/tmp/configuration_a/factory.conf"
lan_mac=$(get_mac_ascii "$conffile" brmac)
wan_mac=$(get_mac_ascii "$conffile" internetmac)
label_mac=$wan_mac
;;
esac
[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" "$lan_mac"
[ -n "$wan_mac" ] && ucidef_set_interface_macaddr "wan" "$wan_mac"
[ -n "$label_mac" ] && ucidef_set_label_macaddr "$label_mac"
}
board_config_update
board=$(board_name)
econet_setup_interfaces $board
econet_setup_macs $board
board_config_flush
exit 0
target/linux/econet/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac
Executable
+17
View File
@@ -0,0 +1,17 @@
[ "$ACTION" = "add" ] || exit 0
PHYNBR=${DEVPATH##*/phy}
[ -n "$PHYNBR" ] || exit 0
. /lib/functions/system.sh
board=$(board_name)
case "$board" in
huawei,hg2821t-u)
conffile="/tmp/configuration_a/factory.conf"
[ "$PHYNBR" -eq 0 ] && get_mac_ascii "$conffile" APMAC_5G > /sys${DEVPATH}/macaddress
[ "$PHYNBR" -eq 1 ] && get_mac_ascii "$conffile" APMAC > /sys${DEVPATH}/macaddress
;;
esac
target/linux/econet/base-files/lib/preinit/09_mount_factory_data
+18
View File
@@ -0,0 +1,18 @@
preinit_mount_factory_data() {
local mtd_path=$(find_mtd_part "$1")
[ -n "$mtd_path" ] || return
mkdir -p "/tmp/$1"
mount -o ro,noatime -t jffs2 "$mtd_path" "/tmp/$1"
}
preinit_mount_factory_partitions() {
case $(board_name) in
huawei,hg2821t-u)
preinit_mount_factory_data configuration_a
;;
esac
}
boot_hook_add preinit_main preinit_mount_factory_partitions
target/linux/econet/base-files/sbin/en75_chboot
+16
View File
@@ -111,6 +111,14 @@ main() {
code_openwrt=0000000101000002
code_factory=0000000101010003
;;
huawei,hg2821t-u)
part=$(part_named '"flag"')
offset_blocks=14
block_size=$((1024 * 128))
code_offset=0
code_openwrt=30ffffff30ffffff
code_factory=31ffffff31ffffff
;;
nokia,g240g-e)
part=$(part_named '"flag"')
offset_blocks=0
@@ -129,6 +137,14 @@ main() {
code_openwrt=30000000
code_factory=31000000
;;
zyxel,ex3301-t0)
part=$(part_named '"reservearea"')
offset_blocks=5
block_size=$((1024 * 128))
code_offset=4095
code_openwrt=30
code_factory=31
;;
zyxel,pmg5617ga)
# 00060fff
part=$(part_named '"reservearea"')
target/linux/econet/dts/en751221.dtsi
+101
View File
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
#include <dt-bindings/reset/econet,en751221-scu.h>
#include <dt-bindings/clock/econet,en751221-scu.h>
/dts-v1/;
@@ -53,6 +54,18 @@
reg = <0x1fa20000 0x388>;
};
pcie_phy1: pcie-phy@1fac0000 {
compatible = "econet,en751221-pcie-phy1";
reg = <0x1fac0000 0x1000>;
#phy-cells = <0>;
};
pcie_phy0: pcie-phy@1faf2000 {
compatible = "econet,en751221-pcie-phy0";
reg = <0x1faf2000 0x1000>;
#phy-cells = <0>;
};
intc: interrupt-controller@1fb40000 {
compatible = "econet,en751221-intc";
reg = <0x1fb40000 0x100>;
@@ -167,6 +180,94 @@
};
};
pciecfg: pciecfg@1fb80000 {
compatible = "mediatek,generic-pciecfg", "syscon";
reg = <0x1fb80000 0x1000>;
};
pcie0: pcie@1fb81000 {
compatible = "econet,en7528-pcie";
device_type = "pci";
reg = <0x1fb81000 0x1000>;
reg-names = "port0";
linux,pci-domain = <0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-parent = <&intc>;
interrupts = <23>;
interrupt-names = "pcie_irq";
clocks = <&scuclk EN751221_CLK_PCIE>;
clock-names = "sys_ck0";
phys = <&pcie_phy0>;
phy-names = "pcie-phy0";
bus-range = <0x00 0xff>;
ranges = <0x01000000 0 0x00000000 0x1f600000 0 0x00008000>,
<0x82000000 0 0x20000000 0x20000000 0 0x08000000>;
status = "disabled";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc0 0>,
<0 0 0 2 &pcie_intc0 1>,
<0 0 0 3 &pcie_intc0 2>,
<0 0 0 4 &pcie_intc0 3>;
pcie_intc0: interrupt-controller {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
};
slot0: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie1: pcie@1fb83000 {
compatible = "econet,en7528-pcie";
device_type = "pci";
reg = <0x1fb83000 0x1000>;
reg-names = "port1";
linux,pci-domain = <1>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-parent = <&intc>;
interrupts = <24>;
interrupt-names = "pcie_irq";
clocks = <&scuclk EN751221_CLK_PCIE>;
clock-names = "sys_ck1";
phys = <&pcie_phy1>;
phy-names = "pcie-phy1";
bus-range = <0x00 0xff>;
ranges = <0x81000000 0 0x00000000 0x1f608000 0 0x00008000>,
<0x82000000 0 0x28000000 0x28000000 0 0x08000000>;
status = "disabled";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc1 0>,
<0 0 0 2 &pcie_intc1 1>,
<0 0 0 3 &pcie_intc1 2>,
<0 0 0 4 &pcie_intc1 3>;
pcie_intc1: interrupt-controller {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
};
slot1: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
usb: usb@1fb90000 {
compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";
reg = <0x1fb90000 0x4000>,
target/linux/econet/dts/en751221_huawei_hg2821t-u.dts
+118
View File
@@ -0,0 +1,118 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/dts-v1/;
#include "en751221.dtsi"
/ {
model = "Huawei HG2821T-U";
compatible = "huawei,hg2821t-u", "econet,en751221";
memory@0 {
device_type = "memory";
reg = <0x00000000 0x1c000000>;
};
chosen {
stdout-path = "/serial@1fbf0000:115200";
bootargs = "ubi.mtd=rootfs_a";
};
};
&nand {
status = "okay";
econet,bmt;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bootloader";
reg = <0x0 0x20000>;
read-only;
};
partition@20000 {
label = "flag";
reg = <0x20000 0x1e0000>;
econet,enable-remap;
};
partition@200000 {
label = "kernel_a";
reg = <0x200000 0x400000>;
econet,enable-remap;
};
partition@600000 {
label = "rootfs_a";
reg = <0x600000 0x3800000>;
econet,boot-flag-value = <0>;
};
partition@3e00000 {
label = "kernel_b";
reg = <0x3e00000 0x400000>;
econet,enable-remap;
};
partition@4200000 {
label = "rootfs_b";
reg = <0x4200000 0x3800000>;
econet,boot-flag-value = <1>;
};
partition@7a00000 {
label = "configuration_a";
reg = <0x7a00000 0x200000>;
read-only;
};
partition@7c00000 {
label = "configuration_b";
reg = <0x7c00000 0xa00000>;
econet,enable-remap;
};
partition@8600000 {
label = "userlocalct";
reg = <0x8600000 0x400000>;
econet,enable-remap;
};
partition@8a00000 {
label = "userdata";
reg = <0x8a00000 0x600000>;
econet,enable-remap;
};
partition@9000000 {
label = "framework1";
reg = <0x9000000 0x800000>;
econet,enable-remap;
};
partition@9800000 {
label = "framework2";
reg = <0x9800000 0x800000>;
econet,enable-remap;
};
/* UBI */
partition@a000000 {
label = "apps";
reg = <0xa000000 0x4a00000>;
};
partition@ea00000 {
label = "reservearea";
reg = <0xea00000 0x100000>;
econet,enable-remap;
};
};
};
&gmac0 {
status = "okay";
};
target/linux/econet/dts/en751221_smartfiber_xp8421-b.dts
+25
View File
@@ -110,3 +110,28 @@
nvmem-cells = <&macaddr_bootloader_ff48 0>;
nvmem-cell-names = "mac-address";
};
&pcie0 {
status = "okay";
};
&slot0 {
wifi@0,0 {
/* MT7612E */
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_reserve_180040>, <&macaddr_bootloader_ff48 1>;
nvmem-cell-names = "eeprom", "mac-address";
};
};
&pcie1 {
status = "okay";
};
&slot1 {
wifi@0,0 {
/* MT7592 */
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_reserve_140000>, <&macaddr_bootloader_ff48 2>;
nvmem-cell-names = "eeprom", "mac-address";
};
};
target/linux/econet/dts/en751221_tplink_archer-vr1200v-v2.dts
+25
View File
@@ -102,3 +102,28 @@
nvmem-cells = <&macaddr_misc_8f100 0>;
nvmem-cell-names = "mac-address";
};
&pcie0 {
status = "okay";
};
&slot0 {
wifi@0,0 {
/* MT7592 */
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_misc_80000>, <&macaddr_misc_8f100 1>;
nvmem-cell-names = "eeprom", "mac-address";
};
};
&pcie1 {
status = "okay";
};
&slot1 {
wifi@0,0 {
/* MT7613BE */
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_misc_a0000>, <&macaddr_misc_8f100 2>;
nvmem-cell-names = "eeprom", "mac-address";
};
};
target/linux/econet/dts/en751221_zyxel_pmg5617ga.dts
+43
View File
@@ -77,6 +77,49 @@
partition@7540000 {
label = "reservearea";
reg = <0x007540000 0x000080000>;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_reserve_60000: eeprom@60000 {
/* MT7592 */
/* This overlaps the MT7612E EEPROM, but MT7603E demands
* 1024 bytes of EEPROM even though only 512 bytes are used.
*/
reg = <0x60000 0x400>;
};
eeprom_reserve_60200: eeprom@60200 {
/* MT7612E */
reg = <0x60200 0x200>;
};
};
};
};
};
&pcie0 {
status = "okay";
};
&slot0 {
wifi@0,0 {
/* MT7592 */
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_reserve_60000>;
nvmem-cell-names = "eeprom";
};
};
&pcie1 {
status = "okay";
};
&slot1 {
wifi@0,0 {
/* MT7612E */
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_reserve_60200>;
nvmem-cell-names = "eeprom";
};
};
target/linux/econet/dts/en751627.dtsi
+246
View File
@@ -0,0 +1,246 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/dts-v1/;
#include <dt-bindings/interrupt-controller/mips-gic.h>
#include <dt-bindings/clock/en7523-clk.h>
#include <dt-bindings/reset/airoha,en7523-reset.h>
/ {
compatible = "econet,en751627";
#address-cells = <1>;
#size-cells = <1>;
hpt_clock: clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <200000000>; /* 200 MHz */
};
spi_clock: spi-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <40000000>; /* 40 MHz */
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "mips,mips1004Kc";
reg = <0>;
};
cpu@1 {
device_type = "cpu";
compatible = "mips,mips1004Kc";
reg = <1>;
};
};
cpuintc: interrupt-controller {
compatible = "mti,cpu-interrupt-controller";
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
};
gic: interrupt-controller@1f8c0000 {
compatible = "mti,gic";
reg = <0x1f8c0000 0x20000>;
interrupt-controller;
#interrupt-cells = <3>;
interrupt-parent = <&cpuintc>;
interrupts = <2>;
};
pcie_phy0: pcie-phy@1faf2000 {
compatible = "econet,en7528-pcie-phy1";
reg = <0x1faf2000 0x1000>;
#phy-cells = <0>;
};
pcie_phy1: pcie-phy@1fac0000 {
compatible = "econet,en7528-pcie-phy1";
reg = <0x1fac0000 0x1000>;
#phy-cells = <0>;
};
gpio0: gpio@1fbf0200 {
compatible = "airoha,en7523-gpio";
reg = <0x1fbf0204 0x4>,
<0x1fbf0200 0x4>,
<0x1fbf0220 0x4>,
<0x1fbf0214 0x4>;
gpio-controller;
#gpio-cells = <2>;
};
gpio1: gpio@1fbf0270 {
compatible = "airoha,en7523-gpio";
reg = <0x1fbf0270 0x4>,
<0x1fbf0260 0x4>,
<0x1fbf0264 0x4>,
<0x1fbf0278 0x4>;
gpio-controller;
#gpio-cells = <2>;
};
scu: system-controller@1fb00000 {
compatible = "airoha,en7523-scu";
reg = <0x1fa20000 0x400>,
<0x1fb00000 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
};
timer_hpt: timer@1fbf0400 {
compatible = "econet,en7528-timer";
reg = <0x1fbf0400 0x14>,
<0x1fbe0000 0x14>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 30 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SHARED 29 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SHARED 37 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SHARED 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&hpt_clock>;
};
spi_ctrl: spi@1fa10000 {
compatible = "airoha,en7581-snand";
reg = <0x1fa10000 0x140>,
<0x1fa11000 0x160>;
clocks = <&spi_clock>;
clock-names = "spi";
#address-cells = <1>;
#size-cells = <0>;
nand: nand@0 {
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <40000000>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <2>;
};
};
uart: serial@1fbf0000 {
compatible = "airoha,en7523-uart";
reg = <0x1fbf0000 0x30>;
reg-io-width = <4>;
reg-shift = <2>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <7372800>;
};
pciecfg: pciecfg@1fb80000 {
compatible = "mediatek,generic-pciecfg", "syscon";
reg = <0x1fb80000 0x1000>;
};
pcie0: pcie@1fb81000 {
compatible = "econet,en7528-pcie";
device_type = "pci";
reg = <0x1fb81000 0x1000>;
reg-names = "port0";
linux,pci-domain = <0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pcie_irq";
clocks = <&scu EN7523_CLK_PCIE>;
clock-names = "sys_ck0";
phys = <&pcie_phy0>;
phy-names = "pcie-phy0";
bus-range = <0x00 0xff>;
ranges = <0x01000000 0 0x00000000 0x1f600000 0 0x00010000>,
<0x82000000 0 0x20000000 0x20000000 0 0x08000000>;
status = "disabled";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc0 0>,
<0 0 0 2 &pcie_intc0 1>,
<0 0 0 3 &pcie_intc0 2>,
<0 0 0 4 &pcie_intc0 3>;
pcie_intc0: interrupt-controller {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
};
slot0: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie1: pcie@1fb83000 {
compatible = "econet,en7528-pcie";
device_type = "pci";
reg = <0x1fb83000 0x1000>;
reg-names = "port1";
linux,pci-domain = <1>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pcie_irq";
clocks = <&scu EN7523_CLK_PCIE>;
clock-names = "sys_ck1";
phys = <&pcie_phy1>;
phy-names = "pcie-phy1";
bus-range = <0x00 0xff>;
ranges = <0x01000000 0 0x00000000 0x1f610000 0 0x00010000>,
<0x82000000 0 0x28000000 0x28000000 0 0x08000000>;
status = "disabled";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc1 0>,
<0 0 0 2 &pcie_intc1 1>,
<0 0 0 3 &pcie_intc1 2>,
<0 0 0 4 &pcie_intc1 3>;
pcie_intc1: interrupt-controller {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
};
slot1: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
usb: usb@1fb90000 {
compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";
reg = <0x1fb90000 0x4000>,
<0x1fa80700 0x100>;
reg-names = "mac", "ippc";
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 17 IRQ_TYPE_LEVEL_HIGH>;
usb3-lpm-capable;
};
};
target/linux/econet/dts/en751627_zyxel_ex3301-t0.dts
+117
View File
@@ -0,0 +1,117 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/dts-v1/;
#include "en751627.dtsi"
/ {
model = "Zyxel EX3301-T0";
compatible = "zyxel,ex3301-t0", "econet,en751627";
memory@0 {
device_type = "memory";
reg = <0x00000000 0x10000000>;
};
chosen {
stdout-path = "/serial@1fbf0000:115200";
};
};
&nand {
status = "okay";
econet,bmt;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0all {
label = "all_of_flash";
reg = <0x0 0x8000000>;
read-only;
};
partition@0 {
label = "bootloader";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "romfile";
reg = <0x40000 0x40000>;
read-only;
};
partition@80000 {
label = "tclinux";
reg = <0x80000 0x2800000>;
read-only;
econet,enable-remap;
};
/* Nested inside of tclinux */
partition@480000 {
label = "rootfs";
reg = <0x480000 0x2400000>;
linux,rootfs;
read-only;
};
partition@2880000 {
label = "tclinux_alt";
reg = <0x2880000 0x2620000>;
};
partition@4ea0000 {
label = "wwan";
reg = <0x4ea0000 0x100000>;
};
partition@4fa0000 {
label = "factory_data";
reg = <0x4fa0000 0x400000>;
};
partition@53a0000 {
label = "rom-d";
reg = <0x53a0000 0x100000>;
};
partition@54a0000 {
label = "misc";
reg = <0x54a0000 0x2000000>;
};
factory: partition@74a0000 {
label = "factory";
reg = <0x74a0000 0x80000>;
};
partition@7520000 {
label = "reservearea";
reg = <0x7520000 0xc0000>;
};
};
};
&pcie0 {
status = "okay";
};
&slot0 {
status = "okay";
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
big-endian;
};
};
&pcie1 {
status = "okay";
/* Slot 1 is a second link to the same wifi chip */
};
target/linux/econet/en751221/config-6.12
+20 -4
View File
@@ -2,6 +2,7 @@ CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
CONFIG_BLK_MQ_PCI=y
CONFIG_CLKSRC_MMIO=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_COMMON_CLK=y
@@ -69,7 +70,9 @@ CONFIG_GENERIC_LIB_ASHRDI3=y
CONFIG_GENERIC_LIB_CMPDI2=y
CONFIG_GENERIC_LIB_LSHRDI3=y
CONFIG_GENERIC_LIB_UCMPDI2=y
CONFIG_GENERIC_MSI_IRQ=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_TIME_VSYSCALL=y
@@ -84,10 +87,12 @@ CONFIG_HZ_PERIODIC=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
# CONFIG_JFFS2_FS is not set
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_ZLIB=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LZO_COMPRESS=y
@@ -119,7 +124,6 @@ CONFIG_NET_EGRESS=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_INGRESS=y
CONFIG_NET_XGRESS=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
CONFIG_NR_CPUS=2
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
@@ -135,15 +139,27 @@ CONFIG_PADATA=y
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PCI_DRIVERS_LEGACY=y
CONFIG_PCI=y
CONFIG_PCIEAER=y
CONFIG_PCIEPORTBUS=y
CONFIG_PCIE_MEDIATEK=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PCI_DRIVERS_GENERIC=y
CONFIG_PCI_MSI=y
CONFIG_PCI_MSI_ARCH_FALLBACKS=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
# CONFIG_PHY_EN7528_PCIE is not set
CONFIG_PHY_EN7528_PCIE=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RAS=y
CONFIG_RATIONAL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
target/linux/econet/en751627/config-6.12
+239
View File
@@ -0,0 +1,239 @@
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BOARD_SCACHE=y
CONFIG_CLKSRC_MMIO=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_COMMON_CLK=y
CONFIG_COMMON_CLK_EN7523=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CONTEXT_TRACKING=y
CONFIG_CONTEXT_TRACKING_IDLE=y
CONFIG_CPU_BIG_ENDIAN=y
CONFIG_CPU_GENERIC_DUMP_TLB=y
CONFIG_CPU_HAS_DIEI=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_RIXI=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
CONFIG_CPU_MIPSR2=y
CONFIG_CPU_MIPSR2_IRQ_EI=y
CONFIG_CPU_MIPSR2_IRQ_VI=y
CONFIG_CPU_MITIGATIONS=y
CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
CONFIG_CPU_R4K_CACHE_TLB=y
CONFIG_CPU_RMAP=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CPU_SUPPORTS_MSA=y
CONFIG_CRC16=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_ZSTD=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_ZBOOT=y
CONFIG_DMA_NEED_SYNC=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DTB_ECONET_NONE=y
CONFIG_DTC=y
CONFIG_EARLY_PRINTK=y
CONFIG_EARLY_PRINTK_8250=y
CONFIG_ECONET=y
CONFIG_ECONET_EN751221_TIMER=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_FS_IOMAP=y
CONFIG_FUNCTION_ALIGNMENT=0
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IOMAP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_LIB_ASHLDI3=y
CONFIG_GENERIC_LIB_ASHRDI3=y
CONFIG_GENERIC_LIB_CMPDI2=y
CONFIG_GENERIC_LIB_LSHRDI3=y
CONFIG_GENERIC_LIB_UCMPDI2=y
CONFIG_GENERIC_MSI_IRQ=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_EN7523=y
CONFIG_GPIO_GENERIC=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HZ_PERIODIC=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
# CONFIG_JFFS2_FS is not set
CONFIG_LEDS_GPIO=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MFD_SYSCON=y
CONFIG_MIGRATION=y
CONFIG_MIPS=y
CONFIG_MIPS_ASID_BITS=8
CONFIG_MIPS_ASID_SHIFT=0
CONFIG_MIPS_CM=y
# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
CONFIG_MIPS_CMDLINE_FROM_DTB=y
CONFIG_MIPS_CPC=y
CONFIG_MIPS_CPS=y
# CONFIG_MIPS_CPS_NS16550_BOOL is not set
CONFIG_MIPS_CPU_SCACHE=y
CONFIG_MIPS_GIC=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MIPS_MT=y
CONFIG_MIPS_MT_FPAFF=y
CONFIG_MIPS_MT_SMP=y
# CONFIG_MIPS_NO_APPENDED_DTB is not set
CONFIG_MIPS_NR_CPU_NR_MAP=4
CONFIG_MIPS_PERF_SHARED_TC_COUNTERS=y
CONFIG_MIPS_RAW_APPENDED_DTB=y
CONFIG_MIPS_SPRAM=y
CONFIG_MMU_LAZY_TLB_REFCOUNT=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_MTK_BMT=y
CONFIG_MTD_SPI_NAND=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=13
CONFIG_MTD_UBI_BLOCK=y
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SRCU_NMI_SAFE=y
CONFIG_NET_EGRESS=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_INGRESS=y
CONFIG_NET_XGRESS=y
CONFIG_NLS=y
CONFIG_NR_CPUS=4
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_NVMEM_SYSFS=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_PADATA=y
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PCI=y
CONFIG_PCIE_MEDIATEK=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PCI_DRIVERS_GENERIC=y
CONFIG_PCI_MSI=y
CONFIG_PCI_MSI_ARCH_FALLBACKS=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHY_EN7528_PCIE=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RATIONAL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
# CONFIG_SCHED_CORE is not set
CONFIG_SCHED_SMT=y
CONFIG_SERIAL_8250_AIROHA=y
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SGL_ALLOC=y
CONFIG_SMP=y
CONFIG_SMP_UP=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
# CONFIG_SOC_ECONET_EN751221 is not set
CONFIG_SOC_ECONET_EN7528=y
CONFIG_SPI=y
# CONFIG_SPI_AIROHA_EN7523 is not set
CONFIG_SPI_AIROHA_SNFI=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SPLIT_PTE_PTLOCKS=y
CONFIG_SYNC_R4K=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_HIGHMEM=y
CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_SYS_SUPPORTS_MIPS16=y
CONFIG_SYS_SUPPORTS_MIPS_CPS=y
CONFIG_SYS_SUPPORTS_MULTITHREADING=y
CONFIG_SYS_SUPPORTS_SCHED_SMT=y
CONFIG_SYS_SUPPORTS_SMP=y
CONFIG_SYS_SUPPORTS_ZBOOT=y
CONFIG_SYS_SUPPORTS_ZBOOT_UART16550=y
CONFIG_TARGET_ISA_REV=2
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
CONFIG_UBIFS_FS=y
CONFIG_USB=y
CONFIG_USB_COMMON=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_MTK=y
# CONFIG_USB_XHCI_PLATFORM is not set
CONFIG_USE_GENERIC_EARLY_PRINTK_8250=y
CONFIG_USE_OF=y
CONFIG_WEAK_ORDERING=y
CONFIG_XPS=y
CONFIG_XXHASH=y
CONFIG_ZBOOT_LOAD_ADDRESS=0x80020000
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZSTD_COMMON=y
CONFIG_ZSTD_COMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y
target/linux/econet/en751627/profiles/00-default.mk
+12
View File
@@ -0,0 +1,12 @@
# SPDX-License-Identifier: GPL-2.0-only
#
# Copyright (C) 2025 OpenWrt.org
define Profile/Default
NAME:=Default Profile
endef
define Profile/Default/Description
Default package set compatible with most EN7516 and EN7527 boards.
endef
$(eval $(call Profile,Default))
target/linux/econet/en751627/target.mk
+13
View File
@@ -0,0 +1,13 @@
# SPDX-License-Identifier: GPL-2.0-only
ARCH:=mips
SUBTARGET:=en751627
BOARDNAME:=EN7516 and EN7527 based boards
CPU_TYPE:=24kc
KERNELNAME:=vmlinuz.bin
DEFAULT_PACKAGES += kmod-leds-gpio kmod-gpio-button-hotplug wpad-openssl
define Target/Description
Build firmware images for EcoNet EN7516 and EN7527 based boards.
endef
target/linux/econet/image/Makefile
+21
View File
@@ -13,14 +13,35 @@ define Build/tclinux-trx
mv $@.new $@
endef
# If TCSUPPORT_FREE_BOOTBASE is enabled, bootloader will decompress the kernel
# at 0x80002000 instead of 0x80020000.
#
# You can tell it by looking at the bootloader version string
# " at %s version %s free bootbase".
define Build/tclinux-free-bootbase-jump
@[ "$(KERNEL_LOADADDR)" = 0x80020000 ] || { \
$(call ERROR_MESSAGE,WARNING: KERNEL_LOADADDR changed); \
rm -f $@; \
}
printf '\010\000\200\000' > $@.new
dd if=/dev/zero bs=122876 count=1 >> $@.new
cat $@ >> $@.new
mv $@.new $@
endef
# tclinux bootloader requires LZMA, BUT only provides 7.5MB of space
# to decompress into. So we use vmlinuz and decompress twice.
define Device/Default
DEVICE_DTS_DIR := ../dts
BLOCKSIZE := 128k
PAGESIZE := 2048
# decompression buffer limit, the size of LZMA-compressed data is read from
# the trx header
KERNEL_SIZE := 7480k
KERNEL_NAME := vmlinuz.bin
KERNEL_LOADADDR := 0x80020000
KERNEL := kernel-bin | append-dtb
UBINIZE_OPTS := -E 5
endef
include $(SUBTARGET).mk
target/linux/econet/image/en751221.mk
+23 -2
View File
@@ -9,6 +9,26 @@ define Device/en751221_generic
endef
TARGET_DEVICES += en751221_generic
define Device/huawei_hg2821t-u
DEVICE_VENDOR := Huawei
DEVICE_MODEL := HG2821T-U
DEVICE_DTS := en751221_huawei_hg2821t-u
KERNEL_DECOMPRESSED_SIZE := 7672k
KERNEL_SIZE := 4096k
IMAGE_SIZE := 57344k
FACTORY_SIZE := 40960k
NAND_SIZE := 256m
KERNEL := kernel-bin | append-dtb | tclinux-free-bootbase-jump | \
check-size $$(KERNEL_DECOMPRESSED_SIZE) | lzma
KERNEL_INITRAMFS := kernel-bin | append-dtb
IMAGES := kernel.bin rootfs.bin sysupgrade.bin
IMAGE/kernel.bin := append-kernel
IMAGE/rootfs.bin := append-ubi | check-size $$(FACTORY_SIZE)
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
DEVICE_PACKAGES := kmod-usb3
endef
TARGET_DEVICES += huawei_hg2821t-u
define Device/nokia_g240g-e
DEVICE_VENDOR := Nokia
DEVICE_MODEL := G-240G-E
@@ -25,7 +45,7 @@ define Device/smartfiber_xp8421-b
DEVICE_DTS := en751221_smartfiber_xp8421-b
IMAGES := tclinux.trx
IMAGE/tclinux.trx := append-kernel | lzma | tclinux-trx
DEVICE_PACKAGES := kmod-usb3
DEVICE_PACKAGES := kmod-usb3 kmod-mt7603 kmod-mt76x2
endef
TARGET_DEVICES += smartfiber_xp8421-b
@@ -41,6 +61,7 @@ define Device/tplink_archer-vr1200v-v2
TPLINK_HWREVADD := 0x0
TPLINK_HVERSION := 3
DEVICE_DTS := en751221_tplink_archer-vr1200v-v2
DEVICE_PACKAGES := kmod-mt7603 kmod-mt7615e kmod-mt7663-firmware-ap
IMAGES := sysupgrade.bin
IMAGE/sysupgrade.bin := append-kernel | lzma | pad-to 4193792 | append-rootfs | \
tplink-v2-header -R 0x400000
@@ -53,6 +74,6 @@ define Device/zyxel_pmg5617ga
DEVICE_DTS := en751221_zyxel_pmg5617ga
IMAGES := tclinux.trx
IMAGE/tclinux.trx := append-kernel | lzma | tclinux-trx
DEVICE_PACKAGES := kmod-usb3
DEVICE_PACKAGES := kmod-usb3 kmod-mt7603 kmod-mt76x2
endef
TARGET_DEVICES += zyxel_pmg5617ga
target/linux/econet/image/en751627.mk
+11
View File
@@ -0,0 +1,11 @@
TRX_ENDIAN := be
define Device/zyxel_ex3301-t0
DEVICE_VENDOR := Zyxel
DEVICE_MODEL := EX3301-T0
DEVICE_DTS := en751627_zyxel_ex3301-t0
IMAGES := tclinux.trx
IMAGE/tclinux.trx := append-kernel | lzma | tclinux-trx
DEVICE_PACKAGES := kmod-usb3 kmod-mt7915e kmod-mt7915-firmware
endef
TARGET_DEVICES += zyxel_ex3301-t0
target/linux/econet/patches-6.12/912-pcie-add-en7528-pcie-and-phy-support.patch
+68 -22
View File
@@ -11,7 +11,17 @@
help
--- a/arch/mips/econet/Kconfig
+++ b/arch/mips/econet/Kconfig
@@ -28,9 +28,11 @@ choice
@@ -14,7 +14,9 @@ choice
select COMMON_CLK
select CPU_BIG_ENDIAN
select ECONET_EN751221_INTC
+ select HAVE_PCI
select IRQ_MIPS_CPU
+ select PCI_DRIVERS_GENERIC
select SMP
select SMP_UP
select SYS_SUPPORTS_SMP
@@ -28,9 +30,11 @@ choice
bool "EN7528 family"
select COMMON_CLK
select CPU_LITTLE_ENDIAN
@@ -205,7 +215,7 @@
broadcom/ \
--- /dev/null
+++ b/drivers/phy/phy-en7528-pcie.c
@@ -0,0 +1,119 @@
@@ -0,0 +1,155 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2026 Ahmed Naseef <naseefkm@gmail.com>
@@ -220,41 +230,71 @@
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+
+struct en7528_pcie_phy_data {
+struct en7528_pcie_phy_op {
+ u32 reg;
+ u32 mask;
+ u32 val;
+ u32 max_reg;
+};
+
+struct en7528_pcie_phy {
+ struct regmap *regmap;
+ const struct en7528_pcie_phy_data *data;
+ const struct en7528_pcie_phy_op *data;
+};
+
+/* Port 0 PHY: set LCDDS_CLK_PH_INV for PLL operation */
+static const struct en7528_pcie_phy_data en7528_phy_port0 = {
+ .reg = 0x4a0,
+ .mask = BIT(5),
+ .val = BIT(5),
+ .max_reg = 0x4a0,
+static const struct en7528_pcie_phy_op en7528_phy_port0[] = {
+ {
+ .reg = 0x4a0,
+ .mask = BIT(5),
+ .val = BIT(5),
+ },
+ { /* sentinel */ }
+};
+
+/* Port 1 PHY: Rx impedance tuning, target R -5 Ohm */
+static const struct en7528_pcie_phy_data en7528_phy_port1 = {
+ .reg = 0xb2c,
+ .mask = GENMASK(13, 12),
+ .val = BIT(12),
+ .max_reg = 0xb2c,
+static const struct en7528_pcie_phy_op en7528_phy_port1[] = {
+ {
+ .reg = 0xb2c,
+ .mask = GENMASK(13, 12),
+ .val = BIT(12),
+ },
+ { /* sentinel */ }
+};
+
+/* EN751221 Port 1 PHY */
+static const struct en7528_pcie_phy_op en751221_phy_port1[] = {
+ /* Rx Detection Timing for 7512 E1, 16*8 clock cycles */
+ {
+ .reg = 0xa28,
+ .mask = GENMASK(17, 9),
+ .val = 16 << 9,
+ },
+ /* Same for different power mode */
+ {
+ .reg = 0xa2c,
+ .mask = GENMASK(8, 0),
+ .val = 16,
+ },
+ { /* sentinel */ }
+};
+
+static int en7528_pcie_phy_init(struct phy *phy)
+{
+ struct en7528_pcie_phy *ephy = phy_get_drvdata(phy);
+ const struct en7528_pcie_phy_data *data = ephy->data;
+ const struct en7528_pcie_phy_op *data = ephy->data;
+ int i, ret;
+
+ return regmap_update_bits(ephy->regmap, data->reg,
+ data->mask, data->val);
+ for (i = 0; data[i].mask || data[i].val; i++) {
+ if (i)
+ usleep_range(1000, 2000);
+
+ ret = regmap_update_bits(ephy->regmap, data[i].reg,
+ data[i].mask, data[i].val);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
+static const struct phy_ops en7528_pcie_phy_ops = {
@@ -265,7 +305,7 @@
+static int en7528_pcie_phy_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ const struct en7528_pcie_phy_data *data;
+ const struct en7528_pcie_phy_op *data;
+ struct regmap_config regmap_config = {
+ .reg_bits = 32,
+ .val_bits = 32,
@@ -275,6 +315,7 @@
+ struct en7528_pcie_phy *ephy;
+ void __iomem *base;
+ struct phy *phy;
+ int i;
+
+ data = of_device_get_match_data(dev);
+ if (!data)
@@ -290,7 +331,10 @@
+ if (IS_ERR(base))
+ return PTR_ERR(base);
+
+ regmap_config.max_register = data->max_reg;
+ for (i = 0; data[i].mask || data[i].val; i++)
+ if (data[i].reg > regmap_config.max_register)
+ regmap_config.max_register = data[i].reg;
+
+ ephy->regmap = devm_regmap_init_mmio(dev, base, &regmap_config);
+ if (IS_ERR(ephy->regmap))
+ return PTR_ERR(ephy->regmap);
@@ -307,8 +351,10 @@
+}
+
+static const struct of_device_id en7528_pcie_phy_ids[] = {
+ { .compatible = "econet,en7528-pcie-phy0", .data = &en7528_phy_port0 },
+ { .compatible = "econet,en7528-pcie-phy1", .data = &en7528_phy_port1 },
+ { .compatible = "econet,en7528-pcie-phy0", .data = en7528_phy_port0 },
+ { .compatible = "econet,en7528-pcie-phy1", .data = en7528_phy_port1 },
+ { .compatible = "econet,en751221-pcie-phy0", .data = en7528_phy_port0 },
+ { .compatible = "econet,en751221-pcie-phy1", .data = en751221_phy_port1 },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, en7528_pcie_phy_ids);
target/linux/generic/backport-6.12/940-v7.1-net-dsa-realtek-rtl8365mb-fix-mode-mask-calculation.patch
+34
View File
@@ -0,0 +1,34 @@
From 0c078021d3861966614d5e594ee03587f0c9e74d Mon Sep 17 00:00:00 2001
From: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Date: Sun, 19 Apr 2026 21:37:07 +0200
Subject: net: dsa: realtek: rtl8365mb: fix mode mask calculation
The RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_MASK macro was shifting
the 4-bit mask (0xF) by only (_extint % 2) bits instead of
(_extint % 2) * 4. This caused the mask to overlap with the adjacent
nibble when configuring odd-numbered external interfaces, selecting
the wrong bits entirely.
Align the shift calculation with the existing ...MODE_OFFSET macro.
Fixes: 4af2950c50c8 ("net: dsa: realtek-smi: add rtl8365mb subdriver for RTL8365MB-VC")
Signed-off-by: Abdulkader Alrezej <alrazj.abdulkader@gmail.com>
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Reviewed-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
Link: https://patch.msgid.link/400a6387-a444-4576-af6d-26be5410bce3@yahoo.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
---
drivers/net/dsa/realtek/rtl8365mb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/dsa/realtek/rtl8365mb.c
+++ b/drivers/net/dsa/realtek/rtl8365mb.c
@@ -216,7 +216,7 @@
(_extint) == 2 ? RTL8365MB_DIGITAL_INTERFACE_SELECT_REG1 : \
0x0)
#define RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_MASK(_extint) \
- (0xF << (((_extint) % 2)))
+ (0xF << (((_extint) % 2) * 4))
#define RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_OFFSET(_extint) \
(((_extint) % 2) * 4)
target/linux/generic/backport-6.12/941-v7.2-net-dsa-realtek-rtl8365mb-add-support-for-rtl8367sb.patch
+42
View File
@@ -0,0 +1,42 @@
From 28702a215c96917d85558ad6309a57ab224808c0 Mon Sep 17 00:00:00 2001
From: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Date: Sat, 9 May 2026 14:10:29 +0200
Subject: net: dsa: realtek: rtl8365mb: add support for RTL8367SB
Add chip info entry for the Realtek RTL8367SB switch. This device has
chip ID 0x6367 and version 0x0010. It exposes two external interfaces:
port 6 supports MII, TMII, RMII, RGMII, SGMII and HSGMII, while port 7
supports MII, TMII, RMII and RGMII. Use the existing 8365MB-VC jam table
for initialization.
Reviewed-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://patch.msgid.link/3c6d822b-0e85-4173-86ba-2badb140bbf1@yahoo.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/dsa/realtek/rtl8365mb.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
--- a/drivers/net/dsa/realtek/rtl8365mb.c
+++ b/drivers/net/dsa/realtek/rtl8365mb.c
@@ -545,6 +545,20 @@ static const struct rtl8365mb_chip_info
.jam_size = ARRAY_SIZE(rtl8365mb_init_jam_8365mb_vc),
},
{
+ .name = "RTL8367SB",
+ .chip_id = 0x6367,
+ .chip_ver = 0x0010,
+ .extints = {
+ { 6, 1, PHY_INTF(MII) | PHY_INTF(TMII) |
+ PHY_INTF(RMII) | PHY_INTF(RGMII) |
+ PHY_INTF(SGMII) | PHY_INTF(HSGMII) },
+ { 7, 2, PHY_INTF(MII) | PHY_INTF(TMII) |
+ PHY_INTF(RMII) | PHY_INTF(RGMII) },
+ },
+ .jam_table = rtl8365mb_init_jam_8365mb_vc,
+ .jam_size = ARRAY_SIZE(rtl8365mb_init_jam_8365mb_vc),
+ },
+ {
.name = "RTL8367RB-VB",
.chip_id = 0x6367,
.chip_ver = 0x0020,
target/linux/generic/backport-6.18/940-v7.1-net-dsa-realtek-rtl8365mb-fix-mode-mask-calculation.patch
+34
View File
@@ -0,0 +1,34 @@
From 0c078021d3861966614d5e594ee03587f0c9e74d Mon Sep 17 00:00:00 2001
From: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Date: Sun, 19 Apr 2026 21:37:07 +0200
Subject: net: dsa: realtek: rtl8365mb: fix mode mask calculation
The RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_MASK macro was shifting
the 4-bit mask (0xF) by only (_extint % 2) bits instead of
(_extint % 2) * 4. This caused the mask to overlap with the adjacent
nibble when configuring odd-numbered external interfaces, selecting
the wrong bits entirely.
Align the shift calculation with the existing ...MODE_OFFSET macro.
Fixes: 4af2950c50c8 ("net: dsa: realtek-smi: add rtl8365mb subdriver for RTL8365MB-VC")
Signed-off-by: Abdulkader Alrezej <alrazj.abdulkader@gmail.com>
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Reviewed-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
Link: https://patch.msgid.link/400a6387-a444-4576-af6d-26be5410bce3@yahoo.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
---
drivers/net/dsa/realtek/rtl8365mb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/dsa/realtek/rtl8365mb.c
+++ b/drivers/net/dsa/realtek/rtl8365mb.c
@@ -216,7 +216,7 @@
(_extint) == 2 ? RTL8365MB_DIGITAL_INTERFACE_SELECT_REG1 : \
0x0)
#define RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_MASK(_extint) \
- (0xF << (((_extint) % 2)))
+ (0xF << (((_extint) % 2) * 4))
#define RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_OFFSET(_extint) \
(((_extint) % 2) * 4)
target/linux/generic/backport-6.18/941-v7.2-net-dsa-realtek-rtl8365mb-add-support-for-rtl8367sb.patch
+42
View File
@@ -0,0 +1,42 @@
From 28702a215c96917d85558ad6309a57ab224808c0 Mon Sep 17 00:00:00 2001
From: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Date: Sat, 9 May 2026 14:10:29 +0200
Subject: net: dsa: realtek: rtl8365mb: add support for RTL8367SB
Add chip info entry for the Realtek RTL8367SB switch. This device has
chip ID 0x6367 and version 0x0010. It exposes two external interfaces:
port 6 supports MII, TMII, RMII, RGMII, SGMII and HSGMII, while port 7
supports MII, TMII, RMII and RGMII. Use the existing 8365MB-VC jam table
for initialization.
Reviewed-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://patch.msgid.link/3c6d822b-0e85-4173-86ba-2badb140bbf1@yahoo.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/dsa/realtek/rtl8365mb.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
--- a/drivers/net/dsa/realtek/rtl8365mb.c
+++ b/drivers/net/dsa/realtek/rtl8365mb.c
@@ -545,6 +545,20 @@ static const struct rtl8365mb_chip_info
.jam_size = ARRAY_SIZE(rtl8365mb_init_jam_8365mb_vc),
},
{
+ .name = "RTL8367SB",
+ .chip_id = 0x6367,
+ .chip_ver = 0x0010,
+ .extints = {
+ { 6, 1, PHY_INTF(MII) | PHY_INTF(TMII) |
+ PHY_INTF(RMII) | PHY_INTF(RGMII) |
+ PHY_INTF(SGMII) | PHY_INTF(HSGMII) },
+ { 7, 2, PHY_INTF(MII) | PHY_INTF(TMII) |
+ PHY_INTF(RMII) | PHY_INTF(RGMII) },
+ },
+ .jam_table = rtl8365mb_init_jam_8365mb_vc,
+ .jam_size = ARRAY_SIZE(rtl8365mb_init_jam_8365mb_vc),
+ },
+ {
.name = "RTL8367RB-VB",
.chip_id = 0x6367,
.chip_ver = 0x0020,
target/linux/mediatek/dts/mt7981b-netis-nx30v2.dts
+15
View File
@@ -4,6 +4,7 @@
#include "mt7981b-netis-common.dtsi"
/ {
model = "netis NX30 V2";
compatible = "netis,nx30v2", "mediatek,mt7981";
aliases {
@@ -36,6 +37,20 @@
gpios = <&pio 5 GPIO_ACTIVE_LOW>;
};
wifi2g {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WLAN_2GHZ;
gpios = <&pio 34 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
wifi5g {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WLAN_5GHZ;
gpios = <&pio 35 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
wan {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WAN;
target/linux/mediatek/dts/mt7986a-tplink-eap683-lr.dts
-1
View File
@@ -224,7 +224,6 @@
};
partition@300000 {
compatible = "u-boot,env";
reg = <0x300000 0x100000>;
label = "u-boot-env";
};
target/linux/mediatek/image/filogic.mk
+7 -4
View File
@@ -2691,16 +2691,19 @@ endef
TARGET_DEVICES += netgear_wax220
define Device/netis_nx30v2
DEVICE_VENDOR := Netis
DEVICE_MODEL := NX30V2
DEVICE_VENDOR := netis
DEVICE_MODEL := NX30
DEVICE_VARIANT := V2
DEVICE_ALT0_VENDOR := Netcore
DEVICE_ALT0_MODEL := POWER30AX
DEVICE_ALT0_MODEL := POWER 30AX
DEVICE_ALT1_VENDOR := Netcore
DEVICE_ALT1_MODEL := N30PRO
DEVICE_ALT1_MODEL := N30 Pro
DEVICE_ALT2_VENDOR := GWBN
DEVICE_ALT2_MODEL := GW3001
DEVICE_ALT3_VENDOR := GLC
DEVICE_ALT3_MODEL := W7
DEVICE_ALT4_VENDOR := netis
DEVICE_ALT4_MODEL := MEX605
DEVICE_DTS := mt7981b-netis-nx30v2
DEVICE_DTS_DIR := ../dts
DEVICE_DTC_FLAGS := --pad 4096
target/linux/qualcommax/dts/ipq5018-scr50axe.dts
+5 -13
View File
@@ -300,22 +300,14 @@
compatible = "qcom,smem-part";
partition-0-appsblenv {
compatible = "fixed-partitions";
label = "0:appsblenv";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "env-data";
reg = <0x0 0x40000>;
nvmem-layout {
compatible = "u-boot,env";
env-size = <0x40000>;
nvmem-layout {
compatible = "u-boot,env";
macaddr_appsblenv_ethaddr: ethaddr {
compatible = "mac-base";
#nvmem-cell-cells = <1>;
};
macaddr_appsblenv_ethaddr: ethaddr {
#nvmem-cell-cells = <1>;
};
};
};
target/linux/qualcommax/dts/ipq5018-wn-dax3000gr.dts
+5 -13
View File
@@ -171,22 +171,14 @@
compatible = "qcom,smem-part";
partition-0-appsblenv {
compatible = "fixed-partitions";
label = "0:appsblenv";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "env-data";
reg = <0x0 0x40000>;
nvmem-layout {
compatible = "u-boot,env";
env-size = <0x40000>;
nvmem-layout {
compatible = "u-boot,env";
macaddr_appsblenv_ethaddr: ethaddr {
compatible = "mac-base";
#nvmem-cell-cells = <1>;
};
macaddr_appsblenv_ethaddr: ethaddr {
#nvmem-cell-cells = <1>;
};
};
};
target/linux/qualcommax/dts/ipq5018-wrc-x3000gs2.dts
+5 -13
View File
@@ -165,22 +165,14 @@
compatible = "qcom,smem-part";
partition-0-appsblenv {
compatible = "fixed-partitions";
label = "0:appsblenv";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "env-data";
reg = <0x0 0x40000>;
nvmem-layout {
compatible = "u-boot,env";
env-size = <0x40000>;
nvmem-layout {
compatible = "u-boot,env";
macaddr_appsblenv_ethaddr: ethaddr {
compatible = "mac-base";
#nvmem-cell-cells = <1>;
};
macaddr_appsblenv_ethaddr: ethaddr {
#nvmem-cell-cells = <1>;
};
};
};
target/linux/qualcommax/dts/ipq8072-wax218.dts
+4 -11
View File
@@ -160,21 +160,14 @@
compatible = "qcom,smem-part";
partition-0-appsblenv {
compatible = "fixed-partitions";
label = "0:appsblenv";
read-only;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "env-data";
reg = <0x0 0x40000>;
nvmem-layout {
compatible = "u-boot,env";
env-size = <0x40000>;
nvmem-layout {
compatible = "u-boot,env";
macaddr_ubootenv_ethaddr: ethaddr {
};
macaddr_ubootenv_ethaddr: ethaddr {
};
};
};
target/linux/qualcommax/dts/ipq8074-wxr-5950ax12.dts
+4 -11
View File
@@ -188,21 +188,14 @@
compatible = "qcom,smem-part";
partition-0-appsblenv {
compatible = "fixed-partitions";
label = "0:appsblenv";
read-only;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "env-data";
reg = <0x0 0x40000>;
nvmem-layout {
compatible = "u-boot,env";
env-size = <0x40000>;
nvmem-layout {
compatible = "u-boot,env";
macaddr_appsblenv_ethaddr: ethaddr {
};
macaddr_appsblenv_ethaddr: ethaddr {
};
};
};
target/linux/ramips/dts/mt7621_ruijie_rg-ew1300g-v1.dts
+159
View File
@@ -0,0 +1,159 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
compatible = "ruijie,rg-ew1300g-v1", "mediatek,mt7621-soc";
model = "Ruijie RG-EW1300G v1";
aliases {
led-boot = &led_status_red;
led-failsafe = &led_status_green;
led-running = &led_status_green;
led-upgrade = &led_status_red;
};
chosen {
bootargs = "console=ttyS0,57600n8";
};
leds {
compatible = "gpio-leds";
led_status_green: status_green {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
led_status_red: status_red {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
};
led_mesh_green: mesh_green {
function = LED_FUNCTION_WPS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
button-mesh {
label = "mesh";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
button-reset {
label = "reset";
gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x50000>;
read-only;
};
partition@50000 {
label = "u-boot-env";
reg = <0x50000 0x10000>;
read-only;
};
partition@60000 {
label = "factory";
reg = <0x60000 0x10000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x4da8>;
};
};
};
partition@70000 {
label = "product_info";
reg = <0x70000 0x10000>;
read-only;
};
partition@80000 {
label = "kdump";
reg = <0x80000 0x10000>;
read-only;
};
partition@90000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x90000 0xf70000>;
};
};
};
};
&pcie {
status = "okay";
};
&pcie0 {
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
};
&switch0 {
ports {
port@0 {
status = "okay";
label = "wan";
};
port@1 {
status = "okay";
label = "lan3";
};
port@2 {
status = "okay";
label = "lan2";
};
port@3 {
status = "okay";
label = "lan1";
};
};
};
target/linux/ramips/dts/mt7628an_movingcomm_c120ev.dts
+195
View File
@@ -0,0 +1,195 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7628an.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
compatible = "movingcomm,c120ev", "mediatek,mt7628an-soc";
model = "MovingComm C120EV";
aliases {
led-boot = &led_wps;
led-failsafe = &led_wps;
led-running = &led_wps;
led-upgrade = &led_wps;
label-mac-device = &ethernet;
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
wlan2g {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WLAN;
gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
lan {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
linux,default-trigger = "netdev";
};
led_wps: wps {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WPS;
gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
};
};
gpio_export {
compatible = "gpio-export";
board_power {
gpio-export,name = "board-power";
gpio-export,output = <1>;
gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
};
modem_power {
gpio-export,name = "modem-power";
gpio-export,output = <0>;
gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
};
};
};
&state_default {
gpio {
groups = "i2c", "spis", "gpio", "refclk", "wled_an", "wdt";
function = "gpio";
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
m25p,fast-read;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x400>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x4da8>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
macaddr_factory_2e: macaddr@2e {
reg = <0x2e 0x6>;
};
macaddr_factory_8004: macaddr@8004 {
reg = <0x8004 0x6>;
};
};
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0xfb0000>;
};
};
};
};
&esw {
mediatek,portmap = <0x3e>;
};
&ethernet {
nvmem-cells = <&macaddr_factory_4>;
nvmem-cell-names = "mac-address";
};
&wmac {
status = "okay";
nvmem-cells = <&eeprom_factory_0>, <&macaddr_factory_2e>;
nvmem-cell-names = "eeprom", "mac-address";
};
&pcie {
status = "okay";
};
&pcie0 {
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_factory_8000>, <&macaddr_factory_8004>;
nvmem-cell-names = "eeprom", "mac-address";
ieee80211-freq-limit = <5000000 6000000>;
};
};
&usbphy {
status = "okay";
};
&ehci {
status = "okay";
};
&ohci {
status = "okay";
};
target/linux/ramips/image/mt7621.mk
+10
View File
@@ -2754,6 +2754,16 @@ define Device/ruijie_rg-ew1200g-pro-v1.1
endef
TARGET_DEVICES += ruijie_rg-ew1200g-pro-v1.1
define Device/ruijie_rg-ew1300g-v1
$(Device/dsa-migration)
IMAGE_SIZE := 15808k
DEVICE_VENDOR := Ruijie
DEVICE_MODEL := RG-EW1300G
DEVICE_VARIANT := v1
DEVICE_PACKAGES := kmod-mt7615-firmware
endef
TARGET_DEVICES += ruijie_rg-ew1300g-v1
define Device/samknows_whitebox-v8
$(Device/dsa-migration)
$(Device/uimage-lzma-loader)
target/linux/ramips/image/mt76x8.mk
+9
View File
@@ -646,6 +646,15 @@ define Device/motorola_mwr03
endef
TARGET_DEVICES += motorola_mwr03
define Device/movingcomm_c120ev
IMAGE_SIZE := 16064k
DEVICE_VENDOR := MovingComm
DEVICE_MODEL := C120EV
DEVICE_PACKAGES := kmod-mt7615e kmod-mt7663-firmware-ap kmod-usb2 kmod-usb-ohci kmod-usb-net-cdc-ether kmod-usb-serial-option
IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(BLOCKSIZE) | append-rootfs | pad-rootfs | check-size | append-metadata
endef
TARGET_DEVICES += movingcomm_c120ev
define Device/netgear_r6020
$(Device/netgear_sercomm_nor)
IMAGE_SIZE := 7104k
target/linux/ramips/mt7621/base-files/etc/board.d/02_network
+4 -2
View File
@@ -192,7 +192,8 @@ ramips_setup_interfaces()
ucidef_set_interface_lan "lan1 lan2 lan3 lan4"
ucidef_set_interface "qtn" ifname "eth1" protocol "static" ipaddr "1.1.1.1" netmask "255.255.255.0"
;;
ruijie,rg-ew1200g-pro-v1.1)
ruijie,rg-ew1200g-pro-v1.1|\
ruijie,rg-ew1300g-v1)
ucidef_set_interfaces_lan_wan "lan3 lan2 lan1" "wan"
;;
*)
@@ -294,7 +295,8 @@ ramips_setup_macs()
wwan_mac=$(macaddr_add $label_mac 1)
ucidef_set_interface "wwan0" device "/dev/cdc-wdm0" protocol "qmi" macaddr "$wwan_mac"
;;
ruijie,rg-ew1200g-pro-v1.1)
ruijie,rg-ew1200g-pro-v1.1|\
ruijie,rg-ew1300g-v1)
lan_mac=$(mtd_get_mac_ascii product_info ethaddr)
wan_mac=$(macaddr_add "$lan_mac" 8)
label_mac=$lan_mac
target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac
+2 -1
View File
@@ -163,7 +163,8 @@ case "$board" in
[ "$PHYNBR" = "0" ] && \
macaddr_setbit_la "$(get_mac_label)" > /sys${DEVPATH}/macaddress
;;
ruijie,rg-ew1200g-pro-v1.1)
ruijie,rg-ew1200g-pro-v1.1|\
ruijie,rg-ew1300g-v1)
hw_mac_addr="$(mtd_get_mac_ascii product_info ethaddr)"
[ "$PHYNBR" = "0" ] && macaddr_add $hw_mac_addr 1 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $hw_mac_addr 2 > /sys${DEVPATH}/macaddress
target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds
+3
View File
@@ -85,6 +85,9 @@ keenetic,kn-1713)
mediatek,linkit-smart-7688)
ucidef_set_led_wlan "wifi" "wifi" "orange:wifi" "phy0tpt"
;;
movingcomm,c120ev)
ucidef_set_led_netdev "lan" "lan" "green:lan" "eth0" "link"
;;
oraybox,x1)
ucidef_set_led_netdev "wifi" "wifi" "blue:status" "wlan0"
;;
target/linux/ramips/mt76x8/base-files/etc/board.d/02_network
+5 -1
View File
@@ -140,7 +140,8 @@ ramips_setup_interfaces()
keenetic,kn-1510|\
keenetic,kn-1613|\
keenetic,kn-1713|\
motorola,mwr03)
motorola,mwr03|\
movingcomm,c120ev)
ucidef_add_switch "switch0" \
"1:lan" "2:lan" "3:lan" "0:wan" "6@eth0"
;;
@@ -357,6 +358,9 @@ ramips_setup_macs()
label_mac=$(mtd_get_mac_binary factory 0x4)
wan_mac=$(macaddr_add "$label_mac" 2)
;;
movingcomm,c120ev)
wan_mac=$(mtd_get_mac_binary factory 0x28)
;;
onion,omega2|\
onion,omega2p|\
vocore,vocore2|\
target/linux/realtek/dts/rtl8393_edgecore_ecs4100-12ph.dts
-1
View File
@@ -209,7 +209,6 @@
read-only;
};
partition@100000 {
compatible = "u-boot,env";
label = "u-boot-env";
reg = <0x100000 0x20000>;
};
target/linux/rockchip/armv8/base-files/etc/board.d/01_leds
+1
View File
@@ -8,6 +8,7 @@ boardname="${board##*,}"
board_config_update
case $board in
friendlyarm,nanopi-m5|\
friendlyarm,nanopi-r2c|\
friendlyarm,nanopi-r2c-plus|\
friendlyarm,nanopi-r2s|\
target/linux/rockchip/armv8/base-files/etc/board.d/02_network
+2
View File
@@ -13,6 +13,7 @@ rockchip_setup_interfaces()
armsom,sige7|\
ezpro,mrkaio-m68s|\
firefly,rk3568-roc-pc|\
friendlyarm,nanopi-m5|\
friendlyarm,nanopi-r2c|\
friendlyarm,nanopi-r2c-plus|\
friendlyarm,nanopi-r2s|\
@@ -100,6 +101,7 @@ rockchip_setup_macs()
cyber,cyber3588-aib|\
ezpro,mrkaio-m68s|\
friendlyarm,nanopc-t6|\
friendlyarm,nanopi-m5|\
friendlyarm,nanopi-r2c|\
friendlyarm,nanopi-r2s|\
friendlyarm,nanopi-r76s|\
target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity
+1
View File
@@ -68,6 +68,7 @@ xunlong,orangepi-r1-plus-lts)
set_interface_core 2 "eth0"
set_interface_core 4 "eth1" "xhci-hcd:usb[0-9]+"
;;
friendlyarm,nanopi-m5|\
friendlyarm,nanopi-r4s|\
friendlyarm,nanopi-r4se|\
friendlyarm,nanopi-r4s-enterprise|\
target/linux/rockchip/armv8/config-6.12
+2 -1
View File
@@ -342,6 +342,7 @@ CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_RK3X=y
CONFIG_IIO=y
# CONFIG_IIO_SCMI is not set
CONFIG_IIO_TRIGGERED_BUFFER=y
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_INDIRECT_PIO=y
CONFIG_INPUT=y
@@ -616,7 +617,7 @@ CONFIG_ROCKCHIP_MFPWM=y
CONFIG_ROCKCHIP_PHY=y
CONFIG_ROCKCHIP_PM_DOMAINS=y
CONFIG_ROCKCHIP_PWM_CAPTURE=y
# CONFIG_ROCKCHIP_SARADC is not set
CONFIG_ROCKCHIP_SARADC=y
CONFIG_ROCKCHIP_THERMAL=y
CONFIG_ROCKCHIP_TIMER=y
CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
target/linux/rockchip/armv8/config-6.18
+2 -1
View File
@@ -350,6 +350,7 @@ CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_RK3X=y
CONFIG_IIO=y
# CONFIG_IIO_SCMI is not set
CONFIG_IIO_TRIGGERED_BUFFER=y
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_INDIRECT_PIO=y
CONFIG_INPUT=y
@@ -629,7 +630,7 @@ CONFIG_ROCKCHIP_IOMMU=y
CONFIG_ROCKCHIP_MBOX=y
CONFIG_ROCKCHIP_PHY=y
CONFIG_ROCKCHIP_PM_DOMAINS=y
# CONFIG_ROCKCHIP_SARADC is not set
CONFIG_ROCKCHIP_SARADC=y
CONFIG_ROCKCHIP_THERMAL=y
CONFIG_ROCKCHIP_TIMER=y
CONFIG_RPS=y
target/linux/rockchip/image/armv8.mk
+22 -9
View File
@@ -167,7 +167,8 @@ define Device/friendlyarm_nanopc-t4
DEVICE_VENDOR := FriendlyARM
DEVICE_MODEL := NanoPC T4
DEVICE_PACKAGES := kmod-brcmfmac wpad-openssl \
brcmfmac-firmware-4356-sdio brcmfmac-nvram-4356-sdio
brcmfmac-firmware-4356-sdio brcmfmac-nvram-4356-sdio \
kmod-button-hotplug kmod-input-adc-keys
endef
TARGET_DEVICES += friendlyarm_nanopc-t4
@@ -175,10 +176,18 @@ define Device/friendlyarm_nanopc-t6
$(Device/rk3588)
DEVICE_VENDOR := FriendlyARM
DEVICE_MODEL := NanoPC T6
DEVICE_PACKAGES := kmod-r8125
DEVICE_PACKAGES := kmod-button-hotplug kmod-input-adc-keys kmod-r8125
endef
TARGET_DEVICES += friendlyarm_nanopc-t6
define Device/friendlyarm_nanopi-m5
$(Device/rk3576)
DEVICE_VENDOR := FriendlyARM
DEVICE_MODEL := NanoPi M5
DEVICE_PACKAGES := blkdiscard block-mount kmod-button-hotplug kmod-input-adc-keys kmod-nvme
endef
TARGET_DEVICES += friendlyarm_nanopi-m5
define Device/friendlyarm_nanopi-r2c
$(Device/rk3328)
DEVICE_VENDOR := FriendlyARM
@@ -256,7 +265,7 @@ define Device/friendlyarm_nanopi-r6c
$(Device/rk3588s)
DEVICE_VENDOR := FriendlyARM
DEVICE_MODEL := NanoPi R6C
DEVICE_PACKAGES := kmod-r8125
DEVICE_PACKAGES := kmod-button-hotplug kmod-input-adc-keys kmod-r8125
endef
TARGET_DEVICES += friendlyarm_nanopi-r6c
@@ -264,7 +273,7 @@ define Device/friendlyarm_nanopi-r6s
$(Device/rk3588s)
DEVICE_VENDOR := FriendlyARM
DEVICE_MODEL := NanoPi R6S
DEVICE_PACKAGES := kmod-r8125
DEVICE_PACKAGES := kmod-button-hotplug kmod-input-adc-keys kmod-r8125
endef
TARGET_DEVICES += friendlyarm_nanopi-r6s
@@ -289,7 +298,7 @@ define Device/linkease_easepi-r1
$(Device/rk3568)
DEVICE_VENDOR := LinkEase
DEVICE_MODEL := EasePi R1
DEVICE_PACKAGES := blkdiscard block-mount kmod-button-hotplug kmod-nvme kmod-r8125
DEVICE_PACKAGES := blkdiscard block-mount kmod-button-hotplug kmod-input-adc-keys kmod-nvme kmod-r8125
endef
TARGET_DEVICES += linkease_easepi-r1
@@ -368,7 +377,7 @@ define Device/radxa_e20c
DEVICE_MODEL := E20C
DEVICE_DTS := rk3528-radxa-e20c
UBOOT_DEVICE_NAME := radxa-e20c-rk3528
DEVICE_PACKAGES := kmod-r8169
DEVICE_PACKAGES := kmod-button-hotplug kmod-input-adc-keys kmod-r8169
endef
TARGET_DEVICES += radxa_e20c
@@ -389,7 +398,7 @@ define Device/radxa_e52c
DEVICE_MODEL := E52C
DEVICE_DTS := rk3582-radxa-e52c
UBOOT_DEVICE_NAME := generic-rk3588
DEVICE_PACKAGES := blkdiscard kmod-r8125
DEVICE_PACKAGES := blkdiscard kmod-button-hotplug kmod-input-adc-keys kmod-r8125
DEVICE_COMPAT_VERSION := 1.1
DEVICE_COMPAT_MESSAGE := Network interface names have been changed
endef
@@ -400,6 +409,7 @@ define Device/radxa_rock-2a
DEVICE_VENDOR := Radxa
DEVICE_MODEL := ROCK 2A
UBOOT_DEVICE_NAME := rock-2-rk3528
DEVICE_PACKAGES := kmod-button-hotplug kmod-input-adc-keys
endef
TARGET_DEVICES += radxa_rock-2a
@@ -408,6 +418,7 @@ define Device/radxa_rock-2f
DEVICE_VENDOR := Radxa
DEVICE_MODEL := ROCK 2F
UBOOT_DEVICE_NAME := rock-2-rk3528
DEVICE_PACKAGES := kmod-button-hotplug kmod-input-adc-keys
endef
TARGET_DEVICES += radxa_rock-2f
@@ -461,7 +472,8 @@ define Device/radxa_rock-5-itx
$(Device/rk3588)
DEVICE_VENDOR := Radxa
DEVICE_MODEL := ROCK 5 ITX/ITX+
DEVICE_PACKAGES := blkdiscard block-mount kmod-ata-ahci kmod-hwmon-pwmfan kmod-nvme kmod-r8125 kmod-rtw89-8852be wpad-openssl
DEVICE_PACKAGES := blkdiscard block-mount kmod-ata-ahci kmod-button-hotplug \
kmod-hwmon-pwmfan kmod-input-adc-keys kmod-nvme kmod-r8125 kmod-rtw89-8852be wpad-openssl
endef
TARGET_DEVICES += radxa_rock-5-itx
@@ -529,7 +541,8 @@ define Device/radxa_rock-pi-e
DEVICE_ALT0_VENDOR := Radxa
DEVICE_ALT0_MODEL := ROCK Pi E v3.0
SUPPORTED_DEVICES := radxa,rockpi-e
DEVICE_PACKAGES := kmod-rtw88-8723du kmod-rtw88-8821cu kmod-usb-net-cdc-ncm kmod-usb-net-rndis wpad-openssl
DEVICE_PACKAGES := kmod-button-hotplug kmod-input-adc-keys kmod-rtw88-8723du kmod-rtw88-8821cu \
kmod-usb-net-cdc-ncm kmod-usb-net-rndis wpad-openssl
endef
TARGET_DEVICES += radxa_rock-pi-e
target/linux/rockchip/modules.mk
-18
View File
@@ -56,21 +56,3 @@ define KernelPackage/drm-rockchip/description
endef
$(eval $(call KernelPackage,drm-rockchip))
define KernelPackage/saradc-rockchip
SUBMENU:=$(IIO_MENU)
TITLE:=Rockchip SARADC support
DEPENDS:=@TARGET_rockchip +kmod-industrialio-triggered-buffer
KCONFIG:= \
CONFIG_RESET_CONTROLLER=y \
CONFIG_ROCKCHIP_SARADC
FILES:= \
$(LINUX_DIR)/drivers/iio/adc/rockchip_saradc.ko
AUTOLOAD:=$(call AutoProbe,rockchip_saradc)
endef
define KernelPackage/saradc-rockchip/description
Support for the SARADC found in SoCs from Rockchip
endef
$(eval $(call KernelPackage,saradc-rockchip))
target/linux/rockchip/patches-6.12/053-v6.17-arm64-dts-rockchip-Add-FriendlyElec-NanoPi-M5-support.patch
+987
View File
@@ -0,0 +1,987 @@
From 96cbdfdd3ac20700b9b1c251fb15c944f33a424a Mon Sep 17 00:00:00 2001
From: John Clark <inindev@gmail.com>
Date: Sat, 28 Jun 2025 10:32:29 -0400
Subject: [PATCH] arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support
Add device tree for FriendlyElec NanoPi M5 with Rockchip RK3576 SoC
(4x Cortex-A72, 4x Cortex-A53, Mali-G52 MC3 GPU, 6 TOPS NPU). Enables
basic booting and connectivity.
Supported features:
- RK3576 SoC
- 4GB LPDDR4X or 8GB/16GB LPDDR5
- 16MB SPI Nor Flash
- 2x 1Gbps Ethernet
- 2x USB 3.2 Gen 1 Type-A ports
- M.2 M-Key PCIe 2.1 x1 NVMe support
- M.2 E-Key SDIO connector
- microSD UHS-I
- HDMI 1.4/2.0 (up to 4096x2304@60Hz)
- 30-pin GPIO (2x SPI, 4x UART, 3x I2C, 5x PWM, 20x GPIO)
- Debug UART
- RTC with HYM8563TS
- Power via USB-C (PD, 6V~20V)
Signed-off-by: John Clark <inindev@gmail.com>
Link: https://lore.kernel.org/r/20250628143229.74460-3-inindev@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts | 941 ++++++++++++++++++
2 files changed, 942 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -128,6 +128,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-ro
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-display-vz.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-io-expander.dtbo
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-nanopi-m5.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-nanopi-r76s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-rock-4d.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3582-radxa-e52c.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
@@ -0,0 +1,941 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2025 FriendlyElec Computer Tech. Co., Ltd.
+ * Copyright (c) 2025 John Clark <inindev@gmail.com>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+#include <dt-bindings/usb/pd.h>
+#include "rk3576.dtsi"
+
+/ {
+ model = "FriendlyElec NanoPi M5";
+ compatible = "friendlyarm,nanopi-m5", "rockchip,rk3576";
+
+ aliases {
+ ethernet0 = &gmac0;
+ ethernet1 = &gmac1;
+ mmc0 = &sdmmc;
+ };
+
+ chosen {
+ stdout-path = "serial0:1500000n8";
+ };
+
+ hdmi-con {
+ compatible = "hdmi-connector";
+ hdmi-pwr-supply = <&vcc5v_hdmi_tx>;
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ usr_button: key-1 {
+ debounce-interval = <50>;
+ gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_LOW>;
+ label = "user";
+ linux,code = <BTN_1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usr_button_l>;
+ wakeup-source;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_sys: led-0 {
+ color = <LED_COLOR_ID_RED>;
+ function = LED_FUNCTION_HEARTBEAT;
+ gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>;
+ label = "sys";
+ linux,default-trigger = "heartbeat";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_sys_h>;
+ };
+
+ led1: led-1 {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
+ label = "led1";
+ linux,default-trigger = "netdev";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led1_h>;
+ };
+
+ led2: led-2 {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;
+ label = "led2";
+ linux,default-trigger = "netdev";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led2_h>;
+ };
+ };
+
+ usb3_port2_5v: regulator-usb3-port2-5v {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb3_host_pwren_h>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-name = "usb3_port2_5v";
+ vin-supply = <&vcc5v0_sys_s5>;
+ };
+
+ vcc12v_dcin: regulator-vcc12v-dcin {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ regulator-name = "vcc12v_dcin";
+ };
+
+ vcc3v3_m2_keym: regulator-vcc3v3-m2-keym {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie0_pwren_h>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc3v3_m2_keym";
+ vin-supply = <&vcc5v0_sys_s5>;
+ };
+
+ vcc3v3_sd_s0: regulator-vcc3v3-sd-s0 {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc0_pwren_h>;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc3v3_sd_s0";
+ vin-supply = <&vcc_3v3_s3>;
+ };
+
+ vcc5v0_sys_s5: regulator-vcc5v0-sys-s5 {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-name = "vcc5v0_sys_s5";
+ vin-supply = <&vcc12v_dcin>;
+ };
+
+ vcc5v0_usb_otg0: regulator-vcc5v0-usb-otg0 {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_otg0_pwren_h>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-name = "vcc5v0_usb_otg0";
+ vin-supply = <&vcc5v0_sys_s5>;
+ };
+
+ vcc5v_hdmi_tx: regulator-vcc5v-hdmi-tx {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-name = "vcc5v_hdmi_tx";
+ vin-supply = <&vcc5v0_sys_s5>;
+ };
+
+ vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vcc_1v1_nldo_s3";
+ vin-supply = <&vcc5v0_sys_s5>;
+ };
+
+ vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <2000000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-name = "vcc_2v0_pldo_s3";
+ vin-supply = <&vcc5v0_sys_s5>;
+ };
+
+ vcc_3v3_s0: regulator-vcc-3v3-s0 {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_3v3_s0";
+ vin-supply = <&vcc_3v3_s3>;
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hp_det_l>;
+
+ simple-audio-card,format = "i2s";
+ simple-audio-card,hp-det-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>;
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,name = "realtek,rt5616-codec";
+
+ simple-audio-card,routing =
+ "Headphones", "HPOL",
+ "Headphones", "HPOR",
+ "IN1P", "Microphone Jack";
+ simple-audio-card,widgets =
+ "Headphone", "Headphone Jack",
+ "Microphone", "Microphone Jack";
+
+ simple-audio-card,codec {
+ sound-dai = <&rt5616>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&sai2>;
+ };
+ };
+};
+
+&combphy0_ps {
+ status = "okay";
+};
+
+&combphy1_psu {
+ status = "okay";
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_big_s0>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_big_s0>;
+};
+
+&cpu_b2 {
+ cpu-supply = <&vdd_cpu_big_s0>;
+};
+
+&cpu_b3 {
+ cpu-supply = <&vdd_cpu_big_s0>;
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&fspi1m1_pins {
+ /* gpio1_d5, gpio1_c4-c7 (clk, d0-d4) are for spi nor flash */
+ /* gpio1_d0-d4 muxed to sai2 audio functions */
+ rockchip,pins =
+ <1 RK_PD5 3 &pcfg_pull_none>,
+ <1 RK_PC4 3 &pcfg_pull_none>,
+ <1 RK_PC5 3 &pcfg_pull_none>,
+ <1 RK_PC6 3 &pcfg_pull_none>,
+ <1 RK_PC7 3 &pcfg_pull_none>;
+};
+
+&gmac0 {
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy0>;
+ phy-mode = "rgmii-id";
+ phy-supply = <&vcc_3v3_s3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&eth0m0_miim>,
+ <&eth0m0_tx_bus2>,
+ <&eth0m0_rx_bus2>,
+ <&eth0m0_rgmii_clk>,
+ <&eth0m0_rgmii_bus>;
+ status = "okay";
+};
+
+&gmac1 {
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy1>;
+ phy-mode = "rgmii-id";
+ phy-supply = <&vcc_3v3_s3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&eth1m0_miim>,
+ <&eth1m0_tx_bus2>,
+ <&eth1m0_rx_bus2>,
+ <&eth1m0_rgmii_clk>,
+ <&eth1m0_rgmii_bus>;
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu_s0>;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_in {
+ hdmi_in_vp0: endpoint {
+ remote-endpoint = <&vp0_out_hdmi>;
+ };
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&hdptxphy {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+
+ pmic@23 {
+ compatible = "rockchip,rk806";
+ reg = <0x23>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-parent = <&gpio0>;
+ interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
+ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
+ system-power-controller;
+
+ vcc1-supply = <&vcc5v0_sys_s5>;
+ vcc2-supply = <&vcc5v0_sys_s5>;
+ vcc3-supply = <&vcc5v0_sys_s5>;
+ vcc4-supply = <&vcc5v0_sys_s5>;
+ vcc5-supply = <&vcc5v0_sys_s5>;
+ vcc6-supply = <&vcc5v0_sys_s5>;
+ vcc7-supply = <&vcc5v0_sys_s5>;
+ vcc8-supply = <&vcc5v0_sys_s5>;
+ vcc9-supply = <&vcc5v0_sys_s5>;
+ vcc10-supply = <&vcc5v0_sys_s5>;
+ vcc11-supply = <&vcc_2v0_pldo_s3>;
+ vcc12-supply = <&vcc5v0_sys_s5>;
+ vcc13-supply = <&vcc_1v1_nldo_s3>;
+ vcc14-supply = <&vcc_1v1_nldo_s3>;
+ vcca-supply = <&vcc5v0_sys_s5>;
+
+ rk806_dvs1_null: dvs1-null-pins {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs1_slp: dvs1-slp-pins {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun1";
+ };
+
+ rk806_dvs1_pwrdn: dvs1-pwrdn-pins {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun2";
+ };
+
+ rk806_dvs1_rst: dvs1-rst-pins {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun3";
+ };
+
+ rk806_dvs2_null: dvs2-null-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs2_slp: dvs2-slp-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun1";
+ };
+
+ rk806_dvs2_pwrdn: dvs2-pwrdn-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun2";
+ };
+
+ rk806_dvs2_rst: dvs2-rst-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun3";
+ };
+
+ rk806_dvs2_dvs: dvs2-dvs-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun4";
+ };
+
+ rk806_dvs2_gpio: dvs2-gpio-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun5";
+ };
+
+ rk806_dvs3_null: dvs3-null-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs3_slp: dvs3-slp-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun1";
+ };
+
+ rk806_dvs3_pwrdn: dvs3-pwrdn-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun2";
+ };
+
+ rk806_dvs3_rst: dvs3-rst-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun3";
+ };
+
+ rk806_dvs3_dvs: dvs3-dvs-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun4";
+ };
+
+ rk806_dvs3_gpio: dvs3-gpio-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun5";
+ };
+
+ regulators {
+ vdd_cpu_big_s0: dcdc-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-enable-ramp-delay = <400>;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-name = "vdd_cpu_big_s0";
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_npu_s0: dcdc-reg2 {
+ regulator-boot-on;
+ regulator-enable-ramp-delay = <400>;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-name = "vdd_npu_s0";
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_lit_s0: dcdc-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-name = "vdd_cpu_lit_s0";
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vcc_3v3_s3: dcdc-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_3v3_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vdd_gpu_s0: dcdc-reg5 {
+ regulator-boot-on;
+ regulator-enable-ramp-delay = <400>;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <900000>;
+ regulator-name = "vdd_gpu_s0";
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ vddq_ddr_s0: dcdc-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vddq_ddr_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_logic_s0: dcdc-reg7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <800000>;
+ regulator-name = "vdd_logic_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s3: dcdc-reg8 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd2_ddr_s3: dcdc-reg9 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vdd2_ddr_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vdd_ddr_s0: dcdc-reg10 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vdd_ddr_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca_1v8_s0: pldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca_1v8_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca1v8_pldo2_s0: pldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca1v8_pldo2_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_1v2_s0: pldo-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vdda_1v2_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca_3v3_s0: pldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcca_3v3_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd_s0: pldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vccio_sd_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca1v8_pldo6_s3: pldo-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca1v8_pldo6_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_0v75_s3: nldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "vdd_0v75_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdda_ddr_pll_s0: nldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "vdda_ddr_pll_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda0v75_hdmi_s0: nldo-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <837500>;
+ regulator-max-microvolt = <837500>;
+ regulator-name = "vdda0v75_hdmi_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_0v85_s0: nldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "vdda_0v85_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_0v75_s0: nldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "vdda_0v75_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&i2c2 {
+ status = "okay";
+
+ hym8563: rtc@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ clock-output-names = "hym8563";
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hym8563_int>;
+ wakeup-source;
+ };
+};
+
+&i2c5 {
+ clock-frequency = <200000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c5m3_xfer>;
+ status = "okay";
+
+ rt5616: audio-codec@1b {
+ compatible = "realtek,rt5616";
+ reg = <0x1b>;
+ assigned-clocks = <&cru CLK_SAI2_MCLKOUT>;
+ assigned-clock-rates = <12288000>;
+ clocks = <&cru CLK_SAI2_MCLKOUT>;
+ clock-names = "mclk";
+ #sound-dai-cells = <0>;
+ };
+};
+
+&mdio0 {
+ rgmii_phy0: phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ clocks = <&cru REFCLKO25M_GMAC0_OUT>;
+ interrupt-parent = <&gpio2>;
+ interrupts = <RK_PB1 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac0_int>, <&gmac0_rst>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <100000>;
+ reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&mdio1 {
+ rgmii_phy1: phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ clocks = <&cru REFCLKO25M_GMAC1_OUT>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac1_int>, <&gmac1_rst>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <100000>;
+ reset-gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&pcie0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie0_perstn>;
+ reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_m2_keym>;
+ status = "okay";
+};
+
+&pinctrl {
+ gmac {
+ gmac0_int: gmac0-int {
+ rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ gmac0_rst: gmac0-rst {
+ rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ gmac1_int: gmac1-int {
+ rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ gmac1_rst: gmac1-rst {
+ rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ hym8563 {
+ hym8563_int: hym8563-int {
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ keys {
+ usr_button_l: usr-button-l {
+ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ leds {
+ led_sys_h: led-sys-h {
+ rockchip,pins = <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ led1_h: led1-h {
+ rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ led2_h: led2-h {
+ rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pcie {
+ pcie0_pwren_h: pcie0-pwren-h {
+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ pcie0_perstn: pcie0-perstn {
+ rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ sdmmc {
+ sdmmc0_pwren_h: sdmmc0-pwren-h {
+ rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ sound {
+ hp_det_l: hp-det-l {
+ rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ usb3_host_pwren_h: usb3-host-pwren-h {
+ rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ usb_otg0_pwren_h: usb-otg0-pwren-h {
+ rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&sai2 {
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcca_1v8_s0>;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ no-mmc;
+ no-sdio;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_det>, <&sdmmc0_bus4>;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_3v3_s3>;
+ vqmmc-supply = <&vcc3v3_sd_s0>;
+ status = "okay";
+};
+
+&sfc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&fspi1m1_csn0>, <&fspi1m1_pins>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ m25p,fast-read;
+ spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <1>;
+ vcc-supply = <&vcc_1v8_s3>;
+ };
+};
+
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_otg {
+ phy-supply = <&vcc5v0_usb_otg0>;
+ status = "okay";
+};
+
+&u2phy1 {
+ status = "okay";
+};
+
+&u2phy1_otg {
+ phy-supply = <&usb3_port2_5v>;
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&usbdp_phy {
+ status = "okay";
+};
+
+&usb_drd0_dwc3 {
+ dr_mode = "otg";
+ extcon = <&u2phy0>;
+ status = "okay";
+};
+
+&usb_drd1_dwc3 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&vop {
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&vp0 {
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+ remote-endpoint = <&hdmi_in_vp0>;
+ };
+};
+
+&wdt {
+ status = "okay";
+};
target/linux/rockchip/patches-6.12/100-rockchip-use-system-LED-for-OpenWrt.patch
+90 -1
View File
@@ -507,7 +507,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
--- a/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
@@ -39,7 +39,6 @@
@@ -52,7 +52,6 @@
power_led: led-power {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_POWER;
@@ -679,6 +679,95 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
};
};
--- a/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
@@ -23,6 +23,11 @@
ethernet0 = &gmac0;
ethernet1 = &gmac1;
mmc0 = &sdmmc;
+
+ led-boot = &led_sys;
+ led-failsafe = &led_sys;
+ led-running = &led_sys;
+ led-upgrade = &led_sys;
};
chosen {
@@ -41,14 +46,42 @@
};
};
+ key-adc-mask {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <100>;
+
+ button-mask {
+ label = "maskrom";
+ linux,code = <BTN_2>;
+ press-threshold-microvolt = <0>;
+ };
+ };
+
+ key-adc-rcry {
+ compatible = "adc-keys";
+ io-channels = <&saradc 1>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <100>;
+
+ button-rcry {
+ label = "recovery";
+ linux,code = <BTN_3>;
+ press-threshold-microvolt = <0>;
+ };
+ };
+
keys {
compatible = "gpio-keys";
usr_button: key-1 {
debounce-interval = <50>;
gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_LOW>;
- label = "user";
- linux,code = <BTN_1>;
+ label = "reset";
+ linux,code = <KEY_RESTART>;
pinctrl-names = "default";
pinctrl-0 = <&usr_button_l>;
wakeup-source;
@@ -60,19 +93,16 @@
led_sys: led-0 {
color = <LED_COLOR_ID_RED>;
- function = LED_FUNCTION_HEARTBEAT;
+ function = LED_FUNCTION_POWER;
gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>;
- label = "sys";
- linux,default-trigger = "heartbeat";
pinctrl-names = "default";
pinctrl-0 = <&led_sys_h>;
};
led1: led-1 {
color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_LAN;
+ function = LED_FUNCTION_WAN;
gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
- label = "led1";
linux,default-trigger = "netdev";
pinctrl-names = "default";
pinctrl-0 = <&led1_h>;
@@ -82,7 +112,6 @@
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;
- label = "led2";
linux,default-trigger = "netdev";
pinctrl-names = "default";
pinctrl-0 = <&led2_h>;
--- a/arch/arm64/boot/dts/rockchip/rk3576-nanopi-r76s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-r76s.dts
@@ -23,6 +23,11 @@
target/linux/rockchip/patches-6.12/600-ethernet-stmmac-Add-property-to-disable-VLAN-hw-filter.patch
+1 -1
View File
@@ -35,7 +35,7 @@ Signed-off-by: jensen <jensenhuang@friendlyarm.com>
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -7717,7 +7717,7 @@ int stmmac_dvr_probe(struct device *devi
@@ -7681,7 +7681,7 @@ int stmmac_dvr_probe(struct device *devi
ndev->hw_features |= NETIF_F_HW_VLAN_CTAG_RX;
priv->hw->hw_vlan_en = true;
}
target/linux/rockchip/patches-6.12/602-net-ethernet-stmmac-add-devname-configuration-from-OF.patch
+2 -2
View File
@@ -1,6 +1,6 @@
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -7540,6 +7540,7 @@ int stmmac_dvr_probe(struct device *devi
@@ -7505,6 +7505,7 @@ int stmmac_dvr_probe(struct device *devi
{
struct net_device *ndev = NULL;
struct stmmac_priv *priv;
@@ -8,7 +8,7 @@
u32 rxq;
int i, ret = 0;
@@ -7548,6 +7549,9 @@ int stmmac_dvr_probe(struct device *devi
@@ -7513,6 +7514,9 @@ int stmmac_dvr_probe(struct device *devi
if (!ndev)
return -ENOMEM;
target/linux/rockchip/patches-6.12/610-arm64-rockchip-add-OF-node-for-eth.patch
+3 -3
View File
@@ -489,7 +489,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
&pinctrl {
--- a/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
@@ -78,6 +78,25 @@
@@ -91,6 +91,25 @@
reg = <1>;
pinctrl-0 = <&eth_phy0_reset_pin>;
pinctrl-names = "default";
@@ -515,7 +515,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
};
};
@@ -85,6 +104,19 @@
@@ -98,6 +117,19 @@
num-lanes = <1>;
reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
status = "okay";
@@ -535,7 +535,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
};
&pcie30phy {
@@ -97,6 +129,19 @@
@@ -110,6 +142,19 @@
reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
target/linux/rockchip/patches-6.18/100-rockchip-use-system-LED-for-OpenWrt.patch
+89
View File
@@ -703,6 +703,95 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
};
};
--- a/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
@@ -23,6 +23,11 @@
ethernet0 = &gmac0;
ethernet1 = &gmac1;
mmc0 = &sdmmc;
+
+ led-boot = &led_sys;
+ led-failsafe = &led_sys;
+ led-running = &led_sys;
+ led-upgrade = &led_sys;
};
chosen {
@@ -41,14 +46,42 @@
};
};
+ key-adc-mask {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <100>;
+
+ button-mask {
+ label = "maskrom";
+ linux,code = <BTN_2>;
+ press-threshold-microvolt = <0>;
+ };
+ };
+
+ key-adc-rcry {
+ compatible = "adc-keys";
+ io-channels = <&saradc 1>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <100>;
+
+ button-rcry {
+ label = "recovery";
+ linux,code = <BTN_3>;
+ press-threshold-microvolt = <0>;
+ };
+ };
+
keys {
compatible = "gpio-keys";
usr_button: key-1 {
debounce-interval = <50>;
gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_LOW>;
- label = "user";
- linux,code = <BTN_1>;
+ label = "reset";
+ linux,code = <KEY_RESTART>;
pinctrl-names = "default";
pinctrl-0 = <&usr_button_l>;
wakeup-source;
@@ -60,19 +93,16 @@
led_sys: led-0 {
color = <LED_COLOR_ID_RED>;
- function = LED_FUNCTION_HEARTBEAT;
+ function = LED_FUNCTION_POWER;
gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>;
- label = "sys";
- linux,default-trigger = "heartbeat";
pinctrl-names = "default";
pinctrl-0 = <&led_sys_h>;
};
led1: led-1 {
color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_LAN;
+ function = LED_FUNCTION_WAN;
gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
- label = "led1";
linux,default-trigger = "netdev";
pinctrl-names = "default";
pinctrl-0 = <&led1_h>;
@@ -82,7 +112,6 @@
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;
- label = "led2";
linux,default-trigger = "netdev";
pinctrl-names = "default";
pinctrl-0 = <&led2_h>;
--- a/arch/arm64/boot/dts/rockchip/rk3576-nanopi-r76s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-r76s.dts
@@ -23,6 +23,11 @@
target/linux/rockchip/patches-6.18/610-arm64-rockchip-add-OF-node-for-eth.patch
+2 -2
View File
@@ -711,7 +711,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
&pinctrl {
--- a/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts
@@ -325,6 +325,19 @@
@@ -307,6 +307,19 @@
&pcie2x1l0 {
reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
status = "okay";
@@ -731,7 +731,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
};
/* phy2 - WiFi */
@@ -353,6 +366,19 @@
@@ -335,6 +348,19 @@
&pcie2x1l2 {
reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
status = "okay";
target/linux/x86/base-files/etc/board.d/02_network
+12 -2
View File
@@ -40,8 +40,18 @@ cloudgenix-ion-2000)
ucidef_set_network_device_path "eth5" "pci0000:00/0000:00:14.3"
ucidef_set_interfaces_lan_wan "eth1 eth2 eth3 eth4 eth5" "eth0"
;;
dell-emc-edge620)
ucidef_set_interfaces_lan_wan "eth0 eth1 eth2 eth3 eth7" "eth6"
dell-emc-edge620*| \
dell-emc-edge640*| \
dell-emc-edge680*)
ucidef_set_network_device_path "ge1" "pci0000:00/0000:00:0b.0/0000:02:00.2"
ucidef_set_network_device_path "ge2" "pci0000:00/0000:00:0b.0/0000:02:00.3"
ucidef_set_network_device_path "ge3" "pci0000:00/0000:00:0b.0/0000:02:00.0"
ucidef_set_network_device_path "ge4" "pci0000:00/0000:00:0b.0/0000:02:00.1"
ucidef_set_network_device_path "ge5" "pci0000:00/0000:00:17.0/0000:07:00.1"
ucidef_set_network_device_path "ge6" "pci0000:00/0000:00:17.0/0000:07:00.0"
ucidef_set_network_device_path "sfp1" "pci0000:00/0000:00:16.0/0000:05:00.1"
ucidef_set_network_device_path "sfp2" "pci0000:00/0000:00:16.0/0000:05:00.0"
ucidef_set_interfaces_lan_wan "ge1 ge2 ge3 ge4 ge5" "ge6"
;;
dfi-inc-adn553| \
dfi-inc-asl553)