Add IPQ5018 DWMAC driver. IP version of this Synopsys DWMAC is 3.7.
This Qualcomm IPQ5018 specific MAC implementation supports link speeds
of 10HD/FD, 100HD/FD, 1,000HD/FD, and 2500FD and SGMII and 2500BASEX
interface modes.
The driver supports the MAC be attached directly to a PHY or via an
optional PCS to a switch or PHY.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22381
Signed-off-by: Robert Marko <robimarko@gmail.com>
The AHB reset quirk was added to the ESS switch driver to work around an
issue a fixed link wasn't setup properly. However, this workaround is no
longer needed as the actual issue was in the QCA8K DSA switch driver on
the other end which has been fixed.
This reverts commit 273bd3463c ("qualcommax: ipq50xx: prepare for UNIPHY reset fix")
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/23654
Signed-off-by: Robert Marko <robimarko@gmail.com>
Force mode is required to support fixed links between the SoC's MAC and
the qca8k switch. As such, add support for force mode in the qca8k DSA
driver and remove the workaround patch that always enables SGMII
auto-negotiation.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/23654
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add support for Xiaomi AX5400 (RA74).
Specifications:
* SoC: Qualcomm IPQ5018 (64-bit dual-core ARM Cortex-A53 @ 1.0Ghz)
* Memory: Etrontech EM6HE16EWAKG 512 MiB DDR3L-933
* Serial Port: 1v8 TTL 115200n8
* Wi-Fi: IPQ5018 (2x2 2.4 Ghz 802.11b/g/n/ax - up to 574 Mbps)
QCN9024 (4x4 5 Ghz 802.11an/ac/ax - up to 4804 Mbps)
* Ethernet: IPQ5018 integrated virtual switch connected to an
external QCA8337 switch (3 LAN Ports 10/100/1000)
* Flash: Gigadevice GD5F1GQ5REYIG (128 MiB)
* LEDs: 1x System Blue (GPIO 24 Active High)
1x System Yellow (GPIO 25 Active High)
1x WAN Link Blue (GPIO 26 Active High)
1x WAN Link Yellow (GPIO 27 Active High)
* Buttons: 1x Reset (GPIO 38 Active Low)
1x WPS (GPIO 28 Active Low)
* MAC address layout: LAN (eth1): 0:art @ offset 0x0
WAN (eth0): 0:art @ offset 0x6
Flash instructions: (use redmi-ax5400 image for the Redmi AX5400)
Download XMIR Patcher: https://github.com/openwrt-xiaomi/xmir-patcher
First flash a ubinized OpenWrt initramfs that will serve as the intermediate step, since
OpenWrt uses unified rootfs in order to fully utilize NAND and provide enough space for
packages, through either of the below two methods:
Installation via XMIR Patcher:
1. Load the initramfs image: openwrt-qualcommax-ipq50xx-xiaomi_redmi-ax5400-initramfs-factory.ubi
Installation via ubiformat method, through SSH:
1. If needed, enable SSH using XMIR Patcher.
2. Copy the file openwrt-qualcommax-ipq50xx-xiaomi_redmi-ax5400-initramfs-factory.ubi to the /tmp directory
3. Open an SSH shell to the router
4. Check which rootfs partition is your router booted in (0 = rootfs | 1 = rootfs_1):
nvram get flag_boot_rootfs
5. Find the rootfs and rootfs_1 mtd indexes respectively:
cat /proc/mtd
Please confirm if mtd18 and mtd19 are the correct indexes from above!
6. Use the command ubiformat to flash the opposite mtd with UBI image:
If nvram get flag_boot_rootfs returned 0:
ubiformat /dev/mtd19 -y -f /tmp/openwrt-qualcommax-ipq50xx-xiaomi_redmi-ax5400-initramfs-factory.ubi && nvram set flag_boot_rootfs=1 && nvram set flag_last_success=1 && nvram commit
otherwise:
ubiformat /dev/mtd18 -y -f /tmp/openwrt-qualcommax-ipq50xx-xiaomi_redmi-ax5400-initramfs-factory.ubi && nvram set flag_boot_rootfs=0 && nvram set flag_last_success=0 && nvram commit
7. Reboot the device by:
reboot
Continue in order to pernamently flash OpenWrt:
1. Upload the sysupgrade image to /tmp/ using SCP:
scp -O <path to image> root@192.168.1.1:/tmp/
2. Open an SSH shell to 192.168.1.1 from a PC within the same subnet
3. Use sysupgrade to flash the sysupgrade image:
sysupgrade -n -v /tmp/openwrt-qualcommax-ipq50xx-xiaomi_redmi-ax5400-squashfs-sysupgrade.bin
Device will reboot with OpenWrt, and then sysupgrade can be used to upgrade the device when desired.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/23374
Signed-off-by: Robert Marko <robimarko@gmail.com>
Replace the following pending patches which have now been merged in
kernel v6.20:
- arm64: dts: qcom: ipq5018: Remove tsens v1 fallback compatible
- clk: qcom: gcc-ipq5018: flag sleep clock as critical
- arm64: dts: qcom: ipq5018: Correct USB DWC3 wrapper interrupts
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21883
Signed-off-by: Robert Marko <robimarko@gmail.com>
Interrupts for DWC3 node were completely mixed up - SPI interrupt 62 is
not listed in reference manual at all. It was also causing dtbs_check
warnings:
ipq5018-rdp432-c2.dtb: usb@8af8800 (qcom,ipq5018-dwc3): interrupt-names:0: 'pwr_event' was expected
ipq5018-rdp432-c2.dtb: usb@8af8800 (qcom,ipq5018-dwc3): interrupt-names: ['hs_phy_irq'] is too short
Warning itself was introduced by commit 53c6d854be4e ("dt-bindings: usb:
dwc3: Clean up hs_phy_irq in binding"), but this was trying to bring
sanity to the interrupts overall, although did a mistake for IPQ5018.
IPQ5018 does not have QUSB2 PHY and its interrupts should rather match
ones used in IPQ5332.
Correct it by using interrupts matching the bindings and reference
manual.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21454
Signed-off-by: Robert Marko <robimarko@gmail.com>
In IPQ5018, the reference clock to the CMN PLL block from the on-board
Wi-Fi has its divider set to 2. This divider wasn't taken into
consideration when calculating the CMN PLL clock rate which meant the
resulting clock rate was doubled.
With the reference clock divider being accounted for in the driver,
correct the assigned clock rate to 4.8GHz.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21453
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add missing dt-bindings/include files needed for compilation of driver.
Enable compilation of the CMN PLL driver by adding the symbols to
Kconfig and Makefile.
Fixes: 468975a985 ("qualcommax: ipq50xx: backport upstreamed patches for adding ipq5018 CMN PLL support")
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21453
Signed-off-by: Robert Marko <robimarko@gmail.com>
Interrupt vector for reo2host-status is wrongly assigned.
Status interrupts weren't received and a workaround was applied to
mac80211 to periodically poll the reo status ring. Therefore, the
workaround can be removed with the proper hardware interrupt line
assigned.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21271
Signed-off-by: Robert Marko <robimarko@gmail.com>
Linksys MX6200 is a triband Wi-Fi 6E wireless router.
Speficiations:
* SoC: Qualcomm IPQ5018 (64-bit dual-core ARM Cortex-A53 @ 1.0Ghz)
* Memory: Nanya NT5CC256M16ER-EK (512 MiB DDR3-933)
* Serial Port: 3v3 TTL 115200n8
* Wi-Fi: IPQ5018 (2x2 2.4 Ghz 802.11b/g/n/ax)
QCN6102 (2x2:2 5 Ghz 802.11an/ac/ax)
QCN6122 (2x2:2 6 Ghz 802.11an/ac/ax)
* Ethernet: IPQ5018 integrated virtual switch connected to:
- LAN Port: Internal IPQ5018 GE PHY
- WAN Port: Maxlinear Ethernet GPY115C PHY
* Flash: Macronix MX35UF2GE4AD (256 MiB)
* LEDs: 1x multi-color PWM LED
* Buttons: 1x WPS (GPIO 27 Active Low)
1x Reset (GPIO 28 Acive Low)
* FCC ID: 2AYRA-08436
Flash instructions:
************************************************************************
NOTE: serial access is required! Although the web UI allows you to
install the Openwrt image, secure boot is enabled which will prevent
booting an unsigned image. The boot sequence must be adjusted in U-boot
to allow booting unsigned images.
************************************************************************
1. On OEM firmware, login to the web UI (typically @ http://192.168.1.1)
and click 'CA' in the bottom right corner.
Then click -> Connectivity -> Manual Upgrade.
Alternatively, browse to
http://<router IP>/fwupdate.html.
Upload openwrt-qualcommax-ipq50xx-linksys_mx6200-squashfs-factory.ubi.
Continue with step 5.
2. Installation on alternate partition using serial connection from OEM
firmware (default login: root, password: admin):
flash_erase /dev/mtd19 0 0
nandwrite -p /dev/mtd19 openwrt-qualcommax-ipq50xx-linksys_mx6200-squashfs-factory.ubi
reboot
Continue with step 5.
3. Installation using serial connection from initramfs
setup tftp server listening on IP in 192.168.1.0/24 (other than the
router IP 192.168.1.1). In U-boot, load the initramfs image to memory:
tftp $loadaddr <your IP>:openwrt-qualcommax-ipq50xx-linksys_mx6200-initramfs-uImage.itb
boot the image using command:
bootm $loadaddr
when fully booted, scp the sysupgrade image to your router IP (default:
192.168.1.1):
scp -O <path>/openwrt-qualcommax-ipq50xx-linksys_mx6200-squashfs-sysypgrade.bin root@192.168.1.1:/tmp/
use sysupgrade to flash the image to nand:
sysupgrade -n -v /tmp/openwrt-qualcommax-ipq50xx-linksys_mx6200-squashfs-sysupgrade.bin
Continue with step 5.
4. Optionally install on alternate partition. From Openwrt:
mtd -r -e rootfs_1 -n write openwrt-qualcommax-ipq50xx-linksys_mx6200-squashfs-factory.ubi rootfs_1
Continue with step 5.
5. Setup U-boot for ability to dual boot signed (stock) and non-signed
(Openwrt) images with auto-detection.
From U-boot, run (be aware: copy line by line):
setenv setnandbootargs 'setenv bootargs init=/sbin/init ubi.mtd=rootfs rootfstype=squashfs rootwait'
setenv nandinitcmd 'setenv mtdids nand0=nand0; run setrootfscmd; ubi part rootfs 2048'
setenv setrootfscmd 'if test $boot_part = 1; then setenv mtdparts mtdparts=nand0:0x${imgsize}@0x${prikern}(rootfs); else setenv mtdparts mtdparts=nand0:0x${imgsize}@0x${altkern}(rootfs); fi'
setenv readhdr1cmd 'ubi read $loadaddr kernel 0x40; setexpr IMGOFF $loadaddr + 0x10; setexpr CODEOFF $loadaddr + 0x14; setexpr SIGOFF $loadaddr + 0x1c; setexpr CERTOFF $loadaddr + 0x24'
setenv readhdr2cmd 'setexpr.l HDR *$loadaddr; setexpr.l IMGSZ *$IMGOFF; setexpr.l CODESZ *$CODEOFF; setexpr.l SIGSZ *$SIGOFF; setexpr.l CERTSZ *$CERTOFF; setexpr TSIZE $CODESZ + $SIGSZ; setexpr TSIZE $TSIZE + $CERTSZ'
setenv testmbncmd 'if test $HDR -ne edfe0dd0 -a $IMGSZ -eq $TSIZE; then bootipq; else ubi read $loadaddr kernel $kernsize; run setnandbootargs; bootm $loadaddr; fi'
setenv bootcmd2 'if test $auto_recovery = no; then bootipq; else run nandinitcmd; run readhdr1cmd; run readhdr2cmd; run testmbncmd; fi'
setenv bootcmd 'run bootcmd2'
saveenv
6. Back to the OEM firmware.
Download firmware from OEM website:
MX6200: https://support.linksys.com/kb/article/408-en/
From serial/SSH, in Openwrt, flash OEM firmware to alternate partition:
mtd -r -e rootfs_1 -n write FW_MX6200_1.0.11.216041_prod.signed.img rootfs_1
Switching active partition:
1. From U-boot, executive the following to switch to partition 1:
setenv boot_part 1
for partition 2:
setenv boot_part 2
2. From Openwrt:
fw_printenv boot_part
In case it's 1:
fw_setenv boot_part 2
. /lib/upgrade/platform.sh
linksys_bootconfig_set_primaryboot "0:bootconfig" 1
linksys_bootconfig_set_primaryboot "0:bootconfig1" 1
In case it's 2:
fw_setenv boot_part 1
. /lib/upgrade/platform.sh
linksys_bootconfig_set_primaryboot "0:bootconfig" 0
linksys_bootconfig_set_primaryboot "0:bootconfig1" 0
and
reboot
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21038
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add support for upgrades on dual firmware Linksys devices with the
partition table stored in SMEM and that store both the kernel and rootfs
in a single partition. Switching the active boot partition requires
updating the partition info table in SMEM in addition to setting
the active boot partition in a U-boot variable as U-boot will keep them
in sync upon reboot if they're not.
U-boot always sets the name of the active partition to rootfs and that
of the inactive partition to rootfs_1 in SMEM. when Linux loads the
partition table from SMEM it will load the right partition based on the
offset set in the SMEM partition table. For upgrades, flashing to the
alternate partition will always be to rootfs_1, while flashing the
current partition will be on rootfs.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21038
Signed-off-by: Robert Marko <robimarko@gmail.com>
The BOOTCONFIG partition is used by Qualcomm's boot chain to store
metadata about the device's startup configuration. It contains info such
as versioning, configuration flags, primary boot partition, and more.
Newer devices with dual boot partitions not only store the active boot
partition in a U-boot variable but also in partition info in the
BOOTCONFIG partition. As such, add library functions to set and toggle
the active boot partition.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21038
Signed-off-by: Robert Marko <robimarko@gmail.com>
The partition table on Linksys devices with a Qualcomm AX IPQ SoC is
stored in SMEM. As such, load partition table from SMEM rather than
statically defining them in their respective device trees. This helps
generalize the base template and requires less maintenance.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21038
Signed-off-by: Robert Marko <robimarko@gmail.com>
The current ath11k driver does not support loading m3 firmware for
IPQ5018 and QCN6122 wifi. Although m3 firmware entries are specified
in Q6 WCSS nodes, the driver actually skips loading them. Editing the
driver to force loading m3 results in Q6 crashes and non-functioning
wifi. As such, remove m3 firmware entries for all boards until there's
proper support in the ath11k driver.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21110
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add missing address-cells and size-cells properties under the switch's
ports node to fix a multitude of below build warnings:
Warning (reg_format): /soc@0/mdio@90000/ethernet-switch@11/ports/port@1:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): /soc@0/mdio@90000/ethernet-switch@11/ports/port@1: Relying on default #address-cells value
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/20982
Signed-off-by: Robert Marko <robimarko@gmail.com>
Although the bootloader tries to 'fixup' the qpic nand node, it actually
can't find it as the node was renamed to spi based on the new driver
architecture. The added benefit is that it also silences build warning:
Warning (spi_bus_reg): /soc@0/spi@79b0000/partitions: missing or empty reg property
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
---
Node rename:
old node name: qpic-nand@79b0000
new node name: spi@79b0000
Bootloader logs:
Booting using the fdt blob at 0x44d3fc78
Uncompressing Kernel Image ... OK
Loading Device Tree to 4a3f6000, end 4a3ff805 ... OK
fdt_fixup_qpic: QPIC: unable to find node '/soc/qpic-nand@79b0000'
parse_fdt_fixup: unable to find node '/soc/qpic-nand@79b0000/'
Link: https://github.com/openwrt/openwrt/pull/20982
Signed-off-by: Robert Marko <robimarko@gmail.com>
IPQ5018 based boards come in multiple wireless architectures.
The SOC itself provides 2.4G wifi while 5G wifi is added by either an
IPQ5018-specific QCN6122 (2x2) solution or by the more generally
available PCIe-based QCN9074 (4x4) wifi chip.
On IPQ5018/QCN6122-based boards, both QCN6122 and IPQ5018 wifi is
initialized by IPQ5018 firmware which comes in different versions:
- IPQ5018: firmware files to initialize WCSS and the internal wifi chip
- IPQ5018/QCN6122: above + additional firmware segments to initialize
the QCN6122 chip incl. (de-)assertion of resets and clocks enablement
OpenWrt currently packages the combined IPQ5018/QCN6122 firmware for
both architectures. As such, let's switch to using IPQ5018-only firmware
for boards not packed with QCN6122 chip(s) and keep using the shared
firmware for devices that do have QCN6122(s) chips.
This helps us move to using upstreamed IPQ5018 firmware while using the
legacy repo for IPQ5018/QCN6122 firmware and rule out any initialization
conflicts/issues caused by loading QCN6122 on IPQ5018-only boards.
While at it, default to the secure WCSS remoteproc driver sent upstream
for review, move QCN6122 wifi nodes to a separate dtsi, override the Q6
node to load the multi-PD-based architecture remoteproc driver for
needed only by IPQ5018/QCN6122 designs, reference said dtsi in
boards packed with QCN6122 wifi chip(s), and add provision for migrating
the radio path as the wifi nodes now adhere to linux device tree naming
conventions.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/20928
Signed-off-by: Robert Marko <robimarko@gmail.com>
Commit 468975a985 changed the XO board clock definition from a fixed
clock to a fixed rate clock in the dtsi.
As such, boards must use clock dividers and multipliers to calculate
the clock rate based on the referenced parent clock.
Fixes: 5d2994a73e ("qualcommax: ipq50xx: Add support for Yuncore AX850")
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/20405
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use upstreamed patches for adding IPQ CMN PLL driver support and its
node and clocks to the DTS accordingly.
In addition, set clock-div and clock-mult properties instead of the
frequency itself for the XO board clock in all board files as it's
converted to a fixed factor clock.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19890
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add support for Xiaomi AX6000.
Speficiations:
* SoC: Qualcomm IPQ5018 (64-bit dual-core ARM Cortex-A53 @ 1.0Ghz)
* Memory: Etrontech EM6HE16EWAKG 512 MiB DDR3L-933
* Serial Port: 1v8 TTL 115200n8
* Wi-Fi: IPQ5018 (2x2 2.4 Ghz 802.11b/g/n/ax - up to 574 Mbps)
QCN9024 (4x4 5 Ghz 802.11an/ac/ax - up to 4804 Mbps)
QCA9887 (1x1 5 Ghz 802.11ac/n - up to 433 Mbps)
* Ethernet: IPQ5018 integrated virtual switch connected to:
- external QCA8337 switch (3 LAN Ports 10/100/1000)
- QCA8081 Phy WAN port (10/100/1000/2500)
* Flash: Either of:
- Gigadevice GD5F1GQ4RE9IGD (128 MiB)
- ESMT F50D1G41LB (128 MiB)
* LEDs: 1x WLAN Link (GPIO 23 Active High)
1x System Blue (GPIO 24 Active High)
1x System Yellow (GPIO 25 Active High)
1x WAN Link Blue (GPIO 26 Active High)
1x WAN Link Yellow (GPIO 27 Active High)
1x Green - Unused(GPIO 28 Active High)
3x LAN Phy Green
1x WAN Phy Green
* Buttons: 1x Reset (GPIO 38 Active Low)
Known issue:
- QCA9887 doesn't come up (possibly due to 1-lane PCIe phy not coming up or missing method to drive power),
hence the host PCIe controller is disabled in the DTS.
Flash instructions:
Download XMIR Patcher: https://github.com/openwrt-xiaomi/xmir-patcher
First flash a ubinized OpenWrt initramfs that will serve as the intermediate step, since
OpenWrt uses unified rootfs in order to fully utilize NAND and provide enough space for
packages, through either of the below two methods:
Installation via XMIR Patcher:
1. Load the initramfs image: openwrt-qualcommax-ipq50xx-xiaomi_ax6000-initramfs-factory.ubi
Installation via ubiformat method, through SSH:
1. If needed, enable SSH using XMIR Patcher.
2. Copy the file openwrt-qualcommax-ipq50xx-xiaomi_ax6000-initramfs-factory.ubi to the /tmp directory
3. Open an SSH shell to the router
4. Check which rootfs partition is your router booted in (0 = rootfs | 1 = rootfs_1):
nvram get flag_boot_rootfs
5. Find the rootfs and rootfs_1 mtd indexes respectively:
cat /proc/mtd
Please confirm if mtd18 and mtd19 are the correct indexes from above!
6. Use the command ubiformat to flash the opposite mtd with UBI image:
If nvram get flag_boot_rootfs returned 0:
ubiformat /dev/mtd19 -y -f /tmp/openwrt-qualcommax-ipq50xx-xiaomi_ax6000-initramfs-factory.ubi && nvram set flag_boot_rootfs=1 && nvram set flag_last_success=1 && nvram commit
otherwise:
ubiformat /dev/mtd18 -y -f /tmp/openwrt-qualcommax-ipq50xx-xiaomi_ax6000-initramfs-factory.ubi && nvram set flag_boot_rootfs=0 && nvram set flag_last_success=0 && nvram commit
7. Reboot the device by:
reboot
Continue in order to pernamently flash OpenWrt:
1. Upload the sysupgrade image to /tmp/ using SCP:
scp -O <path to image> root@192.168.1.1:/tmp/
2. Open an SSH shell to 192.168.1.1 from a PC within the same subnet
3. Use sysupgrade to flash the sysupgrade image:
sysupgrade -n -v /tmp/openwrt-qualcommax-ipq50xx-xiaomi_ax6000-squashfs-sysupgrade.bin
Device will reboot with OpenWrt, and then sysupgrade can be used to upgrade the device when desired.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19004
Signed-off-by: Robert Marko <robimarko@gmail.com>
Upon detecting the ID for the ESMT F50D1G41LB chip, the fifth byte
returned is always 0x00 instead of the expected JEDEC continuation code
of 0x7f. This causes detection to fail:
[ 0.304399] spi-nand spi0.0: unknown raw ID c8117f7f00
[ 0.508943] spi-nand: probe of spi0.0 failed with error -524
So let's revert back to the 4 byte ID code for this chip
specifically.
Fixes: 4bd14b2fd8a8 ("mtd: spinand: esmt: Extend IDs to 5 bytes")
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://github.com/openwrt/openwrt/pull/19004
Signed-off-by: Robert Marko <robimarko@gmail.com>
The qca8k dsa switch can use either an external or internal mdio bus.
This depends on whether the mdio node is defined under the switch node
itself and, as such, the internal_mdio_mask is populated with its
internal phys. Upon registering the internal mdio bus, the
internal_mdio_bus of the dsa switch is assigned to this bus.
When an external mdio bus is used, it is left unassigned, though its id
is used to create the device names of the leds.
This leads to the leds being named '(efault):00:green:lan' and so on as
the internal_mdio_bus is null. So let's fix this by adding a null check
and use the devicename of the external bus instead when an external bus
is configured.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19004
Signed-off-by: Robert Marko <robimarko@gmail.com>
QCN6122 wifi in fw-memory-mode 1 has a slightly larger caldb size than
currently defined in the ath11k driver. When coldboot calibration was
disabled, the fw mem mode was changed from 2 (256MB mem profile) to 1
(512MB mem profile), which is the correct setting for devices in scope.
However, in fw mem mode, the caldb size is 0x500000 instead of the max
0x480000 defined in the driver, causing QCN6122 wifi failing to boot:
ath11k b00a040.wifi1: qmi mem size is low to load caldata
ath11k b00a040.wifi1: failed to assign qmi target memory: -22
As such, change the max caldb memory size accordingly.
This macro is used by the driver only as a max size limit to validate
the requested caldb size returned by QMI. Different ath11k wifi chips
have different caldb sizes (for ex. the size for IPQ5018 is 0x200000).
Fixes: cf715a2305 ("wifi: ath11k: disable coldboot calibration for ipq5018")
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19118
Signed-off-by: Robert Marko <robimarko@gmail.com>
The reason fwmode 2 was used for ipq5018 and qcn6122 wifi was that
coldboot calibration doesn't work and causes the firmware to crach
during wifi bringup. Since coldboot calibration is now disabled in the
driver, all boards can now use their respective firmware memory mode, so
let's the property in all board DTS files accordingly.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19083
Signed-off-by: Robert Marko <robimarko@gmail.com>
The resets in the GCC of the uniphy found in the IPQ5018 SoC are
incorrect which broke the ability to shift between 1G and 2.5G link
speeds. So let's correct the resets based on below two downstream
commits.
In a seperate and prequisite PR to the QCA-SSDK repo, logic has been
implemented to select the right reset based on the link setup so fixed
link scenarios don't break.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18774
Signed-off-by: Robert Marko <robimarko@gmail.com>
Ahead of the actual fix in both the GCC and QCA-SSDK, add the required
AHB reset so it can be picked up by updated QCA-SSDK. This is needed
as the SSDK needs to use different resets depending on the link
architecture. If it's a fixed link, AHB needs to be reset. In a phy to
phy link setup (such as QCA8081), SYS, RX, and TX need to be reset using
one reset with a bitmask in the GCC (GCC_UNIPHY_SOFT_RESET).
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18774
Signed-off-by: Robert Marko <robimarko@gmail.com>
With completely carving out GE PHY out of the QCA-SSDK, the named clock
references to the GE PHY RX and TX clocks are no longer needed.
So, let's revert to using the DT indices as per the upstream GCC driver.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18774
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use latest patches sent upstream for review for IPQ5018 GE PHY support:
- Move enablement of the LDO controller to the mdio-ipq4019 driver away
from the CMN PLL driver
- Remove the different patches to add CDT, MSE, AZ, and DAC support they
are all contained in the upstreamed driver.
Accordingly, also set the right property in the DTS for Linksys SPNMX56
to set the right DAC values to accommodate for the short cable length.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18774
Signed-off-by: Robert Marko <robimarko@gmail.com>
With the spi-qpic-snand driver now supporting reading ECC requirements
from the NAND chip itself, there's no need to set those in the DTS
anymore avoiding issues with devices of the same revision using
different NAND types with varying ECC requirements.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18723
Signed-off-by: Robert Marko <robimarko@gmail.com>
Updating the spi-qpic-snand driver with the latest patches sent
upstream and remove custom patches.
These patches add error handling fixes, use of right read location in
read ops, removal of unused variable, ability to read user config and
nand chip requirements, and support for 8bits ECC strength.
Tested on: Gl.iNet GL-B3000 & Linksys MR5500, MX2000, MX5500, SPNMX56
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18723
Signed-off-by: Robert Marko <robimarko@gmail.com>
Commit fc3ff2af0c introduced reading
ECC strength from the device tree. Linksys MR5500 uses the mx-base dtsi
which was originally developed for Linksys MX2000 and MX5500 where the
ECC strength is set to 8. Correct this and set it to strength of 4 as
per the NAND specs for Gigadevice GD5F2GQ5REYIH.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18672
Signed-off-by: Robert Marko <robimarko@gmail.com>
This reverts commit 34e5bc4af54d366147a83904c094d54fec7fb025.
While fixing support for 2.5Gbps mode on uniphy in phy to phy link
setups, it inadvertently broke fixed link scenario. So let's revert this
commit until there's a fix that doesn't impact fixed links.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18668
Signed-off-by: Robert Marko <robimarko@gmail.com>
Fix the resets of the GE_PHY and Uniphy found on the IPQ5018 SoC.
Bitmasks are used to perform multiple resets simultaneously, including
the RX and TX clocks. This enables the Uniphy to properly shift between
SGMII/1G and SGMII+/2.5G modes.
While at it, properly reorder the patches, and rename some to follow
naming standards.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18638
Signed-off-by: Robert Marko <robimarko@gmail.com>
As part of the previous commit to add the #clock-cells property to the
GE PHY, the PHY was inadvertently moved under the second mdio node in
the dtsi, and therefore broke the init sequence as the driver was trying
to use the wrong mdio bus to set the init values (ex. DAC, MSE, and AZ).
So let's move it back under the right mdio node and, while at it, pad
the register addresses to 8 hex numbers and re-order properties in line
with Linux DTS coding standards.
Fixes: 6782d0e66f
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18634
Signed-off-by: Robert Marko <robimarko@gmail.com>
The IPQ5018 GE Phy driver registers two fixed rate clocks which are
passed on to the GCC which gatekeeps and passes them back to the phy.
Fix 'bad phandle' warning and tell consumer (GCC) how many cells to
expect when compiling.
Warning (clocks_property): /soc@0/clock-controller@1800000: Missing property '#clock-cells' in node /soc@0/mdio@88000/ethernet-phy@7 or bad phandle (referred from clocks[5])
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18548
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add support for Linksys MR5500 (Hydra 6 Pro).
Speficiations:
* SoC: Qualcomm IPQ5018 (64-bit dual-core ARM Cortex-A53 @ 1.0Ghz)
* Memory: Kingston D2516ECMDXGJD (512 MiB)
* Serial Port: 3v3 TTL 115200n8
* Wi-Fi: IPQ5018 (2x2 2.4 Ghz 802.11b/g/n/ax)
QCN9024 (4x4:4 5 Ghz 802.11an/ac/ax)
* Ethernet: IPQ5018 integrated virtual switch connected to an external
QCA8337 switch (4 Ports 10/100/1000 GBASE-T)
* Flash: Gigadevice GD5F2GQ5REYIH (256 MiB)
* LEDs: 1x multi-color PWM LED
1x blue led for USB (GPIO 19 Active High)
* Buttons: 1x WPS (GPIO 27 Active Low)
1x Reset (GPIO 28 Acive Low)
5x ethernet port LEDs (amber for activity & green for link up)
* Peripherals: 1x USB2 (powered by GPIO 17 Active Low)
support for USB3 will be added in a separate PR
* FCC ID: 2AYRA-03734
Flash instructions:
1. On OEM firmware, login to the device (typically at http://192.168.1.1) and click 'CA'
in the bottom right corner -> Connectivity -> Manual Upgrade. Alternatively, browse to
http://<router IP>/fwupdate.html.
Upgrade firmware using openwrt-qualcommax-ipq50xx-linksys_mr5500-squashfs-factory.bin image.
Optionally install on second partition, after first boot check actual partition:
fw_printenv -n boot_part
and install firmware on second partition using command in case of 2:
mtd -r -e kernel -n write openwrt-qualcommax-ipq50xx-linksys_mr5500-squashfs-factory.bin kernel
and in case of 1:
mtd -r -e alt_kernel -n write openwrt-qualcommax-ipq50xx-linksys_mr5500-squashfs-factory.bin alt_kernel
2. Installation using serial connection from OEM firmware (default login: root, password: admin):
fw_printenv -n boot_part
In case of 2:
flash_erase /dev/mtd12 0 0
nandwrite -p /dev/mtd12 openwrt-qualcommax-ipq50xx-linksys_mr5500-squashfs-factory.bin
or in case of 1:
flash_erase /dev/mtd14 0 0
nandwrite -p /dev/mtd14 openwrt-qualcommax-ipq50xx-linksys_mr5500-squashfs-factory.bin
After first boot install firmware on second partition:
mtd -r -e kernel -n write openwrt-qualcommax-ipq50xx-linksys_mr5500-squashfs-factory.bin kernel
or:
mtd -r -e alt_kernel -n write openwrt-qualcommax-ipq50xx-linksys_mr5500-squashfs-factory.bin alt_kernel
3. Back to the OEM firmware.
Download firmware from OEM website:
MR5500: https://support.linksys.com/kb/article/207-en/
From serial or SSH:
fw_printenv boot_part
in case of 1:
mtd -r -e alt_kernel -n write FW_MR5500_1.1.2.209598_prod.img alt_kernel
else in case of 2:
mtd -r -e kernel -n write FW_MR5500_1.1.2.209598_prod.img kernel
4. Boot from USB
This allows you loading an OpenWrt image into RAM and is meant for recovery scenarios only.
Enable loading image from USB in u-boot. From serial or SSH:
fw_setenv bootusb 'usb start && usbboot &loadaddr && bootm $loadaddr'
fw_setenv bootcmd 'run bootusb; if test $auto_recovery = no; then bootipq; elif test $boot_part = 1; then run bootpart1; else run bootpart2; fi'
Copy OpenWrt initramfs image to USB:
dd bs=1M if=openwrt-qualcommax-ipq50xx-linksys_mr5500-initramfs-uImage.itb of=/dev/sda
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/17958
Signed-off-by: Robert Marko <robimarko@gmail.com>
On the ipq50xx platform, the internal GE PHY at phy address 7 on mdio0
must be enabled as it's used to detect the virtual switch in qca-ssdk.
This is a platform wide condition and is therefore part of the dtsi.
However, by enabling the mdio0 bus in board-specific dts files, the ge_phy
is implicitly enabled. So, let's remove the superfluous status property
in the dts files for Linksys MX2000 and MX5500.
While at it, remove the redundant phy-mode property as it's set to sgmii
by default in the ipq5018-ess.dtsi file and fix indentation in the
firmware property of the q5v6_wcss node.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18029
Signed-off-by: Robert Marko <robimarko@gmail.com>
The SPNMX56 is an ISP-branded and distributed device similar to the MX5500
with the same Wifi chips (IPQ5018 for 2.4G and QCN9074 for 5G) but has an
additional QCA8081 PHY providing a 2.5gbps ethernet WAN port.
Speficiations:
* SoC: Qualcomm IPQ5018 (64-bit dual-core ARM Cortex-A53 @ 1.0Ghz)
* Memory: Winbond W634GU6NB-11 (512 MiB DDR3-933)
* Serial Port: 3v3 TTL 115200n8
* Wi-Fi: IPQ5018 (2x2 2.4 Ghz 802.11b/g/n/ax)
QCN9024 (4x4:4 5 Ghz 802.11an/ac/ax)
* Ethernet: IPQ5018 integrated virtual switch connected to an external
QCA8337 switch (3 Ports 10/100/1000 GBASE-T) and a
QCA8081 phy (up to 2.5 Gbps)
* Flash: Gigadevice GD5F2GM7RExxG (256 MiB)
* LEDs: 1x multi-color PWM LED
* Buttons: 1x WPS (GPIO 27 Active Low)
1x Reset (GPIO 28 Acive Low)
Flash instructions:
1. On OEM firmware, login to the device (typically at http://192.168.1.1)
and click 'CA' in the bottom right corner -> Connectivity ->
Manual Upgrade. Alternatively, browse to http://<router IP>/fwupdate.html
Upload openwrt-qualcommax-ipq50xx-linksys_spnmx56-squashfs-factory.bin
Optionally flash 2nd partition, after first boot check actual partition:
fw_printenv -n boot_part
and install firmware on second partition using command in case of 2:
mtd -r -e kernel -n write openwrt-qualcommax-ipq50xx-linksys_spnmx56-squashfs-factory.bin kernel
and in case of 1:
mtd -r -e alt_kernel -n write openwrt-qualcommax-ipq50xx-linksys_spnmx56-squashfs-factory.bin alt_kernel
2. Installation using serial connection from OEM firmware
hit Enter once booted and enter credentials (login: root, password: admin)
fw_printenv -n boot_part
In case of 2:
flash_erase /dev/mtd12 0 0
nandwrite -p /dev/mtd12 openwrt-qualcommax-ipq50xx-linksys_spnmx56-squashfs-factory.bin
or in case of 1:
flash_erase /dev/mtd14 0 0
nandwrite -p /dev/mtd14 openwrt-qualcommax-ipq50xx-linksys_spnmx56-squashfs-factory.bin
After first boot install firmware on second partition:
mtd -r -e kernel -n write openwrt-qualcommax-ipq50xx-linksys_spnmx56-squashfs-factory.bin kernel
or:
mtd -r -e alt_kernel -n write openwrt-qualcommax-ipq50xx-linksys_spnmx56-squashfs-factory.bin alt_kernel
3. Back to the OEM firmware.
Download firmware from OEM website:
Firmware for this device cannot be searched for on the Linksys website.
Instead, we'd have to use serial to intercept the URL of the firmware
while it's trying to update. Firmware is ISP specific:
Toob (UK): http://download.linksys.com/updates/20241125t080737/FW_MX56TB_1.0.1.216218_prod.img
The intention is to collect URLs for different ISPs on a wiki page.
From serial or SSH:
fw_printenv boot_part
in case of 1:
mtd -r -e alt_kernel -n write FW_MX56TB_1.0.1.216218_prod.img alt_kernel
else in case of 2:
mtd -r -e kernel -n write FW_MX56TB_1.0.1.216218_prod.img kernel
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/17968
Signed-off-by: Robert Marko <robimarko@gmail.com>
The FDB roaming issues were observed on ipq807x and ipq60xx boards.
The fix depends on API exposed only when NSS_DP_PPE_SUPPORT is enabled.
However, this flag applies to above mentioned platforms only and is
causing the logs to be flooded on other QCA platforms, including ipq50xx,
with:
[ 34.893418] nss-dp 39c00000.dp1 lan: cannot get VSI ID for port 1
[ 34.898370] nss-dp 39c00000.dp1 lan: cannot get VSI ID for port 1
[ 34.904598] nss-dp 39c00000.dp1 lan: cannot get VSI ID for port 1
[ 34.910661] nss-dp 39c00000.dp1 lan: cannot get VSI ID for port 1
So let's apply a dependency on the NSS_DP_PPE_SUPPORT flag and contain
the patch code for ipq807x and ipq60xx within conditional directives.
Tested on: Linksys SPNMX56
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/17966
Signed-off-by: Robert Marko <robimarko@gmail.com>
This downstream patch fixes a bug which could flood the logs with the
following message and would eventually lead to a crash.
ath11k c000000.wifi: failed to send HAL_REO_CMD_UPDATE_RX_QUEUE cmd, tid 0 (-105)
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/17182
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add support for Linksys MX2000 (Atlas 6) and MX5500 (Atlas 6 Pro).
These devices are completely identical except for the secondary wifi
chip used for 5Ghz: QCN6102 is used on MX2000 while QCN9024 is used
on MX5500
Speficiations:
* SoC: Qualcomm IPQ5018 (64-bit dual-core ARM Cortex-A53 @ 1.0Ghz)
* Memory: Winbond W634GU6NB-11 (512 MiB DDR3-933)
* Serial Port: 3v3 TTL 115200n8
* Wi-Fi: IPQ5018 (2x2 2.4 Ghz 802.11b/g/n/ax)
* Wi-Fi: MX2000: QCN6102 (2x2:2 5 Ghz 802.11an/ac/ax)
MX5500: QCN9024 (4x4:4 5 Ghz 802.11an/ac/ax)
* Ethernet: IPQ5018 integrated virtual switch connected to an external
QCA8337 switch (4 Ports 10/100/1000 GBASE-T)
* Flash: Macronix MX35UF2GE4AD (256 MiB)
* LEDs: 1x multi-color PWM LED
* Buttons: 1x WPS (GPIO 27 Active Low)
1x Reset (GPIO 28 Acive Low)
Flash instructions (in case of MX2000, else replace with MX5500 images):
1. On OEM firmware, login to the device (typically at http://192.168.1.1) and click 'CA'
in the bottom right corner -> Connectivity -> Manual Upgrade. Alternatively, browse to
http://<router IP>/fwupdate.html.
Upgrade firmware using openwrt-qualcommax-ipq50xx-linksys_mx2000-squashfs-factory.bin image.
Optionally install on second partition, after first boot check actual partition:
fw_printenv -n boot_part
and install firmware on second partition using command in case of 2:
mtd -r -e kernel -n write openwrt-qualcommax-ipq50xx-linksys_mx2000-squashfs-factory.bin kernel
and in case of 1:
mtd -r -e alt_kernel -n write openwrt-qualcommax-ipq50xx-linksys_mx2000-squashfs-factory.bin alt_kernel
2. Installation using serial connection from OEM firmware (default login: root, password: admin):
fw_printenv -n boot_part
In case of 2:
flash_erase /dev/mtd12 0 0
nandwrite -p /dev/mtd12 openwrt-qualcommax-ipq50xx-linksys_mx2000-squashfs-factory.bin
or in case of 1:
flash_erase /dev/mtd14 0 0
nandwrite -p /dev/mtd14 openwrt-qualcommax-ipq50xx-linksys_mx2000-squashfs-factory.bin
After first boot install firmware on second partition:
mtd -r -e kernel -n write openwrt-qualcommax-ipq50xx-linksys_mx2000-squashfs-factory.bin kernel
or:
mtd -r -e alt_kernel -n write openwrt-qualcommax-ipq50xx-linksys_mx2000-squashfs-factory.bin alt_kernel
3. Back to the OEM firmware.
Download firmware from OEM website:
MX2000: https://support.linksys.com/kb/article/585-en/
MX5500: https://support.linksys.com/kb/article/587-en/
From serial or SSH:
fw_printenv boot_part
in case of 1:
mtd -r -e alt_kernel -n write FW_MX2000_1.1.7.210469_prod.img alt_kernel
else in case of 2:
mtd -r -e kernel -n write FW_MX2000_1.1.7.210469_prod.img kernel
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/17182
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add QCN6122 platform support.
QCN6122 is a PCIe based solution that is attached to and enumerated
by the WPSS (Wireless Processor SubSystem) Q6 processor.
Though it is a PCIe device, since it is not attached to APSS processor
(Application Processor SubSystem), APSS will be unaware of such a decice
and hence it is registered to the APSS processor as a platform device(AHB).
Because of this hybrid nature, it is called as a hybrid bus device.
As such, QCN6122 is a hybrid bus type device and follows the same codepath
as for WCN6750.
This is a reversed engineered and heavily simplified version of below
downstream patch:
https://git.codelinaro.org/clo/qsdk/oss/system/feeds/wlan-open/-/ \
blob/NHSS.QSDK.12.4.5.r2/mac80211/patches/232-ath11k-qcn6122-support.patch
Co-developed-by: George Moussalem <george.moussalem@outlook.com>
Signed-off-by: Sowmiya Sree Elavalagan <ssreeela@codeaurora.org>
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/17182
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add ability to download and package ath11k firmware for QCN6122.
QCN6122 is specific/exclusive to the IPQ5018 platform and firmware
files are publishes in a subdirectory of the IPQ5018 firmware files.
While at it, add support for packaging BDFs for QCN6122 wifi and
update iwinfo to recognize QCN6122 wifi.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/17182
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add ability to download and package ath11k firmware for IPQ5018.
As part of commit 172ccf7, the source is pointed to the new QCA repo.
Until QCA publishes updated firmware for IPQ5018 and QCN6122, we need
to download the firmware from the old QUIC repo. As such, add a new
download routine for IPQ5018/QCN6122 to fetch the firmware files from
the old repo.
While at it, add support for packaging BDFs for IPQ5018-based boards
and update iwinfo to recognize IPQ5018 wifi.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/17182
Signed-off-by: Robert Marko <robimarko@gmail.com>
Introduce support for the Qualcomm IPQ50xx SoC.
This series adds support for the following components:
- minimal boot support: GCC/pinctrl/watchdog/CPUFreq/SDI (upstreamed)
- USB2 (upstreamed)
- Thermal/Tsens
- PCIe gen2 1&2-lane PHY and controller
- PWM and PWM LED
- QPIC SPI NAND controller
- CMN PLL Block (provider of fixed rate clocks to GCC/ethernet/more.)
- Ethernet: IPQ5018 Internal GE PHY (1 gbps)
- Remoteproc MPD driver for IPQ5018 (2.4G) & QCN6122 (5/6G) Wifi
Co-developed-by: Ziyang Huang <hzyitc@outlook.com>
Signed-off-by: Ziyang Huang <hzyitc@outlook.com>
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/17182
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add support for the Qualcomm IPQ50xx in the QCA NSS dataplane driver.
The QCA implementation uses depracated DMA api calls and a downstream SCM
call, so convert to proper Linux DMA and SCM api calls.
In addition, add fixed-link support to support SGMII which is used to
connect the internal IPQ50xx switch to an external switch (ex. QCA8337)
Co-developed-by: Ziyang Huang <hzyitc@outlook.com>
Signed-off-by: Ziyang Huang <hzyitc@outlook.com>
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/17182
Signed-off-by: Robert Marko <robimarko@gmail.com>
