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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
2026-04-28 12:00:40 +08:00
parent 256521d9da da61d63638
commit 67008eee0b
84 changed files with 5037 additions and 1479 deletions
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package/kernel/linux/modules/video.mk
+1 -1
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@@ -355,7 +355,7 @@ $(eval $(call KernelPackage,drm-buddy))
define KernelPackage/drm-client-lib
SUBMENU:=$(VIDEO_MENU)
TITLE:=DRM client library setup helper
DEPENDS:=@DISPLAY_SUPPORT +@LINUX_6_18 +kmod-drm +kmod-drm-kms-helper
DEPENDS:=@DISPLAY_SUPPORT @LINUX_6_18 +kmod-drm +kmod-drm-kms-helper
KCONFIG:=CONFIG_DRM_CLIENT_LIB
FILES:= $(LINUX_DIR)/drivers/gpu/drm/clients/drm_client_lib.ko
AUTOLOAD:=$(call AutoProbe,drm_client_lib)
package/libs/libselinux/Makefile
+2 -2
View File
@@ -6,12 +6,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=libselinux
PKG_VERSION:=3.9
PKG_VERSION:=3.10
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/SELinuxProject/selinux/releases/download/$(PKG_VERSION)
PKG_HASH:=e7ee2c01dba64a0c35c9d7c9c0e06209d8186b325b0638a0d83f915cc3c101e8
PKG_HASH:=1ef216c5b56fb7e0a51cd2909787a175a17ee391e0467894807873539ebe766b
PKG_LICENSE:=libselinux-1.0
PKG_LICENSE_FILES:=LICENSE
package/libs/libsemanage/Makefile
+2 -2
View File
@@ -6,12 +6,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=libsemanage
PKG_VERSION:=3.9
PKG_VERSION:=3.10
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/SELinuxProject/selinux/releases/download/$(PKG_VERSION)
PKG_HASH:=ec05850aef48bfb8e02135a7f4f3f7edba3670f63d5e67f2708d4bd80b9a4634
PKG_HASH:=1978894c414769ad77438d26886eaae3fb7bb74578ef2a5ad3130c89cb5cb1fe
PKG_MAINTAINER:=Thomas Petazzoni <thomas.petazzoni@bootlin.com>
PKG_LICENSE:=LGPL-2.1
PKG_LICENSE_FILES:=COPYING
package/libs/libsepol/Makefile
+2 -2
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@@ -6,12 +6,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=libsepol
PKG_VERSION:=3.9
PKG_VERSION:=3.10
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/SELinuxProject/selinux/releases/download/$(PKG_VERSION)
PKG_HASH:=ba630b59e50c5fbf9e9dd45eb3734f373cf78d689d8c10c537114c9bd769fa2e
PKG_HASH:=d555586797fa9f38344496d2a7ec1147b6caaf3fcc44c42d8d5173edd7a79a71
PKG_MAINTAINER:=Thomas Petazzoni <thomas.petazzoni@bootlin.com>
PKG_CPE_ID:=cpe:/a:selinuxproject:libsepol
package/network/config/netifd/Makefile
+3 -3
View File
@@ -5,9 +5,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/netifd.git
PKG_SOURCE_DATE:=2026-02-26
PKG_SOURCE_VERSION:=69a5afc9713adf31edbf3228a7a372ada7bba449
PKG_MIRROR_HASH:=a8672da0ab29318851b2ab3f608c17ca9a2552568a850aef5c1efa26207a465b
PKG_SOURCE_DATE:=2026-04-23
PKG_SOURCE_VERSION:=e45b890fa532bb89380b78008c2cc70bfad2c4c7
PKG_MIRROR_HASH:=bf318b9905ca2a63a8bb834d356bef3eec031acc843ba0137495708090894f75
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
PKG_LICENSE:=GPL-2.0
package/system/refpolicy/Makefile
+3 -3
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@@ -6,12 +6,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=refpolicy
PKG_VERSION:=2.20250923
PKG_VERSION:=2.20260312
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
PKG_SOURCE_URL:=https://github.com/SELinuxProject/refpolicy/releases/download/RELEASE_2_20250923
PKG_HASH:=e5b435c934048d01ca4415a1f2670a51e113f26f5d01ad4227c98fbe8dea8d5b
PKG_SOURCE_URL:=https://github.com/SELinuxProject/refpolicy/releases/download/RELEASE_2_20260312
PKG_HASH:=f4366cde9bf3d3498e7621be88a2ae9932a0b336696bab66ad2e8548124f50c7
PKG_INSTALL:=1
PKG_BUILD_DEPENDS:=checkpolicy/host policycoreutils/host
package/utils/checkpolicy/Makefile
+2 -2
View File
@@ -6,12 +6,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=checkpolicy
PKG_VERSION:=3.9
PKG_VERSION:=3.10
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/SELinuxProject/selinux/releases/download/$(PKG_VERSION)
PKG_HASH:=dd85b0173ca6e96b22ebf472bcbccf04eb10e1aa07add8f1b7e0e9e8e995e027
PKG_HASH:=2d92951dfcb090d6179e7a23856622e0fcbc32be03bf1e60ace9dc9cbda11e59
PKG_INSTALL:=1
PKG_BUILD_DEPENDS:=libselinux
HOST_BUILD_DEPENDS:=libselinux/host
package/utils/policycoreutils/Makefile
+2 -2
View File
@@ -6,12 +6,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=policycoreutils
PKG_VERSION:=3.9
PKG_VERSION:=3.10
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/SELinuxProject/selinux/releases/download/$(PKG_VERSION)
PKG_HASH:=44a294139876cf4c7969cb6a75d1932cb42543d74a7661760ded44a20bf7ebe8
PKG_HASH:=8dbd50d868acbfae9d1a972f6bbb2587f06c9ec73308d11af6acb3a401de9832
PKG_INSTALL:=1
HOST_BUILD_DEPENDS:=libsemanage/host gettext-full/host
PKG_BUILD_DEPENDS:=BUSYBOX_CONFIG_PAM:libpam gettext-full/host
package/utils/secilc/Makefile
+2 -2
View File
@@ -6,12 +6,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=secilc
PKG_VERSION:=3.9
PKG_VERSION:=3.10
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/SELinuxProject/selinux/releases/download/$(PKG_VERSION)
PKG_HASH:=c53fb7218ac158c05f28de186e48404857eb191bd4f9415802f85449fdf6da7f
PKG_HASH:=6658071d6f1044184d3973062a798187537ae1c3ddb4c31afd417df333316c10
HOST_BUILD_DEPENDS:=libsepol/host
PKG_MAINTAINER:=Dominick Grift <dominick.grift@defensec.nl>
target/linux/bcm27xx/patches-6.12/950-0901-irqchip-Add-Broadcom-bcm2712-MSI-X-interrupt-control.patch
+1 -1
View File
@@ -78,7 +78,7 @@ Signed-off-by: Stanimir Varbanov <svarbanov@suse.de>
+#include <linux/of_platform.h>
-#include <linux/irqchip.h>
+#include "irq-msi-lib.h"
+#include <linux/irqchip/irq-msi-lib.h>
-#define MIP_INT_RAISED 0x00
-#define MIP_INT_CLEARED 0x10
target/linux/generic/backport-6.12/910-v6.19-crypto-testmgr-Add-missing-DES-weak-and-semi-weak-ke.patch
+155
View File
@@ -0,0 +1,155 @@
From c637f3e4a59d710ffd80da1c11d2ebed162d8ff0 Mon Sep 17 00:00:00 2001
From: Thorsten Blum <thorsten.blum@linux.dev>
Date: Mon, 17 Nov 2025 12:44:26 +0100
Subject: [PATCH] crypto: testmgr - Add missing DES weak and semi-weak key
tests
Ever since commit da7f033ddc9f ("crypto: cryptomgr - Add test
infrastructure"), the DES test suite has tested only one of the four
weak keys and none of the twelve semi-weak keys.
DES has four weak keys and twelve semi-weak keys, and the kernel's DES
implementation correctly detects and rejects all of these keys when the
CRYPTO_TFM_REQ_FORBID_WEAK_KEYS flag is set. However, only a single weak
key was being tested. Add tests for all 16 weak and semi-weak keys.
While DES is deprecated, it is still used in some legacy protocols, and
weak/semi-weak key detection should be tested accordingly.
Tested on arm64 with cryptographic self-tests.
Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
crypto/testmgr.h | 120 +++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 120 insertions(+)
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -10330,6 +10330,126 @@ static const struct cipher_testvec des_t
.ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
.ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
.len = 8,
+ }, { /* Weak key */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\xe0\xe0\xe0\xe0\xf1\xf1\xf1\xf1",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Weak key */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\x1f\x1f\x1f\x1f\x0e\x0e\x0e\x0e",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Weak key */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\xfe\xfe\xfe\xfe\xfe\xfe\xfe\xfe",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 1a */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\x01\xfe\x01\xfe\x01\xfe\x01\xfe",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 1b */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\xfe\x01\xfe\x01\xfe\x01\xfe\x01",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 2a */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\x1f\xe0\x1f\xe0\x0e\xf1\x0e\xf1",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 2b */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\xe0\x1f\xe0\x1f\xf1\x0e\xf1\x0e",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 3a */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\x01\xe0\x01\xe0\x01\xf1\x01\xf1",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 3b */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\xe0\x01\xe0\x01\xf1\x01\xf1\x01",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 4a */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\x1f\xfe\x1f\xfe\x0e\xfe\x0e\xfe",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 4b */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\xfe\x1f\xfe\x1f\xfe\x0e\xfe\x0e",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 5a */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\x01\x1f\x01\x1f\x01\x0e\x01\x0e",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 5b */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\x1f\x01\x1f\x01\x0e\x01\x0e\x01",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 6a */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\xe0\xfe\xe0\xfe\xf1\xfe\xf1\xfe",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 6b */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\xfe\xe0\xfe\xe0\xfe\xf1\xfe\xf1",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
}, { /* Two blocks -- for testing encryption across pages */
.key = "\x01\x23\x45\x67\x89\xab\xcd\xef",
.klen = 8,
target/linux/generic/backport-6.12/911-v7.0-crypto-testmgr-Add-test-vectors-for-authenc-hmac-sha.patch
+95 -69
View File
@@ -1,11 +1,11 @@
From a22d48cbe55814061d46db2f87090ba5e36aaf7f Mon Sep 17 00:00:00 2001
From 030218dedee2628ea3f035d71431e1b7c4191cfb Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Sat, 31 Jan 2026 18:43:03 +0100
Date: Sat, 31 Jan 2026 18:38:47 +0100
Subject: [PATCH] crypto: testmgr - Add test vectors for
authenc(hmac(sha224),cbc(aes))
authenc(hmac(sha384),cbc(aes))
Test vectors were generated starting from existing CBC(AES) test vectors
(RFC3602, NIST SP800-38A) and adding HMAC(SHA224) computed with Python
(RFC3602, NIST SP800-38A) and adding HMAC(SHA384) computed with Python
script. Then, the results were double-checked on Mediatek MT7981 (safexcel)
and NXP P2020 (talitos). Both platforms pass self-tests.
@@ -13,32 +13,32 @@ Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
crypto/testmgr.c | 7 ++
crypto/testmgr.h | 285 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 292 insertions(+)
crypto/testmgr.h | 311 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 318 insertions(+)
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -4414,6 +4414,13 @@ static const struct alg_test_desc alg_te
@@ -4453,6 +4453,13 @@ static const struct alg_test_desc alg_te
.test = alg_test_null,
.fips_allowed = 1,
}, {
+ .alg = "authenc(hmac(sha224),cbc(aes))",
+ .generic_driver = "authenc(hmac-sha224-lib,cbc(aes-generic))",
+ .alg = "authenc(hmac(sha384),cbc(aes))",
+ .generic_driver = "authenc(hmac-sha384-lib,cbc(aes-generic))",
+ .test = alg_test_aead,
+ .suite = {
+ .aead = __VECS(hmac_sha224_aes_cbc_tv_temp)
+ .aead = __VECS(hmac_sha384_aes_cbc_tv_temp)
+ }
+ }, {
.alg = "authenc(hmac(sha224),cbc(des))",
.alg = "authenc(hmac(sha384),cbc(des))",
.test = alg_test_aead,
.suite = {
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -17490,6 +17490,291 @@ static const struct aead_testvec hmac_sh
@@ -17893,6 +17893,317 @@ static const struct aead_testvec hmac_sh
},
};
+static const struct aead_testvec hmac_sha224_aes_cbc_tv_temp[] = {
+static const struct aead_testvec hmac_sha384_aes_cbc_tv_temp[] = {
+ { /* RFC 3602 Case 1 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -51,24 +51,28 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x06\xa9\x21\x40\x36\xb8\xa1\x5b"
+ "\x51\x2e\x03\xd5\x34\x12\x00\x06",
+ .klen = 8 + 28 + 16,
+ .klen = 8 + 48 + 16,
+ .iv = "\x3d\xaf\xba\x42\x9d\x9e\xb4\x30"
+ "\xb4\x22\xda\x80\x2c\x9f\xac\x41",
+ .assoc = "\x3d\xaf\xba\x42\x9d\x9e\xb4\x30"
+ "\xb4\x22\xda\x80\x2c\x9f\xac\x41",
+ .alen = 16,
+ .alen = 16,
+ .ptext = "Single block msg",
+ .plen = 16,
+ .ctext = "\xe3\x53\x77\x9c\x10\x79\xae\xb8"
+ "\x27\x08\x94\x2d\xbe\x77\x18\x1a"
+ "\x17\xe8\x00\x76\x70\x71\xd1\x72"
+ "\xf8\xd0\x91\x51\x67\xf9\xdf\xd6"
+ "\x0d\x56\x1a\xb3\x52\x19\x85\xae"
+ "\x46\x74\xb6\x98",
+ .clen = 16 + 28,
+ "\x79\x1c\xf1\x22\x95\x80\xe0\x60"
+ "\x7f\xf9\x92\x60\x83\xbd\x60\x9c"
+ "\xf6\x62\x8b\xa9\x7d\x56\xe2\xaf"
+ "\x80\x43\xbc\x41\x4a\x63\x0b\xa0"
+ "\x16\x25\xe2\xfe\x0a\x96\xf6\xa5"
+ "\x6c\x0b\xc2\x53\xb4\x27\xd9\x42",
+ .clen = 16 + 48,
+ }, { /* RFC 3602 Case 2 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -81,15 +85,17 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b"
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x40\x41\x42\x43\x44\x45\x46\x47"
+ "\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+ "\xc2\x86\x69\x6d\x88\x7c\x9a\xa0"
+ "\x61\x1b\xbb\x3e\x20\x25\xa4\x5a",
+ .klen = 8 + 28 + 16,
+ .klen = 8 + 48 + 16,
+ .iv = "\x56\x2e\x17\x99\x6d\x09\x3d\x28"
+ "\xdd\xb3\xba\x69\x5a\x2e\x6f\x58",
+ .assoc = "\x56\x2e\x17\x99\x6d\x09\x3d\x28"
+ "\xdd\xb3\xba\x69\x5a\x2e\x6f\x58",
+ .alen = 16,
+ .alen = 16,
+ .ptext = "\x00\x01\x02\x03\x04\x05\x06\x07"
+ "\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f"
+ "\x10\x11\x12\x13\x14\x15\x16\x17"
@@ -99,12 +105,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x3a\x86\x30\x28\xb5\xe1\xdc\x0a"
+ "\x75\x86\x60\x2d\x25\x3c\xff\xf9"
+ "\x1b\x82\x66\xbe\xa6\xd6\x1a\xb1"
+ "\xa1\x11\xfa\xbb\x1e\x04\x7e\xe7"
+ "\x4c\x5f\x65\xbf\x68\x8d\x33\x9d"
+ "\xbc\x74\x9b\xf3\x15\xf3\x8f\x8d"
+ "\xe8\xaf\x33\xe0",
+
+ .clen = 32 + 28,
+ "\x4e\x5b\xa8\x65\x51\xc6\x58\xaf"
+ "\x31\x57\x50\x3d\x01\xa1\xa4\x3f"
+ "\x42\xd1\xd7\x31\x76\x8d\xf8\xc8"
+ "\xe4\xd2\x7e\xc5\x23\xe7\xc6\x2e"
+ "\x2d\xfd\x9d\xc1\xac\x50\x1e\xcf"
+ "\xa0\x10\xeb\x1a\x9c\xb7\xe1\xca",
+ .clen = 32 + 48,
+ }, { /* RFC 3602 Case 3 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -117,15 +124,17 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\x6c\x3e\xa0\x47\x76\x30\xce\x21"
+ "\xa2\xce\x33\x4a\xa7\x46\xc2\xcd",
+ .klen = 8 + 28 + 16,
+ .klen = 8 + 48 + 16,
+ .iv = "\xc7\x82\xdc\x4c\x09\x8c\x66\xcb"
+ "\xd9\xcd\x27\xd8\x25\x68\x2c\x81",
+ .assoc = "\xc7\x82\xdc\x4c\x09\x8c\x66\xcb"
+ "\xd9\xcd\x27\xd8\x25\x68\x2c\x81",
+ .alen = 16,
+ .alen = 16,
+ .ptext = "This is a 48-byte message (exactly 3 AES blocks)",
+ .plen = 48,
+ .ctext = "\xd0\xa0\x2b\x38\x36\x45\x17\x53"
@@ -134,11 +143,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x50\x69\x39\x27\x67\x72\xf8\xd5"
+ "\x02\x1c\x19\x21\x6b\xad\x52\x5c"
+ "\x85\x79\x69\x5d\x83\xba\x26\x84"
+ "\x60\xb3\xca\x0e\xc1\xfe\xf2\x27"
+ "\x5a\x41\xe4\x99\xa8\x19\x56\xf1"
+ "\x44\x98\x27\x9f\x99\xb0\x4a\xad"
+ "\x4d\xc1\x1e\x88",
+ .clen = 48 + 28,
+ "\xa1\x52\xe7\xda\xf7\x05\xb6\xca"
+ "\xad\x0f\x51\xed\x5a\xd3\x0f\xdf"
+ "\xde\xeb\x3f\x31\xed\x3a\x43\x93"
+ "\x3b\xb7\xca\xc8\x1b\xe7\x3b\x61"
+ "\x6a\x05\xfd\x2d\x6a\x5c\xb1\x0d"
+ "\x6e\x7a\xeb\x1c\x84\xec\xdb\xde",
+ .clen = 48 + 48,
+ }, { /* RFC 3602 Case 4 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -151,15 +162,17 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\x56\xe4\x7a\x38\xc5\x59\x89\x74"
+ "\xbc\x46\x90\x3d\xba\x29\x03\x49",
+ .klen = 8 + 28 + 16,
+ .klen = 8 + 48 + 16,
+ .iv = "\x8c\xe8\x2e\xef\xbe\xa0\xda\x3c"
+ "\x44\x69\x9e\xd7\xdb\x51\xb7\xd9",
+ .assoc = "\x8c\xe8\x2e\xef\xbe\xa0\xda\x3c"
+ "\x44\x69\x9e\xd7\xdb\x51\xb7\xd9",
+ .alen = 16,
+ .alen = 16,
+ .ptext = "\xa0\xa1\xa2\xa3\xa4\xa5\xa6\xa7"
+ "\xa8\xa9\xaa\xab\xac\xad\xae\xaf"
+ "\xb0\xb1\xb2\xb3\xb4\xb5\xb6\xb7"
@@ -177,11 +190,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x86\x8b\xb7\xb2\x9d\x3d\x46\xad"
+ "\x83\xce\x9f\x9a\x10\x2e\xe9\x9d"
+ "\x49\xa5\x3e\x87\xf4\xc3\xda\x55"
+ "\xbb\xe9\x38\xf8\xb9\xbf\xcb\x7b"
+ "\xa8\x22\x91\xea\x1e\xaf\x13\xba"
+ "\x24\x18\x64\x9c\xcb\xb4\xa9\x16"
+ "\x4b\x83\x9c\xec",
+ .clen = 64 + 28,
+ "\x85\x7b\x91\xe0\x29\xeb\xd3\x59"
+ "\x7c\xe3\x67\x14\xbe\x71\x2a\xd2"
+ "\x8a\x1a\xd2\x35\x78\x6b\x69\xba"
+ "\x64\xa5\x04\x00\x19\xc3\x4c\xae"
+ "\x71\xff\x76\x9f\xbb\xc3\x29\x22"
+ "\xc2\xc6\x51\xf1\xe6\x29\x5e\xa5",
+ .clen = 64 + 48,
+ }, { /* RFC 3602 Case 5 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -194,10 +209,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\x90\xd3\x82\xb4\x10\xee\xba\x7a"
+ "\xd9\x38\xc4\x6c\xec\x1a\x82\xbf",
+ .klen = 8 + 28 + 16,
+ .klen = 8 + 48 + 16,
+ .iv = "\xe9\x6e\x8c\x08\xab\x46\x57\x63"
+ "\xfd\x09\x8d\x45\xdd\x3f\xf8\x93",
+ .assoc = "\x00\x00\x43\x21\x00\x00\x00\x01"
@@ -225,11 +242,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x53\x8a\xb5\x0c\x55\x1b\x87\x4a"
+ "\xa2\x69\xad\xd0\x47\xad\x2d\x59"
+ "\x13\xac\x19\xb7\xcf\xba\xd4\xa6"
+ "\x04\x5e\x83\x45\xc5\x6a\x5b\xe2"
+ "\x5e\xd8\x59\x06\xbd\xc7\xd2\x9b"
+ "\x0b\x65\x1f\x31\xc7\xe6\x9c\x39"
+ "\xa3\x66\xdb\xb8",
+ .clen = 80 + 28,
+ "\x57\x5f\xb4\xd7\x74\x6f\x18\x97"
+ "\xb7\xde\xfc\xf3\x4e\x0d\x29\x4d"
+ "\xa0\xff\x39\x9e\x2d\xbf\x27\xac"
+ "\x54\xb9\x8a\x3e\xab\x3b\xac\xd3"
+ "\x36\x43\x74\xfc\xc2\x64\x81\x8a"
+ "\x2c\x15\x72\xdf\x3f\x9d\x5b\xa4",
+ .clen = 80 + 48,
+ }, { /* NIST SP800-38A F.2.3 CBC-AES192.Encrypt */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -242,11 +261,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\x8e\x73\xb0\xf7\xda\x0e\x64\x52"
+ "\xc8\x10\xf3\x2b\x80\x90\x79\xe5"
+ "\x62\xf8\xea\xd2\x52\x2c\x6b\x7b",
+ .klen = 8 + 28 + 24,
+ .klen = 8 + 48 + 24,
+ .iv = "\x00\x01\x02\x03\x04\x05\x06\x07"
+ "\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f",
+ .assoc = "\x00\x01\x02\x03\x04\x05\x06\x07"
@@ -269,12 +290,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x7f\xa9\xba\xac\x3d\xf1\x02\xe0"
+ "\x08\xb0\xe2\x79\x88\x59\x88\x81"
+ "\xd9\x20\xa9\xe6\x4f\x56\x15\xcd"
+ "\x67\x35\xcd\x86\x94\x51\x3b\x3a"
+ "\xaa\x07\xb1\xed\x18\x55\x62\x01"
+ "\x95\xb2\x53\xb5\x20\x78\x16\xd7"
+ "\xb8\x49\x7f\x96",
+
+ .clen = 64 + 28,
+ "\x29\x9b\x42\x47\x0b\xbf\xf3\x54"
+ "\x54\x95\xb0\x89\xd5\xa0\xc3\x78"
+ "\x60\x6c\x18\x39\x6d\xc9\xfb\x2a"
+ "\x34\x1c\xed\x95\x10\x1e\x43\x0a"
+ "\x72\xce\x26\xbc\x74\xd9\x6f\xa2"
+ "\xf1\xd9\xd0\xb1\xdf\x3d\x93\x14",
+ .clen = 64 + 48,
+ }, { /* NIST SP800-38A F.2.5 CBC-AES256.Encrypt */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -287,12 +309,14 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\x60\x3d\xeb\x10\x15\xca\x71\xbe"
+ "\x2b\x73\xae\xf0\x85\x7d\x77\x81"
+ "\x1f\x35\x2c\x07\x3b\x61\x08\xd7"
+ "\x2d\x98\x10\xa3\x09\x14\xdf\xf4",
+ .klen = 8 + 28 + 32,
+ .klen = 8 + 48 + 32,
+ .iv = "\x00\x01\x02\x03\x04\x05\x06\x07"
+ "\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f",
+ .assoc = "\x00\x01\x02\x03\x04\x05\x06\x07"
@@ -315,14 +339,16 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\xa5\x30\xe2\x63\x04\x23\x14\x61"
+ "\xb2\xeb\x05\xe2\xc3\x9b\xe9\xfc"
+ "\xda\x6c\x19\x07\x8c\x6a\x9d\x1b"
+ "\xe0\xe2\x3d\x3f\x55\x24\x2c\x4d"
+ "\xb9\x13\x2a\xc0\x07\xbb\x3b\xda"
+ "\xfd\xa4\x51\x32\x3f\x44\xb1\x13"
+ "\x98\xf9\xbc\xb9",
+ .clen = 64 + 28,
+ "\x9f\x50\xce\x64\xd9\xa3\xc9\x7a"
+ "\x15\x3a\x3d\x46\x9a\x90\xf3\x06"
+ "\x22\xad\xc5\x24\x77\x50\xb8\xfe"
+ "\xbe\x37\x16\x86\x34\x5f\xaf\x97"
+ "\x00\x9d\x86\xc8\x32\x4f\x72\x2f"
+ "\x48\x97\xad\xb6\xb9\x77\x33\xbc",
+ .clen = 64 + 48,
+ },
+};
+
static const struct aead_testvec hmac_sha256_aes_cbc_tv_temp[] = {
static const struct aead_testvec hmac_sha512_aes_cbc_tv_temp[] = {
{ /* RFC 3602 Case 1 */
#ifdef __LITTLE_ENDIAN
target/linux/generic/backport-6.12/910-v7.0-crypto-testmgr-Add-test-vectors-for-authenc-hmac-sha.patch → target/linux/generic/backport-6.12/912-v7.0-crypto-testmgr-Add-test-vectors-for-authenc-hmac-sha.patch
+69 -95
View File
@@ -1,11 +1,11 @@
From 030218dedee2628ea3f035d71431e1b7c4191cfb Mon Sep 17 00:00:00 2001
From a22d48cbe55814061d46db2f87090ba5e36aaf7f Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Sat, 31 Jan 2026 18:38:47 +0100
Date: Sat, 31 Jan 2026 18:43:03 +0100
Subject: [PATCH] crypto: testmgr - Add test vectors for
authenc(hmac(sha384),cbc(aes))
authenc(hmac(sha224),cbc(aes))
Test vectors were generated starting from existing CBC(AES) test vectors
(RFC3602, NIST SP800-38A) and adding HMAC(SHA384) computed with Python
(RFC3602, NIST SP800-38A) and adding HMAC(SHA224) computed with Python
script. Then, the results were double-checked on Mediatek MT7981 (safexcel)
and NXP P2020 (talitos). Both platforms pass self-tests.
@@ -13,32 +13,32 @@ Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
crypto/testmgr.c | 7 ++
crypto/testmgr.h | 311 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 318 insertions(+)
crypto/testmgr.h | 285 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 292 insertions(+)
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -4453,6 +4453,13 @@ static const struct alg_test_desc alg_te
@@ -4414,6 +4414,13 @@ static const struct alg_test_desc alg_te
.test = alg_test_null,
.fips_allowed = 1,
}, {
+ .alg = "authenc(hmac(sha384),cbc(aes))",
+ .generic_driver = "authenc(hmac-sha384-lib,cbc(aes-generic))",
+ .alg = "authenc(hmac(sha224),cbc(aes))",
+ .generic_driver = "authenc(hmac-sha224-lib,cbc(aes-generic))",
+ .test = alg_test_aead,
+ .suite = {
+ .aead = __VECS(hmac_sha384_aes_cbc_tv_temp)
+ .aead = __VECS(hmac_sha224_aes_cbc_tv_temp)
+ }
+ }, {
.alg = "authenc(hmac(sha384),cbc(des))",
.alg = "authenc(hmac(sha224),cbc(des))",
.test = alg_test_aead,
.suite = {
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -17773,6 +17773,317 @@ static const struct aead_testvec hmac_sh
@@ -17610,6 +17610,291 @@ static const struct aead_testvec hmac_sh
},
};
+static const struct aead_testvec hmac_sha384_aes_cbc_tv_temp[] = {
+static const struct aead_testvec hmac_sha224_aes_cbc_tv_temp[] = {
+ { /* RFC 3602 Case 1 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -51,28 +51,24 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00"
+ "\x06\xa9\x21\x40\x36\xb8\xa1\x5b"
+ "\x51\x2e\x03\xd5\x34\x12\x00\x06",
+ .klen = 8 + 48 + 16,
+ .klen = 8 + 28 + 16,
+ .iv = "\x3d\xaf\xba\x42\x9d\x9e\xb4\x30"
+ "\xb4\x22\xda\x80\x2c\x9f\xac\x41",
+ .assoc = "\x3d\xaf\xba\x42\x9d\x9e\xb4\x30"
+ "\xb4\x22\xda\x80\x2c\x9f\xac\x41",
+ .alen = 16,
+ .alen = 16,
+ .ptext = "Single block msg",
+ .plen = 16,
+ .ctext = "\xe3\x53\x77\x9c\x10\x79\xae\xb8"
+ "\x27\x08\x94\x2d\xbe\x77\x18\x1a"
+ "\x79\x1c\xf1\x22\x95\x80\xe0\x60"
+ "\x7f\xf9\x92\x60\x83\xbd\x60\x9c"
+ "\xf6\x62\x8b\xa9\x7d\x56\xe2\xaf"
+ "\x80\x43\xbc\x41\x4a\x63\x0b\xa0"
+ "\x16\x25\xe2\xfe\x0a\x96\xf6\xa5"
+ "\x6c\x0b\xc2\x53\xb4\x27\xd9\x42",
+ .clen = 16 + 48,
+ "\x17\xe8\x00\x76\x70\x71\xd1\x72"
+ "\xf8\xd0\x91\x51\x67\xf9\xdf\xd6"
+ "\x0d\x56\x1a\xb3\x52\x19\x85\xae"
+ "\x46\x74\xb6\x98",
+ .clen = 16 + 28,
+ }, { /* RFC 3602 Case 2 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -85,17 +81,15 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x40\x41\x42\x43\x44\x45\x46\x47"
+ "\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+ "\x38\x39\x3a\x3b"
+ "\xc2\x86\x69\x6d\x88\x7c\x9a\xa0"
+ "\x61\x1b\xbb\x3e\x20\x25\xa4\x5a",
+ .klen = 8 + 48 + 16,
+ .klen = 8 + 28 + 16,
+ .iv = "\x56\x2e\x17\x99\x6d\x09\x3d\x28"
+ "\xdd\xb3\xba\x69\x5a\x2e\x6f\x58",
+ .assoc = "\x56\x2e\x17\x99\x6d\x09\x3d\x28"
+ "\xdd\xb3\xba\x69\x5a\x2e\x6f\x58",
+ .alen = 16,
+ .alen = 16,
+ .ptext = "\x00\x01\x02\x03\x04\x05\x06\x07"
+ "\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f"
+ "\x10\x11\x12\x13\x14\x15\x16\x17"
@@ -105,13 +99,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x3a\x86\x30\x28\xb5\xe1\xdc\x0a"
+ "\x75\x86\x60\x2d\x25\x3c\xff\xf9"
+ "\x1b\x82\x66\xbe\xa6\xd6\x1a\xb1"
+ "\x4e\x5b\xa8\x65\x51\xc6\x58\xaf"
+ "\x31\x57\x50\x3d\x01\xa1\xa4\x3f"
+ "\x42\xd1\xd7\x31\x76\x8d\xf8\xc8"
+ "\xe4\xd2\x7e\xc5\x23\xe7\xc6\x2e"
+ "\x2d\xfd\x9d\xc1\xac\x50\x1e\xcf"
+ "\xa0\x10\xeb\x1a\x9c\xb7\xe1\xca",
+ .clen = 32 + 48,
+ "\xa1\x11\xfa\xbb\x1e\x04\x7e\xe7"
+ "\x4c\x5f\x65\xbf\x68\x8d\x33\x9d"
+ "\xbc\x74\x9b\xf3\x15\xf3\x8f\x8d"
+ "\xe8\xaf\x33\xe0",
+
+ .clen = 32 + 28,
+ }, { /* RFC 3602 Case 3 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -124,17 +117,15 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\xaa\xbb\xcc\xdd"
+ "\x6c\x3e\xa0\x47\x76\x30\xce\x21"
+ "\xa2\xce\x33\x4a\xa7\x46\xc2\xcd",
+ .klen = 8 + 48 + 16,
+ .klen = 8 + 28 + 16,
+ .iv = "\xc7\x82\xdc\x4c\x09\x8c\x66\xcb"
+ "\xd9\xcd\x27\xd8\x25\x68\x2c\x81",
+ .assoc = "\xc7\x82\xdc\x4c\x09\x8c\x66\xcb"
+ "\xd9\xcd\x27\xd8\x25\x68\x2c\x81",
+ .alen = 16,
+ .alen = 16,
+ .ptext = "This is a 48-byte message (exactly 3 AES blocks)",
+ .plen = 48,
+ .ctext = "\xd0\xa0\x2b\x38\x36\x45\x17\x53"
@@ -143,13 +134,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x50\x69\x39\x27\x67\x72\xf8\xd5"
+ "\x02\x1c\x19\x21\x6b\xad\x52\x5c"
+ "\x85\x79\x69\x5d\x83\xba\x26\x84"
+ "\xa1\x52\xe7\xda\xf7\x05\xb6\xca"
+ "\xad\x0f\x51\xed\x5a\xd3\x0f\xdf"
+ "\xde\xeb\x3f\x31\xed\x3a\x43\x93"
+ "\x3b\xb7\xca\xc8\x1b\xe7\x3b\x61"
+ "\x6a\x05\xfd\x2d\x6a\x5c\xb1\x0d"
+ "\x6e\x7a\xeb\x1c\x84\xec\xdb\xde",
+ .clen = 48 + 48,
+ "\x60\xb3\xca\x0e\xc1\xfe\xf2\x27"
+ "\x5a\x41\xe4\x99\xa8\x19\x56\xf1"
+ "\x44\x98\x27\x9f\x99\xb0\x4a\xad"
+ "\x4d\xc1\x1e\x88",
+ .clen = 48 + 28,
+ }, { /* RFC 3602 Case 4 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -162,17 +151,15 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\xaa\xbb\xcc\xdd"
+ "\x56\xe4\x7a\x38\xc5\x59\x89\x74"
+ "\xbc\x46\x90\x3d\xba\x29\x03\x49",
+ .klen = 8 + 48 + 16,
+ .klen = 8 + 28 + 16,
+ .iv = "\x8c\xe8\x2e\xef\xbe\xa0\xda\x3c"
+ "\x44\x69\x9e\xd7\xdb\x51\xb7\xd9",
+ .assoc = "\x8c\xe8\x2e\xef\xbe\xa0\xda\x3c"
+ "\x44\x69\x9e\xd7\xdb\x51\xb7\xd9",
+ .alen = 16,
+ .alen = 16,
+ .ptext = "\xa0\xa1\xa2\xa3\xa4\xa5\xa6\xa7"
+ "\xa8\xa9\xaa\xab\xac\xad\xae\xaf"
+ "\xb0\xb1\xb2\xb3\xb4\xb5\xb6\xb7"
@@ -190,13 +177,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x86\x8b\xb7\xb2\x9d\x3d\x46\xad"
+ "\x83\xce\x9f\x9a\x10\x2e\xe9\x9d"
+ "\x49\xa5\x3e\x87\xf4\xc3\xda\x55"
+ "\x85\x7b\x91\xe0\x29\xeb\xd3\x59"
+ "\x7c\xe3\x67\x14\xbe\x71\x2a\xd2"
+ "\x8a\x1a\xd2\x35\x78\x6b\x69\xba"
+ "\x64\xa5\x04\x00\x19\xc3\x4c\xae"
+ "\x71\xff\x76\x9f\xbb\xc3\x29\x22"
+ "\xc2\xc6\x51\xf1\xe6\x29\x5e\xa5",
+ .clen = 64 + 48,
+ "\xbb\xe9\x38\xf8\xb9\xbf\xcb\x7b"
+ "\xa8\x22\x91\xea\x1e\xaf\x13\xba"
+ "\x24\x18\x64\x9c\xcb\xb4\xa9\x16"
+ "\x4b\x83\x9c\xec",
+ .clen = 64 + 28,
+ }, { /* RFC 3602 Case 5 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -209,12 +194,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\xaa\xbb\xcc\xdd"
+ "\x90\xd3\x82\xb4\x10\xee\xba\x7a"
+ "\xd9\x38\xc4\x6c\xec\x1a\x82\xbf",
+ .klen = 8 + 48 + 16,
+ .klen = 8 + 28 + 16,
+ .iv = "\xe9\x6e\x8c\x08\xab\x46\x57\x63"
+ "\xfd\x09\x8d\x45\xdd\x3f\xf8\x93",
+ .assoc = "\x00\x00\x43\x21\x00\x00\x00\x01"
@@ -242,13 +225,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x53\x8a\xb5\x0c\x55\x1b\x87\x4a"
+ "\xa2\x69\xad\xd0\x47\xad\x2d\x59"
+ "\x13\xac\x19\xb7\xcf\xba\xd4\xa6"
+ "\x57\x5f\xb4\xd7\x74\x6f\x18\x97"
+ "\xb7\xde\xfc\xf3\x4e\x0d\x29\x4d"
+ "\xa0\xff\x39\x9e\x2d\xbf\x27\xac"
+ "\x54\xb9\x8a\x3e\xab\x3b\xac\xd3"
+ "\x36\x43\x74\xfc\xc2\x64\x81\x8a"
+ "\x2c\x15\x72\xdf\x3f\x9d\x5b\xa4",
+ .clen = 80 + 48,
+ "\x04\x5e\x83\x45\xc5\x6a\x5b\xe2"
+ "\x5e\xd8\x59\x06\xbd\xc7\xd2\x9b"
+ "\x0b\x65\x1f\x31\xc7\xe6\x9c\x39"
+ "\xa3\x66\xdb\xb8",
+ .clen = 80 + 28,
+ }, { /* NIST SP800-38A F.2.3 CBC-AES192.Encrypt */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -261,13 +242,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\xaa\xbb\xcc\xdd"
+ "\x8e\x73\xb0\xf7\xda\x0e\x64\x52"
+ "\xc8\x10\xf3\x2b\x80\x90\x79\xe5"
+ "\x62\xf8\xea\xd2\x52\x2c\x6b\x7b",
+ .klen = 8 + 48 + 24,
+ .klen = 8 + 28 + 24,
+ .iv = "\x00\x01\x02\x03\x04\x05\x06\x07"
+ "\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f",
+ .assoc = "\x00\x01\x02\x03\x04\x05\x06\x07"
@@ -290,13 +269,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x7f\xa9\xba\xac\x3d\xf1\x02\xe0"
+ "\x08\xb0\xe2\x79\x88\x59\x88\x81"
+ "\xd9\x20\xa9\xe6\x4f\x56\x15\xcd"
+ "\x29\x9b\x42\x47\x0b\xbf\xf3\x54"
+ "\x54\x95\xb0\x89\xd5\xa0\xc3\x78"
+ "\x60\x6c\x18\x39\x6d\xc9\xfb\x2a"
+ "\x34\x1c\xed\x95\x10\x1e\x43\x0a"
+ "\x72\xce\x26\xbc\x74\xd9\x6f\xa2"
+ "\xf1\xd9\xd0\xb1\xdf\x3d\x93\x14",
+ .clen = 64 + 48,
+ "\x67\x35\xcd\x86\x94\x51\x3b\x3a"
+ "\xaa\x07\xb1\xed\x18\x55\x62\x01"
+ "\x95\xb2\x53\xb5\x20\x78\x16\xd7"
+ "\xb8\x49\x7f\x96",
+
+ .clen = 64 + 28,
+ }, { /* NIST SP800-38A F.2.5 CBC-AES256.Encrypt */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -309,14 +287,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\xaa\xbb\xcc\xdd"
+ "\x60\x3d\xeb\x10\x15\xca\x71\xbe"
+ "\x2b\x73\xae\xf0\x85\x7d\x77\x81"
+ "\x1f\x35\x2c\x07\x3b\x61\x08\xd7"
+ "\x2d\x98\x10\xa3\x09\x14\xdf\xf4",
+ .klen = 8 + 48 + 32,
+ .klen = 8 + 28 + 32,
+ .iv = "\x00\x01\x02\x03\x04\x05\x06\x07"
+ "\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f",
+ .assoc = "\x00\x01\x02\x03\x04\x05\x06\x07"
@@ -339,16 +315,14 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\xa5\x30\xe2\x63\x04\x23\x14\x61"
+ "\xb2\xeb\x05\xe2\xc3\x9b\xe9\xfc"
+ "\xda\x6c\x19\x07\x8c\x6a\x9d\x1b"
+ "\x9f\x50\xce\x64\xd9\xa3\xc9\x7a"
+ "\x15\x3a\x3d\x46\x9a\x90\xf3\x06"
+ "\x22\xad\xc5\x24\x77\x50\xb8\xfe"
+ "\xbe\x37\x16\x86\x34\x5f\xaf\x97"
+ "\x00\x9d\x86\xc8\x32\x4f\x72\x2f"
+ "\x48\x97\xad\xb6\xb9\x77\x33\xbc",
+ .clen = 64 + 48,
+ "\xe0\xe2\x3d\x3f\x55\x24\x2c\x4d"
+ "\xb9\x13\x2a\xc0\x07\xbb\x3b\xda"
+ "\xfd\xa4\x51\x32\x3f\x44\xb1\x13"
+ "\x98\xf9\xbc\xb9",
+ .clen = 64 + 28,
+ },
+};
+
static const struct aead_testvec hmac_sha512_aes_cbc_tv_temp[] = {
static const struct aead_testvec hmac_sha256_aes_cbc_tv_temp[] = {
{ /* RFC 3602 Case 1 */
#ifdef __LITTLE_ENDIAN
target/linux/generic/backport-6.12/912-v7.0-crypto-testmgr-Add-test-vectors-for-authenc-hmac-md5.patch → target/linux/generic/backport-6.12/913-v7.0-crypto-testmgr-Add-test-vectors-for-authenc-hmac-md5.patch
+1 -1
View File
@@ -34,7 +34,7 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
.suite = {
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -19021,6 +19021,65 @@ static const struct aead_testvec hmac_sh
@@ -19141,6 +19141,65 @@ static const struct aead_testvec hmac_sh
},
};
target/linux/generic/backport-6.12/913-v7.0-crypto-testmgr-allow-authenc-sha224-rfc3686-variant-.patch → target/linux/generic/backport-6.12/914-v7.0-crypto-testmgr-allow-authenc-sha224-rfc3686-variant-.patch
View File
target/linux/generic/backport-6.12/914-v7.1-crypto-testmgr-Add-test-vectors-for-authenc-hmac-md5.patch → target/linux/generic/backport-6.12/915-v7.1-crypto-testmgr-Add-test-vectors-for-authenc-hmac-md5.patch
+1 -1
View File
@@ -33,7 +33,7 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
.test = alg_test_aead,
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -18708,6 +18708,63 @@ static const struct aead_testvec hmac_sh
@@ -18828,6 +18828,63 @@ static const struct aead_testvec hmac_sh
},
};
target/linux/generic/backport-6.12/916-v7.1-crypto-testmgr-Add-test-vectors-for-authenc-hmac-sha.patch
+56 -70
View File
@@ -1,11 +1,11 @@
From 3f4d32aff1d4e06501f909b1e5037ec8caa76d01 Mon Sep 17 00:00:00 2001
From b45b4314d3e55be70b597baa1f0ab9283e68003b Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Thu, 5 Mar 2026 21:08:21 +0100
Subject: [PATCH 2/5] crypto: testmgr - Add test vectors for
authenc(hmac(sha224),rfc3686(ctr(aes)))
Date: Thu, 5 Mar 2026 21:08:20 +0100
Subject: [PATCH 1/5] crypto: testmgr - Add test vectors for
authenc(hmac(sha1),rfc3686(ctr(aes)))
Test vectors were generated starting from existing RFC3686(CTR(AES)) test
vectors and adding HMAC(SHA224) computed with software implementation.
vectors and adding HMAC(SHA1) computed with software implementation.
Then, the results were double-checked on Mediatek MT7986 (safexcel).
Platform pass self-tests.
@@ -13,32 +13,32 @@ Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
crypto/testmgr.c | 6 +-
crypto/testmgr.h | 235 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 240 insertions(+), 1 deletion(-)
crypto/testmgr.h | 221 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 226 insertions(+), 1 deletion(-)
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -4452,8 +4452,12 @@ static const struct alg_test_desc alg_te
@@ -4425,8 +4425,12 @@ static const struct alg_test_desc alg_te
}
}, {
.alg = "authenc(hmac(sha224),rfc3686(ctr(aes)))",
.alg = "authenc(hmac(sha1),rfc3686(ctr(aes)))",
- .test = alg_test_null,
+ .generic_driver = "authenc(hmac-sha224-lib,rfc3686(ctr(aes-lib)))",
+ .generic_driver = "authenc(hmac-sha1-lib,rfc3686(ctr(aes-lib)))",
+ .test = alg_test_aead,
.fips_allowed = 1,
+ .suite = {
+ .aead = __VECS(hmac_sha224_aes_ctr_rfc3686_tv_temp)
+ .aead = __VECS(hmac_sha1_aes_ctr_rfc3686_tv_temp)
+ }
}, {
.alg = "authenc(hmac(sha256),cbc(aes))",
.test = alg_test_aead,
.alg = "authenc(hmac(sha224),cbc(aes))",
.generic_driver = "authenc(hmac-sha224-lib,cbc(aes-generic))",
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -17996,6 +17996,241 @@ static const struct aead_testvec hmac_sh
@@ -17564,6 +17564,227 @@ static const struct aead_testvec hmac_sh
},
};
+static const struct aead_testvec hmac_sha224_aes_ctr_rfc3686_tv_temp[] = {
+static const struct aead_testvec hmac_sha1_aes_ctr_rfc3686_tv_temp[] = {
+ { /* RFC 3686 Case 1 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -50,12 +50,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x14" /* enc key length */
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00"
+ "\xae\x68\x52\xf8\x12\x10\x67\xcc"
+ "\x4b\xf7\xa5\x76\x55\x77\xf3\x9e"
+ "\x00\x00\x00\x30",
+ .klen = 8 + 28 + 20,
+ .klen = 8 + 20 + 20,
+ .iv = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .assoc = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .alen = 8,
@@ -63,11 +62,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\xe4\x09\x5d\x4f\xb7\xa7\xb3\x79"
+ "\x2d\x61\x75\xa3\x26\x13\x11\xb8"
+ "\x36\xb4\x3b\x9c\x62\xed\xcf\x77"
+ "\xdc\x19\x27\x3f\x92\x80\x52\xce"
+ "\x8f\xad\x01\x0b\x79\xda\x04\x83"
+ "\xcb\x45\x1a\x52",
+ .clen = 16 + 28,
+ "\x70\xdc\x6b\x62\x43\xa1\x2f\x08"
+ "\xf1\xec\x93\x7d\x69\xb2\x8e\x1f"
+ "\x0a\x97\x39\x86",
+ .clen = 16 + 20,
+ }, { /* RFC 3686 Case 2 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -79,12 +77,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x14" /* enc key length */
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b"
+ "\x30\x31\x32\x33"
+ "\x7e\x24\x06\x78\x17\xfa\xe0\xd7"
+ "\x43\xd6\xce\x1f\x32\x53\x91\x63"
+ "\x00\x6c\xb6\xdb",
+ .klen = 8 + 28 + 20,
+ .klen = 8 + 20 + 20,
+ .iv = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .assoc = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .alen = 8,
@@ -97,11 +94,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x79\x0d\x41\xee\x8e\xda\xd3\x88"
+ "\xeb\x2e\x1e\xfc\x46\xda\x57\xc8"
+ "\xfc\xe6\x30\xdf\x91\x41\xbe\x28"
+ "\x7f\xe4\x8f\xa7\x06\x71\xe9\xe5"
+ "\x16\x79\xef\xf9\x7e\x5c\x93\x4d"
+ "\xa0\xf8\x3b\x3a\xaa\x1c\xc0\xd9"
+ "\x6b\x48\x49\x01",
+ .clen = 32 + 28,
+ "\x6b\x7b\x4d\x39\x36\x1c\x12\x5f"
+ "\x72\xd2\x88\xb2\x26\xa6\xa6\xb5"
+ "\x1d\x3a\x49\xa6",
+ .clen = 32 + 20,
+ }, { /* RFC 3686 Case 3 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -113,12 +109,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x14" /* enc key length */
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd"
+ "\x22\x33\x44\x55"
+ "\x76\x91\xbe\x03\x5e\x50\x20\xa8"
+ "\xac\x6e\x61\x85\x29\xf9\xa0\xdc"
+ "\x00\xe0\x01\x7b",
+ .klen = 8 + 28 + 20,
+ .klen = 8 + 20 + 20,
+ .iv = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .assoc = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .alen = 8,
@@ -133,11 +128,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x45\x40\xa4\x2b\xde\x6d\x78\x36"
+ "\xd5\x9a\x5c\xea\xae\xf3\x10\x53"
+ "\x25\xb2\x07\x2f"
+ "\xb0\x19\x45\xee\xa7\x31\xd9\xd0"
+ "\x74\x6b\xb8\xb1\x67\x61\x2f\x8c"
+ "\x68\xde\xe3\xc9\x3b\x0c\x72\xda"
+ "\x48\xba\x1b\x51",
+ .clen = 36 + 28,
+ "\x2c\x86\xa0\x90\x8e\xc1\x02\x1d"
+ "\x51\xdc\xd6\x21\xc7\x30\xcc\x32"
+ "\x38\x55\x47\x64",
+ .clen = 36 + 20,
+ }, { /* RFC 3686 Case 4 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -149,13 +143,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x1c" /* enc key length */
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00"
+ "\x16\xaf\x5b\x14\x5f\xc9\xf5\x79"
+ "\xc1\x75\xf9\x3e\x3b\xfb\x0e\xed"
+ "\x86\x3d\x06\xcc\xfd\xb7\x85\x15"
+ "\x00\x00\x00\x48",
+ .klen = 8 + 28 + 28,
+ .klen = 8 + 20 + 28,
+ .iv = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .assoc = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .alen = 8,
@@ -163,11 +156,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\x4b\x55\x38\x4f\xe2\x59\xc9\xc8"
+ "\x4e\x79\x35\xa0\x03\xcb\xe9\x28"
+ "\xfd\xf5\x35\x26\x50\x3d\xdf\x80"
+ "\x6e\xbe\xba\x8d\x56\xf3\x03\xb7"
+ "\x27\xb8\x13\xe8\x72\x8f\xc9\x52"
+ "\x4a\xb7\xc3\x3a",
+ .clen = 16 + 28,
+ "\xe9\x4e\x49\xf0\x6b\x8d\x58\x2b"
+ "\x26\x7f\xf3\xab\xeb\x2f\x74\x2f"
+ "\x45\x43\x64\xc1",
+ .clen = 16 + 20,
+ }, { /* RFC 3686 Case 5 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -179,13 +171,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x1c" /* enc key length */
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b"
+ "\x30\x31\x32\x33"
+ "\x7c\x5c\xb2\x40\x1b\x3d\xc3\x3c"
+ "\x19\xe7\x34\x08\x19\xe0\xf6\x9c"
+ "\x67\x8c\x3d\xb8\xe6\xf6\xa9\x1a"
+ "\x00\x96\xb0\x3b",
+ .klen = 8 + 28 + 28,
+ .klen = 8 + 20 + 28,
+ .iv = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .assoc = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .alen = 8,
@@ -198,11 +189,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x7e\xdf\xaa\xfa\x71\x31\xcd\x9f"
+ "\x84\x90\x70\x1c\x5a\xd4\xa7\x9c"
+ "\xfc\x1f\xe0\xff\x42\xf4\xfb\x00"
+ "\x72\x89\xa8\x04\xa5\xac\x8f\x29"
+ "\xe6\xb8\x58\xe8\xcf\x6a\x91\x89"
+ "\xd3\x66\x3b\xdc\xce\x43\x23\xb7"
+ "\x6a\xdd\x9d\xbd",
+ .clen = 32 + 28,
+ "\xab\xc4\xfa\x6d\x20\xe1\xce\x72"
+ "\x0e\x92\x4e\x97\xaa\x4d\x30\x84"
+ "\xb6\xd8\x4d\x3b",
+ .clen = 32 + 20,
+ }, { /* RFC 3686 Case 7 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -214,14 +204,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x24" /* enc key length */
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00"
+ "\x77\x6b\xef\xf2\x85\x1d\xb0\x6f"
+ "\x4c\x8a\x05\x42\xc8\x69\x6f\x6c"
+ "\x6a\x81\xaf\x1e\xec\x96\xb4\xd3"
+ "\x7f\xc1\xd6\x89\xe6\xc1\xc1\x04"
+ "\x00\x00\x00\x60",
+ .klen = 8 + 28 + 36,
+ .klen = 8 + 20 + 36,
+ .iv = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .assoc = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .alen = 8,
@@ -229,11 +218,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\x14\x5a\xd0\x1d\xbf\x82\x4e\xc7"
+ "\x56\x08\x63\xdc\x71\xe3\xe0\xc0"
+ "\xfe\xdf\x6f\x62\x8a\x79\xb5\x34"
+ "\xd0\x6f\x32\xaf\x31\x50\x5b\x1f"
+ "\xe0\x6d\x0b\xbc\x02\x25\xee\x74"
+ "\x7a\xdf\x97\x3c",
+ .clen = 16 + 28,
+ "\x3d\x6c\x23\x27\xda\x0e\x7f\x29"
+ "\xfd\x8d\x3c\x1b\xf7\x7a\x63\xd9"
+ "\x7e\x0f\xe9\xf6",
+ .clen = 16 + 20,
+ }, { /* RFC 3686 Case 8 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -245,14 +233,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x24" /* enc key length */
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b"
+ "\x30\x31\x32\x33"
+ "\xf6\xd6\x6d\x6b\xd5\x2d\x59\xbb"
+ "\x07\x96\x36\x58\x79\xef\xf8\x86"
+ "\xc6\x6d\xd5\x1a\x5b\x6a\x99\x74"
+ "\x4b\x50\x59\x0c\x87\xa2\x38\x84"
+ "\x00\xfa\xac\x24",
+ .klen = 8 + 28 + 36,
+ .klen = 8 + 20 + 36,
+ .iv = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .assoc = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .alen = 8,
@@ -265,14 +252,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x49\xee\x00\x0b\x80\x4e\xb2\xa9"
+ "\xb8\x30\x6b\x50\x8f\x83\x9d\x6a"
+ "\x55\x30\x83\x1d\x93\x44\xaf\x1c"
+ "\x19\x1e\x9c\x2c\x6d\x4e\x21\xda"
+ "\x6c\x4d\x88\x90\xf8\x5f\xa5\x9d"
+ "\xb4\xd4\x40\xad\xfa\x67\x3f\x0e"
+ "\x11\x12\xd6\x10",
+ .clen = 32 + 28,
+ "\xe7\xee\x22\xa4\xdd\xbf\x5d\x44"
+ "\x3b\x43\x1c\x69\x55\x11\xd5\xad"
+ "\x14\x5f\x44\xa6",
+ .clen = 32 + 20,
+ },
+};
+
static const struct aead_testvec hmac_sha256_aes_cbc_tv_temp[] = {
{ /* RFC 3602 Case 1 */
static const struct aead_testvec hmac_sha1_ecb_cipher_null_tv_temp[] = {
{ /* Input data from RFC 2410 Case 1 */
#ifdef __LITTLE_ENDIAN
target/linux/generic/backport-6.12/917-v7.1-crypto-testmgr-Add-test-vectors-for-authenc-hmac-sha.patch
+64 -64
View File
@@ -1,11 +1,11 @@
From 65af3a0bff7264ab84f9e1f2099c658601ca1b66 Mon Sep 17 00:00:00 2001
From d46c27c01f132082095342b5abf4e83e250b70b8 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Thu, 5 Mar 2026 21:08:22 +0100
Subject: [PATCH 3/5] crypto: testmgr - Add test vectors for
authenc(hmac(sha256),rfc3686(ctr(aes)))
Date: Thu, 5 Mar 2026 21:08:21 +0100
Subject: [PATCH 2/5] crypto: testmgr - Add test vectors for
authenc(hmac(sha224),rfc3686(ctr(aes)))
Test vectors were generated starting from existing RFC3686(CTR(AES)) test
vectors and adding HMAC(SHA256) computed with software implementation.
vectors and adding HMAC(SHA224) computed with software implementation.
Then, the results were double-checked on Mediatek MT7986 (safexcel).
Platform pass self-tests.
@@ -18,27 +18,27 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -4483,8 +4483,12 @@ static const struct alg_test_desc alg_te
.fips_allowed = 1,
@@ -4452,8 +4452,12 @@ static const struct alg_test_desc alg_te
}
}, {
.alg = "authenc(hmac(sha256),rfc3686(ctr(aes)))",
.alg = "authenc(hmac(sha224),rfc3686(ctr(aes)))",
- .test = alg_test_null,
+ .generic_driver = "authenc(hmac-sha256-lib,rfc3686(ctr(aes-lib)))",
+ .generic_driver = "authenc(hmac-sha224-lib,rfc3686(ctr(aes-lib)))",
+ .test = alg_test_aead,
.fips_allowed = 1,
+ .suite = {
+ .aead = __VECS(hmac_sha256_aes_ctr_rfc3686_tv_temp)
+ .aead = __VECS(hmac_sha224_aes_ctr_rfc3686_tv_temp)
+ }
}, {
.alg = "authenc(hmac(sha384),cbc(aes))",
.generic_driver = "authenc(hmac-sha384-lib,cbc(aes-generic))",
.alg = "authenc(hmac(sha256),cbc(aes))",
.test = alg_test_aead,
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -18514,6 +18514,241 @@ static const struct aead_testvec hmac_sh
@@ -18116,6 +18116,241 @@ static const struct aead_testvec hmac_sh
},
};
+static const struct aead_testvec hmac_sha256_aes_ctr_rfc3686_tv_temp[] = {
+static const struct aead_testvec hmac_sha224_aes_ctr_rfc3686_tv_temp[] = {
+ { /* RFC 3686 Case 1 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -51,11 +51,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00"
+ "\xae\x68\x52\xf8\x12\x10\x67\xcc"
+ "\x4b\xf7\xa5\x76\x55\x77\xf3\x9e"
+ "\x00\x00\x00\x30",
+ .klen = 8 + 32 + 20,
+ .klen = 8 + 28 + 20,
+ .iv = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .assoc = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .alen = 8,
@@ -63,11 +63,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\xe4\x09\x5d\x4f\xb7\xa7\xb3\x79"
+ "\x2d\x61\x75\xa3\x26\x13\x11\xb8"
+ "\x9b\xa2\x34\x62\xe5\xb3\xe8\x2d"
+ "\x6d\xdb\x93\x64\xa5\x08\x2e\x77"
+ "\x72\x1f\x21\x94\xc7\xbe\x14\xa6"
+ "\xcd\xea\x96\xa1\x29\x8f\x30\xc3",
+ .clen = 16 + 32,
+ "\x36\xb4\x3b\x9c\x62\xed\xcf\x77"
+ "\xdc\x19\x27\x3f\x92\x80\x52\xce"
+ "\x8f\xad\x01\x0b\x79\xda\x04\x83"
+ "\xcb\x45\x1a\x52",
+ .clen = 16 + 28,
+ }, { /* RFC 3686 Case 2 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -80,11 +80,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x38\x39\x3a\x3b"
+ "\x7e\x24\x06\x78\x17\xfa\xe0\xd7"
+ "\x43\xd6\xce\x1f\x32\x53\x91\x63"
+ "\x00\x6c\xb6\xdb",
+ .klen = 8 + 32 + 20,
+ .klen = 8 + 28 + 20,
+ .iv = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .assoc = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .alen = 8,
@@ -97,11 +97,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x79\x0d\x41\xee\x8e\xda\xd3\x88"
+ "\xeb\x2e\x1e\xfc\x46\xda\x57\xc8"
+ "\xfc\xe6\x30\xdf\x91\x41\xbe\x28"
+ "\x22\xf7\x95\xa8\xbb\xcd\x19\xf4"
+ "\x58\x16\x54\x28\x2b\xf4\x52\xe7"
+ "\x5c\x6c\xe1\x44\x0b\xd5\x10\x6e"
+ "\xe1\xf7\x04\xc4\x2c\xab\x93\xdd",
+ .clen = 32 + 32,
+ "\x7f\xe4\x8f\xa7\x06\x71\xe9\xe5"
+ "\x16\x79\xef\xf9\x7e\x5c\x93\x4d"
+ "\xa0\xf8\x3b\x3a\xaa\x1c\xc0\xd9"
+ "\x6b\x48\x49\x01",
+ .clen = 32 + 28,
+ }, { /* RFC 3686 Case 3 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -114,11 +114,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\xaa\xbb\xcc\xdd"
+ "\x76\x91\xbe\x03\x5e\x50\x20\xa8"
+ "\xac\x6e\x61\x85\x29\xf9\xa0\xdc"
+ "\x00\xe0\x01\x7b",
+ .klen = 8 + 32 + 20,
+ .klen = 8 + 28 + 20,
+ .iv = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .assoc = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .alen = 8,
@@ -133,11 +133,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x45\x40\xa4\x2b\xde\x6d\x78\x36"
+ "\xd5\x9a\x5c\xea\xae\xf3\x10\x53"
+ "\x25\xb2\x07\x2f"
+ "\x1d\x05\x5f\x77\x3b\x4f\x5c\x21"
+ "\x29\xea\xf1\xa8\x71\x49\x7b\x0b"
+ "\x66\x0d\xff\x18\x81\x63\xfc\xc3"
+ "\x91\xb6\x38\xc8\xcd\x2d\x39\x83",
+ .clen = 36 + 32,
+ "\xb0\x19\x45\xee\xa7\x31\xd9\xd0"
+ "\x74\x6b\xb8\xb1\x67\x61\x2f\x8c"
+ "\x68\xde\xe3\xc9\x3b\x0c\x72\xda"
+ "\x48\xba\x1b\x51",
+ .clen = 36 + 28,
+ }, { /* RFC 3686 Case 4 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -150,12 +150,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00"
+ "\x16\xaf\x5b\x14\x5f\xc9\xf5\x79"
+ "\xc1\x75\xf9\x3e\x3b\xfb\x0e\xed"
+ "\x86\x3d\x06\xcc\xfd\xb7\x85\x15"
+ "\x00\x00\x00\x48",
+ .klen = 8 + 32 + 28,
+ .klen = 8 + 28 + 28,
+ .iv = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .assoc = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .alen = 8,
@@ -163,11 +163,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\x4b\x55\x38\x4f\xe2\x59\xc9\xc8"
+ "\x4e\x79\x35\xa0\x03\xcb\xe9\x28"
+ "\x8d\x03\x77\xb2\x1c\xc9\xe0\xac"
+ "\xde\x69\xbe\x8a\xef\x5b\x13\x74"
+ "\x1d\x39\xbc\xdc\x95\xa4\xbf\xc3"
+ "\xd5\xc6\xd1\xda\xda\x3b\xca\x78",
+ .clen = 16 + 32,
+ "\xfd\xf5\x35\x26\x50\x3d\xdf\x80"
+ "\x6e\xbe\xba\x8d\x56\xf3\x03\xb7"
+ "\x27\xb8\x13\xe8\x72\x8f\xc9\x52"
+ "\x4a\xb7\xc3\x3a",
+ .clen = 16 + 28,
+ }, { /* RFC 3686 Case 5 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -180,12 +180,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x38\x39\x3a\x3b"
+ "\x7c\x5c\xb2\x40\x1b\x3d\xc3\x3c"
+ "\x19\xe7\x34\x08\x19\xe0\xf6\x9c"
+ "\x67\x8c\x3d\xb8\xe6\xf6\xa9\x1a"
+ "\x00\x96\xb0\x3b",
+ .klen = 8 + 32 + 28,
+ .klen = 8 + 28 + 28,
+ .iv = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .assoc = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .alen = 8,
@@ -198,11 +198,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x7e\xdf\xaa\xfa\x71\x31\xcd\x9f"
+ "\x84\x90\x70\x1c\x5a\xd4\xa7\x9c"
+ "\xfc\x1f\xe0\xff\x42\xf4\xfb\x00"
+ "\x34\x06\x2b\x3d\xf1\xa8\x3d\xf1"
+ "\xa6\x5e\x5c\x1a\xdb\x0c\xb5\x1e"
+ "\x8f\xdb\xf4\xca\x7d\x09\x5e\x81"
+ "\xdb\x32\x07\x4a\x1d\x1c\x6d\x83",
+ .clen = 32 + 32,
+ "\x72\x89\xa8\x04\xa5\xac\x8f\x29"
+ "\xe6\xb8\x58\xe8\xcf\x6a\x91\x89"
+ "\xd3\x66\x3b\xdc\xce\x43\x23\xb7"
+ "\x6a\xdd\x9d\xbd",
+ .clen = 32 + 28,
+ }, { /* RFC 3686 Case 7 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -215,13 +215,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00"
+ "\x77\x6b\xef\xf2\x85\x1d\xb0\x6f"
+ "\x4c\x8a\x05\x42\xc8\x69\x6f\x6c"
+ "\x6a\x81\xaf\x1e\xec\x96\xb4\xd3"
+ "\x7f\xc1\xd6\x89\xe6\xc1\xc1\x04"
+ "\x00\x00\x00\x60",
+ .klen = 8 + 32 + 36,
+ .klen = 8 + 28 + 36,
+ .iv = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .assoc = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .alen = 8,
@@ -229,11 +229,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\x14\x5a\xd0\x1d\xbf\x82\x4e\xc7"
+ "\x56\x08\x63\xdc\x71\xe3\xe0\xc0"
+ "\xc3\xb4\x5f\xb0\xbf\xf5\x1b\xff"
+ "\x7c\xf1\x79\x00\x63\x50\xdd\x77"
+ "\xc0\x4a\xba\xcd\xdc\x47\x05\x2a"
+ "\x5d\x85\x2d\x83\x44\xca\x79\x2c",
+ .clen = 16 + 32,
+ "\xfe\xdf\x6f\x62\x8a\x79\xb5\x34"
+ "\xd0\x6f\x32\xaf\x31\x50\x5b\x1f"
+ "\xe0\x6d\x0b\xbc\x02\x25\xee\x74"
+ "\x7a\xdf\x97\x3c",
+ .clen = 16 + 28,
+ }, { /* RFC 3686 Case 8 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -246,13 +246,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x38\x39\x3a\x3b"
+ "\xf6\xd6\x6d\x6b\xd5\x2d\x59\xbb"
+ "\x07\x96\x36\x58\x79\xef\xf8\x86"
+ "\xc6\x6d\xd5\x1a\x5b\x6a\x99\x74"
+ "\x4b\x50\x59\x0c\x87\xa2\x38\x84"
+ "\x00\xfa\xac\x24",
+ .klen = 8 + 32 + 36,
+ .klen = 8 + 28 + 36,
+ .iv = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .assoc = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .alen = 8,
@@ -265,14 +265,14 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x49\xee\x00\x0b\x80\x4e\xb2\xa9"
+ "\xb8\x30\x6b\x50\x8f\x83\x9d\x6a"
+ "\x55\x30\x83\x1d\x93\x44\xaf\x1c"
+ "\xc8\x59\x5d\xe1\xba\xac\x13\x82"
+ "\xfd\x21\x7c\x8c\x23\x31\x04\x02"
+ "\x9e\x69\x5b\x57\xa8\x13\xe7\x21"
+ "\x60\x0c\x24\xc2\x80\x4a\x93\x6e",
+ .clen = 32 + 32,
+ "\x19\x1e\x9c\x2c\x6d\x4e\x21\xda"
+ "\x6c\x4d\x88\x90\xf8\x5f\xa5\x9d"
+ "\xb4\xd4\x40\xad\xfa\x67\x3f\x0e"
+ "\x11\x12\xd6\x10",
+ .clen = 32 + 28,
+ },
+};
+
static const struct aead_testvec hmac_sha384_aes_cbc_tv_temp[] = {
static const struct aead_testvec hmac_sha256_aes_cbc_tv_temp[] = {
{ /* RFC 3602 Case 1 */
#ifdef __LITTLE_ENDIAN
target/linux/generic/backport-6.12/918-v7.1-crypto-testmgr-Add-test-vectors-for-authenc-hmac-sha.patch
+58 -86
View File
@@ -1,11 +1,11 @@
From 07cbbf6f38e6a91a7fecab3d6f86485425748d3e Mon Sep 17 00:00:00 2001
From 5ac6b904c70ff163fd2f9e152056300ce5ed6c26 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Thu, 5 Mar 2026 21:08:23 +0100
Subject: [PATCH 4/5] crypto: testmgr - Add test vectors for
authenc(hmac(sha384),rfc3686(ctr(aes)))
Date: Thu, 5 Mar 2026 21:08:22 +0100
Subject: [PATCH 3/5] crypto: testmgr - Add test vectors for
authenc(hmac(sha256),rfc3686(ctr(aes)))
Test vectors were generated starting from existing RFC3686(CTR(AES)) test
vectors and adding HMAC(SHA384) computed with software implementation.
vectors and adding HMAC(SHA256) computed with software implementation.
Then, the results were double-checked on Mediatek MT7986 (safexcel).
Platform pass self-tests.
@@ -13,32 +13,32 @@ Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
crypto/testmgr.c | 6 +-
crypto/testmgr.h | 263 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 268 insertions(+), 1 deletion(-)
crypto/testmgr.h | 235 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 240 insertions(+), 1 deletion(-)
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -4514,8 +4514,12 @@ static const struct alg_test_desc alg_te
@@ -4483,8 +4483,12 @@ static const struct alg_test_desc alg_te
.fips_allowed = 1,
}, {
.alg = "authenc(hmac(sha384),rfc3686(ctr(aes)))",
.alg = "authenc(hmac(sha256),rfc3686(ctr(aes)))",
- .test = alg_test_null,
+ .generic_driver = "authenc(hmac-sha384-lib,rfc3686(ctr(aes-lib)))",
+ .generic_driver = "authenc(hmac-sha256-lib,rfc3686(ctr(aes-lib)))",
+ .test = alg_test_aead,
.fips_allowed = 1,
+ .suite = {
+ .aead = __VECS(hmac_sha384_aes_ctr_rfc3686_tv_temp)
+ .aead = __VECS(hmac_sha256_aes_ctr_rfc3686_tv_temp)
+ }
}, {
.alg = "authenc(hmac(sha512),cbc(aes))",
.fips_allowed = 1,
.alg = "authenc(hmac(sha384),cbc(aes))",
.generic_driver = "authenc(hmac-sha384-lib,cbc(aes-generic))",
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -19060,6 +19060,269 @@ static const struct aead_testvec hmac_sh
@@ -18634,6 +18634,241 @@ static const struct aead_testvec hmac_sh
},
};
+static const struct aead_testvec hmac_sha384_aes_ctr_rfc3686_tv_temp[] = {
+static const struct aead_testvec hmac_sha256_aes_ctr_rfc3686_tv_temp[] = {
+ { /* RFC 3686 Case 1 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -52,12 +52,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\xae\x68\x52\xf8\x12\x10\x67\xcc"
+ "\x4b\xf7\xa5\x76\x55\x77\xf3\x9e"
+ "\x00\x00\x00\x30",
+ .klen = 8 + 48 + 20,
+ .klen = 8 + 32 + 20,
+ .iv = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .assoc = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .alen = 8,
@@ -65,13 +63,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\xe4\x09\x5d\x4f\xb7\xa7\xb3\x79"
+ "\x2d\x61\x75\xa3\x26\x13\x11\xb8"
+ "\x45\x51\x59\x72\x16\xd3\xc6\x15"
+ "\x25\x1e\xe8\x92\x2e\x47\x52\xcc"
+ "\x91\x9c\x24\xef\x11\xb2\x53\x00"
+ "\x10\x20\x43\x06\xe2\x35\x88\x9e"
+ "\x18\x32\x5a\x79\x7d\x73\x7e\x89"
+ "\xfe\xa1\xda\xa4\x86\xc4\x2a\x04",
+ .clen = 16 + 48,
+ "\x9b\xa2\x34\x62\xe5\xb3\xe8\x2d"
+ "\x6d\xdb\x93\x64\xa5\x08\x2e\x77"
+ "\x72\x1f\x21\x94\xc7\xbe\x14\xa6"
+ "\xcd\xea\x96\xa1\x29\x8f\x30\xc3",
+ .clen = 16 + 32,
+ }, { /* RFC 3686 Case 2 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -85,12 +81,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x40\x41\x42\x43\x44\x45\x46\x47"
+ "\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+ "\x7e\x24\x06\x78\x17\xfa\xe0\xd7"
+ "\x43\xd6\xce\x1f\x32\x53\x91\x63"
+ "\x00\x6c\xb6\xdb",
+ .klen = 8 + 48 + 20,
+ .klen = 8 + 32 + 20,
+ .iv = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .assoc = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .alen = 8,
@@ -103,13 +97,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x79\x0d\x41\xee\x8e\xda\xd3\x88"
+ "\xeb\x2e\x1e\xfc\x46\xda\x57\xc8"
+ "\xfc\xe6\x30\xdf\x91\x41\xbe\x28"
+ "\x83\x65\x32\x1e\x6b\x60\xe6\x4a"
+ "\xe2\xab\x52\x2b\xa6\x70\x3a\xfa"
+ "\xd2\xec\x83\xe4\x31\x0c\x28\x40"
+ "\x9b\x5e\x18\xa4\xdc\x48\xb8\x56"
+ "\x33\xab\x7f\x2b\xaf\xe4\x3a\xe3"
+ "\x8a\x61\xf6\x22\xb4\x6b\xfe\x7d",
+ .clen = 32 + 48,
+ "\x22\xf7\x95\xa8\xbb\xcd\x19\xf4"
+ "\x58\x16\x54\x28\x2b\xf4\x52\xe7"
+ "\x5c\x6c\xe1\x44\x0b\xd5\x10\x6e"
+ "\xe1\xf7\x04\xc4\x2c\xab\x93\xdd",
+ .clen = 32 + 32,
+ }, { /* RFC 3686 Case 3 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -123,12 +115,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\x76\x91\xbe\x03\x5e\x50\x20\xa8"
+ "\xac\x6e\x61\x85\x29\xf9\xa0\xdc"
+ "\x00\xe0\x01\x7b",
+ .klen = 8 + 48 + 20,
+ .klen = 8 + 32 + 20,
+ .iv = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .assoc = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .alen = 8,
@@ -143,13 +133,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x45\x40\xa4\x2b\xde\x6d\x78\x36"
+ "\xd5\x9a\x5c\xea\xae\xf3\x10\x53"
+ "\x25\xb2\x07\x2f"
+ "\x4a\xaa\xad\x3b\x3b\xb6\x9a\xba"
+ "\xa1\x7b\xc6\xce\x96\xc3\xff\x67"
+ "\xf3\x0c\x33\x57\xf0\x51\x24\x08"
+ "\xed\x4f\x6a\x9c\x22\x42\xbd\x18"
+ "\x97\x74\x68\x36\x00\xf1\x69\x3a"
+ "\x18\x77\x40\xf0\x56\xba\xba\xe0",
+ .clen = 36 + 48,
+ "\x1d\x05\x5f\x77\x3b\x4f\x5c\x21"
+ "\x29\xea\xf1\xa8\x71\x49\x7b\x0b"
+ "\x66\x0d\xff\x18\x81\x63\xfc\xc3"
+ "\x91\xb6\x38\xc8\xcd\x2d\x39\x83",
+ .clen = 36 + 32,
+ }, { /* RFC 3686 Case 4 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -163,13 +151,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x16\xaf\x5b\x14\x5f\xc9\xf5\x79"
+ "\xc1\x75\xf9\x3e\x3b\xfb\x0e\xed"
+ "\x86\x3d\x06\xcc\xfd\xb7\x85\x15"
+ "\x00\x00\x00\x48",
+ .klen = 8 + 48 + 28,
+ .klen = 8 + 32 + 28,
+ .iv = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .assoc = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .alen = 8,
@@ -177,13 +163,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\x4b\x55\x38\x4f\xe2\x59\xc9\xc8"
+ "\x4e\x79\x35\xa0\x03\xcb\xe9\x28"
+ "\x36\xd6\xc7\x55\xac\xb6\x0b\x14"
+ "\x95\x71\xf9\x86\x30\xe3\x96\xc3"
+ "\x76\x85\x6d\xa5\x06\xed\x6f\x34"
+ "\xcc\x1f\xcc\x2d\x88\x06\xb0\x1d"
+ "\xbe\xd9\xa2\xd3\x64\xf1\x33\x03"
+ "\x13\x50\x8f\xae\x61\x2d\x82\xb8",
+ .clen = 16 + 48,
+ "\x8d\x03\x77\xb2\x1c\xc9\xe0\xac"
+ "\xde\x69\xbe\x8a\xef\x5b\x13\x74"
+ "\x1d\x39\xbc\xdc\x95\xa4\xbf\xc3"
+ "\xd5\xc6\xd1\xda\xda\x3b\xca\x78",
+ .clen = 16 + 32,
+ }, { /* RFC 3686 Case 5 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -197,13 +181,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x40\x41\x42\x43\x44\x45\x46\x47"
+ "\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+ "\x7c\x5c\xb2\x40\x1b\x3d\xc3\x3c"
+ "\x19\xe7\x34\x08\x19\xe0\xf6\x9c"
+ "\x67\x8c\x3d\xb8\xe6\xf6\xa9\x1a"
+ "\x00\x96\xb0\x3b",
+ .klen = 8 + 48 + 28,
+ .klen = 8 + 32 + 28,
+ .iv = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .assoc = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .alen = 8,
@@ -216,13 +198,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x7e\xdf\xaa\xfa\x71\x31\xcd\x9f"
+ "\x84\x90\x70\x1c\x5a\xd4\xa7\x9c"
+ "\xfc\x1f\xe0\xff\x42\xf4\xfb\x00"
+ "\x80\x12\x67\x22\xf2\x4d\x9b\xbf"
+ "\xdc\x38\xd3\xaa\x12\xc0\x58\x1a"
+ "\x9a\x62\x6e\x42\x3d\x44\x63\xdd"
+ "\xee\x7e\xe3\xa3\xdf\x2a\x65\x05"
+ "\xd0\xc1\xd2\x54\x55\x35\x5c\xc7"
+ "\xb0\xb5\xb1\x36\xe0\x0b\xaf\x72",
+ .clen = 32 + 48,
+ "\x34\x06\x2b\x3d\xf1\xa8\x3d\xf1"
+ "\xa6\x5e\x5c\x1a\xdb\x0c\xb5\x1e"
+ "\x8f\xdb\xf4\xca\x7d\x09\x5e\x81"
+ "\xdb\x32\x07\x4a\x1d\x1c\x6d\x83",
+ .clen = 32 + 32,
+ }, { /* RFC 3686 Case 7 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -236,14 +216,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x77\x6b\xef\xf2\x85\x1d\xb0\x6f"
+ "\x4c\x8a\x05\x42\xc8\x69\x6f\x6c"
+ "\x6a\x81\xaf\x1e\xec\x96\xb4\xd3"
+ "\x7f\xc1\xd6\x89\xe6\xc1\xc1\x04"
+ "\x00\x00\x00\x60",
+ .klen = 8 + 48 + 36,
+ .klen = 8 + 32 + 36,
+ .iv = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .assoc = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .alen = 8,
@@ -251,13 +229,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\x14\x5a\xd0\x1d\xbf\x82\x4e\xc7"
+ "\x56\x08\x63\xdc\x71\xe3\xe0\xc0"
+ "\xb1\x7b\xb1\xec\xca\x94\x55\xc4"
+ "\x3f\x2b\xb1\x70\x04\x91\xf5\x9d"
+ "\x1a\xc0\xe1\x2a\x93\x5f\x96\x2a"
+ "\x12\x85\x38\x36\xe1\xb2\xe9\xf0"
+ "\xf2\x6e\x5d\x81\xcc\x49\x07\x9c"
+ "\x5b\x88\xc8\xcc\xc4\x21\x4f\x32",
+ .clen = 16 + 48,
+ "\xc3\xb4\x5f\xb0\xbf\xf5\x1b\xff"
+ "\x7c\xf1\x79\x00\x63\x50\xdd\x77"
+ "\xc0\x4a\xba\xcd\xdc\x47\x05\x2a"
+ "\x5d\x85\x2d\x83\x44\xca\x79\x2c",
+ .clen = 16 + 32,
+ }, { /* RFC 3686 Case 8 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -271,14 +247,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x40\x41\x42\x43\x44\x45\x46\x47"
+ "\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+ "\xf6\xd6\x6d\x6b\xd5\x2d\x59\xbb"
+ "\x07\x96\x36\x58\x79\xef\xf8\x86"
+ "\xc6\x6d\xd5\x1a\x5b\x6a\x99\x74"
+ "\x4b\x50\x59\x0c\x87\xa2\x38\x84"
+ "\x00\xfa\xac\x24",
+ .klen = 8 + 48 + 36,
+ .klen = 8 + 32 + 36,
+ .iv = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .assoc = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .alen = 8,
@@ -291,16 +265,14 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x49\xee\x00\x0b\x80\x4e\xb2\xa9"
+ "\xb8\x30\x6b\x50\x8f\x83\x9d\x6a"
+ "\x55\x30\x83\x1d\x93\x44\xaf\x1c"
+ "\xd6\x96\xbb\x12\x39\xc4\x4d\xe2"
+ "\x4c\x02\xe7\x1f\xdc\xb2\xb1\x57"
+ "\x38\x0d\xdd\x13\xb3\x89\x57\x9e"
+ "\x1f\xb5\x48\x32\xc4\xd3\x9d\x1f"
+ "\x68\xab\x8d\xc6\xa8\x05\x3a\xc2"
+ "\x87\xaf\x23\xb3\xe4\x1b\xde\xb3",
+ .clen = 32 + 48,
+ "\xc8\x59\x5d\xe1\xba\xac\x13\x82"
+ "\xfd\x21\x7c\x8c\x23\x31\x04\x02"
+ "\x9e\x69\x5b\x57\xa8\x13\xe7\x21"
+ "\x60\x0c\x24\xc2\x80\x4a\x93\x6e",
+ .clen = 32 + 32,
+ },
+};
+
static const struct aead_testvec hmac_sha512_aes_cbc_tv_temp[] = {
static const struct aead_testvec hmac_sha384_aes_cbc_tv_temp[] = {
{ /* RFC 3602 Case 1 */
#ifdef __LITTLE_ENDIAN
target/linux/generic/backport-6.12/919-v7.1-crypto-testmgr-Add-test-vectors-for-authenc-hmac-sha.patch
+73 -101
View File
@@ -1,11 +1,11 @@
From 07f1bc80c478c7198065d3896ed3685428314a9c Mon Sep 17 00:00:00 2001
From 2f0814271715f974ae1fc6247c9918906c83e24b Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Thu, 5 Mar 2026 21:08:24 +0100
Subject: [PATCH 5/5] crypto: testmgr - Add test vectors for
authenc(hmac(sha512),rfc3686(ctr(aes)))
Date: Thu, 5 Mar 2026 21:08:23 +0100
Subject: [PATCH 4/5] crypto: testmgr - Add test vectors for
authenc(hmac(sha384),rfc3686(ctr(aes)))
Test vectors were generated starting from existing RFC3686(CTR(AES)) test
vectors and adding HMAC(SHA512) computed with software implementation.
vectors and adding HMAC(SHA384) computed with software implementation.
Then, the results were double-checked on Mediatek MT7986 (safexcel).
Platform pass self-tests.
@@ -13,32 +13,32 @@ Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
crypto/testmgr.c | 6 +-
crypto/testmgr.h | 291 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 296 insertions(+), 1 deletion(-)
crypto/testmgr.h | 263 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 268 insertions(+), 1 deletion(-)
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -4545,8 +4545,12 @@ static const struct alg_test_desc alg_te
@@ -4514,8 +4514,12 @@ static const struct alg_test_desc alg_te
.fips_allowed = 1,
}, {
.alg = "authenc(hmac(sha512),rfc3686(ctr(aes)))",
.alg = "authenc(hmac(sha384),rfc3686(ctr(aes)))",
- .test = alg_test_null,
+ .generic_driver = "authenc(hmac-sha512-lib,rfc3686(ctr(aes-lib)))",
+ .generic_driver = "authenc(hmac-sha384-lib,rfc3686(ctr(aes-lib)))",
+ .test = alg_test_aead,
.fips_allowed = 1,
+ .suite = {
+ .aead = __VECS(hmac_sha512_aes_ctr_rfc3686_tv_temp)
+ .aead = __VECS(hmac_sha384_aes_ctr_rfc3686_tv_temp)
+ }
}, {
.alg = "blake2b-160",
.test = alg_test_hash,
.alg = "authenc(hmac(sha512),cbc(aes))",
.fips_allowed = 1,
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -19719,6 +19719,297 @@ static const struct aead_testvec hmac_md
@@ -19180,6 +19180,269 @@ static const struct aead_testvec hmac_sh
},
};
+static const struct aead_testvec hmac_sha512_aes_ctr_rfc3686_tv_temp[] = {
+static const struct aead_testvec hmac_sha384_aes_ctr_rfc3686_tv_temp[] = {
+ { /* RFC 3686 Case 1 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -54,12 +54,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\xae\x68\x52\xf8\x12\x10\x67\xcc"
+ "\x4b\xf7\xa5\x76\x55\x77\xf3\x9e"
+ "\x00\x00\x00\x30",
+ .klen = 8 + 64 + 20,
+ .klen = 8 + 48 + 20,
+ .iv = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .assoc = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .alen = 8,
@@ -67,15 +65,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\xe4\x09\x5d\x4f\xb7\xa7\xb3\x79"
+ "\x2d\x61\x75\xa3\x26\x13\x11\xb8"
+ "\xa4\x45\x3a\x44\x9c\xe5\x1c\xd9"
+ "\x10\x43\x51\x2e\x76\x5e\xf8\x9d"
+ "\x03\x12\x1a\x31\x00\x33\x10\xb4"
+ "\x94\x4b\x70\x84\x6c\xda\xb1\x46"
+ "\x24\xb6\x3b\x2a\xec\xd5\x67\xb8"
+ "\x65\xa2\xbd\xac\x18\xe2\xf8\x55"
+ "\xc6\x91\xb0\x92\x84\x2d\x74\x44"
+ "\xa7\xee\xc3\x44\xa0\x07\x0e\x62",
+ .clen = 16 + 64,
+ "\x45\x51\x59\x72\x16\xd3\xc6\x15"
+ "\x25\x1e\xe8\x92\x2e\x47\x52\xcc"
+ "\x91\x9c\x24\xef\x11\xb2\x53\x00"
+ "\x10\x20\x43\x06\xe2\x35\x88\x9e"
+ "\x18\x32\x5a\x79\x7d\x73\x7e\x89"
+ "\xfe\xa1\xda\xa4\x86\xc4\x2a\x04",
+ .clen = 16 + 48,
+ }, { /* RFC 3686 Case 2 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -91,12 +87,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x40\x41\x42\x43\x44\x45\x46\x47"
+ "\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+ "\x50\x51\x52\x53\x54\x55\x56\x57"
+ "\x58\x59\x5a\x5b\x5c\x5d\x5e\x5f"
+ "\x7e\x24\x06\x78\x17\xfa\xe0\xd7"
+ "\x43\xd6\xce\x1f\x32\x53\x91\x63"
+ "\x00\x6c\xb6\xdb",
+ .klen = 8 + 64 + 20,
+ .klen = 8 + 48 + 20,
+ .iv = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .assoc = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .alen = 8,
@@ -109,15 +103,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x79\x0d\x41\xee\x8e\xda\xd3\x88"
+ "\xeb\x2e\x1e\xfc\x46\xda\x57\xc8"
+ "\xfc\xe6\x30\xdf\x91\x41\xbe\x28"
+ "\xec\x67\x0d\xb3\xbd\x98\x13\x01"
+ "\x2b\x04\x9b\xe6\x06\x67\x3c\x76"
+ "\xcd\x41\xb7\xcc\x70\x6c\x7f\xc8"
+ "\x67\xbd\x22\x39\xb2\xaa\xe8\x88"
+ "\xe0\x4f\x81\x52\xdf\xc9\xc3\xd6"
+ "\x44\xf4\x66\x33\x87\x64\x61\x02"
+ "\x02\xa2\x64\x15\x2b\xe9\x0b\x3d"
+ "\x4c\xea\xa1\xa5\xa7\xc9\xd3\x1b",
+ .clen = 32 + 64,
+ "\x83\x65\x32\x1e\x6b\x60\xe6\x4a"
+ "\xe2\xab\x52\x2b\xa6\x70\x3a\xfa"
+ "\xd2\xec\x83\xe4\x31\x0c\x28\x40"
+ "\x9b\x5e\x18\xa4\xdc\x48\xb8\x56"
+ "\x33\xab\x7f\x2b\xaf\xe4\x3a\xe3"
+ "\x8a\x61\xf6\x22\xb4\x6b\xfe\x7d",
+ .clen = 32 + 48,
+ }, { /* RFC 3686 Case 3 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -133,12 +125,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\x44\x55\x66\x77\x88\x99\xaa\xbb"
+ "\xcc\xdd\xee\xff\x11\x22\x33\x44"
+ "\x76\x91\xbe\x03\x5e\x50\x20\xa8"
+ "\xac\x6e\x61\x85\x29\xf9\xa0\xdc"
+ "\x00\xe0\x01\x7b",
+ .klen = 8 + 64 + 20,
+ .klen = 8 + 48 + 20,
+ .iv = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .assoc = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .alen = 8,
@@ -153,15 +143,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x45\x40\xa4\x2b\xde\x6d\x78\x36"
+ "\xd5\x9a\x5c\xea\xae\xf3\x10\x53"
+ "\x25\xb2\x07\x2f"
+ "\x6f\x90\xb6\xa3\x35\x43\x59\xff"
+ "\x1e\x32\xd6\xfe\xfa\x33\xf9\xf0"
+ "\x31\x2f\x03\x2d\x88\x1d\xab\xbf"
+ "\x0e\x19\x16\xd9\xf3\x98\x3e\xdd"
+ "\x0c\xec\xfe\xe8\x89\x13\x91\x15"
+ "\xf6\x61\x65\x5c\x1b\x7d\xde\xc0"
+ "\xe4\xba\x6d\x27\xe2\x89\x23\x24"
+ "\x15\x82\x37\x3d\x48\xd3\xc9\x32",
+ .clen = 36 + 64,
+ "\x4a\xaa\xad\x3b\x3b\xb6\x9a\xba"
+ "\xa1\x7b\xc6\xce\x96\xc3\xff\x67"
+ "\xf3\x0c\x33\x57\xf0\x51\x24\x08"
+ "\xed\x4f\x6a\x9c\x22\x42\xbd\x18"
+ "\x97\x74\x68\x36\x00\xf1\x69\x3a"
+ "\x18\x77\x40\xf0\x56\xba\xba\xe0",
+ .clen = 36 + 48,
+ }, { /* RFC 3686 Case 4 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -177,13 +165,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x16\xaf\x5b\x14\x5f\xc9\xf5\x79"
+ "\xc1\x75\xf9\x3e\x3b\xfb\x0e\xed"
+ "\x86\x3d\x06\xcc\xfd\xb7\x85\x15"
+ "\x00\x00\x00\x48",
+ .klen = 8 + 64 + 28,
+ .klen = 8 + 48 + 28,
+ .iv = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .assoc = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .alen = 8,
@@ -191,15 +177,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\x4b\x55\x38\x4f\xe2\x59\xc9\xc8"
+ "\x4e\x79\x35\xa0\x03\xcb\xe9\x28"
+ "\x25\xea\xdc\xad\x52\xb8\x0f\x70"
+ "\xe7\x39\x83\x80\x10\x3f\x18\xc4"
+ "\xf8\x59\x14\x25\x5f\xba\x20\x87"
+ "\x0b\x04\x5e\xf7\xde\x41\x39\xff"
+ "\xa2\xee\x84\x3f\x9d\x38\xfd\x17"
+ "\xc0\x66\x5e\x74\x39\xe3\xd3\xd7"
+ "\x3d\xbc\xe3\x99\x2f\xe7\xef\x37"
+ "\x61\x03\xf3\x9e\x01\xaf\xba\x9d",
+ .clen = 16 + 64,
+ "\x36\xd6\xc7\x55\xac\xb6\x0b\x14"
+ "\x95\x71\xf9\x86\x30\xe3\x96\xc3"
+ "\x76\x85\x6d\xa5\x06\xed\x6f\x34"
+ "\xcc\x1f\xcc\x2d\x88\x06\xb0\x1d"
+ "\xbe\xd9\xa2\xd3\x64\xf1\x33\x03"
+ "\x13\x50\x8f\xae\x61\x2d\x82\xb8",
+ .clen = 16 + 48,
+ }, { /* RFC 3686 Case 5 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -215,13 +199,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x40\x41\x42\x43\x44\x45\x46\x47"
+ "\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+ "\x50\x51\x52\x53\x54\x55\x56\x57"
+ "\x58\x59\x5a\x5b\x5c\x5d\x5e\x5f"
+ "\x7c\x5c\xb2\x40\x1b\x3d\xc3\x3c"
+ "\x19\xe7\x34\x08\x19\xe0\xf6\x9c"
+ "\x67\x8c\x3d\xb8\xe6\xf6\xa9\x1a"
+ "\x00\x96\xb0\x3b",
+ .klen = 8 + 64 + 28,
+ .klen = 8 + 48 + 28,
+ .iv = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .assoc = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .alen = 8,
@@ -234,15 +216,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x7e\xdf\xaa\xfa\x71\x31\xcd\x9f"
+ "\x84\x90\x70\x1c\x5a\xd4\xa7\x9c"
+ "\xfc\x1f\xe0\xff\x42\xf4\xfb\x00"
+ "\x51\xa3\xe6\x1d\x23\x7d\xd1\x18"
+ "\x55\x9c\x1c\x92\x2b\xc2\xcd\xfe"
+ "\x8a\xa8\xa5\x96\x65\x2e\x9d\xdb"
+ "\x06\xd2\x1c\x57\x2b\x76\xb5\x9c"
+ "\xd4\x3e\x8b\x61\x54\x2d\x08\xe5"
+ "\xb2\xf8\x88\x20\x0c\xad\xe8\x85"
+ "\x61\x8e\x5c\xa4\x96\x2c\xe2\x7d"
+ "\x4f\xb6\x1d\xb2\x8c\xd7\xe3\x38",
+ .clen = 32 + 64,
+ "\x80\x12\x67\x22\xf2\x4d\x9b\xbf"
+ "\xdc\x38\xd3\xaa\x12\xc0\x58\x1a"
+ "\x9a\x62\x6e\x42\x3d\x44\x63\xdd"
+ "\xee\x7e\xe3\xa3\xdf\x2a\x65\x05"
+ "\xd0\xc1\xd2\x54\x55\x35\x5c\xc7"
+ "\xb0\xb5\xb1\x36\xe0\x0b\xaf\x72",
+ .clen = 32 + 48,
+ }, { /* RFC 3686 Case 7 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -258,14 +238,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x77\x6b\xef\xf2\x85\x1d\xb0\x6f"
+ "\x4c\x8a\x05\x42\xc8\x69\x6f\x6c"
+ "\x6a\x81\xaf\x1e\xec\x96\xb4\xd3"
+ "\x7f\xc1\xd6\x89\xe6\xc1\xc1\x04"
+ "\x00\x00\x00\x60",
+ .klen = 8 + 64 + 36,
+ .klen = 8 + 48 + 36,
+ .iv = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .assoc = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .alen = 8,
@@ -273,15 +251,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\x14\x5a\xd0\x1d\xbf\x82\x4e\xc7"
+ "\x56\x08\x63\xdc\x71\xe3\xe0\xc0"
+ "\x6b\x68\x0b\x99\x9a\x4d\xc8\xb9"
+ "\x35\xea\xcd\x56\x3f\x40\xa2\xb6"
+ "\x68\xda\x59\xd8\xa0\x89\xcd\x52"
+ "\xb1\x6e\xed\xc1\x42\x10\xa5\x0f"
+ "\x88\x0b\x80\xce\xc4\x67\xf0\x45"
+ "\x5d\xb2\x9e\xde\x1c\x79\x52\x0d"
+ "\xff\x75\x36\xd5\x0f\x52\x8e\xe5"
+ "\x31\x85\xcf\x1d\x31\xf8\x62\x67",
+ .clen = 16 + 64,
+ "\xb1\x7b\xb1\xec\xca\x94\x55\xc4"
+ "\x3f\x2b\xb1\x70\x04\x91\xf5\x9d"
+ "\x1a\xc0\xe1\x2a\x93\x5f\x96\x2a"
+ "\x12\x85\x38\x36\xe1\xb2\xe9\xf0"
+ "\xf2\x6e\x5d\x81\xcc\x49\x07\x9c"
+ "\x5b\x88\xc8\xcc\xc4\x21\x4f\x32",
+ .clen = 16 + 48,
+ }, { /* RFC 3686 Case 8 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -297,14 +273,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x40\x41\x42\x43\x44\x45\x46\x47"
+ "\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+ "\x50\x51\x52\x53\x54\x55\x56\x57"
+ "\x58\x59\x5a\x5b\x5c\x5d\x5e\x5f"
+ "\xf6\xd6\x6d\x6b\xd5\x2d\x59\xbb"
+ "\x07\x96\x36\x58\x79\xef\xf8\x86"
+ "\xc6\x6d\xd5\x1a\x5b\x6a\x99\x74"
+ "\x4b\x50\x59\x0c\x87\xa2\x38\x84"
+ "\x00\xfa\xac\x24",
+ .klen = 8 + 64 + 36,
+ .klen = 8 + 48 + 36,
+ .iv = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .assoc = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .alen = 8,
@@ -317,18 +291,16 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x49\xee\x00\x0b\x80\x4e\xb2\xa9"
+ "\xb8\x30\x6b\x50\x8f\x83\x9d\x6a"
+ "\x55\x30\x83\x1d\x93\x44\xaf\x1c"
+ "\x9a\xac\x38\xbd\xf3\xcf\xd5\xd0"
+ "\x09\x07\xa6\xe1\x7f\xd6\x79\x98"
+ "\x4e\x90\x0e\xc0\x3d\xa0\xf2\x12"
+ "\x52\x79\x9c\x17\xff\xb9\xb8\xe3"
+ "\x2f\x31\xcb\xbd\x63\x70\x72\x7b"
+ "\x4e\x1e\xd1\xde\xb5\x6b\x7d\x54"
+ "\x68\x56\xdd\xe5\x53\xee\x29\xd2"
+ "\x85\xa1\x73\x61\x00\xa9\x26\x8f",
+ .clen = 32 + 64,
+ "\xd6\x96\xbb\x12\x39\xc4\x4d\xe2"
+ "\x4c\x02\xe7\x1f\xdc\xb2\xb1\x57"
+ "\x38\x0d\xdd\x13\xb3\x89\x57\x9e"
+ "\x1f\xb5\x48\x32\xc4\xd3\x9d\x1f"
+ "\x68\xab\x8d\xc6\xa8\x05\x3a\xc2"
+ "\x87\xaf\x23\xb3\xe4\x1b\xde\xb3",
+ .clen = 32 + 48,
+ },
+};
+
static const struct aead_testvec hmac_sha1_des_cbc_tv_temp[] = {
{ /*Generated with cryptopp*/
static const struct aead_testvec hmac_sha512_aes_cbc_tv_temp[] = {
{ /* RFC 3602 Case 1 */
#ifdef __LITTLE_ENDIAN
target/linux/generic/backport-6.12/920-v7.1-crypto-testmgr-Add-test-vectors-for-authenc-hmac-sha.patch
+334
View File
@@ -0,0 +1,334 @@
From 82fc2b17fa5b9b12d34770afcc8e3c4288735429 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Thu, 5 Mar 2026 21:08:24 +0100
Subject: [PATCH 5/5] crypto: testmgr - Add test vectors for
authenc(hmac(sha512),rfc3686(ctr(aes)))
Test vectors were generated starting from existing RFC3686(CTR(AES)) test
vectors and adding HMAC(SHA512) computed with software implementation.
Then, the results were double-checked on Mediatek MT7986 (safexcel).
Platform pass self-tests.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
crypto/testmgr.c | 6 +-
crypto/testmgr.h | 291 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 296 insertions(+), 1 deletion(-)
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -4545,8 +4545,12 @@ static const struct alg_test_desc alg_te
.fips_allowed = 1,
}, {
.alg = "authenc(hmac(sha512),rfc3686(ctr(aes)))",
- .test = alg_test_null,
+ .generic_driver = "authenc(hmac-sha512-lib,rfc3686(ctr(aes-lib)))",
+ .test = alg_test_aead,
.fips_allowed = 1,
+ .suite = {
+ .aead = __VECS(hmac_sha512_aes_ctr_rfc3686_tv_temp)
+ }
}, {
.alg = "blake2b-160",
.test = alg_test_hash,
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -19839,6 +19839,297 @@ static const struct aead_testvec hmac_md
},
};
+static const struct aead_testvec hmac_sha512_aes_ctr_rfc3686_tv_temp[] = {
+ { /* RFC 3686 Case 1 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
+ "\x01\x00" /* rta type */
+#else
+ .key = "\x00\x08" /* rta length */
+ "\x00\x01" /* rta type */
+#endif
+ "\x00\x00\x00\x14" /* enc key length */
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\xae\x68\x52\xf8\x12\x10\x67\xcc"
+ "\x4b\xf7\xa5\x76\x55\x77\xf3\x9e"
+ "\x00\x00\x00\x30",
+ .klen = 8 + 64 + 20,
+ .iv = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .assoc = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .alen = 8,
+ .ptext = "Single block msg",
+ .plen = 16,
+ .ctext = "\xe4\x09\x5d\x4f\xb7\xa7\xb3\x79"
+ "\x2d\x61\x75\xa3\x26\x13\x11\xb8"
+ "\xa4\x45\x3a\x44\x9c\xe5\x1c\xd9"
+ "\x10\x43\x51\x2e\x76\x5e\xf8\x9d"
+ "\x03\x12\x1a\x31\x00\x33\x10\xb4"
+ "\x94\x4b\x70\x84\x6c\xda\xb1\x46"
+ "\x24\xb6\x3b\x2a\xec\xd5\x67\xb8"
+ "\x65\xa2\xbd\xac\x18\xe2\xf8\x55"
+ "\xc6\x91\xb0\x92\x84\x2d\x74\x44"
+ "\xa7\xee\xc3\x44\xa0\x07\x0e\x62",
+ .clen = 16 + 64,
+ }, { /* RFC 3686 Case 2 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
+ "\x01\x00" /* rta type */
+#else
+ .key = "\x00\x08" /* rta length */
+ "\x00\x01" /* rta type */
+#endif
+ "\x00\x00\x00\x14" /* enc key length */
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x40\x41\x42\x43\x44\x45\x46\x47"
+ "\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+ "\x50\x51\x52\x53\x54\x55\x56\x57"
+ "\x58\x59\x5a\x5b\x5c\x5d\x5e\x5f"
+ "\x7e\x24\x06\x78\x17\xfa\xe0\xd7"
+ "\x43\xd6\xce\x1f\x32\x53\x91\x63"
+ "\x00\x6c\xb6\xdb",
+ .klen = 8 + 64 + 20,
+ .iv = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .assoc = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .alen = 8,
+ .ptext = "\x00\x01\x02\x03\x04\x05\x06\x07"
+ "\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f"
+ "\x10\x11\x12\x13\x14\x15\x16\x17"
+ "\x18\x19\x1a\x1b\x1c\x1d\x1e\x1f",
+ .plen = 32,
+ .ctext = "\x51\x04\xa1\x06\x16\x8a\x72\xd9"
+ "\x79\x0d\x41\xee\x8e\xda\xd3\x88"
+ "\xeb\x2e\x1e\xfc\x46\xda\x57\xc8"
+ "\xfc\xe6\x30\xdf\x91\x41\xbe\x28"
+ "\xec\x67\x0d\xb3\xbd\x98\x13\x01"
+ "\x2b\x04\x9b\xe6\x06\x67\x3c\x76"
+ "\xcd\x41\xb7\xcc\x70\x6c\x7f\xc8"
+ "\x67\xbd\x22\x39\xb2\xaa\xe8\x88"
+ "\xe0\x4f\x81\x52\xdf\xc9\xc3\xd6"
+ "\x44\xf4\x66\x33\x87\x64\x61\x02"
+ "\x02\xa2\x64\x15\x2b\xe9\x0b\x3d"
+ "\x4c\xea\xa1\xa5\xa7\xc9\xd3\x1b",
+ .clen = 32 + 64,
+ }, { /* RFC 3686 Case 3 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
+ "\x01\x00" /* rta type */
+#else
+ .key = "\x00\x08" /* rta length */
+ "\x00\x01" /* rta type */
+#endif
+ "\x00\x00\x00\x14" /* enc key length */
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\x44\x55\x66\x77\x88\x99\xaa\xbb"
+ "\xcc\xdd\xee\xff\x11\x22\x33\x44"
+ "\x76\x91\xbe\x03\x5e\x50\x20\xa8"
+ "\xac\x6e\x61\x85\x29\xf9\xa0\xdc"
+ "\x00\xe0\x01\x7b",
+ .klen = 8 + 64 + 20,
+ .iv = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .assoc = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .alen = 8,
+ .ptext = "\x00\x01\x02\x03\x04\x05\x06\x07"
+ "\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f"
+ "\x10\x11\x12\x13\x14\x15\x16\x17"
+ "\x18\x19\x1a\x1b\x1c\x1d\x1e\x1f"
+ "\x20\x21\x22\x23",
+ .plen = 36,
+ .ctext = "\xc1\xcf\x48\xa8\x9f\x2f\xfd\xd9"
+ "\xcf\x46\x52\xe9\xef\xdb\x72\xd7"
+ "\x45\x40\xa4\x2b\xde\x6d\x78\x36"
+ "\xd5\x9a\x5c\xea\xae\xf3\x10\x53"
+ "\x25\xb2\x07\x2f"
+ "\x6f\x90\xb6\xa3\x35\x43\x59\xff"
+ "\x1e\x32\xd6\xfe\xfa\x33\xf9\xf0"
+ "\x31\x2f\x03\x2d\x88\x1d\xab\xbf"
+ "\x0e\x19\x16\xd9\xf3\x98\x3e\xdd"
+ "\x0c\xec\xfe\xe8\x89\x13\x91\x15"
+ "\xf6\x61\x65\x5c\x1b\x7d\xde\xc0"
+ "\xe4\xba\x6d\x27\xe2\x89\x23\x24"
+ "\x15\x82\x37\x3d\x48\xd3\xc9\x32",
+ .clen = 36 + 64,
+ }, { /* RFC 3686 Case 4 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
+ "\x01\x00" /* rta type */
+#else
+ .key = "\x00\x08" /* rta length */
+ "\x00\x01" /* rta type */
+#endif
+ "\x00\x00\x00\x1c" /* enc key length */
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x16\xaf\x5b\x14\x5f\xc9\xf5\x79"
+ "\xc1\x75\xf9\x3e\x3b\xfb\x0e\xed"
+ "\x86\x3d\x06\xcc\xfd\xb7\x85\x15"
+ "\x00\x00\x00\x48",
+ .klen = 8 + 64 + 28,
+ .iv = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .assoc = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .alen = 8,
+ .ptext = "Single block msg",
+ .plen = 16,
+ .ctext = "\x4b\x55\x38\x4f\xe2\x59\xc9\xc8"
+ "\x4e\x79\x35\xa0\x03\xcb\xe9\x28"
+ "\x25\xea\xdc\xad\x52\xb8\x0f\x70"
+ "\xe7\x39\x83\x80\x10\x3f\x18\xc4"
+ "\xf8\x59\x14\x25\x5f\xba\x20\x87"
+ "\x0b\x04\x5e\xf7\xde\x41\x39\xff"
+ "\xa2\xee\x84\x3f\x9d\x38\xfd\x17"
+ "\xc0\x66\x5e\x74\x39\xe3\xd3\xd7"
+ "\x3d\xbc\xe3\x99\x2f\xe7\xef\x37"
+ "\x61\x03\xf3\x9e\x01\xaf\xba\x9d",
+ .clen = 16 + 64,
+ }, { /* RFC 3686 Case 5 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
+ "\x01\x00" /* rta type */
+#else
+ .key = "\x00\x08" /* rta length */
+ "\x00\x01" /* rta type */
+#endif
+ "\x00\x00\x00\x1c" /* enc key length */
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x40\x41\x42\x43\x44\x45\x46\x47"
+ "\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+ "\x50\x51\x52\x53\x54\x55\x56\x57"
+ "\x58\x59\x5a\x5b\x5c\x5d\x5e\x5f"
+ "\x7c\x5c\xb2\x40\x1b\x3d\xc3\x3c"
+ "\x19\xe7\x34\x08\x19\xe0\xf6\x9c"
+ "\x67\x8c\x3d\xb8\xe6\xf6\xa9\x1a"
+ "\x00\x96\xb0\x3b",
+ .klen = 8 + 64 + 28,
+ .iv = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .assoc = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .alen = 8,
+ .ptext = "\x00\x01\x02\x03\x04\x05\x06\x07"
+ "\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f"
+ "\x10\x11\x12\x13\x14\x15\x16\x17"
+ "\x18\x19\x1a\x1b\x1c\x1d\x1e\x1f",
+ .plen = 32,
+ .ctext = "\x45\x32\x43\xfc\x60\x9b\x23\x32"
+ "\x7e\xdf\xaa\xfa\x71\x31\xcd\x9f"
+ "\x84\x90\x70\x1c\x5a\xd4\xa7\x9c"
+ "\xfc\x1f\xe0\xff\x42\xf4\xfb\x00"
+ "\x51\xa3\xe6\x1d\x23\x7d\xd1\x18"
+ "\x55\x9c\x1c\x92\x2b\xc2\xcd\xfe"
+ "\x8a\xa8\xa5\x96\x65\x2e\x9d\xdb"
+ "\x06\xd2\x1c\x57\x2b\x76\xb5\x9c"
+ "\xd4\x3e\x8b\x61\x54\x2d\x08\xe5"
+ "\xb2\xf8\x88\x20\x0c\xad\xe8\x85"
+ "\x61\x8e\x5c\xa4\x96\x2c\xe2\x7d"
+ "\x4f\xb6\x1d\xb2\x8c\xd7\xe3\x38",
+ .clen = 32 + 64,
+ }, { /* RFC 3686 Case 7 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
+ "\x01\x00" /* rta type */
+#else
+ .key = "\x00\x08" /* rta length */
+ "\x00\x01" /* rta type */
+#endif
+ "\x00\x00\x00\x24" /* enc key length */
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x77\x6b\xef\xf2\x85\x1d\xb0\x6f"
+ "\x4c\x8a\x05\x42\xc8\x69\x6f\x6c"
+ "\x6a\x81\xaf\x1e\xec\x96\xb4\xd3"
+ "\x7f\xc1\xd6\x89\xe6\xc1\xc1\x04"
+ "\x00\x00\x00\x60",
+ .klen = 8 + 64 + 36,
+ .iv = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .assoc = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .alen = 8,
+ .ptext = "Single block msg",
+ .plen = 16,
+ .ctext = "\x14\x5a\xd0\x1d\xbf\x82\x4e\xc7"
+ "\x56\x08\x63\xdc\x71\xe3\xe0\xc0"
+ "\x6b\x68\x0b\x99\x9a\x4d\xc8\xb9"
+ "\x35\xea\xcd\x56\x3f\x40\xa2\xb6"
+ "\x68\xda\x59\xd8\xa0\x89\xcd\x52"
+ "\xb1\x6e\xed\xc1\x42\x10\xa5\x0f"
+ "\x88\x0b\x80\xce\xc4\x67\xf0\x45"
+ "\x5d\xb2\x9e\xde\x1c\x79\x52\x0d"
+ "\xff\x75\x36\xd5\x0f\x52\x8e\xe5"
+ "\x31\x85\xcf\x1d\x31\xf8\x62\x67",
+ .clen = 16 + 64,
+ }, { /* RFC 3686 Case 8 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
+ "\x01\x00" /* rta type */
+#else
+ .key = "\x00\x08" /* rta length */
+ "\x00\x01" /* rta type */
+#endif
+ "\x00\x00\x00\x24" /* enc key length */
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x40\x41\x42\x43\x44\x45\x46\x47"
+ "\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+ "\x50\x51\x52\x53\x54\x55\x56\x57"
+ "\x58\x59\x5a\x5b\x5c\x5d\x5e\x5f"
+ "\xf6\xd6\x6d\x6b\xd5\x2d\x59\xbb"
+ "\x07\x96\x36\x58\x79\xef\xf8\x86"
+ "\xc6\x6d\xd5\x1a\x5b\x6a\x99\x74"
+ "\x4b\x50\x59\x0c\x87\xa2\x38\x84"
+ "\x00\xfa\xac\x24",
+ .klen = 8 + 64 + 36,
+ .iv = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .assoc = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .alen = 8,
+ .ptext = "\x00\x01\x02\x03\x04\x05\x06\x07"
+ "\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f"
+ "\x10\x11\x12\x13\x14\x15\x16\x17"
+ "\x18\x19\x1a\x1b\x1c\x1d\x1e\x1f",
+ .plen = 32,
+ .ctext = "\xf0\x5e\x23\x1b\x38\x94\x61\x2c"
+ "\x49\xee\x00\x0b\x80\x4e\xb2\xa9"
+ "\xb8\x30\x6b\x50\x8f\x83\x9d\x6a"
+ "\x55\x30\x83\x1d\x93\x44\xaf\x1c"
+ "\x9a\xac\x38\xbd\xf3\xcf\xd5\xd0"
+ "\x09\x07\xa6\xe1\x7f\xd6\x79\x98"
+ "\x4e\x90\x0e\xc0\x3d\xa0\xf2\x12"
+ "\x52\x79\x9c\x17\xff\xb9\xb8\xe3"
+ "\x2f\x31\xcb\xbd\x63\x70\x72\x7b"
+ "\x4e\x1e\xd1\xde\xb5\x6b\x7d\x54"
+ "\x68\x56\xdd\xe5\x53\xee\x29\xd2"
+ "\x85\xa1\x73\x61\x00\xa9\x26\x8f",
+ .clen = 32 + 64,
+ },
+};
+
static const struct aead_testvec hmac_sha1_des_cbc_tv_temp[] = {
{ /*Generated with cryptopp*/
#ifdef __LITTLE_ENDIAN
target/linux/generic/backport-6.12/921-v7.1-crypto-tesmgr-allow-authenc-hmac-sha224-sha384-cbc-a.patch
+33
View File
@@ -0,0 +1,33 @@
From 0441ee8d35ad6998da5043c65c4124904e8daee2 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Fri, 6 Feb 2026 20:26:59 +0100
Subject: [PATCH] crypto: tesmgr - allow authenc(hmac(sha224/sha384),cbc(aes))
in fips mode
The remaining combinations of AES-CBC and SHA* have already been marked
as allowed. This commit does the same for SHA224 and SHA384.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
crypto/testmgr.c | 2 ++
1 file changed, 2 insertions(+)
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -4435,6 +4435,7 @@ static const struct alg_test_desc alg_te
.alg = "authenc(hmac(sha224),cbc(aes))",
.generic_driver = "authenc(hmac-sha224-lib,cbc(aes-generic))",
.test = alg_test_aead,
+ .fips_allowed = 1,
.suite = {
.aead = __VECS(hmac_sha224_aes_cbc_tv_temp)
}
@@ -4493,6 +4494,7 @@ static const struct alg_test_desc alg_te
.alg = "authenc(hmac(sha384),cbc(aes))",
.generic_driver = "authenc(hmac-sha384-lib,cbc(aes-generic))",
.test = alg_test_aead,
+ .fips_allowed = 1,
.suite = {
.aead = __VECS(hmac_sha384_aes_cbc_tv_temp)
}
target/linux/generic/backport-6.18/915-v7.1-crypto-testmgr-Add-test-vectors-for-authenc-hmac-sha.patch → target/linux/generic/backport-6.12/922-v7.1-crypto-testmgr-Add-test-vectors-for-authenc-hmac-md5.patch
+49 -63
View File
@@ -1,44 +1,44 @@
From 2a2468bf33d3fac5192429207a439d23e615173a Mon Sep 17 00:00:00 2001
From d0c0a414cc1893b195b9523ecdfbeee00b98fd0d Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Thu, 5 Mar 2026 21:08:20 +0100
Subject: [PATCH 1/5] crypto: testmgr - Add test vectors for
authenc(hmac(sha1),rfc3686(ctr(aes)))
Date: Thu, 19 Mar 2026 18:11:21 +0100
Subject: [PATCH] crypto: testmgr - Add test vectors for
authenc(hmac(md5),rfc3686(ctr(aes)))
Test vectors were generated starting from existing RFC3686(CTR(AES)) test
vectors and adding HMAC(SHA1) computed with software implementation.
vectors and adding HMAC(MD5) computed with software implementation.
Then, the results were double-checked on Mediatek MT7986 (safexcel).
Platform pass self-tests.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
crypto/testmgr.c | 6 +-
crypto/testmgr.h | 221 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 226 insertions(+), 1 deletion(-)
crypto/testmgr.c | 7 ++
crypto/testmgr.h | 207 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 214 insertions(+)
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -4232,8 +4232,12 @@ static const struct alg_test_desc alg_te
@@ -4395,6 +4395,13 @@ static const struct alg_test_desc alg_te
.aead = __VECS(hmac_md5_ecb_cipher_null_tv_template)
}
}, {
.alg = "authenc(hmac(sha1),rfc3686(ctr(aes)))",
- .test = alg_test_null,
+ .generic_driver = "authenc(hmac-sha1-lib,rfc3686(ctr(aes-lib)))",
+ .alg = "authenc(hmac(md5),rfc3686(ctr(aes)))",
+ .generic_driver = "authenc(hmac-md5-lib,rfc3686(ctr(aes-lib)))",
+ .test = alg_test_aead,
.fips_allowed = 1,
+ .suite = {
+ .aead = __VECS(hmac_sha1_aes_ctr_rfc3686_tv_temp)
+ .aead = __VECS(hmac_md5_aes_ctr_rfc3686_tv_temp)
+ }
}, {
.alg = "authenc(hmac(sha224),cbc(aes))",
.generic_driver = "authenc(hmac-sha224-lib,cbc(aes-generic))",
+ }, {
.alg = "authenc(hmac(sha1),cbc(aes))",
.test = alg_test_aead,
.fips_allowed = 1,
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -16137,6 +16137,227 @@ static const struct aead_testvec hmac_sh
@@ -20443,6 +20443,213 @@ static const struct aead_testvec hmac_sh
},
};
+static const struct aead_testvec hmac_sha1_aes_ctr_rfc3686_tv_temp[] = {
+static const struct aead_testvec hmac_md5_aes_ctr_rfc3686_tv_temp[] = {
+ { /* RFC 3686 Case 1 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -50,11 +50,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x14" /* enc key length */
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00"
+ "\xae\x68\x52\xf8\x12\x10\x67\xcc"
+ "\x4b\xf7\xa5\x76\x55\x77\xf3\x9e"
+ "\x00\x00\x00\x30",
+ .klen = 8 + 20 + 20,
+ .klen = 8 + 16 + 20,
+ .iv = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .assoc = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .alen = 8,
@@ -62,10 +61,9 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\xe4\x09\x5d\x4f\xb7\xa7\xb3\x79"
+ "\x2d\x61\x75\xa3\x26\x13\x11\xb8"
+ "\x70\xdc\x6b\x62\x43\xa1\x2f\x08"
+ "\xf1\xec\x93\x7d\x69\xb2\x8e\x1f"
+ "\x0a\x97\x39\x86",
+ .clen = 16 + 20,
+ "\xdd\x5f\xea\x13\x2a\xf2\xb0\xf1"
+ "\x91\x79\x46\x40\x62\x6c\x87\x5b",
+ .clen = 16 + 16,
+ }, { /* RFC 3686 Case 2 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -77,11 +75,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x14" /* enc key length */
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33"
+ "\x7e\x24\x06\x78\x17\xfa\xe0\xd7"
+ "\x43\xd6\xce\x1f\x32\x53\x91\x63"
+ "\x00\x6c\xb6\xdb",
+ .klen = 8 + 20 + 20,
+ .klen = 8 + 16 + 20,
+ .iv = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .assoc = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .alen = 8,
@@ -94,10 +91,9 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x79\x0d\x41\xee\x8e\xda\xd3\x88"
+ "\xeb\x2e\x1e\xfc\x46\xda\x57\xc8"
+ "\xfc\xe6\x30\xdf\x91\x41\xbe\x28"
+ "\x6b\x7b\x4d\x39\x36\x1c\x12\x5f"
+ "\x72\xd2\x88\xb2\x26\xa6\xa6\xb5"
+ "\x1d\x3a\x49\xa6",
+ .clen = 32 + 20,
+ "\x03\x39\x23\xcd\x22\x5f\x1b\x8b"
+ "\x93\x70\xbc\x45\xf3\xba\xde\x2e",
+ .clen = 32 + 16,
+ }, { /* RFC 3686 Case 3 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -109,11 +105,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x14" /* enc key length */
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55"
+ "\x76\x91\xbe\x03\x5e\x50\x20\xa8"
+ "\xac\x6e\x61\x85\x29\xf9\xa0\xdc"
+ "\x00\xe0\x01\x7b",
+ .klen = 8 + 20 + 20,
+ .klen = 8 + 16 + 20,
+ .iv = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .assoc = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .alen = 8,
@@ -128,10 +123,9 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x45\x40\xa4\x2b\xde\x6d\x78\x36"
+ "\xd5\x9a\x5c\xea\xae\xf3\x10\x53"
+ "\x25\xb2\x07\x2f"
+ "\x2c\x86\xa0\x90\x8e\xc1\x02\x1d"
+ "\x51\xdc\xd6\x21\xc7\x30\xcc\x32"
+ "\x38\x55\x47\x64",
+ .clen = 36 + 20,
+ "\xb4\x40\x0c\x7b\x4c\x55\x8a\x4b"
+ "\x04\xf7\x48\x9e\x0f\x9a\xae\x73",
+ .clen = 36 + 16,
+ }, { /* RFC 3686 Case 4 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -143,12 +137,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x1c" /* enc key length */
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00"
+ "\x16\xaf\x5b\x14\x5f\xc9\xf5\x79"
+ "\xc1\x75\xf9\x3e\x3b\xfb\x0e\xed"
+ "\x86\x3d\x06\xcc\xfd\xb7\x85\x15"
+ "\x00\x00\x00\x48",
+ .klen = 8 + 20 + 28,
+ .klen = 8 + 16 + 28,
+ .iv = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .assoc = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .alen = 8,
@@ -156,10 +149,9 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\x4b\x55\x38\x4f\xe2\x59\xc9\xc8"
+ "\x4e\x79\x35\xa0\x03\xcb\xe9\x28"
+ "\xe9\x4e\x49\xf0\x6b\x8d\x58\x2b"
+ "\x26\x7f\xf3\xab\xeb\x2f\x74\x2f"
+ "\x45\x43\x64\xc1",
+ .clen = 16 + 20,
+ "\xc4\x5d\xa1\x16\x6c\x2d\xa5\x43"
+ "\x60\x7b\x58\x98\x11\x9b\x50\x06",
+ .clen = 16 + 16,
+ }, { /* RFC 3686 Case 5 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -171,12 +163,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x1c" /* enc key length */
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33"
+ "\x7c\x5c\xb2\x40\x1b\x3d\xc3\x3c"
+ "\x19\xe7\x34\x08\x19\xe0\xf6\x9c"
+ "\x67\x8c\x3d\xb8\xe6\xf6\xa9\x1a"
+ "\x00\x96\xb0\x3b",
+ .klen = 8 + 20 + 28,
+ .klen = 8 + 16 + 28,
+ .iv = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .assoc = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .alen = 8,
@@ -189,10 +180,9 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x7e\xdf\xaa\xfa\x71\x31\xcd\x9f"
+ "\x84\x90\x70\x1c\x5a\xd4\xa7\x9c"
+ "\xfc\x1f\xe0\xff\x42\xf4\xfb\x00"
+ "\xab\xc4\xfa\x6d\x20\xe1\xce\x72"
+ "\x0e\x92\x4e\x97\xaa\x4d\x30\x84"
+ "\xb6\xd8\x4d\x3b",
+ .clen = 32 + 20,
+ "\xc5\xec\x47\x33\xae\x05\x28\x49"
+ "\xd5\x2b\x08\xad\x10\x98\x24\x01",
+ .clen = 32 + 16,
+ }, { /* RFC 3686 Case 7 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -204,13 +194,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x24" /* enc key length */
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00"
+ "\x77\x6b\xef\xf2\x85\x1d\xb0\x6f"
+ "\x4c\x8a\x05\x42\xc8\x69\x6f\x6c"
+ "\x6a\x81\xaf\x1e\xec\x96\xb4\xd3"
+ "\x7f\xc1\xd6\x89\xe6\xc1\xc1\x04"
+ "\x00\x00\x00\x60",
+ .klen = 8 + 20 + 36,
+ .klen = 8 + 16 + 36,
+ .iv = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .assoc = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .alen = 8,
@@ -218,10 +207,9 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\x14\x5a\xd0\x1d\xbf\x82\x4e\xc7"
+ "\x56\x08\x63\xdc\x71\xe3\xe0\xc0"
+ "\x3d\x6c\x23\x27\xda\x0e\x7f\x29"
+ "\xfd\x8d\x3c\x1b\xf7\x7a\x63\xd9"
+ "\x7e\x0f\xe9\xf6",
+ .clen = 16 + 20,
+ "\xc6\x26\xb2\x27\x0d\x21\xd4\x40"
+ "\x6c\x4f\x53\xea\x19\x75\xda\x8e",
+ .clen = 16 + 16,
+ }, { /* RFC 3686 Case 8 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -233,13 +221,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x24" /* enc key length */
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33"
+ "\xf6\xd6\x6d\x6b\xd5\x2d\x59\xbb"
+ "\x07\x96\x36\x58\x79\xef\xf8\x86"
+ "\xc6\x6d\xd5\x1a\x5b\x6a\x99\x74"
+ "\x4b\x50\x59\x0c\x87\xa2\x38\x84"
+ "\x00\xfa\xac\x24",
+ .klen = 8 + 20 + 36,
+ .klen = 8 + 16 + 36,
+ .iv = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .assoc = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .alen = 8,
@@ -252,13 +239,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x49\xee\x00\x0b\x80\x4e\xb2\xa9"
+ "\xb8\x30\x6b\x50\x8f\x83\x9d\x6a"
+ "\x55\x30\x83\x1d\x93\x44\xaf\x1c"
+ "\xe7\xee\x22\xa4\xdd\xbf\x5d\x44"
+ "\x3b\x43\x1c\x69\x55\x11\xd5\xad"
+ "\x14\x5f\x44\xa6",
+ .clen = 32 + 20,
+ "\x8c\x4d\x2a\x8d\x23\x47\x59\x6f"
+ "\x1e\x74\x62\x39\xed\x14\x50\x6c",
+ .clen = 32 + 16,
+ },
+};
+
static const struct aead_testvec hmac_sha1_ecb_cipher_null_tv_temp[] = {
{ /* Input data from RFC 2410 Case 1 */
static const struct aead_testvec hmac_md5_des3_ede_cbc_tv_temp[] = {
{ /*Generated with cryptopp*/
#ifdef __LITTLE_ENDIAN
target/linux/generic/pending-6.12/910-crypto-testmgr-Add-test-vectors-for-authenc-hmac-md5.patch → target/linux/generic/backport-6.12/923-v7.1-crypto-testmgr-Add-test-vectors-for-authenc-hmac-md5.patch
+5 -4
View File
@@ -1,6 +1,6 @@
From dd227f442774a570ffccdfbc9536fec3b4666305 Mon Sep 17 00:00:00 2001
From c8aadd63ab58ee75713ab487730563e7a160cc35 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Sat, 31 Jan 2026 12:35:30 +0100
Date: Tue, 3 Mar 2026 19:48:44 +0100
Subject: [PATCH] crypto: testmgr - Add test vectors for
authenc(hmac(md5),cbc(aes))
@@ -10,6 +10,7 @@ script. Then, the results were double-checked on Mediatek MT7981 (safexcel)
and NXP P2020 (talitos). Both platforms pass self-tests.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
crypto/testmgr.c | 7 ++
crypto/testmgr.h | 255 +++++++++++++++++++++++++++++++++++++++++++++++
@@ -22,7 +23,7 @@ Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
}
}, {
+ .alg = "authenc(hmac(md5),cbc(aes))",
+ .generic_driver = "authenc(hmac-md5-lib,cbc(aes-generic))",
+ .generic_driver = "authenc(hmac-md5-lib,cbc(aes-lib))",
+ .test = alg_test_aead,
+ .suite = {
+ .aead = __VECS(hmac_md5_aes_cbc_tv_temp)
@@ -33,7 +34,7 @@ Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
.test = alg_test_aead,
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -17133,6 +17133,261 @@ static const struct cipher_testvec aes_c
@@ -17253,6 +17253,261 @@ static const struct cipher_testvec aes_c
},
};
target/linux/generic/backport-6.18/910-v6.19-crypto-testmgr-Add-missing-DES-weak-and-semi-weak-ke.patch
+155
View File
@@ -0,0 +1,155 @@
From c637f3e4a59d710ffd80da1c11d2ebed162d8ff0 Mon Sep 17 00:00:00 2001
From: Thorsten Blum <thorsten.blum@linux.dev>
Date: Mon, 17 Nov 2025 12:44:26 +0100
Subject: [PATCH] crypto: testmgr - Add missing DES weak and semi-weak key
tests
Ever since commit da7f033ddc9f ("crypto: cryptomgr - Add test
infrastructure"), the DES test suite has tested only one of the four
weak keys and none of the twelve semi-weak keys.
DES has four weak keys and twelve semi-weak keys, and the kernel's DES
implementation correctly detects and rejects all of these keys when the
CRYPTO_TFM_REQ_FORBID_WEAK_KEYS flag is set. However, only a single weak
key was being tested. Add tests for all 16 weak and semi-weak keys.
While DES is deprecated, it is still used in some legacy protocols, and
weak/semi-weak key detection should be tested accordingly.
Tested on arm64 with cryptographic self-tests.
Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
crypto/testmgr.h | 120 +++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 120 insertions(+)
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -9023,6 +9023,126 @@ static const struct cipher_testvec des_t
.ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
.ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
.len = 8,
+ }, { /* Weak key */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\xe0\xe0\xe0\xe0\xf1\xf1\xf1\xf1",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Weak key */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\x1f\x1f\x1f\x1f\x0e\x0e\x0e\x0e",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Weak key */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\xfe\xfe\xfe\xfe\xfe\xfe\xfe\xfe",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 1a */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\x01\xfe\x01\xfe\x01\xfe\x01\xfe",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 1b */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\xfe\x01\xfe\x01\xfe\x01\xfe\x01",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 2a */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\x1f\xe0\x1f\xe0\x0e\xf1\x0e\xf1",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 2b */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\xe0\x1f\xe0\x1f\xf1\x0e\xf1\x0e",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 3a */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\x01\xe0\x01\xe0\x01\xf1\x01\xf1",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 3b */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\xe0\x01\xe0\x01\xf1\x01\xf1\x01",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 4a */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\x1f\xfe\x1f\xfe\x0e\xfe\x0e\xfe",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 4b */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\xfe\x1f\xfe\x1f\xfe\x0e\xfe\x0e",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 5a */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\x01\x1f\x01\x1f\x01\x0e\x01\x0e",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 5b */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\x1f\x01\x1f\x01\x0e\x01\x0e\x01",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 6a */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\xe0\xfe\xe0\xfe\xf1\xfe\xf1\xfe",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
+ }, { /* Semi-weak key pair 6b */
+ .setkey_error = -EINVAL,
+ .wk = 1,
+ .key = "\xfe\xe0\xfe\xe0\xfe\xf1\xfe\xf1",
+ .klen = 8,
+ .ptext = "\x01\x23\x45\x67\x89\xab\xcd\xe7",
+ .ctext = "\xc9\x57\x44\x25\x6a\x5e\xd3\x1d",
+ .len = 8,
}, { /* Two blocks -- for testing encryption across pages */
.key = "\x01\x23\x45\x67\x89\xab\xcd\xef",
.klen = 8,
target/linux/generic/backport-6.18/911-v7.0-crypto-testmgr-Add-test-vectors-for-authenc-hmac-sha.patch
+96 -70
View File
@@ -1,11 +1,11 @@
From a22d48cbe55814061d46db2f87090ba5e36aaf7f Mon Sep 17 00:00:00 2001
From 030218dedee2628ea3f035d71431e1b7c4191cfb Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Sat, 31 Jan 2026 18:43:03 +0100
Date: Sat, 31 Jan 2026 18:38:47 +0100
Subject: [PATCH] crypto: testmgr - Add test vectors for
authenc(hmac(sha224),cbc(aes))
authenc(hmac(sha384),cbc(aes))
Test vectors were generated starting from existing CBC(AES) test vectors
(RFC3602, NIST SP800-38A) and adding HMAC(SHA224) computed with Python
(RFC3602, NIST SP800-38A) and adding HMAC(SHA384) computed with Python
script. Then, the results were double-checked on Mediatek MT7981 (safexcel)
and NXP P2020 (talitos). Both platforms pass self-tests.
@@ -13,32 +13,32 @@ Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
crypto/testmgr.c | 7 ++
crypto/testmgr.h | 285 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 292 insertions(+)
crypto/testmgr.h | 311 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 318 insertions(+)
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -4221,6 +4221,13 @@ static const struct alg_test_desc alg_te
@@ -4272,6 +4272,13 @@ static const struct alg_test_desc alg_te
.test = alg_test_null,
.fips_allowed = 1,
}, {
+ .alg = "authenc(hmac(sha224),cbc(aes))",
+ .generic_driver = "authenc(hmac-sha224-lib,cbc(aes-generic))",
+ .alg = "authenc(hmac(sha384),cbc(aes))",
+ .generic_driver = "authenc(hmac-sha384-lib,cbc(aes-generic))",
+ .test = alg_test_aead,
+ .suite = {
+ .aead = __VECS(hmac_sha224_aes_cbc_tv_temp)
+ .aead = __VECS(hmac_sha384_aes_cbc_tv_temp)
+ }
+ }, {
.alg = "authenc(hmac(sha224),cbc(des))",
.generic_driver = "authenc(hmac-sha224-lib,cbc(des-generic))",
.alg = "authenc(hmac(sha384),cbc(des))",
.generic_driver = "authenc(hmac-sha384-lib,cbc(des-generic))",
.test = alg_test_aead,
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -16183,6 +16183,291 @@ static const struct aead_testvec hmac_sh
@@ -16586,6 +16586,317 @@ static const struct aead_testvec hmac_sh
},
};
+static const struct aead_testvec hmac_sha224_aes_cbc_tv_temp[] = {
+static const struct aead_testvec hmac_sha384_aes_cbc_tv_temp[] = {
+ { /* RFC 3602 Case 1 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -51,24 +51,28 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x06\xa9\x21\x40\x36\xb8\xa1\x5b"
+ "\x51\x2e\x03\xd5\x34\x12\x00\x06",
+ .klen = 8 + 28 + 16,
+ .klen = 8 + 48 + 16,
+ .iv = "\x3d\xaf\xba\x42\x9d\x9e\xb4\x30"
+ "\xb4\x22\xda\x80\x2c\x9f\xac\x41",
+ .assoc = "\x3d\xaf\xba\x42\x9d\x9e\xb4\x30"
+ "\xb4\x22\xda\x80\x2c\x9f\xac\x41",
+ .alen = 16,
+ .alen = 16,
+ .ptext = "Single block msg",
+ .plen = 16,
+ .ctext = "\xe3\x53\x77\x9c\x10\x79\xae\xb8"
+ "\x27\x08\x94\x2d\xbe\x77\x18\x1a"
+ "\x17\xe8\x00\x76\x70\x71\xd1\x72"
+ "\xf8\xd0\x91\x51\x67\xf9\xdf\xd6"
+ "\x0d\x56\x1a\xb3\x52\x19\x85\xae"
+ "\x46\x74\xb6\x98",
+ .clen = 16 + 28,
+ "\x79\x1c\xf1\x22\x95\x80\xe0\x60"
+ "\x7f\xf9\x92\x60\x83\xbd\x60\x9c"
+ "\xf6\x62\x8b\xa9\x7d\x56\xe2\xaf"
+ "\x80\x43\xbc\x41\x4a\x63\x0b\xa0"
+ "\x16\x25\xe2\xfe\x0a\x96\xf6\xa5"
+ "\x6c\x0b\xc2\x53\xb4\x27\xd9\x42",
+ .clen = 16 + 48,
+ }, { /* RFC 3602 Case 2 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -81,15 +85,17 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b"
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x40\x41\x42\x43\x44\x45\x46\x47"
+ "\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+ "\xc2\x86\x69\x6d\x88\x7c\x9a\xa0"
+ "\x61\x1b\xbb\x3e\x20\x25\xa4\x5a",
+ .klen = 8 + 28 + 16,
+ .klen = 8 + 48 + 16,
+ .iv = "\x56\x2e\x17\x99\x6d\x09\x3d\x28"
+ "\xdd\xb3\xba\x69\x5a\x2e\x6f\x58",
+ .assoc = "\x56\x2e\x17\x99\x6d\x09\x3d\x28"
+ "\xdd\xb3\xba\x69\x5a\x2e\x6f\x58",
+ .alen = 16,
+ .alen = 16,
+ .ptext = "\x00\x01\x02\x03\x04\x05\x06\x07"
+ "\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f"
+ "\x10\x11\x12\x13\x14\x15\x16\x17"
@@ -99,12 +105,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x3a\x86\x30\x28\xb5\xe1\xdc\x0a"
+ "\x75\x86\x60\x2d\x25\x3c\xff\xf9"
+ "\x1b\x82\x66\xbe\xa6\xd6\x1a\xb1"
+ "\xa1\x11\xfa\xbb\x1e\x04\x7e\xe7"
+ "\x4c\x5f\x65\xbf\x68\x8d\x33\x9d"
+ "\xbc\x74\x9b\xf3\x15\xf3\x8f\x8d"
+ "\xe8\xaf\x33\xe0",
+
+ .clen = 32 + 28,
+ "\x4e\x5b\xa8\x65\x51\xc6\x58\xaf"
+ "\x31\x57\x50\x3d\x01\xa1\xa4\x3f"
+ "\x42\xd1\xd7\x31\x76\x8d\xf8\xc8"
+ "\xe4\xd2\x7e\xc5\x23\xe7\xc6\x2e"
+ "\x2d\xfd\x9d\xc1\xac\x50\x1e\xcf"
+ "\xa0\x10\xeb\x1a\x9c\xb7\xe1\xca",
+ .clen = 32 + 48,
+ }, { /* RFC 3602 Case 3 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -117,15 +124,17 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\x6c\x3e\xa0\x47\x76\x30\xce\x21"
+ "\xa2\xce\x33\x4a\xa7\x46\xc2\xcd",
+ .klen = 8 + 28 + 16,
+ .klen = 8 + 48 + 16,
+ .iv = "\xc7\x82\xdc\x4c\x09\x8c\x66\xcb"
+ "\xd9\xcd\x27\xd8\x25\x68\x2c\x81",
+ .assoc = "\xc7\x82\xdc\x4c\x09\x8c\x66\xcb"
+ "\xd9\xcd\x27\xd8\x25\x68\x2c\x81",
+ .alen = 16,
+ .alen = 16,
+ .ptext = "This is a 48-byte message (exactly 3 AES blocks)",
+ .plen = 48,
+ .ctext = "\xd0\xa0\x2b\x38\x36\x45\x17\x53"
@@ -134,11 +143,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x50\x69\x39\x27\x67\x72\xf8\xd5"
+ "\x02\x1c\x19\x21\x6b\xad\x52\x5c"
+ "\x85\x79\x69\x5d\x83\xba\x26\x84"
+ "\x60\xb3\xca\x0e\xc1\xfe\xf2\x27"
+ "\x5a\x41\xe4\x99\xa8\x19\x56\xf1"
+ "\x44\x98\x27\x9f\x99\xb0\x4a\xad"
+ "\x4d\xc1\x1e\x88",
+ .clen = 48 + 28,
+ "\xa1\x52\xe7\xda\xf7\x05\xb6\xca"
+ "\xad\x0f\x51\xed\x5a\xd3\x0f\xdf"
+ "\xde\xeb\x3f\x31\xed\x3a\x43\x93"
+ "\x3b\xb7\xca\xc8\x1b\xe7\x3b\x61"
+ "\x6a\x05\xfd\x2d\x6a\x5c\xb1\x0d"
+ "\x6e\x7a\xeb\x1c\x84\xec\xdb\xde",
+ .clen = 48 + 48,
+ }, { /* RFC 3602 Case 4 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -151,15 +162,17 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\x56\xe4\x7a\x38\xc5\x59\x89\x74"
+ "\xbc\x46\x90\x3d\xba\x29\x03\x49",
+ .klen = 8 + 28 + 16,
+ .klen = 8 + 48 + 16,
+ .iv = "\x8c\xe8\x2e\xef\xbe\xa0\xda\x3c"
+ "\x44\x69\x9e\xd7\xdb\x51\xb7\xd9",
+ .assoc = "\x8c\xe8\x2e\xef\xbe\xa0\xda\x3c"
+ "\x44\x69\x9e\xd7\xdb\x51\xb7\xd9",
+ .alen = 16,
+ .alen = 16,
+ .ptext = "\xa0\xa1\xa2\xa3\xa4\xa5\xa6\xa7"
+ "\xa8\xa9\xaa\xab\xac\xad\xae\xaf"
+ "\xb0\xb1\xb2\xb3\xb4\xb5\xb6\xb7"
@@ -177,11 +190,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x86\x8b\xb7\xb2\x9d\x3d\x46\xad"
+ "\x83\xce\x9f\x9a\x10\x2e\xe9\x9d"
+ "\x49\xa5\x3e\x87\xf4\xc3\xda\x55"
+ "\xbb\xe9\x38\xf8\xb9\xbf\xcb\x7b"
+ "\xa8\x22\x91\xea\x1e\xaf\x13\xba"
+ "\x24\x18\x64\x9c\xcb\xb4\xa9\x16"
+ "\x4b\x83\x9c\xec",
+ .clen = 64 + 28,
+ "\x85\x7b\x91\xe0\x29\xeb\xd3\x59"
+ "\x7c\xe3\x67\x14\xbe\x71\x2a\xd2"
+ "\x8a\x1a\xd2\x35\x78\x6b\x69\xba"
+ "\x64\xa5\x04\x00\x19\xc3\x4c\xae"
+ "\x71\xff\x76\x9f\xbb\xc3\x29\x22"
+ "\xc2\xc6\x51\xf1\xe6\x29\x5e\xa5",
+ .clen = 64 + 48,
+ }, { /* RFC 3602 Case 5 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -194,10 +209,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\x90\xd3\x82\xb4\x10\xee\xba\x7a"
+ "\xd9\x38\xc4\x6c\xec\x1a\x82\xbf",
+ .klen = 8 + 28 + 16,
+ .klen = 8 + 48 + 16,
+ .iv = "\xe9\x6e\x8c\x08\xab\x46\x57\x63"
+ "\xfd\x09\x8d\x45\xdd\x3f\xf8\x93",
+ .assoc = "\x00\x00\x43\x21\x00\x00\x00\x01"
@@ -225,11 +242,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x53\x8a\xb5\x0c\x55\x1b\x87\x4a"
+ "\xa2\x69\xad\xd0\x47\xad\x2d\x59"
+ "\x13\xac\x19\xb7\xcf\xba\xd4\xa6"
+ "\x04\x5e\x83\x45\xc5\x6a\x5b\xe2"
+ "\x5e\xd8\x59\x06\xbd\xc7\xd2\x9b"
+ "\x0b\x65\x1f\x31\xc7\xe6\x9c\x39"
+ "\xa3\x66\xdb\xb8",
+ .clen = 80 + 28,
+ "\x57\x5f\xb4\xd7\x74\x6f\x18\x97"
+ "\xb7\xde\xfc\xf3\x4e\x0d\x29\x4d"
+ "\xa0\xff\x39\x9e\x2d\xbf\x27\xac"
+ "\x54\xb9\x8a\x3e\xab\x3b\xac\xd3"
+ "\x36\x43\x74\xfc\xc2\x64\x81\x8a"
+ "\x2c\x15\x72\xdf\x3f\x9d\x5b\xa4",
+ .clen = 80 + 48,
+ }, { /* NIST SP800-38A F.2.3 CBC-AES192.Encrypt */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -242,11 +261,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\x8e\x73\xb0\xf7\xda\x0e\x64\x52"
+ "\xc8\x10\xf3\x2b\x80\x90\x79\xe5"
+ "\x62\xf8\xea\xd2\x52\x2c\x6b\x7b",
+ .klen = 8 + 28 + 24,
+ .klen = 8 + 48 + 24,
+ .iv = "\x00\x01\x02\x03\x04\x05\x06\x07"
+ "\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f",
+ .assoc = "\x00\x01\x02\x03\x04\x05\x06\x07"
@@ -269,12 +290,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x7f\xa9\xba\xac\x3d\xf1\x02\xe0"
+ "\x08\xb0\xe2\x79\x88\x59\x88\x81"
+ "\xd9\x20\xa9\xe6\x4f\x56\x15\xcd"
+ "\x67\x35\xcd\x86\x94\x51\x3b\x3a"
+ "\xaa\x07\xb1\xed\x18\x55\x62\x01"
+ "\x95\xb2\x53\xb5\x20\x78\x16\xd7"
+ "\xb8\x49\x7f\x96",
+
+ .clen = 64 + 28,
+ "\x29\x9b\x42\x47\x0b\xbf\xf3\x54"
+ "\x54\x95\xb0\x89\xd5\xa0\xc3\x78"
+ "\x60\x6c\x18\x39\x6d\xc9\xfb\x2a"
+ "\x34\x1c\xed\x95\x10\x1e\x43\x0a"
+ "\x72\xce\x26\xbc\x74\xd9\x6f\xa2"
+ "\xf1\xd9\xd0\xb1\xdf\x3d\x93\x14",
+ .clen = 64 + 48,
+ }, { /* NIST SP800-38A F.2.5 CBC-AES256.Encrypt */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -287,12 +309,14 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\x60\x3d\xeb\x10\x15\xca\x71\xbe"
+ "\x2b\x73\xae\xf0\x85\x7d\x77\x81"
+ "\x1f\x35\x2c\x07\x3b\x61\x08\xd7"
+ "\x2d\x98\x10\xa3\x09\x14\xdf\xf4",
+ .klen = 8 + 28 + 32,
+ .klen = 8 + 48 + 32,
+ .iv = "\x00\x01\x02\x03\x04\x05\x06\x07"
+ "\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f",
+ .assoc = "\x00\x01\x02\x03\x04\x05\x06\x07"
@@ -315,14 +339,16 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\xa5\x30\xe2\x63\x04\x23\x14\x61"
+ "\xb2\xeb\x05\xe2\xc3\x9b\xe9\xfc"
+ "\xda\x6c\x19\x07\x8c\x6a\x9d\x1b"
+ "\xe0\xe2\x3d\x3f\x55\x24\x2c\x4d"
+ "\xb9\x13\x2a\xc0\x07\xbb\x3b\xda"
+ "\xfd\xa4\x51\x32\x3f\x44\xb1\x13"
+ "\x98\xf9\xbc\xb9",
+ .clen = 64 + 28,
+ "\x9f\x50\xce\x64\xd9\xa3\xc9\x7a"
+ "\x15\x3a\x3d\x46\x9a\x90\xf3\x06"
+ "\x22\xad\xc5\x24\x77\x50\xb8\xfe"
+ "\xbe\x37\x16\x86\x34\x5f\xaf\x97"
+ "\x00\x9d\x86\xc8\x32\x4f\x72\x2f"
+ "\x48\x97\xad\xb6\xb9\x77\x33\xbc",
+ .clen = 64 + 48,
+ },
+};
+
static const struct aead_testvec hmac_sha256_aes_cbc_tv_temp[] = {
static const struct aead_testvec hmac_sha512_aes_cbc_tv_temp[] = {
{ /* RFC 3602 Case 1 */
#ifdef __LITTLE_ENDIAN
target/linux/generic/backport-6.18/910-v7.0-crypto-testmgr-Add-test-vectors-for-authenc-hmac-sha.patch → target/linux/generic/backport-6.18/912-v7.0-crypto-testmgr-Add-test-vectors-for-authenc-hmac-sha.patch
+70 -96
View File
@@ -1,11 +1,11 @@
From 030218dedee2628ea3f035d71431e1b7c4191cfb Mon Sep 17 00:00:00 2001
From a22d48cbe55814061d46db2f87090ba5e36aaf7f Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Sat, 31 Jan 2026 18:38:47 +0100
Date: Sat, 31 Jan 2026 18:43:03 +0100
Subject: [PATCH] crypto: testmgr - Add test vectors for
authenc(hmac(sha384),cbc(aes))
authenc(hmac(sha224),cbc(aes))
Test vectors were generated starting from existing CBC(AES) test vectors
(RFC3602, NIST SP800-38A) and adding HMAC(SHA384) computed with Python
(RFC3602, NIST SP800-38A) and adding HMAC(SHA224) computed with Python
script. Then, the results were double-checked on Mediatek MT7981 (safexcel)
and NXP P2020 (talitos). Both platforms pass self-tests.
@@ -13,32 +13,32 @@ Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
crypto/testmgr.c | 7 ++
crypto/testmgr.h | 311 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 318 insertions(+)
crypto/testmgr.h | 285 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 292 insertions(+)
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -4272,6 +4272,13 @@ static const struct alg_test_desc alg_te
@@ -4221,6 +4221,13 @@ static const struct alg_test_desc alg_te
.test = alg_test_null,
.fips_allowed = 1,
}, {
+ .alg = "authenc(hmac(sha384),cbc(aes))",
+ .generic_driver = "authenc(hmac-sha384-lib,cbc(aes-generic))",
+ .alg = "authenc(hmac(sha224),cbc(aes))",
+ .generic_driver = "authenc(hmac-sha224-lib,cbc(aes-generic))",
+ .test = alg_test_aead,
+ .suite = {
+ .aead = __VECS(hmac_sha384_aes_cbc_tv_temp)
+ .aead = __VECS(hmac_sha224_aes_cbc_tv_temp)
+ }
+ }, {
.alg = "authenc(hmac(sha384),cbc(des))",
.generic_driver = "authenc(hmac-sha384-lib,cbc(des-generic))",
.alg = "authenc(hmac(sha224),cbc(des))",
.generic_driver = "authenc(hmac-sha224-lib,cbc(des-generic))",
.test = alg_test_aead,
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -16466,6 +16466,317 @@ static const struct aead_testvec hmac_sh
@@ -16303,6 +16303,291 @@ static const struct aead_testvec hmac_sh
},
};
+static const struct aead_testvec hmac_sha384_aes_cbc_tv_temp[] = {
+static const struct aead_testvec hmac_sha224_aes_cbc_tv_temp[] = {
+ { /* RFC 3602 Case 1 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -51,28 +51,24 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00"
+ "\x06\xa9\x21\x40\x36\xb8\xa1\x5b"
+ "\x51\x2e\x03\xd5\x34\x12\x00\x06",
+ .klen = 8 + 48 + 16,
+ .klen = 8 + 28 + 16,
+ .iv = "\x3d\xaf\xba\x42\x9d\x9e\xb4\x30"
+ "\xb4\x22\xda\x80\x2c\x9f\xac\x41",
+ .assoc = "\x3d\xaf\xba\x42\x9d\x9e\xb4\x30"
+ "\xb4\x22\xda\x80\x2c\x9f\xac\x41",
+ .alen = 16,
+ .alen = 16,
+ .ptext = "Single block msg",
+ .plen = 16,
+ .ctext = "\xe3\x53\x77\x9c\x10\x79\xae\xb8"
+ "\x27\x08\x94\x2d\xbe\x77\x18\x1a"
+ "\x79\x1c\xf1\x22\x95\x80\xe0\x60"
+ "\x7f\xf9\x92\x60\x83\xbd\x60\x9c"
+ "\xf6\x62\x8b\xa9\x7d\x56\xe2\xaf"
+ "\x80\x43\xbc\x41\x4a\x63\x0b\xa0"
+ "\x16\x25\xe2\xfe\x0a\x96\xf6\xa5"
+ "\x6c\x0b\xc2\x53\xb4\x27\xd9\x42",
+ .clen = 16 + 48,
+ "\x17\xe8\x00\x76\x70\x71\xd1\x72"
+ "\xf8\xd0\x91\x51\x67\xf9\xdf\xd6"
+ "\x0d\x56\x1a\xb3\x52\x19\x85\xae"
+ "\x46\x74\xb6\x98",
+ .clen = 16 + 28,
+ }, { /* RFC 3602 Case 2 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -85,17 +81,15 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x40\x41\x42\x43\x44\x45\x46\x47"
+ "\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+ "\x38\x39\x3a\x3b"
+ "\xc2\x86\x69\x6d\x88\x7c\x9a\xa0"
+ "\x61\x1b\xbb\x3e\x20\x25\xa4\x5a",
+ .klen = 8 + 48 + 16,
+ .klen = 8 + 28 + 16,
+ .iv = "\x56\x2e\x17\x99\x6d\x09\x3d\x28"
+ "\xdd\xb3\xba\x69\x5a\x2e\x6f\x58",
+ .assoc = "\x56\x2e\x17\x99\x6d\x09\x3d\x28"
+ "\xdd\xb3\xba\x69\x5a\x2e\x6f\x58",
+ .alen = 16,
+ .alen = 16,
+ .ptext = "\x00\x01\x02\x03\x04\x05\x06\x07"
+ "\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f"
+ "\x10\x11\x12\x13\x14\x15\x16\x17"
@@ -105,13 +99,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x3a\x86\x30\x28\xb5\xe1\xdc\x0a"
+ "\x75\x86\x60\x2d\x25\x3c\xff\xf9"
+ "\x1b\x82\x66\xbe\xa6\xd6\x1a\xb1"
+ "\x4e\x5b\xa8\x65\x51\xc6\x58\xaf"
+ "\x31\x57\x50\x3d\x01\xa1\xa4\x3f"
+ "\x42\xd1\xd7\x31\x76\x8d\xf8\xc8"
+ "\xe4\xd2\x7e\xc5\x23\xe7\xc6\x2e"
+ "\x2d\xfd\x9d\xc1\xac\x50\x1e\xcf"
+ "\xa0\x10\xeb\x1a\x9c\xb7\xe1\xca",
+ .clen = 32 + 48,
+ "\xa1\x11\xfa\xbb\x1e\x04\x7e\xe7"
+ "\x4c\x5f\x65\xbf\x68\x8d\x33\x9d"
+ "\xbc\x74\x9b\xf3\x15\xf3\x8f\x8d"
+ "\xe8\xaf\x33\xe0",
+
+ .clen = 32 + 28,
+ }, { /* RFC 3602 Case 3 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -124,17 +117,15 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\xaa\xbb\xcc\xdd"
+ "\x6c\x3e\xa0\x47\x76\x30\xce\x21"
+ "\xa2\xce\x33\x4a\xa7\x46\xc2\xcd",
+ .klen = 8 + 48 + 16,
+ .klen = 8 + 28 + 16,
+ .iv = "\xc7\x82\xdc\x4c\x09\x8c\x66\xcb"
+ "\xd9\xcd\x27\xd8\x25\x68\x2c\x81",
+ .assoc = "\xc7\x82\xdc\x4c\x09\x8c\x66\xcb"
+ "\xd9\xcd\x27\xd8\x25\x68\x2c\x81",
+ .alen = 16,
+ .alen = 16,
+ .ptext = "This is a 48-byte message (exactly 3 AES blocks)",
+ .plen = 48,
+ .ctext = "\xd0\xa0\x2b\x38\x36\x45\x17\x53"
@@ -143,13 +134,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x50\x69\x39\x27\x67\x72\xf8\xd5"
+ "\x02\x1c\x19\x21\x6b\xad\x52\x5c"
+ "\x85\x79\x69\x5d\x83\xba\x26\x84"
+ "\xa1\x52\xe7\xda\xf7\x05\xb6\xca"
+ "\xad\x0f\x51\xed\x5a\xd3\x0f\xdf"
+ "\xde\xeb\x3f\x31\xed\x3a\x43\x93"
+ "\x3b\xb7\xca\xc8\x1b\xe7\x3b\x61"
+ "\x6a\x05\xfd\x2d\x6a\x5c\xb1\x0d"
+ "\x6e\x7a\xeb\x1c\x84\xec\xdb\xde",
+ .clen = 48 + 48,
+ "\x60\xb3\xca\x0e\xc1\xfe\xf2\x27"
+ "\x5a\x41\xe4\x99\xa8\x19\x56\xf1"
+ "\x44\x98\x27\x9f\x99\xb0\x4a\xad"
+ "\x4d\xc1\x1e\x88",
+ .clen = 48 + 28,
+ }, { /* RFC 3602 Case 4 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -162,17 +151,15 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\xaa\xbb\xcc\xdd"
+ "\x56\xe4\x7a\x38\xc5\x59\x89\x74"
+ "\xbc\x46\x90\x3d\xba\x29\x03\x49",
+ .klen = 8 + 48 + 16,
+ .klen = 8 + 28 + 16,
+ .iv = "\x8c\xe8\x2e\xef\xbe\xa0\xda\x3c"
+ "\x44\x69\x9e\xd7\xdb\x51\xb7\xd9",
+ .assoc = "\x8c\xe8\x2e\xef\xbe\xa0\xda\x3c"
+ "\x44\x69\x9e\xd7\xdb\x51\xb7\xd9",
+ .alen = 16,
+ .alen = 16,
+ .ptext = "\xa0\xa1\xa2\xa3\xa4\xa5\xa6\xa7"
+ "\xa8\xa9\xaa\xab\xac\xad\xae\xaf"
+ "\xb0\xb1\xb2\xb3\xb4\xb5\xb6\xb7"
@@ -190,13 +177,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x86\x8b\xb7\xb2\x9d\x3d\x46\xad"
+ "\x83\xce\x9f\x9a\x10\x2e\xe9\x9d"
+ "\x49\xa5\x3e\x87\xf4\xc3\xda\x55"
+ "\x85\x7b\x91\xe0\x29\xeb\xd3\x59"
+ "\x7c\xe3\x67\x14\xbe\x71\x2a\xd2"
+ "\x8a\x1a\xd2\x35\x78\x6b\x69\xba"
+ "\x64\xa5\x04\x00\x19\xc3\x4c\xae"
+ "\x71\xff\x76\x9f\xbb\xc3\x29\x22"
+ "\xc2\xc6\x51\xf1\xe6\x29\x5e\xa5",
+ .clen = 64 + 48,
+ "\xbb\xe9\x38\xf8\xb9\xbf\xcb\x7b"
+ "\xa8\x22\x91\xea\x1e\xaf\x13\xba"
+ "\x24\x18\x64\x9c\xcb\xb4\xa9\x16"
+ "\x4b\x83\x9c\xec",
+ .clen = 64 + 28,
+ }, { /* RFC 3602 Case 5 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -209,12 +194,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\xaa\xbb\xcc\xdd"
+ "\x90\xd3\x82\xb4\x10\xee\xba\x7a"
+ "\xd9\x38\xc4\x6c\xec\x1a\x82\xbf",
+ .klen = 8 + 48 + 16,
+ .klen = 8 + 28 + 16,
+ .iv = "\xe9\x6e\x8c\x08\xab\x46\x57\x63"
+ "\xfd\x09\x8d\x45\xdd\x3f\xf8\x93",
+ .assoc = "\x00\x00\x43\x21\x00\x00\x00\x01"
@@ -242,13 +225,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x53\x8a\xb5\x0c\x55\x1b\x87\x4a"
+ "\xa2\x69\xad\xd0\x47\xad\x2d\x59"
+ "\x13\xac\x19\xb7\xcf\xba\xd4\xa6"
+ "\x57\x5f\xb4\xd7\x74\x6f\x18\x97"
+ "\xb7\xde\xfc\xf3\x4e\x0d\x29\x4d"
+ "\xa0\xff\x39\x9e\x2d\xbf\x27\xac"
+ "\x54\xb9\x8a\x3e\xab\x3b\xac\xd3"
+ "\x36\x43\x74\xfc\xc2\x64\x81\x8a"
+ "\x2c\x15\x72\xdf\x3f\x9d\x5b\xa4",
+ .clen = 80 + 48,
+ "\x04\x5e\x83\x45\xc5\x6a\x5b\xe2"
+ "\x5e\xd8\x59\x06\xbd\xc7\xd2\x9b"
+ "\x0b\x65\x1f\x31\xc7\xe6\x9c\x39"
+ "\xa3\x66\xdb\xb8",
+ .clen = 80 + 28,
+ }, { /* NIST SP800-38A F.2.3 CBC-AES192.Encrypt */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -261,13 +242,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\xaa\xbb\xcc\xdd"
+ "\x8e\x73\xb0\xf7\xda\x0e\x64\x52"
+ "\xc8\x10\xf3\x2b\x80\x90\x79\xe5"
+ "\x62\xf8\xea\xd2\x52\x2c\x6b\x7b",
+ .klen = 8 + 48 + 24,
+ .klen = 8 + 28 + 24,
+ .iv = "\x00\x01\x02\x03\x04\x05\x06\x07"
+ "\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f",
+ .assoc = "\x00\x01\x02\x03\x04\x05\x06\x07"
@@ -290,13 +269,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x7f\xa9\xba\xac\x3d\xf1\x02\xe0"
+ "\x08\xb0\xe2\x79\x88\x59\x88\x81"
+ "\xd9\x20\xa9\xe6\x4f\x56\x15\xcd"
+ "\x29\x9b\x42\x47\x0b\xbf\xf3\x54"
+ "\x54\x95\xb0\x89\xd5\xa0\xc3\x78"
+ "\x60\x6c\x18\x39\x6d\xc9\xfb\x2a"
+ "\x34\x1c\xed\x95\x10\x1e\x43\x0a"
+ "\x72\xce\x26\xbc\x74\xd9\x6f\xa2"
+ "\xf1\xd9\xd0\xb1\xdf\x3d\x93\x14",
+ .clen = 64 + 48,
+ "\x67\x35\xcd\x86\x94\x51\x3b\x3a"
+ "\xaa\x07\xb1\xed\x18\x55\x62\x01"
+ "\x95\xb2\x53\xb5\x20\x78\x16\xd7"
+ "\xb8\x49\x7f\x96",
+
+ .clen = 64 + 28,
+ }, { /* NIST SP800-38A F.2.5 CBC-AES256.Encrypt */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -309,14 +287,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\xaa\xbb\xcc\xdd"
+ "\x60\x3d\xeb\x10\x15\xca\x71\xbe"
+ "\x2b\x73\xae\xf0\x85\x7d\x77\x81"
+ "\x1f\x35\x2c\x07\x3b\x61\x08\xd7"
+ "\x2d\x98\x10\xa3\x09\x14\xdf\xf4",
+ .klen = 8 + 48 + 32,
+ .klen = 8 + 28 + 32,
+ .iv = "\x00\x01\x02\x03\x04\x05\x06\x07"
+ "\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f",
+ .assoc = "\x00\x01\x02\x03\x04\x05\x06\x07"
@@ -339,16 +315,14 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\xa5\x30\xe2\x63\x04\x23\x14\x61"
+ "\xb2\xeb\x05\xe2\xc3\x9b\xe9\xfc"
+ "\xda\x6c\x19\x07\x8c\x6a\x9d\x1b"
+ "\x9f\x50\xce\x64\xd9\xa3\xc9\x7a"
+ "\x15\x3a\x3d\x46\x9a\x90\xf3\x06"
+ "\x22\xad\xc5\x24\x77\x50\xb8\xfe"
+ "\xbe\x37\x16\x86\x34\x5f\xaf\x97"
+ "\x00\x9d\x86\xc8\x32\x4f\x72\x2f"
+ "\x48\x97\xad\xb6\xb9\x77\x33\xbc",
+ .clen = 64 + 48,
+ "\xe0\xe2\x3d\x3f\x55\x24\x2c\x4d"
+ "\xb9\x13\x2a\xc0\x07\xbb\x3b\xda"
+ "\xfd\xa4\x51\x32\x3f\x44\xb1\x13"
+ "\x98\xf9\xbc\xb9",
+ .clen = 64 + 28,
+ },
+};
+
static const struct aead_testvec hmac_sha512_aes_cbc_tv_temp[] = {
static const struct aead_testvec hmac_sha256_aes_cbc_tv_temp[] = {
{ /* RFC 3602 Case 1 */
#ifdef __LITTLE_ENDIAN
target/linux/generic/backport-6.18/912-v7.0-crypto-testmgr-Add-test-vectors-for-authenc-hmac-md5.patch → target/linux/generic/backport-6.18/913-v7.0-crypto-testmgr-Add-test-vectors-for-authenc-hmac-md5.patch
+1 -1
View File
@@ -34,7 +34,7 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
.test = alg_test_aead,
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -17714,6 +17714,65 @@ static const struct aead_testvec hmac_sh
@@ -17834,6 +17834,65 @@ static const struct aead_testvec hmac_sh
},
};
target/linux/generic/backport-6.18/913-v7.0-crypto-testmgr-allow-authenc-sha224-rfc3686-variant-.patch → target/linux/generic/backport-6.18/914-v7.0-crypto-testmgr-allow-authenc-sha224-rfc3686-variant-.patch
View File
target/linux/generic/backport-6.18/914-v7.1-crypto-testmgr-Add-test-vectors-for-authenc-hmac-md5.patch → target/linux/generic/backport-6.18/915-v7.1-crypto-testmgr-Add-test-vectors-for-authenc-hmac-md5.patch
+1 -1
View File
@@ -33,7 +33,7 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
.test = alg_test_aead,
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -17401,6 +17401,63 @@ static const struct aead_testvec hmac_sh
@@ -17521,6 +17521,63 @@ static const struct aead_testvec hmac_sh
},
};
target/linux/generic/backport-6.18/916-v7.1-crypto-testmgr-Add-test-vectors-for-authenc-hmac-sha.patch
+56 -70
View File
@@ -1,11 +1,11 @@
From 3f4d32aff1d4e06501f909b1e5037ec8caa76d01 Mon Sep 17 00:00:00 2001
From b45b4314d3e55be70b597baa1f0ab9283e68003b Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Thu, 5 Mar 2026 21:08:21 +0100
Subject: [PATCH 2/5] crypto: testmgr - Add test vectors for
authenc(hmac(sha224),rfc3686(ctr(aes)))
Date: Thu, 5 Mar 2026 21:08:20 +0100
Subject: [PATCH 1/5] crypto: testmgr - Add test vectors for
authenc(hmac(sha1),rfc3686(ctr(aes)))
Test vectors were generated starting from existing RFC3686(CTR(AES)) test
vectors and adding HMAC(SHA224) computed with software implementation.
vectors and adding HMAC(SHA1) computed with software implementation.
Then, the results were double-checked on Mediatek MT7986 (safexcel).
Platform pass self-tests.
@@ -13,32 +13,32 @@ Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
crypto/testmgr.c | 6 +-
crypto/testmgr.h | 235 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 240 insertions(+), 1 deletion(-)
crypto/testmgr.h | 221 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 226 insertions(+), 1 deletion(-)
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -4261,8 +4261,12 @@ static const struct alg_test_desc alg_te
@@ -4232,8 +4232,12 @@ static const struct alg_test_desc alg_te
}
}, {
.alg = "authenc(hmac(sha224),rfc3686(ctr(aes)))",
.alg = "authenc(hmac(sha1),rfc3686(ctr(aes)))",
- .test = alg_test_null,
+ .generic_driver = "authenc(hmac-sha224-lib,rfc3686(ctr(aes-lib)))",
+ .generic_driver = "authenc(hmac-sha1-lib,rfc3686(ctr(aes-lib)))",
+ .test = alg_test_aead,
.fips_allowed = 1,
+ .suite = {
+ .aead = __VECS(hmac_sha224_aes_ctr_rfc3686_tv_temp)
+ .aead = __VECS(hmac_sha1_aes_ctr_rfc3686_tv_temp)
+ }
}, {
.alg = "authenc(hmac(sha256),cbc(aes))",
.generic_driver = "authenc(hmac-sha256-lib,cbc(aes-generic))",
.alg = "authenc(hmac(sha224),cbc(aes))",
.generic_driver = "authenc(hmac-sha224-lib,cbc(aes-generic))",
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -16689,6 +16689,241 @@ static const struct aead_testvec hmac_sh
@@ -16257,6 +16257,227 @@ static const struct aead_testvec hmac_sh
},
};
+static const struct aead_testvec hmac_sha224_aes_ctr_rfc3686_tv_temp[] = {
+static const struct aead_testvec hmac_sha1_aes_ctr_rfc3686_tv_temp[] = {
+ { /* RFC 3686 Case 1 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -50,12 +50,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x14" /* enc key length */
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00"
+ "\xae\x68\x52\xf8\x12\x10\x67\xcc"
+ "\x4b\xf7\xa5\x76\x55\x77\xf3\x9e"
+ "\x00\x00\x00\x30",
+ .klen = 8 + 28 + 20,
+ .klen = 8 + 20 + 20,
+ .iv = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .assoc = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .alen = 8,
@@ -63,11 +62,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\xe4\x09\x5d\x4f\xb7\xa7\xb3\x79"
+ "\x2d\x61\x75\xa3\x26\x13\x11\xb8"
+ "\x36\xb4\x3b\x9c\x62\xed\xcf\x77"
+ "\xdc\x19\x27\x3f\x92\x80\x52\xce"
+ "\x8f\xad\x01\x0b\x79\xda\x04\x83"
+ "\xcb\x45\x1a\x52",
+ .clen = 16 + 28,
+ "\x70\xdc\x6b\x62\x43\xa1\x2f\x08"
+ "\xf1\xec\x93\x7d\x69\xb2\x8e\x1f"
+ "\x0a\x97\x39\x86",
+ .clen = 16 + 20,
+ }, { /* RFC 3686 Case 2 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -79,12 +77,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x14" /* enc key length */
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b"
+ "\x30\x31\x32\x33"
+ "\x7e\x24\x06\x78\x17\xfa\xe0\xd7"
+ "\x43\xd6\xce\x1f\x32\x53\x91\x63"
+ "\x00\x6c\xb6\xdb",
+ .klen = 8 + 28 + 20,
+ .klen = 8 + 20 + 20,
+ .iv = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .assoc = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .alen = 8,
@@ -97,11 +94,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x79\x0d\x41\xee\x8e\xda\xd3\x88"
+ "\xeb\x2e\x1e\xfc\x46\xda\x57\xc8"
+ "\xfc\xe6\x30\xdf\x91\x41\xbe\x28"
+ "\x7f\xe4\x8f\xa7\x06\x71\xe9\xe5"
+ "\x16\x79\xef\xf9\x7e\x5c\x93\x4d"
+ "\xa0\xf8\x3b\x3a\xaa\x1c\xc0\xd9"
+ "\x6b\x48\x49\x01",
+ .clen = 32 + 28,
+ "\x6b\x7b\x4d\x39\x36\x1c\x12\x5f"
+ "\x72\xd2\x88\xb2\x26\xa6\xa6\xb5"
+ "\x1d\x3a\x49\xa6",
+ .clen = 32 + 20,
+ }, { /* RFC 3686 Case 3 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -113,12 +109,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x14" /* enc key length */
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd"
+ "\x22\x33\x44\x55"
+ "\x76\x91\xbe\x03\x5e\x50\x20\xa8"
+ "\xac\x6e\x61\x85\x29\xf9\xa0\xdc"
+ "\x00\xe0\x01\x7b",
+ .klen = 8 + 28 + 20,
+ .klen = 8 + 20 + 20,
+ .iv = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .assoc = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .alen = 8,
@@ -133,11 +128,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x45\x40\xa4\x2b\xde\x6d\x78\x36"
+ "\xd5\x9a\x5c\xea\xae\xf3\x10\x53"
+ "\x25\xb2\x07\x2f"
+ "\xb0\x19\x45\xee\xa7\x31\xd9\xd0"
+ "\x74\x6b\xb8\xb1\x67\x61\x2f\x8c"
+ "\x68\xde\xe3\xc9\x3b\x0c\x72\xda"
+ "\x48\xba\x1b\x51",
+ .clen = 36 + 28,
+ "\x2c\x86\xa0\x90\x8e\xc1\x02\x1d"
+ "\x51\xdc\xd6\x21\xc7\x30\xcc\x32"
+ "\x38\x55\x47\x64",
+ .clen = 36 + 20,
+ }, { /* RFC 3686 Case 4 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -149,13 +143,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x1c" /* enc key length */
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00"
+ "\x16\xaf\x5b\x14\x5f\xc9\xf5\x79"
+ "\xc1\x75\xf9\x3e\x3b\xfb\x0e\xed"
+ "\x86\x3d\x06\xcc\xfd\xb7\x85\x15"
+ "\x00\x00\x00\x48",
+ .klen = 8 + 28 + 28,
+ .klen = 8 + 20 + 28,
+ .iv = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .assoc = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .alen = 8,
@@ -163,11 +156,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\x4b\x55\x38\x4f\xe2\x59\xc9\xc8"
+ "\x4e\x79\x35\xa0\x03\xcb\xe9\x28"
+ "\xfd\xf5\x35\x26\x50\x3d\xdf\x80"
+ "\x6e\xbe\xba\x8d\x56\xf3\x03\xb7"
+ "\x27\xb8\x13\xe8\x72\x8f\xc9\x52"
+ "\x4a\xb7\xc3\x3a",
+ .clen = 16 + 28,
+ "\xe9\x4e\x49\xf0\x6b\x8d\x58\x2b"
+ "\x26\x7f\xf3\xab\xeb\x2f\x74\x2f"
+ "\x45\x43\x64\xc1",
+ .clen = 16 + 20,
+ }, { /* RFC 3686 Case 5 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -179,13 +171,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x1c" /* enc key length */
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b"
+ "\x30\x31\x32\x33"
+ "\x7c\x5c\xb2\x40\x1b\x3d\xc3\x3c"
+ "\x19\xe7\x34\x08\x19\xe0\xf6\x9c"
+ "\x67\x8c\x3d\xb8\xe6\xf6\xa9\x1a"
+ "\x00\x96\xb0\x3b",
+ .klen = 8 + 28 + 28,
+ .klen = 8 + 20 + 28,
+ .iv = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .assoc = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .alen = 8,
@@ -198,11 +189,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x7e\xdf\xaa\xfa\x71\x31\xcd\x9f"
+ "\x84\x90\x70\x1c\x5a\xd4\xa7\x9c"
+ "\xfc\x1f\xe0\xff\x42\xf4\xfb\x00"
+ "\x72\x89\xa8\x04\xa5\xac\x8f\x29"
+ "\xe6\xb8\x58\xe8\xcf\x6a\x91\x89"
+ "\xd3\x66\x3b\xdc\xce\x43\x23\xb7"
+ "\x6a\xdd\x9d\xbd",
+ .clen = 32 + 28,
+ "\xab\xc4\xfa\x6d\x20\xe1\xce\x72"
+ "\x0e\x92\x4e\x97\xaa\x4d\x30\x84"
+ "\xb6\xd8\x4d\x3b",
+ .clen = 32 + 20,
+ }, { /* RFC 3686 Case 7 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -214,14 +204,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x24" /* enc key length */
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00"
+ "\x77\x6b\xef\xf2\x85\x1d\xb0\x6f"
+ "\x4c\x8a\x05\x42\xc8\x69\x6f\x6c"
+ "\x6a\x81\xaf\x1e\xec\x96\xb4\xd3"
+ "\x7f\xc1\xd6\x89\xe6\xc1\xc1\x04"
+ "\x00\x00\x00\x60",
+ .klen = 8 + 28 + 36,
+ .klen = 8 + 20 + 36,
+ .iv = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .assoc = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .alen = 8,
@@ -229,11 +218,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\x14\x5a\xd0\x1d\xbf\x82\x4e\xc7"
+ "\x56\x08\x63\xdc\x71\xe3\xe0\xc0"
+ "\xfe\xdf\x6f\x62\x8a\x79\xb5\x34"
+ "\xd0\x6f\x32\xaf\x31\x50\x5b\x1f"
+ "\xe0\x6d\x0b\xbc\x02\x25\xee\x74"
+ "\x7a\xdf\x97\x3c",
+ .clen = 16 + 28,
+ "\x3d\x6c\x23\x27\xda\x0e\x7f\x29"
+ "\xfd\x8d\x3c\x1b\xf7\x7a\x63\xd9"
+ "\x7e\x0f\xe9\xf6",
+ .clen = 16 + 20,
+ }, { /* RFC 3686 Case 8 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -245,14 +233,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x24" /* enc key length */
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b"
+ "\x30\x31\x32\x33"
+ "\xf6\xd6\x6d\x6b\xd5\x2d\x59\xbb"
+ "\x07\x96\x36\x58\x79\xef\xf8\x86"
+ "\xc6\x6d\xd5\x1a\x5b\x6a\x99\x74"
+ "\x4b\x50\x59\x0c\x87\xa2\x38\x84"
+ "\x00\xfa\xac\x24",
+ .klen = 8 + 28 + 36,
+ .klen = 8 + 20 + 36,
+ .iv = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .assoc = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .alen = 8,
@@ -265,14 +252,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x49\xee\x00\x0b\x80\x4e\xb2\xa9"
+ "\xb8\x30\x6b\x50\x8f\x83\x9d\x6a"
+ "\x55\x30\x83\x1d\x93\x44\xaf\x1c"
+ "\x19\x1e\x9c\x2c\x6d\x4e\x21\xda"
+ "\x6c\x4d\x88\x90\xf8\x5f\xa5\x9d"
+ "\xb4\xd4\x40\xad\xfa\x67\x3f\x0e"
+ "\x11\x12\xd6\x10",
+ .clen = 32 + 28,
+ "\xe7\xee\x22\xa4\xdd\xbf\x5d\x44"
+ "\x3b\x43\x1c\x69\x55\x11\xd5\xad"
+ "\x14\x5f\x44\xa6",
+ .clen = 32 + 20,
+ },
+};
+
static const struct aead_testvec hmac_sha256_aes_cbc_tv_temp[] = {
{ /* RFC 3602 Case 1 */
static const struct aead_testvec hmac_sha1_ecb_cipher_null_tv_temp[] = {
{ /* Input data from RFC 2410 Case 1 */
#ifdef __LITTLE_ENDIAN
target/linux/generic/backport-6.18/917-v7.1-crypto-testmgr-Add-test-vectors-for-authenc-hmac-sha.patch
+63 -63
View File
@@ -1,11 +1,11 @@
From 65af3a0bff7264ab84f9e1f2099c658601ca1b66 Mon Sep 17 00:00:00 2001
From d46c27c01f132082095342b5abf4e83e250b70b8 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Thu, 5 Mar 2026 21:08:22 +0100
Subject: [PATCH 3/5] crypto: testmgr - Add test vectors for
authenc(hmac(sha256),rfc3686(ctr(aes)))
Date: Thu, 5 Mar 2026 21:08:21 +0100
Subject: [PATCH 2/5] crypto: testmgr - Add test vectors for
authenc(hmac(sha224),rfc3686(ctr(aes)))
Test vectors were generated starting from existing RFC3686(CTR(AES)) test
vectors and adding HMAC(SHA256) computed with software implementation.
vectors and adding HMAC(SHA224) computed with software implementation.
Then, the results were double-checked on Mediatek MT7986 (safexcel).
Platform pass self-tests.
@@ -18,27 +18,27 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -4302,8 +4302,12 @@ static const struct alg_test_desc alg_te
@@ -4261,8 +4261,12 @@ static const struct alg_test_desc alg_te
}
}, {
.alg = "authenc(hmac(sha256),rfc3686(ctr(aes)))",
.alg = "authenc(hmac(sha224),rfc3686(ctr(aes)))",
- .test = alg_test_null,
+ .generic_driver = "authenc(hmac-sha256-lib,rfc3686(ctr(aes-lib)))",
+ .generic_driver = "authenc(hmac-sha224-lib,rfc3686(ctr(aes-lib)))",
+ .test = alg_test_aead,
.fips_allowed = 1,
+ .suite = {
+ .aead = __VECS(hmac_sha256_aes_ctr_rfc3686_tv_temp)
+ .aead = __VECS(hmac_sha224_aes_ctr_rfc3686_tv_temp)
+ }
}, {
.alg = "authenc(hmac(sha384),cbc(aes))",
.generic_driver = "authenc(hmac-sha384-lib,cbc(aes-generic))",
.alg = "authenc(hmac(sha256),cbc(aes))",
.generic_driver = "authenc(hmac-sha256-lib,cbc(aes-generic))",
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -17207,6 +17207,241 @@ static const struct aead_testvec hmac_sh
@@ -16809,6 +16809,241 @@ static const struct aead_testvec hmac_sh
},
};
+static const struct aead_testvec hmac_sha256_aes_ctr_rfc3686_tv_temp[] = {
+static const struct aead_testvec hmac_sha224_aes_ctr_rfc3686_tv_temp[] = {
+ { /* RFC 3686 Case 1 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -51,11 +51,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00"
+ "\xae\x68\x52\xf8\x12\x10\x67\xcc"
+ "\x4b\xf7\xa5\x76\x55\x77\xf3\x9e"
+ "\x00\x00\x00\x30",
+ .klen = 8 + 32 + 20,
+ .klen = 8 + 28 + 20,
+ .iv = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .assoc = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .alen = 8,
@@ -63,11 +63,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\xe4\x09\x5d\x4f\xb7\xa7\xb3\x79"
+ "\x2d\x61\x75\xa3\x26\x13\x11\xb8"
+ "\x9b\xa2\x34\x62\xe5\xb3\xe8\x2d"
+ "\x6d\xdb\x93\x64\xa5\x08\x2e\x77"
+ "\x72\x1f\x21\x94\xc7\xbe\x14\xa6"
+ "\xcd\xea\x96\xa1\x29\x8f\x30\xc3",
+ .clen = 16 + 32,
+ "\x36\xb4\x3b\x9c\x62\xed\xcf\x77"
+ "\xdc\x19\x27\x3f\x92\x80\x52\xce"
+ "\x8f\xad\x01\x0b\x79\xda\x04\x83"
+ "\xcb\x45\x1a\x52",
+ .clen = 16 + 28,
+ }, { /* RFC 3686 Case 2 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -80,11 +80,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x38\x39\x3a\x3b"
+ "\x7e\x24\x06\x78\x17\xfa\xe0\xd7"
+ "\x43\xd6\xce\x1f\x32\x53\x91\x63"
+ "\x00\x6c\xb6\xdb",
+ .klen = 8 + 32 + 20,
+ .klen = 8 + 28 + 20,
+ .iv = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .assoc = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .alen = 8,
@@ -97,11 +97,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x79\x0d\x41\xee\x8e\xda\xd3\x88"
+ "\xeb\x2e\x1e\xfc\x46\xda\x57\xc8"
+ "\xfc\xe6\x30\xdf\x91\x41\xbe\x28"
+ "\x22\xf7\x95\xa8\xbb\xcd\x19\xf4"
+ "\x58\x16\x54\x28\x2b\xf4\x52\xe7"
+ "\x5c\x6c\xe1\x44\x0b\xd5\x10\x6e"
+ "\xe1\xf7\x04\xc4\x2c\xab\x93\xdd",
+ .clen = 32 + 32,
+ "\x7f\xe4\x8f\xa7\x06\x71\xe9\xe5"
+ "\x16\x79\xef\xf9\x7e\x5c\x93\x4d"
+ "\xa0\xf8\x3b\x3a\xaa\x1c\xc0\xd9"
+ "\x6b\x48\x49\x01",
+ .clen = 32 + 28,
+ }, { /* RFC 3686 Case 3 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -114,11 +114,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\xaa\xbb\xcc\xdd"
+ "\x76\x91\xbe\x03\x5e\x50\x20\xa8"
+ "\xac\x6e\x61\x85\x29\xf9\xa0\xdc"
+ "\x00\xe0\x01\x7b",
+ .klen = 8 + 32 + 20,
+ .klen = 8 + 28 + 20,
+ .iv = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .assoc = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .alen = 8,
@@ -133,11 +133,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x45\x40\xa4\x2b\xde\x6d\x78\x36"
+ "\xd5\x9a\x5c\xea\xae\xf3\x10\x53"
+ "\x25\xb2\x07\x2f"
+ "\x1d\x05\x5f\x77\x3b\x4f\x5c\x21"
+ "\x29\xea\xf1\xa8\x71\x49\x7b\x0b"
+ "\x66\x0d\xff\x18\x81\x63\xfc\xc3"
+ "\x91\xb6\x38\xc8\xcd\x2d\x39\x83",
+ .clen = 36 + 32,
+ "\xb0\x19\x45\xee\xa7\x31\xd9\xd0"
+ "\x74\x6b\xb8\xb1\x67\x61\x2f\x8c"
+ "\x68\xde\xe3\xc9\x3b\x0c\x72\xda"
+ "\x48\xba\x1b\x51",
+ .clen = 36 + 28,
+ }, { /* RFC 3686 Case 4 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -150,12 +150,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00"
+ "\x16\xaf\x5b\x14\x5f\xc9\xf5\x79"
+ "\xc1\x75\xf9\x3e\x3b\xfb\x0e\xed"
+ "\x86\x3d\x06\xcc\xfd\xb7\x85\x15"
+ "\x00\x00\x00\x48",
+ .klen = 8 + 32 + 28,
+ .klen = 8 + 28 + 28,
+ .iv = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .assoc = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .alen = 8,
@@ -163,11 +163,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\x4b\x55\x38\x4f\xe2\x59\xc9\xc8"
+ "\x4e\x79\x35\xa0\x03\xcb\xe9\x28"
+ "\x8d\x03\x77\xb2\x1c\xc9\xe0\xac"
+ "\xde\x69\xbe\x8a\xef\x5b\x13\x74"
+ "\x1d\x39\xbc\xdc\x95\xa4\xbf\xc3"
+ "\xd5\xc6\xd1\xda\xda\x3b\xca\x78",
+ .clen = 16 + 32,
+ "\xfd\xf5\x35\x26\x50\x3d\xdf\x80"
+ "\x6e\xbe\xba\x8d\x56\xf3\x03\xb7"
+ "\x27\xb8\x13\xe8\x72\x8f\xc9\x52"
+ "\x4a\xb7\xc3\x3a",
+ .clen = 16 + 28,
+ }, { /* RFC 3686 Case 5 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -180,12 +180,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x38\x39\x3a\x3b"
+ "\x7c\x5c\xb2\x40\x1b\x3d\xc3\x3c"
+ "\x19\xe7\x34\x08\x19\xe0\xf6\x9c"
+ "\x67\x8c\x3d\xb8\xe6\xf6\xa9\x1a"
+ "\x00\x96\xb0\x3b",
+ .klen = 8 + 32 + 28,
+ .klen = 8 + 28 + 28,
+ .iv = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .assoc = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .alen = 8,
@@ -198,11 +198,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x7e\xdf\xaa\xfa\x71\x31\xcd\x9f"
+ "\x84\x90\x70\x1c\x5a\xd4\xa7\x9c"
+ "\xfc\x1f\xe0\xff\x42\xf4\xfb\x00"
+ "\x34\x06\x2b\x3d\xf1\xa8\x3d\xf1"
+ "\xa6\x5e\x5c\x1a\xdb\x0c\xb5\x1e"
+ "\x8f\xdb\xf4\xca\x7d\x09\x5e\x81"
+ "\xdb\x32\x07\x4a\x1d\x1c\x6d\x83",
+ .clen = 32 + 32,
+ "\x72\x89\xa8\x04\xa5\xac\x8f\x29"
+ "\xe6\xb8\x58\xe8\xcf\x6a\x91\x89"
+ "\xd3\x66\x3b\xdc\xce\x43\x23\xb7"
+ "\x6a\xdd\x9d\xbd",
+ .clen = 32 + 28,
+ }, { /* RFC 3686 Case 7 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -215,13 +215,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00"
+ "\x77\x6b\xef\xf2\x85\x1d\xb0\x6f"
+ "\x4c\x8a\x05\x42\xc8\x69\x6f\x6c"
+ "\x6a\x81\xaf\x1e\xec\x96\xb4\xd3"
+ "\x7f\xc1\xd6\x89\xe6\xc1\xc1\x04"
+ "\x00\x00\x00\x60",
+ .klen = 8 + 32 + 36,
+ .klen = 8 + 28 + 36,
+ .iv = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .assoc = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .alen = 8,
@@ -229,11 +229,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\x14\x5a\xd0\x1d\xbf\x82\x4e\xc7"
+ "\x56\x08\x63\xdc\x71\xe3\xe0\xc0"
+ "\xc3\xb4\x5f\xb0\xbf\xf5\x1b\xff"
+ "\x7c\xf1\x79\x00\x63\x50\xdd\x77"
+ "\xc0\x4a\xba\xcd\xdc\x47\x05\x2a"
+ "\x5d\x85\x2d\x83\x44\xca\x79\x2c",
+ .clen = 16 + 32,
+ "\xfe\xdf\x6f\x62\x8a\x79\xb5\x34"
+ "\xd0\x6f\x32\xaf\x31\x50\x5b\x1f"
+ "\xe0\x6d\x0b\xbc\x02\x25\xee\x74"
+ "\x7a\xdf\x97\x3c",
+ .clen = 16 + 28,
+ }, { /* RFC 3686 Case 8 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -246,13 +246,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x38\x39\x3a\x3b"
+ "\xf6\xd6\x6d\x6b\xd5\x2d\x59\xbb"
+ "\x07\x96\x36\x58\x79\xef\xf8\x86"
+ "\xc6\x6d\xd5\x1a\x5b\x6a\x99\x74"
+ "\x4b\x50\x59\x0c\x87\xa2\x38\x84"
+ "\x00\xfa\xac\x24",
+ .klen = 8 + 32 + 36,
+ .klen = 8 + 28 + 36,
+ .iv = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .assoc = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .alen = 8,
@@ -265,14 +265,14 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x49\xee\x00\x0b\x80\x4e\xb2\xa9"
+ "\xb8\x30\x6b\x50\x8f\x83\x9d\x6a"
+ "\x55\x30\x83\x1d\x93\x44\xaf\x1c"
+ "\xc8\x59\x5d\xe1\xba\xac\x13\x82"
+ "\xfd\x21\x7c\x8c\x23\x31\x04\x02"
+ "\x9e\x69\x5b\x57\xa8\x13\xe7\x21"
+ "\x60\x0c\x24\xc2\x80\x4a\x93\x6e",
+ .clen = 32 + 32,
+ "\x19\x1e\x9c\x2c\x6d\x4e\x21\xda"
+ "\x6c\x4d\x88\x90\xf8\x5f\xa5\x9d"
+ "\xb4\xd4\x40\xad\xfa\x67\x3f\x0e"
+ "\x11\x12\xd6\x10",
+ .clen = 32 + 28,
+ },
+};
+
static const struct aead_testvec hmac_sha384_aes_cbc_tv_temp[] = {
static const struct aead_testvec hmac_sha256_aes_cbc_tv_temp[] = {
{ /* RFC 3602 Case 1 */
#ifdef __LITTLE_ENDIAN
target/linux/generic/backport-6.18/918-v7.1-crypto-testmgr-Add-test-vectors-for-authenc-hmac-sha.patch
+58 -86
View File
@@ -1,11 +1,11 @@
From 07cbbf6f38e6a91a7fecab3d6f86485425748d3e Mon Sep 17 00:00:00 2001
From 5ac6b904c70ff163fd2f9e152056300ce5ed6c26 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Thu, 5 Mar 2026 21:08:23 +0100
Subject: [PATCH 4/5] crypto: testmgr - Add test vectors for
authenc(hmac(sha384),rfc3686(ctr(aes)))
Date: Thu, 5 Mar 2026 21:08:22 +0100
Subject: [PATCH 3/5] crypto: testmgr - Add test vectors for
authenc(hmac(sha256),rfc3686(ctr(aes)))
Test vectors were generated starting from existing RFC3686(CTR(AES)) test
vectors and adding HMAC(SHA384) computed with software implementation.
vectors and adding HMAC(SHA256) computed with software implementation.
Then, the results were double-checked on Mediatek MT7986 (safexcel).
Platform pass self-tests.
@@ -13,32 +13,32 @@ Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
crypto/testmgr.c | 6 +-
crypto/testmgr.h | 263 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 268 insertions(+), 1 deletion(-)
crypto/testmgr.h | 235 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 240 insertions(+), 1 deletion(-)
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -4342,8 +4342,12 @@ static const struct alg_test_desc alg_te
@@ -4302,8 +4302,12 @@ static const struct alg_test_desc alg_te
}
}, {
.alg = "authenc(hmac(sha384),rfc3686(ctr(aes)))",
.alg = "authenc(hmac(sha256),rfc3686(ctr(aes)))",
- .test = alg_test_null,
+ .generic_driver = "authenc(hmac-sha384-lib,rfc3686(ctr(aes-lib)))",
+ .generic_driver = "authenc(hmac-sha256-lib,rfc3686(ctr(aes-lib)))",
+ .test = alg_test_aead,
.fips_allowed = 1,
+ .suite = {
+ .aead = __VECS(hmac_sha384_aes_ctr_rfc3686_tv_temp)
+ .aead = __VECS(hmac_sha256_aes_ctr_rfc3686_tv_temp)
+ }
}, {
.alg = "authenc(hmac(sha512),cbc(aes))",
.generic_driver = "authenc(hmac-sha512-lib,cbc(aes-generic))",
.alg = "authenc(hmac(sha384),cbc(aes))",
.generic_driver = "authenc(hmac-sha384-lib,cbc(aes-generic))",
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -17753,6 +17753,269 @@ static const struct aead_testvec hmac_sh
@@ -17327,6 +17327,241 @@ static const struct aead_testvec hmac_sh
},
};
+static const struct aead_testvec hmac_sha384_aes_ctr_rfc3686_tv_temp[] = {
+static const struct aead_testvec hmac_sha256_aes_ctr_rfc3686_tv_temp[] = {
+ { /* RFC 3686 Case 1 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -52,12 +52,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\xae\x68\x52\xf8\x12\x10\x67\xcc"
+ "\x4b\xf7\xa5\x76\x55\x77\xf3\x9e"
+ "\x00\x00\x00\x30",
+ .klen = 8 + 48 + 20,
+ .klen = 8 + 32 + 20,
+ .iv = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .assoc = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .alen = 8,
@@ -65,13 +63,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\xe4\x09\x5d\x4f\xb7\xa7\xb3\x79"
+ "\x2d\x61\x75\xa3\x26\x13\x11\xb8"
+ "\x45\x51\x59\x72\x16\xd3\xc6\x15"
+ "\x25\x1e\xe8\x92\x2e\x47\x52\xcc"
+ "\x91\x9c\x24\xef\x11\xb2\x53\x00"
+ "\x10\x20\x43\x06\xe2\x35\x88\x9e"
+ "\x18\x32\x5a\x79\x7d\x73\x7e\x89"
+ "\xfe\xa1\xda\xa4\x86\xc4\x2a\x04",
+ .clen = 16 + 48,
+ "\x9b\xa2\x34\x62\xe5\xb3\xe8\x2d"
+ "\x6d\xdb\x93\x64\xa5\x08\x2e\x77"
+ "\x72\x1f\x21\x94\xc7\xbe\x14\xa6"
+ "\xcd\xea\x96\xa1\x29\x8f\x30\xc3",
+ .clen = 16 + 32,
+ }, { /* RFC 3686 Case 2 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -85,12 +81,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x40\x41\x42\x43\x44\x45\x46\x47"
+ "\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+ "\x7e\x24\x06\x78\x17\xfa\xe0\xd7"
+ "\x43\xd6\xce\x1f\x32\x53\x91\x63"
+ "\x00\x6c\xb6\xdb",
+ .klen = 8 + 48 + 20,
+ .klen = 8 + 32 + 20,
+ .iv = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .assoc = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .alen = 8,
@@ -103,13 +97,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x79\x0d\x41\xee\x8e\xda\xd3\x88"
+ "\xeb\x2e\x1e\xfc\x46\xda\x57\xc8"
+ "\xfc\xe6\x30\xdf\x91\x41\xbe\x28"
+ "\x83\x65\x32\x1e\x6b\x60\xe6\x4a"
+ "\xe2\xab\x52\x2b\xa6\x70\x3a\xfa"
+ "\xd2\xec\x83\xe4\x31\x0c\x28\x40"
+ "\x9b\x5e\x18\xa4\xdc\x48\xb8\x56"
+ "\x33\xab\x7f\x2b\xaf\xe4\x3a\xe3"
+ "\x8a\x61\xf6\x22\xb4\x6b\xfe\x7d",
+ .clen = 32 + 48,
+ "\x22\xf7\x95\xa8\xbb\xcd\x19\xf4"
+ "\x58\x16\x54\x28\x2b\xf4\x52\xe7"
+ "\x5c\x6c\xe1\x44\x0b\xd5\x10\x6e"
+ "\xe1\xf7\x04\xc4\x2c\xab\x93\xdd",
+ .clen = 32 + 32,
+ }, { /* RFC 3686 Case 3 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -123,12 +115,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\x76\x91\xbe\x03\x5e\x50\x20\xa8"
+ "\xac\x6e\x61\x85\x29\xf9\xa0\xdc"
+ "\x00\xe0\x01\x7b",
+ .klen = 8 + 48 + 20,
+ .klen = 8 + 32 + 20,
+ .iv = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .assoc = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .alen = 8,
@@ -143,13 +133,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x45\x40\xa4\x2b\xde\x6d\x78\x36"
+ "\xd5\x9a\x5c\xea\xae\xf3\x10\x53"
+ "\x25\xb2\x07\x2f"
+ "\x4a\xaa\xad\x3b\x3b\xb6\x9a\xba"
+ "\xa1\x7b\xc6\xce\x96\xc3\xff\x67"
+ "\xf3\x0c\x33\x57\xf0\x51\x24\x08"
+ "\xed\x4f\x6a\x9c\x22\x42\xbd\x18"
+ "\x97\x74\x68\x36\x00\xf1\x69\x3a"
+ "\x18\x77\x40\xf0\x56\xba\xba\xe0",
+ .clen = 36 + 48,
+ "\x1d\x05\x5f\x77\x3b\x4f\x5c\x21"
+ "\x29\xea\xf1\xa8\x71\x49\x7b\x0b"
+ "\x66\x0d\xff\x18\x81\x63\xfc\xc3"
+ "\x91\xb6\x38\xc8\xcd\x2d\x39\x83",
+ .clen = 36 + 32,
+ }, { /* RFC 3686 Case 4 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -163,13 +151,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x16\xaf\x5b\x14\x5f\xc9\xf5\x79"
+ "\xc1\x75\xf9\x3e\x3b\xfb\x0e\xed"
+ "\x86\x3d\x06\xcc\xfd\xb7\x85\x15"
+ "\x00\x00\x00\x48",
+ .klen = 8 + 48 + 28,
+ .klen = 8 + 32 + 28,
+ .iv = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .assoc = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .alen = 8,
@@ -177,13 +163,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\x4b\x55\x38\x4f\xe2\x59\xc9\xc8"
+ "\x4e\x79\x35\xa0\x03\xcb\xe9\x28"
+ "\x36\xd6\xc7\x55\xac\xb6\x0b\x14"
+ "\x95\x71\xf9\x86\x30\xe3\x96\xc3"
+ "\x76\x85\x6d\xa5\x06\xed\x6f\x34"
+ "\xcc\x1f\xcc\x2d\x88\x06\xb0\x1d"
+ "\xbe\xd9\xa2\xd3\x64\xf1\x33\x03"
+ "\x13\x50\x8f\xae\x61\x2d\x82\xb8",
+ .clen = 16 + 48,
+ "\x8d\x03\x77\xb2\x1c\xc9\xe0\xac"
+ "\xde\x69\xbe\x8a\xef\x5b\x13\x74"
+ "\x1d\x39\xbc\xdc\x95\xa4\xbf\xc3"
+ "\xd5\xc6\xd1\xda\xda\x3b\xca\x78",
+ .clen = 16 + 32,
+ }, { /* RFC 3686 Case 5 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -197,13 +181,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x40\x41\x42\x43\x44\x45\x46\x47"
+ "\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+ "\x7c\x5c\xb2\x40\x1b\x3d\xc3\x3c"
+ "\x19\xe7\x34\x08\x19\xe0\xf6\x9c"
+ "\x67\x8c\x3d\xb8\xe6\xf6\xa9\x1a"
+ "\x00\x96\xb0\x3b",
+ .klen = 8 + 48 + 28,
+ .klen = 8 + 32 + 28,
+ .iv = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .assoc = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .alen = 8,
@@ -216,13 +198,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x7e\xdf\xaa\xfa\x71\x31\xcd\x9f"
+ "\x84\x90\x70\x1c\x5a\xd4\xa7\x9c"
+ "\xfc\x1f\xe0\xff\x42\xf4\xfb\x00"
+ "\x80\x12\x67\x22\xf2\x4d\x9b\xbf"
+ "\xdc\x38\xd3\xaa\x12\xc0\x58\x1a"
+ "\x9a\x62\x6e\x42\x3d\x44\x63\xdd"
+ "\xee\x7e\xe3\xa3\xdf\x2a\x65\x05"
+ "\xd0\xc1\xd2\x54\x55\x35\x5c\xc7"
+ "\xb0\xb5\xb1\x36\xe0\x0b\xaf\x72",
+ .clen = 32 + 48,
+ "\x34\x06\x2b\x3d\xf1\xa8\x3d\xf1"
+ "\xa6\x5e\x5c\x1a\xdb\x0c\xb5\x1e"
+ "\x8f\xdb\xf4\xca\x7d\x09\x5e\x81"
+ "\xdb\x32\x07\x4a\x1d\x1c\x6d\x83",
+ .clen = 32 + 32,
+ }, { /* RFC 3686 Case 7 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -236,14 +216,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x77\x6b\xef\xf2\x85\x1d\xb0\x6f"
+ "\x4c\x8a\x05\x42\xc8\x69\x6f\x6c"
+ "\x6a\x81\xaf\x1e\xec\x96\xb4\xd3"
+ "\x7f\xc1\xd6\x89\xe6\xc1\xc1\x04"
+ "\x00\x00\x00\x60",
+ .klen = 8 + 48 + 36,
+ .klen = 8 + 32 + 36,
+ .iv = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .assoc = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .alen = 8,
@@ -251,13 +229,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\x14\x5a\xd0\x1d\xbf\x82\x4e\xc7"
+ "\x56\x08\x63\xdc\x71\xe3\xe0\xc0"
+ "\xb1\x7b\xb1\xec\xca\x94\x55\xc4"
+ "\x3f\x2b\xb1\x70\x04\x91\xf5\x9d"
+ "\x1a\xc0\xe1\x2a\x93\x5f\x96\x2a"
+ "\x12\x85\x38\x36\xe1\xb2\xe9\xf0"
+ "\xf2\x6e\x5d\x81\xcc\x49\x07\x9c"
+ "\x5b\x88\xc8\xcc\xc4\x21\x4f\x32",
+ .clen = 16 + 48,
+ "\xc3\xb4\x5f\xb0\xbf\xf5\x1b\xff"
+ "\x7c\xf1\x79\x00\x63\x50\xdd\x77"
+ "\xc0\x4a\xba\xcd\xdc\x47\x05\x2a"
+ "\x5d\x85\x2d\x83\x44\xca\x79\x2c",
+ .clen = 16 + 32,
+ }, { /* RFC 3686 Case 8 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -271,14 +247,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x40\x41\x42\x43\x44\x45\x46\x47"
+ "\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+ "\xf6\xd6\x6d\x6b\xd5\x2d\x59\xbb"
+ "\x07\x96\x36\x58\x79\xef\xf8\x86"
+ "\xc6\x6d\xd5\x1a\x5b\x6a\x99\x74"
+ "\x4b\x50\x59\x0c\x87\xa2\x38\x84"
+ "\x00\xfa\xac\x24",
+ .klen = 8 + 48 + 36,
+ .klen = 8 + 32 + 36,
+ .iv = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .assoc = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .alen = 8,
@@ -291,16 +265,14 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x49\xee\x00\x0b\x80\x4e\xb2\xa9"
+ "\xb8\x30\x6b\x50\x8f\x83\x9d\x6a"
+ "\x55\x30\x83\x1d\x93\x44\xaf\x1c"
+ "\xd6\x96\xbb\x12\x39\xc4\x4d\xe2"
+ "\x4c\x02\xe7\x1f\xdc\xb2\xb1\x57"
+ "\x38\x0d\xdd\x13\xb3\x89\x57\x9e"
+ "\x1f\xb5\x48\x32\xc4\xd3\x9d\x1f"
+ "\x68\xab\x8d\xc6\xa8\x05\x3a\xc2"
+ "\x87\xaf\x23\xb3\xe4\x1b\xde\xb3",
+ .clen = 32 + 48,
+ "\xc8\x59\x5d\xe1\xba\xac\x13\x82"
+ "\xfd\x21\x7c\x8c\x23\x31\x04\x02"
+ "\x9e\x69\x5b\x57\xa8\x13\xe7\x21"
+ "\x60\x0c\x24\xc2\x80\x4a\x93\x6e",
+ .clen = 32 + 32,
+ },
+};
+
static const struct aead_testvec hmac_sha512_aes_cbc_tv_temp[] = {
static const struct aead_testvec hmac_sha384_aes_cbc_tv_temp[] = {
{ /* RFC 3602 Case 1 */
#ifdef __LITTLE_ENDIAN
target/linux/generic/backport-6.18/919-v7.1-crypto-testmgr-Add-test-vectors-for-authenc-hmac-sha.patch
+74 -102
View File
@@ -1,11 +1,11 @@
From 07f1bc80c478c7198065d3896ed3685428314a9c Mon Sep 17 00:00:00 2001
From 2f0814271715f974ae1fc6247c9918906c83e24b Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Thu, 5 Mar 2026 21:08:24 +0100
Subject: [PATCH 5/5] crypto: testmgr - Add test vectors for
authenc(hmac(sha512),rfc3686(ctr(aes)))
Date: Thu, 5 Mar 2026 21:08:23 +0100
Subject: [PATCH 4/5] crypto: testmgr - Add test vectors for
authenc(hmac(sha384),rfc3686(ctr(aes)))
Test vectors were generated starting from existing RFC3686(CTR(AES)) test
vectors and adding HMAC(SHA512) computed with software implementation.
vectors and adding HMAC(SHA384) computed with software implementation.
Then, the results were double-checked on Mediatek MT7986 (safexcel).
Platform pass self-tests.
@@ -13,32 +13,32 @@ Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
crypto/testmgr.c | 6 +-
crypto/testmgr.h | 291 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 296 insertions(+), 1 deletion(-)
crypto/testmgr.h | 263 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 268 insertions(+), 1 deletion(-)
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -4376,8 +4376,12 @@ static const struct alg_test_desc alg_te
.fips_allowed = 1,
@@ -4342,8 +4342,12 @@ static const struct alg_test_desc alg_te
}
}, {
.alg = "authenc(hmac(sha512),rfc3686(ctr(aes)))",
.alg = "authenc(hmac(sha384),rfc3686(ctr(aes)))",
- .test = alg_test_null,
+ .generic_driver = "authenc(hmac-sha512-lib,rfc3686(ctr(aes-lib)))",
+ .generic_driver = "authenc(hmac-sha384-lib,rfc3686(ctr(aes-lib)))",
+ .test = alg_test_aead,
.fips_allowed = 1,
+ .suite = {
+ .aead = __VECS(hmac_sha512_aes_ctr_rfc3686_tv_temp)
+ .aead = __VECS(hmac_sha384_aes_ctr_rfc3686_tv_temp)
+ }
}, {
.alg = "blake2b-160",
.test = alg_test_hash,
.alg = "authenc(hmac(sha512),cbc(aes))",
.generic_driver = "authenc(hmac-sha512-lib,cbc(aes-generic))",
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -18412,6 +18412,297 @@ static const struct aead_testvec hmac_md
@@ -17873,6 +17873,269 @@ static const struct aead_testvec hmac_sh
},
};
+static const struct aead_testvec hmac_sha512_aes_ctr_rfc3686_tv_temp[] = {
+static const struct aead_testvec hmac_sha384_aes_ctr_rfc3686_tv_temp[] = {
+ { /* RFC 3686 Case 1 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -54,12 +54,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\xae\x68\x52\xf8\x12\x10\x67\xcc"
+ "\x4b\xf7\xa5\x76\x55\x77\xf3\x9e"
+ "\x00\x00\x00\x30",
+ .klen = 8 + 64 + 20,
+ .klen = 8 + 48 + 20,
+ .iv = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .assoc = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .alen = 8,
@@ -67,15 +65,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\xe4\x09\x5d\x4f\xb7\xa7\xb3\x79"
+ "\x2d\x61\x75\xa3\x26\x13\x11\xb8"
+ "\xa4\x45\x3a\x44\x9c\xe5\x1c\xd9"
+ "\x10\x43\x51\x2e\x76\x5e\xf8\x9d"
+ "\x03\x12\x1a\x31\x00\x33\x10\xb4"
+ "\x94\x4b\x70\x84\x6c\xda\xb1\x46"
+ "\x24\xb6\x3b\x2a\xec\xd5\x67\xb8"
+ "\x65\xa2\xbd\xac\x18\xe2\xf8\x55"
+ "\xc6\x91\xb0\x92\x84\x2d\x74\x44"
+ "\xa7\xee\xc3\x44\xa0\x07\x0e\x62",
+ .clen = 16 + 64,
+ "\x45\x51\x59\x72\x16\xd3\xc6\x15"
+ "\x25\x1e\xe8\x92\x2e\x47\x52\xcc"
+ "\x91\x9c\x24\xef\x11\xb2\x53\x00"
+ "\x10\x20\x43\x06\xe2\x35\x88\x9e"
+ "\x18\x32\x5a\x79\x7d\x73\x7e\x89"
+ "\xfe\xa1\xda\xa4\x86\xc4\x2a\x04",
+ .clen = 16 + 48,
+ }, { /* RFC 3686 Case 2 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -91,12 +87,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x40\x41\x42\x43\x44\x45\x46\x47"
+ "\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+ "\x50\x51\x52\x53\x54\x55\x56\x57"
+ "\x58\x59\x5a\x5b\x5c\x5d\x5e\x5f"
+ "\x7e\x24\x06\x78\x17\xfa\xe0\xd7"
+ "\x43\xd6\xce\x1f\x32\x53\x91\x63"
+ "\x00\x6c\xb6\xdb",
+ .klen = 8 + 64 + 20,
+ .klen = 8 + 48 + 20,
+ .iv = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .assoc = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .alen = 8,
@@ -109,15 +103,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x79\x0d\x41\xee\x8e\xda\xd3\x88"
+ "\xeb\x2e\x1e\xfc\x46\xda\x57\xc8"
+ "\xfc\xe6\x30\xdf\x91\x41\xbe\x28"
+ "\xec\x67\x0d\xb3\xbd\x98\x13\x01"
+ "\x2b\x04\x9b\xe6\x06\x67\x3c\x76"
+ "\xcd\x41\xb7\xcc\x70\x6c\x7f\xc8"
+ "\x67\xbd\x22\x39\xb2\xaa\xe8\x88"
+ "\xe0\x4f\x81\x52\xdf\xc9\xc3\xd6"
+ "\x44\xf4\x66\x33\x87\x64\x61\x02"
+ "\x02\xa2\x64\x15\x2b\xe9\x0b\x3d"
+ "\x4c\xea\xa1\xa5\xa7\xc9\xd3\x1b",
+ .clen = 32 + 64,
+ "\x83\x65\x32\x1e\x6b\x60\xe6\x4a"
+ "\xe2\xab\x52\x2b\xa6\x70\x3a\xfa"
+ "\xd2\xec\x83\xe4\x31\x0c\x28\x40"
+ "\x9b\x5e\x18\xa4\xdc\x48\xb8\x56"
+ "\x33\xab\x7f\x2b\xaf\xe4\x3a\xe3"
+ "\x8a\x61\xf6\x22\xb4\x6b\xfe\x7d",
+ .clen = 32 + 48,
+ }, { /* RFC 3686 Case 3 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -133,12 +125,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\x44\x55\x66\x77\x88\x99\xaa\xbb"
+ "\xcc\xdd\xee\xff\x11\x22\x33\x44"
+ "\x76\x91\xbe\x03\x5e\x50\x20\xa8"
+ "\xac\x6e\x61\x85\x29\xf9\xa0\xdc"
+ "\x00\xe0\x01\x7b",
+ .klen = 8 + 64 + 20,
+ .klen = 8 + 48 + 20,
+ .iv = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .assoc = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .alen = 8,
@@ -153,15 +143,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x45\x40\xa4\x2b\xde\x6d\x78\x36"
+ "\xd5\x9a\x5c\xea\xae\xf3\x10\x53"
+ "\x25\xb2\x07\x2f"
+ "\x6f\x90\xb6\xa3\x35\x43\x59\xff"
+ "\x1e\x32\xd6\xfe\xfa\x33\xf9\xf0"
+ "\x31\x2f\x03\x2d\x88\x1d\xab\xbf"
+ "\x0e\x19\x16\xd9\xf3\x98\x3e\xdd"
+ "\x0c\xec\xfe\xe8\x89\x13\x91\x15"
+ "\xf6\x61\x65\x5c\x1b\x7d\xde\xc0"
+ "\xe4\xba\x6d\x27\xe2\x89\x23\x24"
+ "\x15\x82\x37\x3d\x48\xd3\xc9\x32",
+ .clen = 36 + 64,
+ "\x4a\xaa\xad\x3b\x3b\xb6\x9a\xba"
+ "\xa1\x7b\xc6\xce\x96\xc3\xff\x67"
+ "\xf3\x0c\x33\x57\xf0\x51\x24\x08"
+ "\xed\x4f\x6a\x9c\x22\x42\xbd\x18"
+ "\x97\x74\x68\x36\x00\xf1\x69\x3a"
+ "\x18\x77\x40\xf0\x56\xba\xba\xe0",
+ .clen = 36 + 48,
+ }, { /* RFC 3686 Case 4 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -177,13 +165,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x16\xaf\x5b\x14\x5f\xc9\xf5\x79"
+ "\xc1\x75\xf9\x3e\x3b\xfb\x0e\xed"
+ "\x86\x3d\x06\xcc\xfd\xb7\x85\x15"
+ "\x00\x00\x00\x48",
+ .klen = 8 + 64 + 28,
+ .klen = 8 + 48 + 28,
+ .iv = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .assoc = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .alen = 8,
@@ -191,15 +177,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\x4b\x55\x38\x4f\xe2\x59\xc9\xc8"
+ "\x4e\x79\x35\xa0\x03\xcb\xe9\x28"
+ "\x25\xea\xdc\xad\x52\xb8\x0f\x70"
+ "\xe7\x39\x83\x80\x10\x3f\x18\xc4"
+ "\xf8\x59\x14\x25\x5f\xba\x20\x87"
+ "\x0b\x04\x5e\xf7\xde\x41\x39\xff"
+ "\xa2\xee\x84\x3f\x9d\x38\xfd\x17"
+ "\xc0\x66\x5e\x74\x39\xe3\xd3\xd7"
+ "\x3d\xbc\xe3\x99\x2f\xe7\xef\x37"
+ "\x61\x03\xf3\x9e\x01\xaf\xba\x9d",
+ .clen = 16 + 64,
+ "\x36\xd6\xc7\x55\xac\xb6\x0b\x14"
+ "\x95\x71\xf9\x86\x30\xe3\x96\xc3"
+ "\x76\x85\x6d\xa5\x06\xed\x6f\x34"
+ "\xcc\x1f\xcc\x2d\x88\x06\xb0\x1d"
+ "\xbe\xd9\xa2\xd3\x64\xf1\x33\x03"
+ "\x13\x50\x8f\xae\x61\x2d\x82\xb8",
+ .clen = 16 + 48,
+ }, { /* RFC 3686 Case 5 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -215,13 +199,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x40\x41\x42\x43\x44\x45\x46\x47"
+ "\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+ "\x50\x51\x52\x53\x54\x55\x56\x57"
+ "\x58\x59\x5a\x5b\x5c\x5d\x5e\x5f"
+ "\x7c\x5c\xb2\x40\x1b\x3d\xc3\x3c"
+ "\x19\xe7\x34\x08\x19\xe0\xf6\x9c"
+ "\x67\x8c\x3d\xb8\xe6\xf6\xa9\x1a"
+ "\x00\x96\xb0\x3b",
+ .klen = 8 + 64 + 28,
+ .klen = 8 + 48 + 28,
+ .iv = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .assoc = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .alen = 8,
@@ -234,15 +216,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x7e\xdf\xaa\xfa\x71\x31\xcd\x9f"
+ "\x84\x90\x70\x1c\x5a\xd4\xa7\x9c"
+ "\xfc\x1f\xe0\xff\x42\xf4\xfb\x00"
+ "\x51\xa3\xe6\x1d\x23\x7d\xd1\x18"
+ "\x55\x9c\x1c\x92\x2b\xc2\xcd\xfe"
+ "\x8a\xa8\xa5\x96\x65\x2e\x9d\xdb"
+ "\x06\xd2\x1c\x57\x2b\x76\xb5\x9c"
+ "\xd4\x3e\x8b\x61\x54\x2d\x08\xe5"
+ "\xb2\xf8\x88\x20\x0c\xad\xe8\x85"
+ "\x61\x8e\x5c\xa4\x96\x2c\xe2\x7d"
+ "\x4f\xb6\x1d\xb2\x8c\xd7\xe3\x38",
+ .clen = 32 + 64,
+ "\x80\x12\x67\x22\xf2\x4d\x9b\xbf"
+ "\xdc\x38\xd3\xaa\x12\xc0\x58\x1a"
+ "\x9a\x62\x6e\x42\x3d\x44\x63\xdd"
+ "\xee\x7e\xe3\xa3\xdf\x2a\x65\x05"
+ "\xd0\xc1\xd2\x54\x55\x35\x5c\xc7"
+ "\xb0\xb5\xb1\x36\xe0\x0b\xaf\x72",
+ .clen = 32 + 48,
+ }, { /* RFC 3686 Case 7 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -258,14 +238,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x77\x6b\xef\xf2\x85\x1d\xb0\x6f"
+ "\x4c\x8a\x05\x42\xc8\x69\x6f\x6c"
+ "\x6a\x81\xaf\x1e\xec\x96\xb4\xd3"
+ "\x7f\xc1\xd6\x89\xe6\xc1\xc1\x04"
+ "\x00\x00\x00\x60",
+ .klen = 8 + 64 + 36,
+ .klen = 8 + 48 + 36,
+ .iv = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .assoc = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .alen = 8,
@@ -273,15 +251,13 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\x14\x5a\xd0\x1d\xbf\x82\x4e\xc7"
+ "\x56\x08\x63\xdc\x71\xe3\xe0\xc0"
+ "\x6b\x68\x0b\x99\x9a\x4d\xc8\xb9"
+ "\x35\xea\xcd\x56\x3f\x40\xa2\xb6"
+ "\x68\xda\x59\xd8\xa0\x89\xcd\x52"
+ "\xb1\x6e\xed\xc1\x42\x10\xa5\x0f"
+ "\x88\x0b\x80\xce\xc4\x67\xf0\x45"
+ "\x5d\xb2\x9e\xde\x1c\x79\x52\x0d"
+ "\xff\x75\x36\xd5\x0f\x52\x8e\xe5"
+ "\x31\x85\xcf\x1d\x31\xf8\x62\x67",
+ .clen = 16 + 64,
+ "\xb1\x7b\xb1\xec\xca\x94\x55\xc4"
+ "\x3f\x2b\xb1\x70\x04\x91\xf5\x9d"
+ "\x1a\xc0\xe1\x2a\x93\x5f\x96\x2a"
+ "\x12\x85\x38\x36\xe1\xb2\xe9\xf0"
+ "\xf2\x6e\x5d\x81\xcc\x49\x07\x9c"
+ "\x5b\x88\xc8\xcc\xc4\x21\x4f\x32",
+ .clen = 16 + 48,
+ }, { /* RFC 3686 Case 8 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -297,14 +273,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x40\x41\x42\x43\x44\x45\x46\x47"
+ "\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+ "\x50\x51\x52\x53\x54\x55\x56\x57"
+ "\x58\x59\x5a\x5b\x5c\x5d\x5e\x5f"
+ "\xf6\xd6\x6d\x6b\xd5\x2d\x59\xbb"
+ "\x07\x96\x36\x58\x79\xef\xf8\x86"
+ "\xc6\x6d\xd5\x1a\x5b\x6a\x99\x74"
+ "\x4b\x50\x59\x0c\x87\xa2\x38\x84"
+ "\x00\xfa\xac\x24",
+ .klen = 8 + 64 + 36,
+ .klen = 8 + 48 + 36,
+ .iv = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .assoc = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .alen = 8,
@@ -317,18 +291,16 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x49\xee\x00\x0b\x80\x4e\xb2\xa9"
+ "\xb8\x30\x6b\x50\x8f\x83\x9d\x6a"
+ "\x55\x30\x83\x1d\x93\x44\xaf\x1c"
+ "\x9a\xac\x38\xbd\xf3\xcf\xd5\xd0"
+ "\x09\x07\xa6\xe1\x7f\xd6\x79\x98"
+ "\x4e\x90\x0e\xc0\x3d\xa0\xf2\x12"
+ "\x52\x79\x9c\x17\xff\xb9\xb8\xe3"
+ "\x2f\x31\xcb\xbd\x63\x70\x72\x7b"
+ "\x4e\x1e\xd1\xde\xb5\x6b\x7d\x54"
+ "\x68\x56\xdd\xe5\x53\xee\x29\xd2"
+ "\x85\xa1\x73\x61\x00\xa9\x26\x8f",
+ .clen = 32 + 64,
+ "\xd6\x96\xbb\x12\x39\xc4\x4d\xe2"
+ "\x4c\x02\xe7\x1f\xdc\xb2\xb1\x57"
+ "\x38\x0d\xdd\x13\xb3\x89\x57\x9e"
+ "\x1f\xb5\x48\x32\xc4\xd3\x9d\x1f"
+ "\x68\xab\x8d\xc6\xa8\x05\x3a\xc2"
+ "\x87\xaf\x23\xb3\xe4\x1b\xde\xb3",
+ .clen = 32 + 48,
+ },
+};
+
static const struct aead_testvec hmac_sha1_des_cbc_tv_temp[] = {
{ /*Generated with cryptopp*/
static const struct aead_testvec hmac_sha512_aes_cbc_tv_temp[] = {
{ /* RFC 3602 Case 1 */
#ifdef __LITTLE_ENDIAN
target/linux/generic/backport-6.18/920-v7.1-crypto-testmgr-Add-test-vectors-for-authenc-hmac-sha.patch
+334
View File
@@ -0,0 +1,334 @@
From 82fc2b17fa5b9b12d34770afcc8e3c4288735429 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Thu, 5 Mar 2026 21:08:24 +0100
Subject: [PATCH 5/5] crypto: testmgr - Add test vectors for
authenc(hmac(sha512),rfc3686(ctr(aes)))
Test vectors were generated starting from existing RFC3686(CTR(AES)) test
vectors and adding HMAC(SHA512) computed with software implementation.
Then, the results were double-checked on Mediatek MT7986 (safexcel).
Platform pass self-tests.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
crypto/testmgr.c | 6 +-
crypto/testmgr.h | 291 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 296 insertions(+), 1 deletion(-)
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -4376,8 +4376,12 @@ static const struct alg_test_desc alg_te
.fips_allowed = 1,
}, {
.alg = "authenc(hmac(sha512),rfc3686(ctr(aes)))",
- .test = alg_test_null,
+ .generic_driver = "authenc(hmac-sha512-lib,rfc3686(ctr(aes-lib)))",
+ .test = alg_test_aead,
.fips_allowed = 1,
+ .suite = {
+ .aead = __VECS(hmac_sha512_aes_ctr_rfc3686_tv_temp)
+ }
}, {
.alg = "blake2b-160",
.test = alg_test_hash,
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -18532,6 +18532,297 @@ static const struct aead_testvec hmac_md
},
};
+static const struct aead_testvec hmac_sha512_aes_ctr_rfc3686_tv_temp[] = {
+ { /* RFC 3686 Case 1 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
+ "\x01\x00" /* rta type */
+#else
+ .key = "\x00\x08" /* rta length */
+ "\x00\x01" /* rta type */
+#endif
+ "\x00\x00\x00\x14" /* enc key length */
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\xae\x68\x52\xf8\x12\x10\x67\xcc"
+ "\x4b\xf7\xa5\x76\x55\x77\xf3\x9e"
+ "\x00\x00\x00\x30",
+ .klen = 8 + 64 + 20,
+ .iv = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .assoc = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .alen = 8,
+ .ptext = "Single block msg",
+ .plen = 16,
+ .ctext = "\xe4\x09\x5d\x4f\xb7\xa7\xb3\x79"
+ "\x2d\x61\x75\xa3\x26\x13\x11\xb8"
+ "\xa4\x45\x3a\x44\x9c\xe5\x1c\xd9"
+ "\x10\x43\x51\x2e\x76\x5e\xf8\x9d"
+ "\x03\x12\x1a\x31\x00\x33\x10\xb4"
+ "\x94\x4b\x70\x84\x6c\xda\xb1\x46"
+ "\x24\xb6\x3b\x2a\xec\xd5\x67\xb8"
+ "\x65\xa2\xbd\xac\x18\xe2\xf8\x55"
+ "\xc6\x91\xb0\x92\x84\x2d\x74\x44"
+ "\xa7\xee\xc3\x44\xa0\x07\x0e\x62",
+ .clen = 16 + 64,
+ }, { /* RFC 3686 Case 2 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
+ "\x01\x00" /* rta type */
+#else
+ .key = "\x00\x08" /* rta length */
+ "\x00\x01" /* rta type */
+#endif
+ "\x00\x00\x00\x14" /* enc key length */
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x40\x41\x42\x43\x44\x45\x46\x47"
+ "\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+ "\x50\x51\x52\x53\x54\x55\x56\x57"
+ "\x58\x59\x5a\x5b\x5c\x5d\x5e\x5f"
+ "\x7e\x24\x06\x78\x17\xfa\xe0\xd7"
+ "\x43\xd6\xce\x1f\x32\x53\x91\x63"
+ "\x00\x6c\xb6\xdb",
+ .klen = 8 + 64 + 20,
+ .iv = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .assoc = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .alen = 8,
+ .ptext = "\x00\x01\x02\x03\x04\x05\x06\x07"
+ "\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f"
+ "\x10\x11\x12\x13\x14\x15\x16\x17"
+ "\x18\x19\x1a\x1b\x1c\x1d\x1e\x1f",
+ .plen = 32,
+ .ctext = "\x51\x04\xa1\x06\x16\x8a\x72\xd9"
+ "\x79\x0d\x41\xee\x8e\xda\xd3\x88"
+ "\xeb\x2e\x1e\xfc\x46\xda\x57\xc8"
+ "\xfc\xe6\x30\xdf\x91\x41\xbe\x28"
+ "\xec\x67\x0d\xb3\xbd\x98\x13\x01"
+ "\x2b\x04\x9b\xe6\x06\x67\x3c\x76"
+ "\xcd\x41\xb7\xcc\x70\x6c\x7f\xc8"
+ "\x67\xbd\x22\x39\xb2\xaa\xe8\x88"
+ "\xe0\x4f\x81\x52\xdf\xc9\xc3\xd6"
+ "\x44\xf4\x66\x33\x87\x64\x61\x02"
+ "\x02\xa2\x64\x15\x2b\xe9\x0b\x3d"
+ "\x4c\xea\xa1\xa5\xa7\xc9\xd3\x1b",
+ .clen = 32 + 64,
+ }, { /* RFC 3686 Case 3 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
+ "\x01\x00" /* rta type */
+#else
+ .key = "\x00\x08" /* rta length */
+ "\x00\x01" /* rta type */
+#endif
+ "\x00\x00\x00\x14" /* enc key length */
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55\x66\x77\x88\x99"
+ "\xaa\xbb\xcc\xdd\xee\xff\x11\x22"
+ "\x33\x44\x55\x66\x77\x88\x99\xaa"
+ "\xbb\xcc\xdd\xee\xff\x11\x22\x33"
+ "\x44\x55\x66\x77\x88\x99\xaa\xbb"
+ "\xcc\xdd\xee\xff\x11\x22\x33\x44"
+ "\x76\x91\xbe\x03\x5e\x50\x20\xa8"
+ "\xac\x6e\x61\x85\x29\xf9\xa0\xdc"
+ "\x00\xe0\x01\x7b",
+ .klen = 8 + 64 + 20,
+ .iv = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .assoc = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .alen = 8,
+ .ptext = "\x00\x01\x02\x03\x04\x05\x06\x07"
+ "\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f"
+ "\x10\x11\x12\x13\x14\x15\x16\x17"
+ "\x18\x19\x1a\x1b\x1c\x1d\x1e\x1f"
+ "\x20\x21\x22\x23",
+ .plen = 36,
+ .ctext = "\xc1\xcf\x48\xa8\x9f\x2f\xfd\xd9"
+ "\xcf\x46\x52\xe9\xef\xdb\x72\xd7"
+ "\x45\x40\xa4\x2b\xde\x6d\x78\x36"
+ "\xd5\x9a\x5c\xea\xae\xf3\x10\x53"
+ "\x25\xb2\x07\x2f"
+ "\x6f\x90\xb6\xa3\x35\x43\x59\xff"
+ "\x1e\x32\xd6\xfe\xfa\x33\xf9\xf0"
+ "\x31\x2f\x03\x2d\x88\x1d\xab\xbf"
+ "\x0e\x19\x16\xd9\xf3\x98\x3e\xdd"
+ "\x0c\xec\xfe\xe8\x89\x13\x91\x15"
+ "\xf6\x61\x65\x5c\x1b\x7d\xde\xc0"
+ "\xe4\xba\x6d\x27\xe2\x89\x23\x24"
+ "\x15\x82\x37\x3d\x48\xd3\xc9\x32",
+ .clen = 36 + 64,
+ }, { /* RFC 3686 Case 4 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
+ "\x01\x00" /* rta type */
+#else
+ .key = "\x00\x08" /* rta length */
+ "\x00\x01" /* rta type */
+#endif
+ "\x00\x00\x00\x1c" /* enc key length */
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x16\xaf\x5b\x14\x5f\xc9\xf5\x79"
+ "\xc1\x75\xf9\x3e\x3b\xfb\x0e\xed"
+ "\x86\x3d\x06\xcc\xfd\xb7\x85\x15"
+ "\x00\x00\x00\x48",
+ .klen = 8 + 64 + 28,
+ .iv = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .assoc = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .alen = 8,
+ .ptext = "Single block msg",
+ .plen = 16,
+ .ctext = "\x4b\x55\x38\x4f\xe2\x59\xc9\xc8"
+ "\x4e\x79\x35\xa0\x03\xcb\xe9\x28"
+ "\x25\xea\xdc\xad\x52\xb8\x0f\x70"
+ "\xe7\x39\x83\x80\x10\x3f\x18\xc4"
+ "\xf8\x59\x14\x25\x5f\xba\x20\x87"
+ "\x0b\x04\x5e\xf7\xde\x41\x39\xff"
+ "\xa2\xee\x84\x3f\x9d\x38\xfd\x17"
+ "\xc0\x66\x5e\x74\x39\xe3\xd3\xd7"
+ "\x3d\xbc\xe3\x99\x2f\xe7\xef\x37"
+ "\x61\x03\xf3\x9e\x01\xaf\xba\x9d",
+ .clen = 16 + 64,
+ }, { /* RFC 3686 Case 5 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
+ "\x01\x00" /* rta type */
+#else
+ .key = "\x00\x08" /* rta length */
+ "\x00\x01" /* rta type */
+#endif
+ "\x00\x00\x00\x1c" /* enc key length */
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x40\x41\x42\x43\x44\x45\x46\x47"
+ "\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+ "\x50\x51\x52\x53\x54\x55\x56\x57"
+ "\x58\x59\x5a\x5b\x5c\x5d\x5e\x5f"
+ "\x7c\x5c\xb2\x40\x1b\x3d\xc3\x3c"
+ "\x19\xe7\x34\x08\x19\xe0\xf6\x9c"
+ "\x67\x8c\x3d\xb8\xe6\xf6\xa9\x1a"
+ "\x00\x96\xb0\x3b",
+ .klen = 8 + 64 + 28,
+ .iv = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .assoc = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .alen = 8,
+ .ptext = "\x00\x01\x02\x03\x04\x05\x06\x07"
+ "\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f"
+ "\x10\x11\x12\x13\x14\x15\x16\x17"
+ "\x18\x19\x1a\x1b\x1c\x1d\x1e\x1f",
+ .plen = 32,
+ .ctext = "\x45\x32\x43\xfc\x60\x9b\x23\x32"
+ "\x7e\xdf\xaa\xfa\x71\x31\xcd\x9f"
+ "\x84\x90\x70\x1c\x5a\xd4\xa7\x9c"
+ "\xfc\x1f\xe0\xff\x42\xf4\xfb\x00"
+ "\x51\xa3\xe6\x1d\x23\x7d\xd1\x18"
+ "\x55\x9c\x1c\x92\x2b\xc2\xcd\xfe"
+ "\x8a\xa8\xa5\x96\x65\x2e\x9d\xdb"
+ "\x06\xd2\x1c\x57\x2b\x76\xb5\x9c"
+ "\xd4\x3e\x8b\x61\x54\x2d\x08\xe5"
+ "\xb2\xf8\x88\x20\x0c\xad\xe8\x85"
+ "\x61\x8e\x5c\xa4\x96\x2c\xe2\x7d"
+ "\x4f\xb6\x1d\xb2\x8c\xd7\xe3\x38",
+ .clen = 32 + 64,
+ }, { /* RFC 3686 Case 7 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
+ "\x01\x00" /* rta type */
+#else
+ .key = "\x00\x08" /* rta length */
+ "\x00\x01" /* rta type */
+#endif
+ "\x00\x00\x00\x24" /* enc key length */
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x77\x6b\xef\xf2\x85\x1d\xb0\x6f"
+ "\x4c\x8a\x05\x42\xc8\x69\x6f\x6c"
+ "\x6a\x81\xaf\x1e\xec\x96\xb4\xd3"
+ "\x7f\xc1\xd6\x89\xe6\xc1\xc1\x04"
+ "\x00\x00\x00\x60",
+ .klen = 8 + 64 + 36,
+ .iv = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .assoc = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .alen = 8,
+ .ptext = "Single block msg",
+ .plen = 16,
+ .ctext = "\x14\x5a\xd0\x1d\xbf\x82\x4e\xc7"
+ "\x56\x08\x63\xdc\x71\xe3\xe0\xc0"
+ "\x6b\x68\x0b\x99\x9a\x4d\xc8\xb9"
+ "\x35\xea\xcd\x56\x3f\x40\xa2\xb6"
+ "\x68\xda\x59\xd8\xa0\x89\xcd\x52"
+ "\xb1\x6e\xed\xc1\x42\x10\xa5\x0f"
+ "\x88\x0b\x80\xce\xc4\x67\xf0\x45"
+ "\x5d\xb2\x9e\xde\x1c\x79\x52\x0d"
+ "\xff\x75\x36\xd5\x0f\x52\x8e\xe5"
+ "\x31\x85\xcf\x1d\x31\xf8\x62\x67",
+ .clen = 16 + 64,
+ }, { /* RFC 3686 Case 8 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
+ "\x01\x00" /* rta type */
+#else
+ .key = "\x00\x08" /* rta length */
+ "\x00\x01" /* rta type */
+#endif
+ "\x00\x00\x00\x24" /* enc key length */
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33\x34\x35\x36\x37"
+ "\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+ "\x40\x41\x42\x43\x44\x45\x46\x47"
+ "\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+ "\x50\x51\x52\x53\x54\x55\x56\x57"
+ "\x58\x59\x5a\x5b\x5c\x5d\x5e\x5f"
+ "\xf6\xd6\x6d\x6b\xd5\x2d\x59\xbb"
+ "\x07\x96\x36\x58\x79\xef\xf8\x86"
+ "\xc6\x6d\xd5\x1a\x5b\x6a\x99\x74"
+ "\x4b\x50\x59\x0c\x87\xa2\x38\x84"
+ "\x00\xfa\xac\x24",
+ .klen = 8 + 64 + 36,
+ .iv = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .assoc = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .alen = 8,
+ .ptext = "\x00\x01\x02\x03\x04\x05\x06\x07"
+ "\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f"
+ "\x10\x11\x12\x13\x14\x15\x16\x17"
+ "\x18\x19\x1a\x1b\x1c\x1d\x1e\x1f",
+ .plen = 32,
+ .ctext = "\xf0\x5e\x23\x1b\x38\x94\x61\x2c"
+ "\x49\xee\x00\x0b\x80\x4e\xb2\xa9"
+ "\xb8\x30\x6b\x50\x8f\x83\x9d\x6a"
+ "\x55\x30\x83\x1d\x93\x44\xaf\x1c"
+ "\x9a\xac\x38\xbd\xf3\xcf\xd5\xd0"
+ "\x09\x07\xa6\xe1\x7f\xd6\x79\x98"
+ "\x4e\x90\x0e\xc0\x3d\xa0\xf2\x12"
+ "\x52\x79\x9c\x17\xff\xb9\xb8\xe3"
+ "\x2f\x31\xcb\xbd\x63\x70\x72\x7b"
+ "\x4e\x1e\xd1\xde\xb5\x6b\x7d\x54"
+ "\x68\x56\xdd\xe5\x53\xee\x29\xd2"
+ "\x85\xa1\x73\x61\x00\xa9\x26\x8f",
+ .clen = 32 + 64,
+ },
+};
+
static const struct aead_testvec hmac_sha1_des_cbc_tv_temp[] = {
{ /*Generated with cryptopp*/
#ifdef __LITTLE_ENDIAN
target/linux/generic/backport-6.18/921-v7.1-crypto-tesmgr-allow-authenc-hmac-sha224-sha384-cbc-a.patch
+33
View File
@@ -0,0 +1,33 @@
From 0441ee8d35ad6998da5043c65c4124904e8daee2 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Fri, 6 Feb 2026 20:26:59 +0100
Subject: [PATCH] crypto: tesmgr - allow authenc(hmac(sha224/sha384),cbc(aes))
in fips mode
The remaining combinations of AES-CBC and SHA* have already been marked
as allowed. This commit does the same for SHA224 and SHA384.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
crypto/testmgr.c | 2 ++
1 file changed, 2 insertions(+)
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -4242,6 +4242,7 @@ static const struct alg_test_desc alg_te
.alg = "authenc(hmac(sha224),cbc(aes))",
.generic_driver = "authenc(hmac-sha224-lib,cbc(aes-generic))",
.test = alg_test_aead,
+ .fips_allowed = 1,
.suite = {
.aead = __VECS(hmac_sha224_aes_cbc_tv_temp)
}
@@ -4312,6 +4313,7 @@ static const struct alg_test_desc alg_te
.alg = "authenc(hmac(sha384),cbc(aes))",
.generic_driver = "authenc(hmac-sha384-lib,cbc(aes-generic))",
.test = alg_test_aead,
+ .fips_allowed = 1,
.suite = {
.aead = __VECS(hmac_sha384_aes_cbc_tv_temp)
}
target/linux/generic/backport-6.12/915-v7.1-crypto-testmgr-Add-test-vectors-for-authenc-hmac-sha.patch → target/linux/generic/backport-6.18/922-v7.1-crypto-testmgr-Add-test-vectors-for-authenc-hmac-md5.patch
+49 -63
View File
@@ -1,44 +1,44 @@
From 2a2468bf33d3fac5192429207a439d23e615173a Mon Sep 17 00:00:00 2001
From d0c0a414cc1893b195b9523ecdfbeee00b98fd0d Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Thu, 5 Mar 2026 21:08:20 +0100
Subject: [PATCH 1/5] crypto: testmgr - Add test vectors for
authenc(hmac(sha1),rfc3686(ctr(aes)))
Date: Thu, 19 Mar 2026 18:11:21 +0100
Subject: [PATCH] crypto: testmgr - Add test vectors for
authenc(hmac(md5),rfc3686(ctr(aes)))
Test vectors were generated starting from existing RFC3686(CTR(AES)) test
vectors and adding HMAC(SHA1) computed with software implementation.
vectors and adding HMAC(MD5) computed with software implementation.
Then, the results were double-checked on Mediatek MT7986 (safexcel).
Platform pass self-tests.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
crypto/testmgr.c | 6 +-
crypto/testmgr.h | 221 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 226 insertions(+), 1 deletion(-)
crypto/testmgr.c | 7 ++
crypto/testmgr.h | 207 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 214 insertions(+)
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -4425,8 +4425,12 @@ static const struct alg_test_desc alg_te
@@ -4198,6 +4198,13 @@ static const struct alg_test_desc alg_te
.aead = __VECS(hmac_md5_ecb_cipher_null_tv_template)
}
}, {
.alg = "authenc(hmac(sha1),rfc3686(ctr(aes)))",
- .test = alg_test_null,
+ .generic_driver = "authenc(hmac-sha1-lib,rfc3686(ctr(aes-lib)))",
+ .alg = "authenc(hmac(md5),rfc3686(ctr(aes)))",
+ .generic_driver = "authenc(hmac-md5-lib,rfc3686(ctr(aes-lib)))",
+ .test = alg_test_aead,
.fips_allowed = 1,
+ .suite = {
+ .aead = __VECS(hmac_sha1_aes_ctr_rfc3686_tv_temp)
+ .aead = __VECS(hmac_md5_aes_ctr_rfc3686_tv_temp)
+ }
}, {
.alg = "authenc(hmac(sha224),cbc(aes))",
.generic_driver = "authenc(hmac-sha224-lib,cbc(aes-generic))",
+ }, {
.alg = "authenc(hmac(sha1),cbc(aes))",
.generic_driver = "authenc(hmac-sha1-lib,cbc(aes-generic))",
.test = alg_test_aead,
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -17444,6 +17444,227 @@ static const struct aead_testvec hmac_sh
@@ -19136,6 +19136,213 @@ static const struct aead_testvec hmac_sh
},
};
+static const struct aead_testvec hmac_sha1_aes_ctr_rfc3686_tv_temp[] = {
+static const struct aead_testvec hmac_md5_aes_ctr_rfc3686_tv_temp[] = {
+ { /* RFC 3686 Case 1 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -50,11 +50,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x14" /* enc key length */
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00"
+ "\xae\x68\x52\xf8\x12\x10\x67\xcc"
+ "\x4b\xf7\xa5\x76\x55\x77\xf3\x9e"
+ "\x00\x00\x00\x30",
+ .klen = 8 + 20 + 20,
+ .klen = 8 + 16 + 20,
+ .iv = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .assoc = "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .alen = 8,
@@ -62,10 +61,9 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\xe4\x09\x5d\x4f\xb7\xa7\xb3\x79"
+ "\x2d\x61\x75\xa3\x26\x13\x11\xb8"
+ "\x70\xdc\x6b\x62\x43\xa1\x2f\x08"
+ "\xf1\xec\x93\x7d\x69\xb2\x8e\x1f"
+ "\x0a\x97\x39\x86",
+ .clen = 16 + 20,
+ "\xdd\x5f\xea\x13\x2a\xf2\xb0\xf1"
+ "\x91\x79\x46\x40\x62\x6c\x87\x5b",
+ .clen = 16 + 16,
+ }, { /* RFC 3686 Case 2 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -77,11 +75,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x14" /* enc key length */
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33"
+ "\x7e\x24\x06\x78\x17\xfa\xe0\xd7"
+ "\x43\xd6\xce\x1f\x32\x53\x91\x63"
+ "\x00\x6c\xb6\xdb",
+ .klen = 8 + 20 + 20,
+ .klen = 8 + 16 + 20,
+ .iv = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .assoc = "\xc0\x54\x3b\x59\xda\x48\xd9\x0b",
+ .alen = 8,
@@ -94,10 +91,9 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x79\x0d\x41\xee\x8e\xda\xd3\x88"
+ "\xeb\x2e\x1e\xfc\x46\xda\x57\xc8"
+ "\xfc\xe6\x30\xdf\x91\x41\xbe\x28"
+ "\x6b\x7b\x4d\x39\x36\x1c\x12\x5f"
+ "\x72\xd2\x88\xb2\x26\xa6\xa6\xb5"
+ "\x1d\x3a\x49\xa6",
+ .clen = 32 + 20,
+ "\x03\x39\x23\xcd\x22\x5f\x1b\x8b"
+ "\x93\x70\xbc\x45\xf3\xba\xde\x2e",
+ .clen = 32 + 16,
+ }, { /* RFC 3686 Case 3 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -109,11 +105,10 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x14" /* enc key length */
+ "\x11\x22\x33\x44\x55\x66\x77\x88"
+ "\x99\xaa\xbb\xcc\xdd\xee\xff\x11"
+ "\x22\x33\x44\x55"
+ "\x76\x91\xbe\x03\x5e\x50\x20\xa8"
+ "\xac\x6e\x61\x85\x29\xf9\xa0\xdc"
+ "\x00\xe0\x01\x7b",
+ .klen = 8 + 20 + 20,
+ .klen = 8 + 16 + 20,
+ .iv = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .assoc = "\x27\x77\x7f\x3f\x4a\x17\x86\xf0",
+ .alen = 8,
@@ -128,10 +123,9 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x45\x40\xa4\x2b\xde\x6d\x78\x36"
+ "\xd5\x9a\x5c\xea\xae\xf3\x10\x53"
+ "\x25\xb2\x07\x2f"
+ "\x2c\x86\xa0\x90\x8e\xc1\x02\x1d"
+ "\x51\xdc\xd6\x21\xc7\x30\xcc\x32"
+ "\x38\x55\x47\x64",
+ .clen = 36 + 20,
+ "\xb4\x40\x0c\x7b\x4c\x55\x8a\x4b"
+ "\x04\xf7\x48\x9e\x0f\x9a\xae\x73",
+ .clen = 36 + 16,
+ }, { /* RFC 3686 Case 4 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -143,12 +137,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x1c" /* enc key length */
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00"
+ "\x16\xaf\x5b\x14\x5f\xc9\xf5\x79"
+ "\xc1\x75\xf9\x3e\x3b\xfb\x0e\xed"
+ "\x86\x3d\x06\xcc\xfd\xb7\x85\x15"
+ "\x00\x00\x00\x48",
+ .klen = 8 + 20 + 28,
+ .klen = 8 + 16 + 28,
+ .iv = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .assoc = "\x36\x73\x3c\x14\x7d\x6d\x93\xcb",
+ .alen = 8,
@@ -156,10 +149,9 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\x4b\x55\x38\x4f\xe2\x59\xc9\xc8"
+ "\x4e\x79\x35\xa0\x03\xcb\xe9\x28"
+ "\xe9\x4e\x49\xf0\x6b\x8d\x58\x2b"
+ "\x26\x7f\xf3\xab\xeb\x2f\x74\x2f"
+ "\x45\x43\x64\xc1",
+ .clen = 16 + 20,
+ "\xc4\x5d\xa1\x16\x6c\x2d\xa5\x43"
+ "\x60\x7b\x58\x98\x11\x9b\x50\x06",
+ .clen = 16 + 16,
+ }, { /* RFC 3686 Case 5 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -171,12 +163,11 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x1c" /* enc key length */
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33"
+ "\x7c\x5c\xb2\x40\x1b\x3d\xc3\x3c"
+ "\x19\xe7\x34\x08\x19\xe0\xf6\x9c"
+ "\x67\x8c\x3d\xb8\xe6\xf6\xa9\x1a"
+ "\x00\x96\xb0\x3b",
+ .klen = 8 + 20 + 28,
+ .klen = 8 + 16 + 28,
+ .iv = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .assoc = "\x02\x0c\x6e\xad\xc2\xcb\x50\x0d",
+ .alen = 8,
@@ -189,10 +180,9 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x7e\xdf\xaa\xfa\x71\x31\xcd\x9f"
+ "\x84\x90\x70\x1c\x5a\xd4\xa7\x9c"
+ "\xfc\x1f\xe0\xff\x42\xf4\xfb\x00"
+ "\xab\xc4\xfa\x6d\x20\xe1\xce\x72"
+ "\x0e\x92\x4e\x97\xaa\x4d\x30\x84"
+ "\xb6\xd8\x4d\x3b",
+ .clen = 32 + 20,
+ "\xc5\xec\x47\x33\xae\x05\x28\x49"
+ "\xd5\x2b\x08\xad\x10\x98\x24\x01",
+ .clen = 32 + 16,
+ }, { /* RFC 3686 Case 7 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -204,13 +194,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x24" /* enc key length */
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00"
+ "\x77\x6b\xef\xf2\x85\x1d\xb0\x6f"
+ "\x4c\x8a\x05\x42\xc8\x69\x6f\x6c"
+ "\x6a\x81\xaf\x1e\xec\x96\xb4\xd3"
+ "\x7f\xc1\xd6\x89\xe6\xc1\xc1\x04"
+ "\x00\x00\x00\x60",
+ .klen = 8 + 20 + 36,
+ .klen = 8 + 16 + 36,
+ .iv = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .assoc = "\xdb\x56\x72\xc9\x7a\xa8\xf0\xb2",
+ .alen = 8,
@@ -218,10 +207,9 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ .plen = 16,
+ .ctext = "\x14\x5a\xd0\x1d\xbf\x82\x4e\xc7"
+ "\x56\x08\x63\xdc\x71\xe3\xe0\xc0"
+ "\x3d\x6c\x23\x27\xda\x0e\x7f\x29"
+ "\xfd\x8d\x3c\x1b\xf7\x7a\x63\xd9"
+ "\x7e\x0f\xe9\xf6",
+ .clen = 16 + 20,
+ "\xc6\x26\xb2\x27\x0d\x21\xd4\x40"
+ "\x6c\x4f\x53\xea\x19\x75\xda\x8e",
+ .clen = 16 + 16,
+ }, { /* RFC 3686 Case 8 */
+#ifdef __LITTLE_ENDIAN
+ .key = "\x08\x00" /* rta length */
@@ -233,13 +221,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x00\x00\x00\x24" /* enc key length */
+ "\x20\x21\x22\x23\x24\x25\x26\x27"
+ "\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+ "\x30\x31\x32\x33"
+ "\xf6\xd6\x6d\x6b\xd5\x2d\x59\xbb"
+ "\x07\x96\x36\x58\x79\xef\xf8\x86"
+ "\xc6\x6d\xd5\x1a\x5b\x6a\x99\x74"
+ "\x4b\x50\x59\x0c\x87\xa2\x38\x84"
+ "\x00\xfa\xac\x24",
+ .klen = 8 + 20 + 36,
+ .klen = 8 + 16 + 36,
+ .iv = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .assoc = "\xc1\x58\x5e\xf1\x5a\x43\xd8\x75",
+ .alen = 8,
@@ -252,13 +239,12 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+ "\x49\xee\x00\x0b\x80\x4e\xb2\xa9"
+ "\xb8\x30\x6b\x50\x8f\x83\x9d\x6a"
+ "\x55\x30\x83\x1d\x93\x44\xaf\x1c"
+ "\xe7\xee\x22\xa4\xdd\xbf\x5d\x44"
+ "\x3b\x43\x1c\x69\x55\x11\xd5\xad"
+ "\x14\x5f\x44\xa6",
+ .clen = 32 + 20,
+ "\x8c\x4d\x2a\x8d\x23\x47\x59\x6f"
+ "\x1e\x74\x62\x39\xed\x14\x50\x6c",
+ .clen = 32 + 16,
+ },
+};
+
static const struct aead_testvec hmac_sha1_ecb_cipher_null_tv_temp[] = {
{ /* Input data from RFC 2410 Case 1 */
static const struct aead_testvec hmac_md5_des3_ede_cbc_tv_temp[] = {
{ /*Generated with cryptopp*/
#ifdef __LITTLE_ENDIAN
target/linux/generic/pending-6.18/910-crypto-testmgr-Add-test-vectors-for-authenc-hmac-md5.patch → target/linux/generic/backport-6.18/923-v7.1-crypto-testmgr-Add-test-vectors-for-authenc-hmac-md5.patch
+1 -1
View File
@@ -33,7 +33,7 @@ Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
.test = alg_test_aead,
--- a/crypto/testmgr.h
+++ b/crypto/testmgr.h
@@ -15826,6 +15826,261 @@ static const struct cipher_testvec aes_c
@@ -15946,6 +15946,261 @@ static const struct cipher_testvec aes_c
},
};
target/linux/generic/hack-6.18/730-net-ethernet-mtk_eth_soc-add-hw-dump-for-forced-rese.patch
+4 -4
View File
@@ -37,7 +37,7 @@ Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
.glo_cfg = 0x4604,
.rst_idx = 0x4608,
.delay_irq = 0x460c,
@@ -4125,6 +4128,56 @@ static void mtk_set_mcr_max_rx(struct mt
@@ -4178,6 +4181,56 @@ static void mtk_set_mcr_max_rx(struct mt
mtk_w32(mac->hw, mcr_new, MTK_MAC_MCR(mac->id));
}
@@ -63,7 +63,7 @@ Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
+ mtk_hw_dump_reg(eth, "FE", 0x1400, 0x300);
+ mtk_hw_dump_reg(eth, "ADMA", reg_map->pdma.rx_ptr, 0x300);
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
+ for (id = 0; id < MTK_QDMA_NUM_QUEUES / 16; id++) {
+ for (id = 0; id < eth->soc->num_tx_queues / MTK_QTX_PER_PAGE; id++) {
+ mtk_w32(eth, id, reg_map->qdma.page);
+ pr_info("\nQDMA PAGE:%x ", mtk_r32(eth, reg_map->qdma.page));
+ mtk_hw_dump_reg(eth, "QDMA", reg_map->qdma.qtx_cfg, 0x100);
@@ -94,7 +94,7 @@ Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
static void mtk_hw_reset(struct mtk_eth *eth)
{
u32 val;
@@ -4604,6 +4657,8 @@ static void mtk_pending_work(struct work
@@ -4657,6 +4710,8 @@ static void mtk_pending_work(struct work
rtnl_lock();
set_bit(MTK_RESETTING, &eth->state);
@@ -105,7 +105,7 @@ Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
/* Run again reset preliminary configuration in order to avoid any
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -1192,6 +1192,7 @@ struct mtk_reg_map {
@@ -1200,6 +1200,7 @@ struct mtk_reg_map {
u32 rx_ptr; /* rx base pointer */
u32 rx_cnt_cfg; /* rx max count configuration */
u32 qcrx_ptr; /* rx cpu pointer */
target/linux/generic/pending-6.18/795-01-net-ethernet-mtk_ppe_offload-use-rhashtable_lookup_f.patch
+68
View File
@@ -0,0 +1,68 @@
From 75baf4f561029dc48a5b244320c50773356f9f3e Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Thu, 23 Apr 2026 15:08:11 +0100
Subject: [PATCH 1/9] net: ethernet: mtk_ppe_offload: use
rhashtable_lookup_fast in flow ops
mtk_flow_offload_replace(), mtk_flow_offload_destroy() and
mtk_flow_offload_stats() look up the flow hash table with
rhashtable_lookup(), which is annotated __must_hold_shared(RCU)
and, per kerneldoc, "must only be called under the RCU read lock."
All three call sites run under mtk_flow_offload_mutex but without
an explicit rcu_read_lock(), so CONFIG_PROVE_RCU trips:
suspicious rcu_dereference_check() usage!
include/linux/rhashtable.h:632 ...
Call trace:
mtk_flow_offload_replace+0x...
mtk_flow_offload_cmd+0x...
...
Switch to rhashtable_lookup_fast(), which takes the RCU read lock
around the lookup internally. The driver's mutex keeps the entry
pointer alive past the rhashtable_lookup_fast() call -- exactly the
"other mechanism guaranteeing that the object won't go away" that
rhashtable_lookup_fast()'s kerneldoc requires.
No functional change; just silences a lockdep false positive.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/net/ethernet/mediatek/mtk_ppe_offload.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
--- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
+++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
@@ -261,7 +261,8 @@ mtk_flow_offload_replace(struct mtk_eth
int err = 0;
int i;
- if (rhashtable_lookup(&eth->flow_table, &f->cookie, mtk_flow_ht_params))
+ if (rhashtable_lookup_fast(&eth->flow_table, &f->cookie,
+ mtk_flow_ht_params))
return -EEXIST;
if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_META)) {
@@ -503,8 +504,8 @@ mtk_flow_offload_destroy(struct mtk_eth
{
struct mtk_flow_entry *entry;
- entry = rhashtable_lookup(&eth->flow_table, &f->cookie,
- mtk_flow_ht_params);
+ entry = rhashtable_lookup_fast(&eth->flow_table, &f->cookie,
+ mtk_flow_ht_params);
if (!entry)
return -ENOENT;
@@ -525,8 +526,8 @@ mtk_flow_offload_stats(struct mtk_eth *e
u64 packets, bytes;
int idle;
- entry = rhashtable_lookup(&eth->flow_table, &f->cookie,
- mtk_flow_ht_params);
+ entry = rhashtable_lookup_fast(&eth->flow_table, &f->cookie,
+ mtk_flow_ht_params);
if (!entry)
return -ENOENT;
target/linux/generic/pending-6.18/795-02-net-ethernet-mtk_ppe-set-tport_idx-on-netsys_v3-for-.patch
+72
View File
@@ -0,0 +1,72 @@
From daa37761de13976153502332f2fa675bd3761cc4 Mon Sep 17 00:00:00 2001
From: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
Date: Thu, 23 Apr 2026 13:56:30 +0100
Subject: [PATCH 2/9] net: ethernet: mtk_ppe: set tport_idx on netsys_v3 for
QoS
On MT7988 (netsys_v3) the PPE MAC info block carries a transport
port index field. When not set, ETH-to-ETH and WiFi-to-ETH hardware-
offloaded flows do not enter QDMA for scheduling, even with
IB2_PSE_QOS programmed on the entry -- the packet bypasses the
QDMA scheduler entirely, so any per-queue shaping installed
downstream has no effect.
Populate the netsys_v3 tport/tinfo fields in struct mtk_foe_mac_info
and set TPORT_IDX=1 from mtk_foe_entry_set_queue() on v3+.
No functional change on netsys_v1 or v2.
The hard-coded value 1 matches MediaTek's reference driver; the
datasheet may define additional transport modes, but none are in use
by in-tree consumers.
Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
[Daniel Golle: hoist l2 declaration to function top per kernel C89 style]
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/net/ethernet/mediatek/mtk_ppe.c | 7 +++++++
drivers/net/ethernet/mediatek/mtk_ppe.h | 4 ++++
2 files changed, 11 insertions(+)
--- a/drivers/net/ethernet/mediatek/mtk_ppe.c
+++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
@@ -479,6 +479,7 @@ int mtk_foe_entry_set_queue(struct mtk_e
unsigned int queue)
{
u32 *ib2 = mtk_foe_entry_ib2(eth, entry);
+ struct mtk_foe_mac_info *l2;
if (mtk_is_netsys_v2_or_greater(eth)) {
*ib2 &= ~MTK_FOE_IB2_QID_V2;
@@ -490,6 +491,12 @@ int mtk_foe_entry_set_queue(struct mtk_e
*ib2 |= MTK_FOE_IB2_PSE_QOS;
}
+ if (mtk_is_netsys_v3_or_greater(eth)) {
+ l2 = mtk_foe_entry_l2(eth, entry);
+ l2->tport &= ~MTK_FOE_TPORT_IDX;
+ l2->tport |= FIELD_PREP(MTK_FOE_TPORT_IDX, 1);
+ }
+
return 0;
}
--- a/drivers/net/ethernet/mediatek/mtk_ppe.h
+++ b/drivers/net/ethernet/mediatek/mtk_ppe.h
@@ -96,6 +96,8 @@ enum {
#define MTK_FOE_WINFO_AMSDU_HF BIT(23)
#define MTK_FOE_WINFO_AMSDU_EN BIT(24)
+#define MTK_FOE_TPORT_IDX GENMASK(3, 0)
+
enum {
MTK_FOE_STATE_INVALID,
MTK_FOE_STATE_UNBIND,
@@ -124,6 +126,8 @@ struct mtk_foe_mac_info {
/* netsys_v3 */
u32 w3info;
u32 amsdu;
+ u16 tinfo;
+ u16 tport;
};
/* software-only entry type */
target/linux/generic/pending-6.18/795-03-net-ethernet-mtk_ppe_offload-set-output-device-befor.patch
+59
View File
@@ -0,0 +1,59 @@
From eef4108f42f1b6e41274be5220253b2cd37ae8d1 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Thu, 23 Apr 2026 13:57:37 +0100
Subject: [PATCH 3/9] net: ethernet: mtk_ppe_offload: set output device before
VLAN/PPPoE push
In mtk_flow_offload_replace(), run mtk_flow_set_output_device() and
mtk_wed_flow_add() before the VLAN push loop and PPPoE push, rather
than after them.
Today this is a no-op: set_output_device() on the DSA_TAG_PROTO_MTK
path writes the special-tag etype into the L2 block, not a VLAN, so
the relative order of VLAN push and output-device setup does not
matter. The WED path likewise does not stack any VLANs.
This prepares the ground for taggers whose output-device setup
pushes an outer 802.1Q tag (e.g. DSA_TAG_PROTO_MXL862_8021Q) which
must land in vlan1 so that subsequent user VLANs stack into vlan2.
Getting that order wrong would put the DSA outer tag in vlan2 and
the user VLAN in vlan1, which the switch catchall strip rule would
then remove from the wrong layer.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/net/ethernet/mediatek/mtk_ppe_offload.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
--- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
+++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
@@ -453,6 +453,14 @@ mtk_flow_offload_replace(struct mtk_eth
return err;
}
+ err = mtk_flow_set_output_device(eth, &foe, odev, data.eth.h_dest,
+ &wed_index);
+ if (err)
+ return err;
+
+ if (wed_index >= 0 && (err = mtk_wed_flow_add(wed_index)) < 0)
+ return err;
+
if (offload_type == MTK_PPE_PKT_TYPE_BRIDGE)
foe.bridge.vlan = data.vlan_in;
@@ -462,14 +470,6 @@ mtk_flow_offload_replace(struct mtk_eth
if (data.pppoe.num == 1)
mtk_foe_entry_set_pppoe(eth, &foe, data.pppoe.sid);
- err = mtk_flow_set_output_device(eth, &foe, odev, data.eth.h_dest,
- &wed_index);
- if (err)
- return err;
-
- if (wed_index >= 0 && (err = mtk_wed_flow_add(wed_index)) < 0)
- return err;
-
entry = kzalloc(sizeof(*entry), GFP_KERNEL);
if (!entry)
return -ENOMEM;
target/linux/generic/pending-6.18/795-04-net-ethernet-mtk_eth_soc-per-SoC-QDMA-TX-queue-count.patch
+192
View File
@@ -0,0 +1,192 @@
From 629c7910dade8866807358e245af808d9a282cd7 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Thu, 23 Apr 2026 14:03:20 +0100
Subject: [PATCH 4/9] net: ethernet: mtk_eth_soc: per-SoC QDMA TX queue count with
register paging
MT7988 (netsys_v3) has 32 QDMA TX queues but the register window only
exposes 16 at a time; accessing the upper 16 requires selecting the
register page via the qdma.page register first. On netsys_v1 and
netsys_v2 the hardware still has 16 queues and the page register,
though present at a fixed offset in the reg_map, is effectively only
ever written to with page 0.
Replace the global MTK_QDMA_NUM_QUEUES define with a per-SoC
num_tx_queues field in struct mtk_soc_data. Keep the count at 16 for
V1 and V2, bump it to 32 only for MT7988 (V3). This matches the
current behavior for every SoC that was already working -- including
the ramips MT7621 that shares the driver -- while allowing V3 to use
the full queue count.
Add a qdma.page field to struct mtk_reg_map. Populate it for all
three QDMA reg maps:
mtk_reg_map (V1) = 0x19f0
mt7986_reg_map (V2) = 0x45f0
mt7988_reg_map (V3) = 0x45f0
Add MTK_QTX_PER_PAGE (= 16), the number of queues whose config
registers fit in one register page window. In mtk_set_queue_speed()
and the queue init loop in mtk_tx_alloc(), write the page register
before touching qtx_cfg / qtx_sch, using idx / MTK_QTX_PER_PAGE as
page and idx % MTK_QTX_PER_PAGE as in-page offset. Other call sites
(mtk_dma_free(), DSA user-port bound check, alloc_etherdev_mqs())
switch to eth->soc->num_tx_queues.
MT7628 / RT5350 predate QDMA and are guarded by the existing
MTK_HAS_CAPS(MTK_QDMA) checks; num_tx_queues stays 0 for them and
those paths remain unreachable.
Based on work by Bo-Cun Chen for MediaTek's downstream tree
("net: ethernet: mtk_eth_soc: change qdma txq num to 32"), reshaped
to avoid bumping the global define for older SoCs.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 26 +++++++++++++++------
drivers/net/ethernet/mediatek/mtk_eth_soc.h | 5 ++--
2 files changed, 22 insertions(+), 9 deletions(-)
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -846,7 +846,8 @@ static void mtk_set_queue_speed(struct m
}
}
- ofs = MTK_QTX_OFFSET * idx;
+ mtk_w32(eth, idx / MTK_QTX_PER_PAGE, soc->reg_map->qdma.page);
+ ofs = MTK_QTX_OFFSET * (idx % MTK_QTX_PER_PAGE);
mtk_w32(eth, val, soc->reg_map->qdma.qtx_sch + ofs);
}
@@ -2929,7 +2930,11 @@ static int mtk_tx_alloc(struct mtk_eth *
soc->reg_map->qdma.crx_ptr);
mtk_w32(eth, ring->last_free_ptr, soc->reg_map->qdma.drx_ptr);
- for (i = 0, ofs = 0; i < MTK_QDMA_NUM_QUEUES; i++) {
+ for (i = 0; i < soc->num_tx_queues; i++) {
+ mtk_w32(eth, i / MTK_QTX_PER_PAGE,
+ soc->reg_map->qdma.page);
+ ofs = MTK_QTX_OFFSET * (i % MTK_QTX_PER_PAGE);
+
val = (QDMA_RES_THRES << 8) | QDMA_RES_THRES;
mtk_w32(eth, val, soc->reg_map->qdma.qtx_cfg + ofs);
@@ -2941,7 +2946,6 @@ static int mtk_tx_alloc(struct mtk_eth *
if (mtk_is_netsys_v1(eth))
val |= MTK_QTX_SCH_LEAKY_BUCKET_EN;
mtk_w32(eth, val, soc->reg_map->qdma.qtx_sch + ofs);
- ofs += MTK_QTX_OFFSET;
}
val = MTK_QDMA_TX_SCH_MAX_WFQ | (MTK_QDMA_TX_SCH_MAX_WFQ << 16);
mtk_w32(eth, val, soc->reg_map->qdma.tx_sch_rate);
@@ -3506,7 +3510,7 @@ static void mtk_dma_free(struct mtk_eth
int i, j, txqs = 1;
if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA))
- txqs = MTK_QDMA_NUM_QUEUES;
+ txqs = soc->num_tx_queues;
for (i = 0; i < MTK_MAX_DEVS; i++) {
if (!eth->netdev[i])
@@ -3778,7 +3782,7 @@ found:
return NOTIFY_DONE;
dp = dsa_port_from_netdev(dev);
- if (dp->index >= MTK_QDMA_NUM_QUEUES)
+ if (dp->index >= eth->soc->num_tx_queues)
return NOTIFY_DONE;
if (mac->speed > 0 && mac->speed <= s.base.speed)
@@ -5028,7 +5032,7 @@ static int mtk_add_mac(struct mtk_eth *e
}
if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA))
- txqs = MTK_QDMA_NUM_QUEUES;
+ txqs = eth->soc->num_tx_queues;
eth->netdev[id] = alloc_etherdev_mqs(sizeof(*mac), txqs, 1);
if (!eth->netdev[id]) {
@@ -5673,6 +5677,7 @@ static const struct mtk_soc_data mt2701_
.required_clks = MT7623_CLKS_BITMAP,
.required_pctl = true,
.version = 1,
+ .num_tx_queues = 16,
.tx = {
DESC_SIZE(struct mtk_tx_dma),
.dma_max_len = MTK_TX_DMA_BUF_LEN,
@@ -5700,6 +5705,7 @@ static const struct mtk_soc_data mt7621_
.offload_version = 1,
.ppe_num = 1,
.hash_offset = 2,
+ .num_tx_queues = 16,
.foe_entry_size = MTK_FOE_ENTRY_V1_SIZE,
.tx = {
DESC_SIZE(struct mtk_tx_dma),
@@ -5730,6 +5736,7 @@ static const struct mtk_soc_data mt7622_
.ppe_num = 1,
.hash_offset = 2,
.has_accounting = true,
+ .num_tx_queues = 16,
.foe_entry_size = MTK_FOE_ENTRY_V1_SIZE,
.tx = {
DESC_SIZE(struct mtk_tx_dma),
@@ -5758,6 +5765,7 @@ static const struct mtk_soc_data mt7623_
.offload_version = 1,
.ppe_num = 1,
.hash_offset = 2,
+ .num_tx_queues = 16,
.foe_entry_size = MTK_FOE_ENTRY_V1_SIZE,
.disable_pll_modes = true,
.tx = {
@@ -5786,6 +5794,7 @@ static const struct mtk_soc_data mt7629_
.required_pctl = false,
.has_accounting = true,
.version = 1,
+ .num_tx_queues = 16,
.tx = {
DESC_SIZE(struct mtk_tx_dma),
.dma_max_len = MTK_TX_DMA_BUF_LEN,
@@ -5815,6 +5824,7 @@ static const struct mtk_soc_data mt7981_
.ppe_num = 2,
.hash_offset = 4,
.has_accounting = true,
+ .num_tx_queues = 16,
.foe_entry_size = MTK_FOE_ENTRY_V2_SIZE,
.tx = {
DESC_SIZE(struct mtk_tx_dma_v2),
@@ -5845,6 +5855,7 @@ static const struct mtk_soc_data mt7986_
.ppe_num = 2,
.hash_offset = 4,
.has_accounting = true,
+ .num_tx_queues = 16,
.foe_entry_size = MTK_FOE_ENTRY_V2_SIZE,
.tx = {
DESC_SIZE(struct mtk_tx_dma_v2),
@@ -5875,6 +5886,7 @@ static const struct mtk_soc_data mt7988_
.ppe_num = 3,
.hash_offset = 4,
.has_accounting = true,
+ .num_tx_queues = 32,
.foe_entry_size = MTK_FOE_ENTRY_V3_SIZE,
.tx = {
DESC_SIZE(struct mtk_tx_dma_v2),
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -25,7 +25,7 @@
#define MTK_MAX_DSA_PORTS 7
#define MTK_DSA_PORT_MASK GENMASK(2, 0)
-#define MTK_QDMA_NUM_QUEUES 16
+#define MTK_QTX_PER_PAGE 16
#define MTK_QDMA_PAGE_SIZE 2048
#define MTK_MAX_RX_LENGTH 1536
#define MTK_MAX_RX_LENGTH_2K 2048
@@ -1248,6 +1248,7 @@ struct mtk_soc_data {
u8 hash_offset;
u8 version;
u8 ppe_num;
+ u16 num_tx_queues;
u16 foe_entry_size;
netdev_features_t hw_features;
bool has_accounting;
target/linux/generic/pending-6.18/795-05-net-ethernet-mtk_eth_soc-add-per-conduit-DSA-user-po.patch
+168
View File
@@ -0,0 +1,168 @@
From e404de9968c4010b1f5fea4fba78ddbb220ba97a Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Thu, 23 Apr 2026 15:19:04 +0100
Subject: [PATCH 5/9] net: ethernet: mtk_eth_soc: add per-conduit DSA user-port
queue map
Today the driver maps every DSA user port to QDMA TX queue
dp->index + 3 at three call sites (link-speed notifier, SW TX
select_queue, and PPE flow offload). The mapping is correct for a
single DSA switch per conduit with contiguous port indices, which
covers every current MediaTek SoC paired with MT7530/MT7531/built-in
switch.
It falls apart in two scenarios that start to matter:
1) Multiple DSA switches on one MT7988 (built-in MT7530 on GMAC2
plus an external switch on a SerDes GMAC). Each switch has its
own dp->index space starting at 0, so port 0 of switch A and
port 0 of switch B both map to QDMA queue 3 and stomp each
other's shaping and offload state.
2) Switches with non-contiguous user-port indices (CPU port in the
middle of the range, some indices reserved), where "queue =
dp->index + 3" leaves gaps or overshoots num_tx_queues.
Introduce a per-conduit queue map so those three call sites can
convert dp->index to a collision-free queue ID:
- mac->dsa_queue_base: queue index where this conduit's DSA user
ports start. Zeroth conduit uses MTK_MAX_DEVS (skipping the
queues reserved for non-DSA egress), later conduits start after
the previous conduit's user-port range.
- mac->dsa_port_rank[dp->index]: rank (0..N-1) of dp within its
switch's user-port sequence, so sparse dp->index layouts become
dense queue assignments.
mtk_update_dsa_queue_map() walks every conduit and rebuilds both.
It is called from the existing DSA user-port NETDEV_CHANGE notifier
so link-up of any DSA user port triggers a recompute. Initial
values at mac creation reproduce the old "queue = dp->index + 3"
layout, so behavior does not change until the next patches switch
call sites over.
MTK_DSA_USER_PORT_MAX is 32, comfortably covering the 16-port
MxL862xx; bump it if a larger switch needs per-port queuing.
This patch only adds infrastructure; no call sites are converted
yet so there is no functional change.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 56 ++++++++++++++++++++-
drivers/net/ethernet/mediatek/mtk_eth_soc.h | 10 ++++
2 files changed, 65 insertions(+), 1 deletion(-)
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -3751,6 +3751,48 @@ static bool mtk_uses_dsa(struct net_devi
#endif
}
+/*
+ * Recompute the per-conduit DSA user-port queue map. Each conduit's mac
+ * gets a queue base (queues 0..MTK_MAX_DEVS-1 are reserved for non-DSA
+ * egress via GDM{1,2,3}), followed by a contiguous rank for every user
+ * port of the DSA switch attached to that conduit. dsa_port_rank[]
+ * translates dp->index (which may be non-contiguous and may collide
+ * across switches) into that rank.
+ *
+ * Call this on DSA topology changes. Idempotent.
+ */
+static void mtk_update_dsa_queue_map(struct mtk_eth *eth)
+{
+ struct net_device *conduit;
+ struct dsa_switch *ds;
+ struct mtk_mac *mac;
+ struct dsa_port *dp;
+ u8 base = MTK_MAX_DEVS;
+ u8 rank;
+ int i;
+
+ for (i = 0; i < MTK_MAX_DEVS; i++) {
+ conduit = eth->netdev[i];
+ if (!conduit)
+ continue;
+
+ mac = netdev_priv(conduit);
+ mac->dsa_queue_base = base;
+
+ if (!netdev_uses_dsa(conduit))
+ continue;
+
+ ds = conduit->dsa_ptr->ds;
+ rank = 0;
+ dsa_switch_for_each_user_port(dp, ds) {
+ if (dp->index < MTK_DSA_USER_PORT_MAX)
+ mac->dsa_port_rank[dp->index] = rank;
+ rank++;
+ }
+ base += rank;
+ }
+}
+
static int mtk_device_event(struct notifier_block *n, unsigned long event, void *ptr)
{
struct mtk_mac *mac = container_of(n, struct mtk_mac, device_notifier);
@@ -3775,6 +3817,8 @@ found:
if (!dsa_user_dev_check(dev))
return NOTIFY_DONE;
+ mtk_update_dsa_queue_map(eth);
+
if (__ethtool_get_link_ksettings(dev, &s))
return NOTIFY_DONE;
@@ -5010,7 +5054,7 @@ static int mtk_add_mac(struct mtk_eth *e
phy_interface_t phy_mode;
struct phylink *phylink;
struct mtk_mac *mac;
- int id, err, count;
+ int id, err, count, i;
unsigned int sid;
int txqs = 1;
u32 val;
@@ -5045,6 +5089,16 @@ static int mtk_add_mac(struct mtk_eth *e
mac->hw = eth;
mac->of_node = np;
+ /*
+ * Initialize the DSA user-port queue map to an identity mapping
+ * starting at MTK_MAX_DEVS, so that a mac without any DSA switch
+ * attached keeps the historic "queue = dp->index + 3" layout.
+ * mtk_update_dsa_queue_map() rewrites this once DSA state is up.
+ */
+ mac->dsa_queue_base = MTK_MAX_DEVS;
+ for (i = 0; i < MTK_DSA_USER_PORT_MAX; i++)
+ mac->dsa_port_rank[i] = i;
+
memset(mac->hwlro_ip, 0, sizeof(mac->hwlro_ip));
mac->hwlro_ip_cnt = 0;
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -25,6 +25,14 @@
#define MTK_MAX_DSA_PORTS 7
#define MTK_DSA_PORT_MASK GENMASK(2, 0)
+/*
+ * Upper bound on dp->index across all DSA switches we support attaching
+ * to an MT7988 / MT7986 / MT7622 / MT7621 conduit. Sized to cover the
+ * 16-port MaxLinear MxL862xx with room to spare; increase when a larger
+ * switch needs per-port queue mapping.
+ */
+#define MTK_DSA_USER_PORT_MAX 32
+
#define MTK_QTX_PER_PAGE 16
#define MTK_QDMA_PAGE_SIZE 2048
#define MTK_MAX_RX_LENGTH 1536
@@ -1414,6 +1422,8 @@ struct mtk_mac {
int hwlro_ip_cnt;
unsigned int syscfg0;
struct notifier_block device_notifier;
+ u8 dsa_queue_base;
+ u8 dsa_port_rank[MTK_DSA_USER_PORT_MAX];
};
/* the struct describing the SoC. these are declared in the soc_xyz.c files */
target/linux/generic/pending-6.18/795-06-net-ethernet-mtk_eth_soc-use-DSA-queue-map-in-TX-pat.patch
+85
View File
@@ -0,0 +1,85 @@
From 199cb88e7127b469d3a4b17346129dcea2b719d9 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Thu, 23 Apr 2026 15:19:58 +0100
Subject: [PATCH 6/9] net: ethernet: mtk_eth_soc: use DSA queue map in TX paths
Convert the two SW TX paths that map DSA user ports to QDMA queues
to use the per-conduit queue map introduced by the previous patch:
- mtk_device_event(), the DSA user-port link-speed notifier, now
computes the queue ID as mac->dsa_queue_base +
mac->dsa_port_rank[dp->index] instead of dp->index + 3.
- mtk_select_queue() does the same for SW xmit, keying on
skb_get_queue_mapping(skb) which DSA taggers set to dp->index.
The default identity map set up at mac creation keeps the resulting
queue IDs identical to the old formula as long as only one DSA
switch with contiguous dp->index is attached to the conduit -- the
current common case. When mtk_update_dsa_queue_map() runs on DSA
attach, multi-switch trees (e.g. MT7988 + built-in MT7530 + external
MxL862xx) and non-contiguous dp->index layouts (e.g. MxL862xx with
CPU port 0 and user ports 1..15) get collision-free queue IDs.
Also tighten the bound check: the old code rejected
"dp->index >= soc->num_tx_queues", which on V1 with a 16-port
switch could still compute queue=18 and write out of range.
Now reject on dp->index >= MTK_DSA_USER_PORT_MAX first (the array
bound), then on queue >= soc->num_tx_queues (the HW bound).
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 20 +++++++++++++++-----
1 file changed, 15 insertions(+), 5 deletions(-)
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -3802,6 +3802,7 @@ static int mtk_device_event(struct notif
struct net_device *ldev;
struct list_head *iter;
struct dsa_port *dp;
+ unsigned int queue;
if (event != NETDEV_CHANGE)
return NOTIFY_DONE;
@@ -3826,13 +3827,17 @@ found:
return NOTIFY_DONE;
dp = dsa_port_from_netdev(dev);
- if (dp->index >= eth->soc->num_tx_queues)
+ if (dp->index >= MTK_DSA_USER_PORT_MAX)
+ return NOTIFY_DONE;
+
+ queue = mac->dsa_queue_base + mac->dsa_port_rank[dp->index];
+ if (queue >= eth->soc->num_tx_queues)
return NOTIFY_DONE;
if (mac->speed > 0 && mac->speed <= s.base.speed)
s.base.speed = 0;
- mtk_set_queue_speed(eth, dp->index + 3, s.base.speed);
+ mtk_set_queue_speed(eth, queue, s.base.speed);
return NOTIFY_DONE;
}
@@ -4994,12 +4999,17 @@ static u16 mtk_select_queue(struct net_d
struct net_device *sb_dev)
{
struct mtk_mac *mac = netdev_priv(dev);
+ unsigned int dp_idx;
unsigned int queue = 0;
- if (netdev_uses_dsa(dev))
- queue = skb_get_queue_mapping(skb) + 3;
- else
+ if (netdev_uses_dsa(dev)) {
+ dp_idx = skb_get_queue_mapping(skb);
+ if (dp_idx < MTK_DSA_USER_PORT_MAX)
+ queue = mac->dsa_queue_base +
+ mac->dsa_port_rank[dp_idx];
+ } else {
queue = mac->id;
+ }
if (queue >= dev->num_tx_queues)
queue = 0;
target/linux/generic/pending-6.18/795-07-net-ethernet-mtk_ppe_offload-use-DSA-queue-map-in-fl.patch
+54
View File
@@ -0,0 +1,54 @@
From 6916564f8a24970e36102b56bcec577f5129cfe1 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Thu, 23 Apr 2026 15:20:54 +0100
Subject: [PATCH 7/9] net: ethernet: mtk_ppe_offload: use DSA queue map in flow
offload path
Convert mtk_flow_set_output_device() to use the per-conduit DSA
queue map for PPE-offloaded flows targeting a DSA user port,
matching the two SW TX paths already converted in the previous
patch.
mtk_flow_get_dsa_port() substitutes *dev with the DSA conduit's
netdev on success, so by the time we pick the QDMA queue for the
offloaded flow we have the conduit's struct mtk_mac and can
compute queue = mac->dsa_queue_base + mac->dsa_port_rank[dsa_port]
just like SW xmit does.
Behavior is unchanged for any existing configuration (single DSA
switch per conduit with contiguous dp->index); the allocator only
produces different results for multi-switch trees and for switches
with sparse dp->index layouts. The dsa_port < MTK_DSA_USER_PORT_MAX
guard matches the SW TX path and is purely defensive -- no shipped
DSA driver today has dp->index in that range.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/net/ethernet/mediatek/mtk_ppe_offload.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
--- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
+++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
@@ -193,6 +193,7 @@ mtk_flow_set_output_device(struct mtk_et
int *wed_index)
{
struct mtk_wdma_info info = {};
+ struct mtk_mac *mac;
int pse_port, dsa_port, queue;
if (mtk_flow_get_wdma_info(dev, dest_mac, &info) == 0) {
@@ -230,9 +231,12 @@ mtk_flow_set_output_device(struct mtk_et
else
return -EOPNOTSUPP;
- if (dsa_port >= 0) {
+ if (dsa_port >= 0)
mtk_foe_entry_set_dsa(eth, foe, dsa_port);
- queue = 3 + dsa_port;
+
+ if (dsa_port >= 0 && dsa_port < MTK_DSA_USER_PORT_MAX) {
+ mac = netdev_priv(dev);
+ queue = mac->dsa_queue_base + mac->dsa_port_rank[dsa_port];
} else {
queue = pse_port - 1;
}
target/linux/generic/pending-6.18/795-08-net-dsa-tag_mxl862xx_8021q-set-skb-queue_mapping-to-.patch
+45
View File
@@ -0,0 +1,45 @@
From dc26f882f63c34a4d510fc4326c958da52c6856b Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Thu, 23 Apr 2026 15:23:20 +0100
Subject: [PATCH 8/9] net: dsa: tag_mxl862xx_8021q: set skb queue_mapping to
DSA port index
Conduit drivers that want to assign a dedicated TX queue per DSA
user port read skb->queue_mapping in their ndo_select_queue and
map it to a HW queue. The tag_mxl862xx_8021q xmit path currently
leaves queue_mapping untouched at whatever the stack / qdisc set
it to, which is typically 0. That collapses every user port to
the same conduit queue.
Overwrite queue_mapping with dp->index before handing the skb to
dsa_8021q_xmit(). The original value is read first to derive the
PCP from the user port's TC map, so per-priority egress still
works as designed.
The same pattern is already used implicitly by the MTK native
tag -- DSA cores it on behalf of the tagger -- and is expected
by mtk_eth_soc's mtk_select_queue().
Signed-off-by: Chad Monroe <chad@monroe.io>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
net/dsa/tag_mxl862xx_8021q.c | 8 ++++++++
1 file changed, 8 insertions(+)
--- a/net/dsa/tag_mxl862xx_8021q.c
+++ b/net/dsa/tag_mxl862xx_8021q.c
@@ -23,6 +23,14 @@ static struct sk_buff *mxl862_8021q_xmit
u16 queue_mapping = skb_get_queue_mapping(skb);
u8 pcp = netdev_txq_to_tc(netdev, queue_mapping);
+ /*
+ * Re-key skb->queue_mapping to the DSA user port index so that
+ * conduit drivers (e.g. mtk_eth_soc) can map it to a per-port
+ * QDMA TX queue. Must happen after reading the original
+ * queue_mapping for PCP derivation.
+ */
+ skb_set_queue_mapping(skb, dp->index);
+
return dsa_8021q_xmit(skb, netdev, ETH_P_8021Q,
(pcp << VLAN_PRIO_SHIFT) | tx_vid);
}
target/linux/generic/pending-6.18/795-09-net-ethernet-mtk_ppe-offload-flows-to-MxL862xx-switc.patch
+153
View File
@@ -0,0 +1,153 @@
From 031ec521141aaa7fe13a937e0f942319f501cc4d Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Thu, 23 Apr 2026 15:24:32 +0100
Subject: [PATCH] net: ethernet: mtk_ppe: offload flows to MxL862xx switches in
tag_8021q mode
Extend the PPE flow-offload output path to handle egress through
an MxL862xx switch running in tag_8021q mode
(DSA_TAG_PROTO_MXL862_8021Q), in addition to the existing support
for MediaTek's native 8-byte DSA tag (DSA_TAG_PROTO_MTK).
In tag_8021q mode MxL862xx expects every ingress frame on the CPU port
to carry an outer 802.1Q tag whose VID identifies the target user
port; the switch's per-port egress catchall rule then strips that
outer tag. The VID to use is the one produced by
dsa_tag_8021q_standalone_vid(dp), which bakes the tag_8021q reserved
marker (RSV = GENMASK(11, 10)), the DSA tree's switch ID, and the user
port's dp->index into the low 12 bits of the VID.
Change mtk_flow_get_dsa_port() to return, alongside dp->index, the VID
the PPE should push on the offloaded frame, in a new push_vid
out-parameter:
- DSA_TAG_PROTO_MTK -> push_vid = 0;
caller uses mtk_foe_entry_set_dsa()
(magic etype) as before.
- DSA_TAG_PROTO_MXL862_8021Q -> push_vid = standalone VID;
caller pushes it as a VLAN via
mtk_foe_entry_set_vlan().
The switch statement is intentionally scoped: other tag_8021q-based
taggers (sja1105, ocelot_8021q, ...) use different tag layers
(CTAG-in-range rather than Q-in-Q) and/or bridge-scoped VIDs and are
not interchangeable here.
The prerequisite reorder commit ("mtk_ppe_offload: set output device
before VLAN/PPPoE push") put mtk_flow_set_output_device() ahead of the
user VLAN push loop, so the outer MxL862xx VID lands in vlan1 and a
subsequent user VLAN stacks into vlan2. Queue selection stays with the
DSA queue map introduced in the preceding patch.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
.../net/ethernet/mediatek/mtk_ppe_offload.c | 54 +++++++++++++++++--
1 file changed, 49 insertions(+), 5 deletions(-)
--- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
+++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
@@ -10,6 +10,7 @@
#include <net/flow_offload.h>
#include <net/pkt_cls.h>
#include <net/dsa.h>
+#include <linux/dsa/8021q.h>
#include "mtk_eth_soc.h"
#include "mtk_wed.h"
@@ -166,8 +167,25 @@ mtk_flow_mangle_ipv4(const struct flow_a
return 0;
}
+/*
+ * Inspect *dev as a DSA user netdev. On success, substitute *dev with
+ * the conduit netdev, return the DSA user port's dp->index, and in
+ * *push_vid hand back either 0 (native MTK tag; the PPE injects its
+ * magic etype later via mtk_foe_entry_set_dsa()) or the outer 802.1Q
+ * VID the PPE should push on the egressing frame (tag_8021q taggers
+ * that use an outer Q-in-Q tag with a standalone per-port VID, i.e.
+ * the MxL862xx tag_8021q tagger).
+ *
+ * push_vid may be NULL for callers that only want the idev->conduit
+ * substitution (e.g. ingress-side ppe_idx selection, where no VID
+ * is to be pushed on the flow entry).
+ *
+ * Other tag_8021q-based taggers (sja1105, ocelot_8021q, ...) use
+ * different tag layers and/or bridge-scoped VIDs; do not extend the
+ * switch below to cover them without per-tagger review.
+ */
static int
-mtk_flow_get_dsa_port(struct net_device **dev)
+mtk_flow_get_dsa_port(struct net_device **dev, u16 *push_vid)
{
#if IS_ENABLED(CONFIG_NET_DSA)
struct dsa_port *dp;
@@ -176,8 +194,18 @@ mtk_flow_get_dsa_port(struct net_device
if (IS_ERR(dp))
return -ENODEV;
- if (dp->cpu_dp->tag_ops->proto != DSA_TAG_PROTO_MTK)
+ switch (dp->cpu_dp->tag_ops->proto) {
+ case DSA_TAG_PROTO_MTK:
+ if (push_vid)
+ *push_vid = 0;
+ break;
+ case DSA_TAG_PROTO_MXL862_8021Q:
+ if (push_vid)
+ *push_vid = dsa_tag_8021q_standalone_vid(dp);
+ break;
+ default:
return -ENODEV;
+ }
*dev = dsa_port_to_conduit(dp);
@@ -195,6 +223,7 @@ mtk_flow_set_output_device(struct mtk_et
struct mtk_wdma_info info = {};
struct mtk_mac *mac;
int pse_port, dsa_port, queue;
+ u16 push_vid = 0;
if (mtk_flow_get_wdma_info(dev, dest_mac, &info) == 0) {
mtk_foe_entry_set_wdma(eth, foe, info.wdma_idx, info.queue,
@@ -220,7 +249,7 @@ mtk_flow_set_output_device(struct mtk_et
goto out;
}
- dsa_port = mtk_flow_get_dsa_port(&dev);
+ dsa_port = mtk_flow_get_dsa_port(&dev, &push_vid);
if (dev == eth->netdev[0])
pse_port = PSE_GDM1_PORT;
@@ -231,8 +260,12 @@ mtk_flow_set_output_device(struct mtk_et
else
return -EOPNOTSUPP;
- if (dsa_port >= 0)
- mtk_foe_entry_set_dsa(eth, foe, dsa_port);
+ if (dsa_port >= 0) {
+ if (push_vid)
+ mtk_foe_entry_set_vlan(eth, foe, push_vid);
+ else
+ mtk_foe_entry_set_dsa(eth, foe, dsa_port);
+ }
if (dsa_port >= 0 && dsa_port < MTK_DSA_USER_PORT_MAX) {
mac = netdev_priv(dev);
@@ -275,6 +308,17 @@ mtk_flow_offload_replace(struct mtk_eth
flow_rule_match_meta(rule, &match);
if (mtk_is_netsys_v2_or_greater(eth)) {
idev = __dev_get_by_index(&init_net, match.key->ingress_ifindex);
+ /*
+ * If idev is a DSA user netdev, substitute it with
+ * its conduit so the valid-idev check below passes
+ * and ppe_index picks up the conduit's PPE engine.
+ * Without this, upstream flows from a DSA user port
+ * (e.g. MxL862xx lanN) install on ppe[0] while the
+ * conduit's GDMA routes ingress through its own
+ * ppe[mac->ppe_idx]; the lookup misses and the
+ * flow never binds in HW.
+ */
+ mtk_flow_get_dsa_port(&idev, NULL);
if (idev && idev->netdev_ops == eth->netdev[0]->netdev_ops) {
struct mtk_mac *mac = netdev_priv(idev);
target/linux/kirkwood/Makefile
+1 -1
View File
@@ -11,7 +11,7 @@ FEATURES:=rtc usb nand squashfs ramdisk
CPU_TYPE:=xscale
SUBTARGETS:=generic
KERNEL_PATCHVER:=6.12
KERNEL_PATCHVER:=6.18
include $(INCLUDE_DIR)/target.mk
target/linux/kirkwood/config-6.12
+1
View File
@@ -73,6 +73,7 @@ CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_DES=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_ZSTD=y
target/linux/kirkwood/config-6.18
+308
View File
@@ -0,0 +1,308 @@
CONFIG_ALIGNMENT_TRAP=y
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MULTIPLATFORM=y
CONFIG_ARCH_MULTI_CPU_AUTO=y
# CONFIG_ARCH_MULTI_V4 is not set
# CONFIG_ARCH_MULTI_V4T is not set
CONFIG_ARCH_MULTI_V4_V5=y
CONFIG_ARCH_MULTI_V5=y
CONFIG_ARCH_MVEBU=y
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_STACKWALK=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_USES_CFI_GENERIC_LLVM_PASS=y
CONFIG_ARM=y
# CONFIG_ARMADA_37XX_WATCHDOG is not set
# CONFIG_ARMADA_THERMAL is not set
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
CONFIG_ARM_HAS_GROUP_RELOCS=y
# CONFIG_ARM_KIRKWOOD_CPUIDLE is not set
CONFIG_ARM_L1_CACHE_SHIFT=5
# CONFIG_ARM_MVEBU_V7_CPUIDLE is not set
CONFIG_ARM_PATCH_PHYS_VIRT=y
# CONFIG_ARM_THUMB is not set
CONFIG_ARM_UNWIND=y
CONFIG_ATA=y
CONFIG_ATAGS=y
CONFIG_ATA_LEDS=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
CONFIG_BLK_DEV_SD=y
CONFIG_CACHE_FEROCEON_L2=y
# CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH is not set
CONFIG_CC_HAVE_STACKPROTECTOR_TLS=y
CONFIG_CLKSRC_MMIO=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_COMMON_CLK=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_COPY_FEROCEON=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
CONFIG_CPU_FEROCEON=y
# CONFIG_CPU_FEROCEON_OLD_ID is not set
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_MITIGATIONS=y
CONFIG_CPU_PABRT_LEGACY=y
CONFIG_CPU_PM=y
CONFIG_CPU_THERMAL=y
CONFIG_CPU_THUMB_CAPABLE=y
CONFIG_CPU_TLB_FEROCEON=y
CONFIG_CPU_USE_DOMAINS=y
CONFIG_CRC16=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_DEV_MARVELL=y
CONFIG_CRYPTO_DEV_MARVELL_CESA=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_LIB_BLAKE2S_ARCH=y
CONFIG_CRYPTO_LIB_DES=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_SHA256_ARCH=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_ZSTD=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_LL=y
CONFIG_DEBUG_LL_INCLUDE="debug/8250.S"
CONFIG_DEBUG_MVEBU_UART0_ALTERNATE=y
# CONFIG_DEBUG_MVEBU_UART1_ALTERNATE is not set
CONFIG_DEBUG_UART_8250=y
CONFIG_DEBUG_UART_8250_SHIFT=2
CONFIG_DEBUG_UART_PHYS=0xf1012000
CONFIG_DEBUG_UART_VIRT=0xfed12000
CONFIG_DMA_NEED_SYNC=y
CONFIG_DMA_OPS_HELPERS=y
CONFIG_DNOTIFY=y
CONFIG_DTC=y
# CONFIG_EARLY_PRINTK is not set
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FORCE_NR_CPUS=y
CONFIG_FORCE_PCI=y
# CONFIG_FRAMER is not set
CONFIG_FS_IOMAP=y
CONFIG_FUNCTION_ALIGNMENT=0
CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_DEVICES=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GLOB=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_MVEBU=y
CONFIG_GRO_CELLS=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HWMON=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_OMAP=y
CONFIG_HZ_FIXED=0
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MV64XXX=y
# CONFIG_I2C_PXA is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQCHIP=y
CONFIG_IRQSTACKS=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_KIRKWOOD_CLK=y
CONFIG_KIRKWOOD_THERMAL=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_NETXBIG=y
CONFIG_LEDS_NS2=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MACH_KIRKWOOD=y
CONFIG_MACH_MVEBU_ANY=y
CONFIG_MANGLE_BOOTARGS=y
CONFIG_MARVELL_PHY=y
CONFIG_MDIO_BUS=y
CONFIG_MIGRATION=y
CONFIG_MMU_LAZY_TLB_REFCOUNT=y
CONFIG_MODULES_USE_ELF_REL=y
# CONFIG_MTD_CFI is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
# CONFIG_MTD_NAND_MARVELL is not set
CONFIG_MTD_NAND_ORION=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_UIMAGE_FW=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_MV643XX_ETH=y
CONFIG_MVEBU_CLK_COMMON=y
CONFIG_MVEBU_MBUS=y
CONFIG_MVMDIO=y
# CONFIG_MVNETA is not set
# CONFIG_MVPP2 is not set
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_KUSER_HELPERS=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NET_DEVLINK=y
CONFIG_NET_DSA=y
CONFIG_NET_EGRESS=y
CONFIG_NET_INGRESS=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_XGRESS=y
CONFIG_NLS=y
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_ORION_IRQCHIP=y
CONFIG_ORION_TIMER=y
CONFIG_ORION_WATCHDOG=y
CONFIG_OUTER_CACHE=y
CONFIG_PAGE_BLOCK_MAX_ORDER=11
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PCI=y
CONFIG_PCI_BRIDGE_EMUL=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PCI_MVEBU=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
CONFIG_PHYLINK=y
# CONFIG_PHY_MVEBU_A3700_UTMI is not set
# CONFIG_PHY_MVEBU_A38X_COMPHY is not set
CONFIG_PHY_MVEBU_SATA=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_KIRKWOOD=y
CONFIG_PINCTRL_MVEBU=y
# CONFIG_PINCTRL_SINGLE is not set
CONFIG_PINCTRL_SX150X=y
CONFIG_PLAT_ORION=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_GPIO=y
CONFIG_POWER_RESET_LINKSTATION=y
CONFIG_POWER_SUPPLY=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RATIONAL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_MV=y
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RTC_MC146818_LIB=y
CONFIG_SCSI=y
CONFIG_SCSI_COMMON=y
CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_MCTRL_GPIO=y
# CONFIG_SERIAL_MVEBU_UART is not set
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SG_POOL=y
CONFIG_SOC_BUS=y
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SPARSE_IRQ=y
CONFIG_SPI=y
# CONFIG_SPI_ARMADA_3700 is not set
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SPI_ORION=y
CONFIG_SRAM=y
CONFIG_SRAM_EXEC=y
CONFIG_SWPHY=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_THERMAL=y
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_HWMON=y
CONFIG_THERMAL_OF=y
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TINY_SRCU=y
CONFIG_UBIFS_FS=y
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
CONFIG_UNWINDER_ARM=y
CONFIG_USB=y
CONFIG_USB_COMMON=y
CONFIG_USB_LED_TRIG=y
CONFIG_USB_SUPPORT=y
CONFIG_USE_OF=y
# CONFIG_VFP is not set
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_WAN=y
CONFIG_WATCHDOG_CORE=y
CONFIG_XXHASH=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZSTD_COMMON=y
CONFIG_ZSTD_COMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y
target/linux/kirkwood/patches-6.18/100-ib62x0.patch
+53
View File
@@ -0,0 +1,53 @@
--- a/arch/arm/boot/dts/marvell/kirkwood-ib62x0.dts
+++ b/arch/arm/boot/dts/marvell/kirkwood-ib62x0.dts
@@ -6,7 +6,14 @@
/ {
model = "RaidSonic ICY BOX IB-NAS62x0 (Rev B)";
- compatible = "raidsonic,ib-nas6210-b", "raidsonic,ib-nas6220-b", "raidsonic,ib-nas6210", "raidsonic,ib-nas6220", "raidsonic,ib-nas62x0", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+ compatible = "raidsonic,ib-nas62x0", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+
+ aliases {
+ led-boot = &led_green_os;
+ led-failsafe = &led_red_os;
+ led-running = &led_green_os;
+ led-upgrade = &led_red_os;
+ };
memory {
device_type = "memory";
@@ -79,12 +86,12 @@
&pmx_led_usb_transfer>;
pinctrl-names = "default";
- led-green-os {
+ led_green_os: led-green-os {
label = "ib62x0:green:os";
gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
- default-state = "keep";
+ default-state = "on";
};
- led-red-os {
+ led_red_os: led-red-os {
label = "ib62x0:red:os";
gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
};
@@ -116,13 +123,13 @@
};
partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x600000>;
+ label = "second stage u-boot";
+ reg = <0x100000 0x200000>;
};
- partition@700000 {
- label = "root";
- reg = <0x0700000 0xf900000>;
+ partition@200000 {
+ label = "ubi";
+ reg = <0x200000 0xfe00000>;
};
};
target/linux/kirkwood/patches-6.18/101-iconnect.patch
+80
View File
@@ -0,0 +1,80 @@
--- a/arch/arm/boot/dts/marvell/kirkwood-iconnect.dts
+++ b/arch/arm/boot/dts/marvell/kirkwood-iconnect.dts
@@ -8,6 +8,13 @@
model = "Iomega Iconnect";
compatible = "iom,iconnect-1.1", "iom,iconnect", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+ aliases {
+ led-boot = &led_power_blue;
+ led-failsafe = &led_power_red;
+ led-running = &led_power_blue;
+ led-upgrade = &led_power_red;
+ };
+
memory {
device_type = "memory";
reg = <0x00000000 0x10000000>;
@@ -16,8 +23,6 @@
chosen {
bootargs = "console=ttyS0,115200n8 earlyprintk";
stdout-path = &uart0;
- linux,initrd-start = <0x4500040>;
- linux,initrd-end = <0x4800000>;
};
ocp@f1000000 {
@@ -89,12 +94,12 @@
gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
- led-power-blue {
+ led_power_blue: led-power-blue {
label = "power:blue";
gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
- default-state = "keep";
+ default-state = "on";
};
- led-power-red {
+ led_power_red: led-power-red {
label = "power:red";
gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
};
@@ -144,28 +149,23 @@
status = "okay";
partition@0 {
- label = "uboot";
- reg = <0x0000000 0xc0000>;
+ label = "u-boot";
+ reg = <0x0000000 0xe0000>;
};
- partition@a0000 {
- label = "env";
- reg = <0xa0000 0x20000>;
+ partition@e0000 {
+ label = "u-boot environment";
+ reg = <0xe0000 0x100000>;
};
partition@100000 {
- label = "zImage";
- reg = <0x100000 0x300000>;
- };
-
- partition@540000 {
- label = "initrd";
- reg = <0x540000 0x300000>;
+ label = "second stage u-boot";
+ reg = <0x100000 0x200000>;
};
- partition@980000 {
- label = "boot";
- reg = <0x980000 0x1f400000>;
+ partition@200000 {
+ label = "ubi";
+ reg = <0x200000 0x1fe00000>;
};
};
target/linux/kirkwood/patches-6.18/102-dockstar.patch
+62
View File
@@ -0,0 +1,62 @@
--- a/arch/arm/boot/dts/marvell/kirkwood-dockstar.dts
+++ b/arch/arm/boot/dts/marvell/kirkwood-dockstar.dts
@@ -8,6 +8,13 @@
model = "Seagate FreeAgent Dockstar";
compatible = "seagate,dockstar", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+ aliases {
+ led-boot = &led_health;
+ led-failsafe = &led_fault;
+ led-running = &led_health;
+ led-upgrade = &led_fault;
+ };
+
memory {
device_type = "memory";
reg = <0x00000000 0x8000000>;
@@ -42,12 +49,12 @@
pinctrl-0 = <&pmx_led_green &pmx_led_orange>;
pinctrl-names = "default";
- led-health {
+ led_health: led-health {
label = "status:green:health";
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
- default-state = "keep";
+ default-state = "on";
};
- led-fault {
+ led_fault: led-fault {
label = "status:orange:fault";
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
};
@@ -78,18 +85,22 @@
partition@0 {
label = "u-boot";
- reg = <0x0000000 0x100000>;
- read-only;
+ reg = <0x0000000 0xe0000>;
+ };
+
+ partition@e0000 {
+ label = "u-boot environment";
+ reg = <0xe0000 0x100000>;
};
partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x400000>;
+ label = "second stage u-boot";
+ reg = <0x100000 0x200000>;
};
- partition@500000 {
- label = "data";
- reg = <0x0500000 0xfb00000>;
+ partition@200000 {
+ label = "ubi";
+ reg = <0x200000 0xfe00000>;
};
};
target/linux/kirkwood/patches-6.18/103-iomega-ix2-200.patch
+71
View File
@@ -0,0 +1,71 @@
--- a/arch/arm/boot/dts/marvell/kirkwood-iomega_ix2_200.dts
+++ b/arch/arm/boot/dts/marvell/kirkwood-iomega_ix2_200.dts
@@ -8,6 +8,13 @@
model = "Iomega StorCenter ix2-200";
compatible = "iom,ix2-200", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+ aliases {
+ led-boot = &led_power;
+ led-failsafe = &led_health;
+ led-running = &led_power;
+ led-upgrade = &led_health;
+ };
+
memory {
device_type = "memory";
reg = <0x00000000 0x10000000>;
@@ -127,16 +134,16 @@
&pmx_led_rebuild &pmx_led_health >;
pinctrl-names = "default";
- led-power-led {
+ led_power: led-power-led {
label = "status:white:power_led";
gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
- default-state = "keep";
+ default-state = "on";
};
led-rebuild-led {
label = "status:white:rebuild_led";
gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
};
- led-health-led {
+ led_health: health_led {
label = "status:red:health_led";
gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
};
@@ -184,19 +191,19 @@
};
partition@a0000 {
- label = "env";
+ label = "u-boot environment";
reg = <0xa0000 0x20000>;
read-only;
};
partition@100000 {
- label = "uImage";
- reg = <0x100000 0x300000>;
+ label = "kernel";
+ reg = <0x100000 0x400000>;
};
- partition@400000 {
- label = "rootfs";
- reg = <0x400000 0x1C00000>;
+ partition@500000 {
+ label = "ubi";
+ reg = <0x500000 0x1C00000>;
};
};
@@ -209,7 +216,7 @@
};
&eth0 {
- status = "okay";
+ status = "disabled";
ethernet0-port@0 {
speed = <1000>;
duplex = <1>;
target/linux/kirkwood/patches-6.18/105-linksys-viper-dts.patch
+59
View File
@@ -0,0 +1,59 @@
--- a/arch/arm/boot/dts/marvell/kirkwood-linksys-viper.dts
+++ b/arch/arm/boot/dts/marvell/kirkwood-linksys-viper.dts
@@ -24,6 +24,10 @@
};
aliases {
+ led-boot = &led_white_health;
+ led-failsafe = &led_white_health;
+ led-running = &led_white_health;
+ led-upgrade = &led_white_health;
serial0 = &uart0;
};
@@ -54,9 +58,10 @@
pinctrl-0 = < &pmx_led_white_health &pmx_led_white_pulse >;
pinctrl-names = "default";
- led-white-health {
+ led_white_health: led-white-health {
label = "viper:white:health";
gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
};
led-white-pulse {
@@ -112,23 +117,23 @@
};
partition@200000 {
- label = "kernel";
- reg = <0x200000 0x2A0000>;
+ label = "kernel1";
+ reg = <0x200000 0x1A00000>;
};
- partition@4a0000 {
- label = "rootfs";
- reg = <0x4A0000 0x1760000>;
+ partition@600000 {
+ label = "rootfs1";
+ reg = <0x600000 0x1600000>;
};
partition@1c00000 {
- label = "alt_kernel";
- reg = <0x1C00000 0x2A0000>;
+ label = "kernel2";
+ reg = <0x1C00000 0x1A00000>;
};
- partition@1ea0000 {
- label = "alt_rootfs";
- reg = <0x1EA0000 0x1760000>;
+ partition@2000000 {
+ label = "rootfs2";
+ reg = <0x2000000 0x1600000>;
};
partition@3600000 {
target/linux/kirkwood/patches-6.18/106-goflexnet.patch
+53
View File
@@ -0,0 +1,53 @@
--- a/arch/arm/boot/dts/marvell/kirkwood-goflexnet.dts
+++ b/arch/arm/boot/dts/marvell/kirkwood-goflexnet.dts
@@ -8,6 +8,13 @@
model = "Seagate GoFlex Net";
compatible = "seagate,goflexnet", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+ aliases {
+ led-boot = &led_health;
+ led-failsafe = &led_fault;
+ led-running = &led_health;
+ led-upgrade = &led_fault;
+ };
+
memory {
device_type = "memory";
reg = <0x00000000 0x8000000>;
@@ -85,12 +92,12 @@
>;
pinctrl-names = "default";
- led-health {
+ led_health: led-health {
label = "status:green:health";
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
- default-state = "keep";
+ default-state = "on";
};
- led-fault {
+ led_fault: led-fault {
label = "status:orange:fault";
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
};
@@ -159,18 +166,8 @@
};
partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x400000>;
- };
-
- partition@500000 {
- label = "pogoplug";
- reg = <0x0500000 0x2000000>;
- };
-
- partition@2500000 {
- label = "root";
- reg = <0x02500000 0xd800000>;
+ label = "ubi";
+ reg = <0x0100000 0x0ff00000>;
};
};
target/linux/kirkwood/patches-6.18/107-01-zyxel-nsa3x0-common-nand-partitions.patch
+48
View File
@@ -0,0 +1,48 @@
--- a/arch/arm/boot/dts/marvell/kirkwood-nsa3x0-common.dtsi
+++ b/arch/arm/boot/dts/marvell/kirkwood-nsa3x0-common.dtsi
@@ -110,40 +110,16 @@
partition@0 {
label = "uboot";
- reg = <0x0000000 0x0100000>;
+ reg = <0x0000000 0x00c0000>;
read-only;
};
partition@100000 {
label = "uboot_env";
- reg = <0x0100000 0x0080000>;
+ reg = <0x00c0000 0x0080000>;
};
- partition@180000 {
- label = "key_store";
- reg = <0x0180000 0x0080000>;
- };
- partition@200000 {
- label = "info";
- reg = <0x0200000 0x0080000>;
- };
- partition@280000 {
- label = "etc";
- reg = <0x0280000 0x0a00000>;
- };
- partition@c80000 {
- label = "kernel_1";
- reg = <0x0c80000 0x0a00000>;
- };
- partition@1680000 {
- label = "rootfs1";
- reg = <0x1680000 0x2fc0000>;
- };
- partition@4640000 {
- label = "kernel_2";
- reg = <0x4640000 0x0a00000>;
- };
- partition@5040000 {
- label = "rootfs2";
- reg = <0x5040000 0x2fc0000>;
+ partition@140000 {
+ label = "ubi";
+ reg = <0x0140000 0x7ec0000>;
};
};
target/linux/kirkwood/patches-6.18/107-03-nsa325.patch
+54
View File
@@ -0,0 +1,54 @@
--- a/arch/arm/boot/dts/marvell/kirkwood-nsa325.dts
+++ b/arch/arm/boot/dts/marvell/kirkwood-nsa325.dts
@@ -15,6 +15,13 @@
model = "ZyXEL NSA325";
compatible = "zyxel,nsa325", "marvell,kirkwood-88f6282", "marvell,kirkwood";
+ aliases {
+ led-boot = &led_green_sys;
+ led-failsafe = &led_orange_sys;
+ led-running = &led_green_sys;
+ led-upgrade = &led_orange_sys;
+ };
+
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>;
@@ -162,17 +169,19 @@
&pmx_led_hdd1_green &pmx_led_hdd1_red>;
pinctrl-names = "default";
- led-green-sys {
+ led_green_sys: led-green-sys {
label = "nsa325:green:sys";
gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
};
- led-orange-sys {
+ led_orange_sys: led-orange-sys {
label = "nsa325:orange:sys";
gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
};
led-green-hdd1 {
label = "nsa325:green:hdd1";
gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "ata1";
};
led-red-hdd1 {
label = "nsa325:red:hdd1";
@@ -181,6 +190,7 @@
led-green-hdd2 {
label = "nsa325:green:hdd2";
gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "ata2";
};
led-red-hdd2 {
label = "nsa325:red:hdd2";
@@ -189,6 +199,7 @@
led-green-usb {
label = "nsa325:green:usb";
gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "usb-host";
};
led-green-copy {
label = "nsa325:green:copy";
target/linux/kirkwood/patches-6.18/108-dns325-add-led-labels-and-thermal-zones.patch
+107
View File
@@ -0,0 +1,107 @@
--- a/arch/arm/boot/dts/marvell/kirkwood-dns325.dts
+++ b/arch/arm/boot/dts/marvell/kirkwood-dns325.dts
@@ -2,11 +2,19 @@
/dts-v1/;
#include "kirkwood-dnskw.dtsi"
+#include <dt-bindings/thermal/thermal.h>
/ {
model = "D-Link DNS-325 NAS (Rev A1)";
compatible = "dlink,dns-325-a1", "dlink,dns-325", "dlink,dns-kirkwood", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+ aliases {
+ led-boot = &led_white_power;
+ led-failsafe = &led_white_power;
+ led-running = &led_white_power;
+ led-upgrade = &led_white_power;
+ };
+
memory {
device_type = "memory";
reg = <0x00000000 0x10000000>;
@@ -24,24 +32,25 @@
&pmx_led_white_usb>;
pinctrl-names = "default";
- led-white-power {
+ led_white_power: white-power {
label = "dns325:white:power";
gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
default-state = "keep";
};
- led-white-usb {
+ led_white_usb: white-usb {
label = "dns325:white:usb";
gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; /* GPIO 43 */
+ linux,default-trigger = "usb-host";
};
- led-red-l_hdd {
+ led_red_l_hdd: red-l_hdd {
label = "dns325:red:l_hdd";
gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
};
- led-red-r_hdd {
+ led_red_r_hdd: red-r_hdd {
label = "dns325:red:r_hdd";
gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
};
- led-red-usb {
+ led_red_usb: red-usb {
label = "dns325:red:usb";
gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
};
@@ -54,10 +63,53 @@
lm75: lm75@48 {
compatible = "national,lm75";
reg = <0x48>;
+ #thermal-sensor-cells = <0>;
};
};
serial@12000 {
status = "okay";
};
};
+
+ thermal-zones {
+ chassis-thermal {
+ polling-delay = <20000>;
+ polling-delay-passive = <2000>;
+
+ thermal-sensors = <&lm75>;
+
+ trips {
+ chassis_alert0: chassis-alert0 {
+ temperature = <43000>;
+ hysteresis = <3000>;
+ type = "active";
+ };
+ chassis_alert1: chassis-alert1 {
+ temperature = <47000>;
+ hysteresis = <3000>;
+ type = "active";
+ };
+ chassis-crit {
+ temperature = <60000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&chassis_alert0>;
+ cooling-device = <&fan0 1 1>;
+ };
+ map1 {
+ trip = <&chassis_alert1>;
+ cooling-device = <&fan0 2 2>;
+ };
+ };
+ };
+ };
+};
+
+&fan0 {
+ #cooling-cells = <2>;
};
target/linux/kirkwood/patches-6.18/109-dns325-add-fan-label-and-update-partitions.patch
+52
View File
@@ -0,0 +1,52 @@
--- a/arch/arm/boot/dts/marvell/kirkwood-dnskw.dtsi
+++ b/arch/arm/boot/dts/marvell/kirkwood-dnskw.dtsi
@@ -29,7 +29,7 @@
};
};
- gpio_fan {
+ fan0: gpio_fan {
/* Fan: ADDA AD045HB-G73 40mm 6000rpm@5v */
compatible = "gpio-fan";
pinctrl-0 = <&pmx_fan_high_speed &pmx_fan_low_speed>;
@@ -187,33 +187,18 @@
partition@0 {
label = "u-boot";
- reg = <0x0000000 0x100000>;
+ reg = <0x0000000 0x0e0000>;
read-only;
};
- partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x500000>;
- };
-
- partition@600000 {
- label = "ramdisk";
- reg = <0x0600000 0x500000>;
- };
-
- partition@b00000 {
- label = "image";
- reg = <0x0b00000 0x6600000>;
- };
-
- partition@7100000 {
- label = "mini firmware";
- reg = <0x7100000 0xa00000>;
+ partition@e0000 {
+ label = "u-boot-env";
+ reg = <0x00e0000 0x020000>;
};
- partition@7b00000 {
- label = "config";
- reg = <0x7b00000 0x500000>;
+ partition@100000 {
+ label = "ubi";
+ reg = <0x0100000 0x7f00000>;
};
};
target/linux/kirkwood/patches-6.18/109-pogoplug_v4.patch
+87
View File
@@ -0,0 +1,87 @@
--- a/arch/arm/boot/dts/marvell/kirkwood-pogoplug-series-4.dts
+++ b/arch/arm/boot/dts/marvell/kirkwood-pogoplug-series-4.dts
@@ -18,12 +18,20 @@
compatible = "cloudengines,pogoplugv4", "marvell,kirkwood-88f6192",
"marvell,kirkwood";
+ aliases {
+ led-boot = &led_health;
+ led-failsafe = &led_fault;
+ led-running = &led_health;
+ led-upgrade = &led_fault;
+ };
+
memory {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};
chosen {
+ bootargs = "console=ttyS0,115200";
stdout-path = "uart0:115200n8";
};
@@ -35,8 +43,8 @@
button-eject {
debounce-interval = <50>;
wakeup-source;
- linux,code = <KEY_EJECTCD>;
- label = "Eject Button";
+ linux,code = <KEY_RESTART>;
+ label = "Reset";
gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
};
};
@@ -46,12 +54,12 @@
pinctrl-0 = <&pmx_led_green &pmx_led_red>;
pinctrl-names = "default";
- led-health {
+ led_health: led-health {
label = "pogoplugv4:green:health";
gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
default-state = "on";
};
- led-fault {
+ led_fault: led-fault {
label = "pogoplugv4:red:fault";
gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
};
@@ -135,29 +143,19 @@
#size-cells = <1>;
partition@0 {
- label = "u-boot";
- reg = <0x00000000 0x200000>;
+ label = "uboot";
+ reg = <0x00000000 0x1c0000>;
read-only;
};
- partition@200000 {
- label = "uImage";
- reg = <0x00200000 0x300000>;
- };
-
- partition@500000 {
- label = "uImage2";
- reg = <0x00500000 0x300000>;
- };
-
- partition@800000 {
- label = "failsafe";
- reg = <0x00800000 0x800000>;
+ partition@1c0000 {
+ label = "uboot_env";
+ reg = <0x001c0000 0x40000>;
};
- partition@1000000 {
- label = "root";
- reg = <0x01000000 0x7000000>;
+ partition@200000 {
+ label = "ubi";
+ reg = <0x00200000 0x7e00000>;
};
};
};
target/linux/kirkwood/patches-6.18/110-pogo_e02.patch
+68
View File
@@ -0,0 +1,68 @@
--- a/arch/arm/boot/dts/marvell/kirkwood-pogo_e02.dts
+++ b/arch/arm/boot/dts/marvell/kirkwood-pogo_e02.dts
@@ -20,6 +20,13 @@
compatible = "cloudengines,pogoe02", "marvell,kirkwood-88f6281",
"marvell,kirkwood";
+ aliases {
+ led-boot = &led_health;
+ led-failsafe = &led_fault;
+ led-running = &led_health;
+ led-upgrade = &led_fault;
+ };
+
memory {
device_type = "memory";
reg = <0x00000000 0x10000000>;
@@ -33,12 +40,12 @@
gpio-leds {
compatible = "gpio-leds";
- led-health {
+ led_health: led-health {
label = "pogo_e02:green:health";
gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
- default-state = "keep";
+ default-state = "on";
};
- led-fault {
+ led_fault: led-fault {
label = "pogo_e02:orange:fault";
gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
};
@@ -95,24 +102,24 @@
status = "okay";
partition@0 {
- label = "u-boot";
- reg = <0x0000000 0x100000>;
+ label = "uboot";
+ reg = <0x0 0xe0000>;
read-only;
};
- partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x400000>;
+ partition@e0000 {
+ label = "uboot_env";
+ reg = <0xe0000 0x20000>;
};
- partition@500000 {
- label = "pogoplug";
- reg = <0x0500000 0x2000000>;
+ partition@100000 {
+ label = "second_stage_uboot";
+ reg = <0x100000 0x100000>;
};
- partition@2500000 {
- label = "root";
- reg = <0x02500000 0x5b00000>;
+ partition@200000 {
+ label = "ubi";
+ reg = <0x200000 0x7e00000>;
};
};
target/linux/kirkwood/patches-6.18/111-l-50.patch
+47
View File
@@ -0,0 +1,47 @@
--- a/arch/arm/boot/dts/marvell/kirkwood-l-50.dts
+++ b/arch/arm/boot/dts/marvell/kirkwood-l-50.dts
@@ -18,6 +18,13 @@
reg = <0x00000000 0x20000000>;
};
+ aliases {
+ led-boot = &led_status_green;
+ led-failsafe = &led_status_red;
+ led-running = &led_status_green;
+ led-upgrade = &led_status_red;
+ };
+
chosen {
bootargs = "console=ttyS0,115200n8";
stdout-path = &uart0;
@@ -97,12 +104,12 @@
leds {
compatible = "gpio-leds";
- led-status-green {
+ led_status_green: led-status-green {
label = "l-50:green:status";
gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
};
- led-status-red {
+ led_status_red: led-status-red {
label = "l-50:red:status";
gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
};
@@ -351,13 +358,8 @@
};
partition@100000 {
- label = "kernel-1";
- reg = <0x00100000 0x00800000>;
- };
-
- partition@900000 {
- label = "rootfs-1";
- reg = <0x00900000 0x07100000>;
+ label = "ubi";
+ reg = <0x00100000 0x07900000>;
};
partition@7a00000 {
target/linux/kirkwood/patches-6.18/112-sheevaplug.patch
+47
View File
@@ -0,0 +1,47 @@
--- a/arch/arm/boot/dts/marvell/kirkwood-sheevaplug-common.dtsi
+++ b/arch/arm/boot/dts/marvell/kirkwood-sheevaplug-common.dtsi
@@ -78,13 +78,8 @@
};
partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x400000>;
- };
-
- partition@500000 {
- label = "root";
- reg = <0x0500000 0x1fb00000>;
+ label = "ubi";
+ reg = <0x0100000 0x1ff00000>;
};
};
--- a/arch/arm/boot/dts/marvell/kirkwood-sheevaplug.dts
+++ b/arch/arm/boot/dts/marvell/kirkwood-sheevaplug.dts
@@ -13,6 +13,13 @@
model = "Globalscale Technologies SheevaPlug";
compatible = "globalscale,sheevaplug", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+ aliases {
+ led-boot = &led_health;
+ led-failsafe = &led_health;
+ led-running = &led_health;
+ led-upgrade = &led_health;
+ };
+
ocp@f1000000 {
mvsdio@90000 {
pinctrl-0 = <&pmx_sdio>;
@@ -28,10 +35,10 @@
pinctrl-0 = <&pmx_led_blue &pmx_led_red>;
pinctrl-names = "default";
- led-health {
+ led_health: led-health {
label = "sheevaplug:blue:health";
gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
- default-state = "keep";
+ default-state = "on";
};
led-misc {
target/linux/kirkwood/patches-6.18/113-readynas_duo_v2.patch
+76
View File
@@ -0,0 +1,76 @@
--- a/arch/arm/boot/dts/marvell/kirkwood-netgear_readynas_duo_v2.dts
+++ b/arch/arm/boot/dts/marvell/kirkwood-netgear_readynas_duo_v2.dts
@@ -19,6 +19,13 @@
reg = <0x00000000 0x10000000>;
};
+ aliases {
+ led-boot = &led_power;
+ led-failsafe = &led_power;
+ led-running = &led_power;
+ led-upgrade = &led_power;
+ };
+
chosen {
bootargs = "console=ttyS0,115200n8 earlyprintk";
stdout-path = &uart0;
@@ -115,7 +122,7 @@
&pmx_led_blue_backup >;
pinctrl-names = "default";
- power_led {
+ led_power: power_led {
label = "status:blue:power_led";
gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
default-state = "keep";
@@ -129,11 +136,13 @@
disk1_led {
label = "status:blue:disk1_led";
gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "ata1";
};
disk2_led {
label = "status:blue:disk2_led";
gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "ata2";
};
backup_led {
@@ -150,7 +159,13 @@
power-button {
label = "Power Button";
- linux,code = <KEY_POWER>;
+ /* Power button and INT pin from PHY are both connected
+ * to this GPIO. Every network restart causes PHY restart
+ * and button is pressed. It's difficult to use it as
+ * KEY_POWER without changes in kernel (or netifd) so
+ * the button is configured as regular one.
+ */
+ linux,code = <BTN_1>;
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
};
@@ -208,18 +223,13 @@
};
partition@200000 {
- label = "uImage";
+ label = "kernel";
reg = <0x0200000 0x600000>;
};
partition@800000 {
- label = "minirootfs";
- reg = <0x0800000 0x1000000>;
- };
-
- partition@1800000 {
- label = "jffs2";
- reg = <0x1800000 0x6800000>;
+ label = "ubi";
+ reg = <0x0800000 0x7800000>;
};
};
target/linux/kirkwood/patches-6.18/114-ctera-c-200-v1.patch
+58
View File
@@ -0,0 +1,58 @@
--- a/arch/arm/boot/dts/marvell/kirkwood-c200-v1.dts
+++ b/arch/arm/boot/dts/marvell/kirkwood-c200-v1.dts
@@ -14,6 +14,14 @@
model = "Ctera C200 V1";
compatible = "ctera,c200-v1", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+
+ aliases {
+ led-boot = &led_status_green;
+ led-failsafe = &led_status_red;
+ led-running = &led_status_green;
+ led-upgrade = &led_status_red;
+ };
+
chosen {
bootargs = "console=ttyS0,115200";
stdout-path = &uart0;
@@ -78,6 +86,7 @@
function-enumerator = <1>;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "ata1";
};
led-2 {
@@ -85,6 +94,7 @@
function-enumerator = <2>;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "ata2";
};
led-3 {
@@ -94,13 +104,13 @@
gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
};
- led-4 {
+ led_status_red: led-4 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
};
- led-5 {
+ led_status_green: led-5 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
@@ -240,7 +250,7 @@
};
partition@7a00000 {
- label = "rootfs";
+ label = "ubi";
reg = <0x7a00000 0x8600000>;
};
};
target/linux/kirkwood/patches-6.18/115-nsa310s.patch
+35
View File
@@ -0,0 +1,35 @@
--- a/arch/arm/boot/dts/marvell/kirkwood-nsa310s.dts
+++ b/arch/arm/boot/dts/marvell/kirkwood-nsa310s.dts
@@ -16,6 +16,13 @@
model = "ZyXEL NSA310S";
compatible = "zyxel,nsa310s", "marvell,kirkwood-88f6702", "marvell,kirkwood";
+ aliases {
+ led-boot = &led_green_sys;
+ led-failsafe = &led_red_sys;
+ led-running = &led_green_sys;
+ led-upgrade = &led_red_sys;
+ };
+
memory {
device_type = "memory";
reg = <0x00000000 0x10000000>;
@@ -94,14 +101,16 @@
gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
};
- led-6 {
+ led_green_sys: led-6 {
+ label = "nsa310s:green:sys";
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
};
- led-7 {
+ led_red_sys: led-7 {
+ label = "nsa310s:red:sys";
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
target/linux/kirkwood/patches-6.18/116-4i-edge-200.patch
+34
View File
@@ -0,0 +1,34 @@
--- a/arch/arm/boot/dts/marvell/kirkwood-4i-edge-200.dts
+++ b/arch/arm/boot/dts/marvell/kirkwood-4i-edge-200.dts
@@ -20,6 +20,13 @@
reg = <0x00000000 0x20000000>;
};
+ aliases {
+ led-boot = &led_status_green;
+ led-failsafe = &led_status_orange;
+ led-running = &led_status_green;
+ led-upgrade = &led_status_orange;
+ };
+
chosen {
bootargs = "console=ttyS0,115200n8";
stdout-path = &uart0;
@@ -37,13 +44,15 @@
linux,default-trigger = "mmc0";
};
- led-2 {
+ led_status_orange: led-2 {
+ label = "orange:status";
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_AMBER>;
gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
};
- led-3 {
+ led_status_green: led-3 {
+ label = "green:status";
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
target/linux/kirkwood/patches-6.18/117-netgear_stora.patch
+10
View File
@@ -0,0 +1,10 @@
--- a/arch/arm/boot/dts/marvell/Makefile
+++ b/arch/arm/boot/dts/marvell/Makefile
@@ -157,6 +157,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
kirkwood-rs411.dtb \
kirkwood-sheevaplug.dtb \
kirkwood-sheevaplug-esata.dtb \
+ kirkwood-stora.dtb \
kirkwood-t5325.dtb \
kirkwood-topkick.dtb \
kirkwood-ts219-6281.dtb \
target/linux/kirkwood/patches-6.18/118-dns-320l.patch
+35
View File
@@ -0,0 +1,35 @@
--- a/arch/arm/boot/dts/marvell/Makefile
+++ b/arch/arm/boot/dts/marvell/Makefile
@@ -92,6 +92,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
kirkwood-db-88f6282.dtb \
kirkwood-dir665.dtb \
kirkwood-dns320.dtb \
+ kirkwood-dns320l.dtb \
kirkwood-dns325.dtb \
kirkwood-dockstar.dtb \
kirkwood-dreamplug.dtb \
--- a/arch/arm/boot/dts/marvell/kirkwood-dns320l.dts
+++ b/arch/arm/boot/dts/marvell/kirkwood-dns320l.dts
@@ -32,6 +32,13 @@
reg = <0x00000000 0x10000000>;
};
+ aliases {
+ led-boot = &led_orange_usb;
+ led-failsafe = &led_orange_usb;
+ led-running = &led_orange_usb;
+ led-upgrade = &led_orange_usb;
+ };
+
chosen {
bootargs = "console=ttyS0,115200n8 earlyprintk";
stdout-path = &uart0;
@@ -78,7 +85,7 @@
linux,default-trigger = "usbport";
};
- orange-usb {
+ led_orange_usb: orange-usb {
label = "dns320l:usb:orange";
gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
};
target/linux/kirkwood/patches-6.18/201-enable-sata-port-specific-led-triggers.patch
+10
View File
@@ -0,0 +1,10 @@
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -115,6 +115,7 @@ config MACH_DOVE
config MACH_KIRKWOOD
bool "Marvell Kirkwood boards"
depends on ARCH_MULTI_V5
+ select ARCH_WANT_LIBATA_LEDS
select CPU_FEROCEON
select GPIOLIB
select KIRKWOOD_CLK
target/linux/kirkwood/patches-6.18/202-linksys-find-active-root.patch
+62
View File
@@ -0,0 +1,62 @@
The WRT1900AC among other Linksys routers uses a dual-firmware layout.
Dynamically rename the active partition to "ubi".
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
---
--- a/drivers/mtd/parsers/ofpart_core.c
+++ b/drivers/mtd/parsers/ofpart_core.c
@@ -38,6 +38,8 @@ static bool node_has_compatible(struct d
return of_get_property(pp, "compatible", NULL);
}
+static int mangled_rootblock;
+
static int parse_fixed_partitions(struct mtd_info *master,
const struct mtd_partition **pparts,
struct mtd_part_parser_data *data)
@@ -47,6 +49,7 @@ static int parse_fixed_partitions(struct
struct mtd_partition *parts;
struct device_node *mtd_node;
struct device_node *ofpart_node;
+ const char *owrtpart = "ubi";
const char *partname;
struct device_node *pp;
int nr_parts, i, ret = 0;
@@ -159,9 +162,15 @@ static int parse_fixed_partitions(struct
parts[i].size = of_read_number(reg + a_cells, s_cells);
parts[i].of_node = pp;
- partname = of_get_property(pp, "label", &len);
- if (!partname)
- partname = of_get_property(pp, "name", &len);
+ if (mangled_rootblock && (i == mangled_rootblock)) {
+ partname = owrtpart;
+ } else {
+ partname = of_get_property(pp, "label", &len);
+
+ if (!partname)
+ partname = of_get_property(pp, "name", &len);
+ }
+
parts[i].name = partname;
if (of_property_read_bool(pp, "read-only"))
@@ -283,6 +292,18 @@ static int __init ofpart_parser_init(voi
return 0;
}
+static int __init active_root(char *str)
+{
+ get_option(&str, &mangled_rootblock);
+
+ if (!mangled_rootblock)
+ return 1;
+
+ return 1;
+}
+
+__setup("mangled_rootblock=", active_root);
+
static void __exit ofpart_parser_exit(void)
{
deregister_mtd_parser(&ofpart_parser);
target/linux/kirkwood/patches-6.18/203-blackarmor-nas220.patch
+100
View File
@@ -0,0 +1,100 @@
--- a/arch/arm/boot/dts/marvell/kirkwood-blackarmor-nas220.dts
+++ b/arch/arm/boot/dts/marvell/kirkwood-blackarmor-nas220.dts
@@ -17,6 +17,13 @@
compatible = "seagate,blackarmor-nas220","marvell,kirkwood-88f6192",
"marvell,kirkwood";
+ aliases {
+ led-boot = &led_status_amber;
+ led-failsafe = &led_status_amber;
+ led-running = &led_status_blue;
+ led-upgrade = &led_status_amber;
+ };
+
memory { /* 128 MB */
device_type = "memory";
reg = <0x00000000 0x8000000>;
@@ -36,14 +43,14 @@
compatible = "gpio-keys";
button-reset {
- label = "Reset";
- linux,code = <KEY_POWER>;
+ label = "Reset Button";
+ linux,code = <KEY_RESTART>;
gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
};
button-power {
- label = "Power";
- linux,code = <KEY_SLEEP>;
+ label = "Power Button";
+ linux,code = <KEY_POWER>;
gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
};
};
@@ -51,11 +58,27 @@
gpio-leds {
compatible = "gpio-leds";
- led-blue-power {
+ led_power_blue: led-blue-power {
label = "nas220:blue:power";
gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
};
+
+ led-blue-disk {
+ label = "nas220:blue:disk";
+ gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "disk-activity";
+ };
+
+ led_status_blue: led-blue-status {
+ label = "nas220:blue:status";
+ gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
+ };
+
+ led_status_amber: led-amber-status {
+ label = "nas220:amber:status";
+ gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
+ };
};
regulators {
@@ -153,6 +176,35 @@
&nand {
status = "okay";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "uboot";
+ reg = <0x0 0xa0000>;
+ read-only;
+ };
+
+ partition@a0000 {
+ label = "uboot-env";
+ reg = <0xa0000 0x10000>;
+ read-only;
+ };
+
+ partition@b0000 {
+ label = "reserved";
+ reg = <0xb0000 0x10000>;
+ read-only;
+ };
+
+ partition@c0000 {
+ label = "ubi";
+ reg = <0xc0000 0x1e80000>;
+ };
+ };
};
&mdio {
target/linux/mediatek/patches-6.18/750-net-ethernet-mtk_eth_soc-add-mt7987-support.patch
+13 -12
View File
@@ -97,7 +97,7 @@ Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
} else {
switch (speed) {
case SPEED_10:
@@ -904,7 +934,7 @@ static void mtk_xgdm_mac_link_up(struct
@@ -905,7 +935,7 @@ static void mtk_xgdm_mac_link_up(struct
return;
/* Eliminate the interference(before link-up) caused by PHY noise */
@@ -106,7 +106,7 @@ Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
mdelay(20);
mtk_m32(mac->hw, XMAC_GLB_CNTCLR, XMAC_GLB_CNTCLR,
MTK_XMAC_CNT_CTRL(mac->id));
@@ -2937,10 +2967,16 @@ static int mtk_tx_alloc(struct mtk_eth *
@@ -2942,10 +2972,16 @@ static int mtk_tx_alloc(struct mtk_eth *
mtk_w32(eth, val, soc->reg_map->qdma.qtx_cfg + ofs);
val = MTK_QTX_SCH_MIN_RATE_EN |
@@ -126,7 +126,7 @@ Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
if (mtk_is_netsys_v1(eth))
val |= MTK_QTX_SCH_LEAKY_BUCKET_EN;
mtk_w32(eth, val, soc->reg_map->qdma.qtx_sch + ofs);
@@ -5918,6 +5954,36 @@ static const struct mtk_soc_data mt7986_
@@ -5993,6 +6029,37 @@ static const struct mtk_soc_data mt7986_
},
};
@@ -142,6 +142,7 @@ Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
+ .ppe_num = 2,
+ .hash_offset = 4,
+ .has_accounting = true,
+ .num_tx_queues = 32,
+ .foe_entry_size = MTK_FOE_ENTRY_V3_SIZE,
+ .tx = {
+ DESC_SIZE(struct mtk_tx_dma_v2),
@@ -163,7 +164,7 @@ Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
static const struct mtk_soc_data mt7988_data = {
.reg_map = &mt7988_reg_map,
.ana_rgc3 = 0x128,
@@ -5979,6 +6045,7 @@ const struct of_device_id of_mtk_match[]
@@ -6055,6 +6122,7 @@ const struct of_device_id of_mtk_match[]
{ .compatible = "mediatek,mt7629-eth", .data = &mt7629_data },
{ .compatible = "mediatek,mt7981-eth", .data = &mt7981_data },
{ .compatible = "mediatek,mt7986-eth", .data = &mt7986_data },
@@ -173,7 +174,7 @@ Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
{},
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -263,6 +263,13 @@
@@ -271,6 +271,13 @@
#define MTK_QTX_SCH_MAX_RATE_MAN GENMASK(10, 4)
#define MTK_QTX_SCH_MAX_RATE_EXP GENMASK(3, 0)
@@ -187,7 +188,7 @@ Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
/* QDMA TX Scheduler Rate Control Register */
#define MTK_QDMA_TX_SCH_MAX_WFQ BIT(15)
@@ -538,9 +545,23 @@
@@ -546,9 +553,23 @@
#define XMAC_MCR_FORCE_RX_FC BIT(4)
/* XFI Mac logic reset registers */
@@ -212,7 +213,7 @@ Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
/* XFI Mac count global control */
#define MTK_XMAC_CNT_CTRL(x) (MTK_XMAC_BASE(x) + 0x100)
#define XMAC_GLB_CNTCLR BIT(0)
@@ -841,6 +862,17 @@ enum mtk_clks_map {
@@ -849,6 +870,17 @@ enum mtk_clks_map {
BIT_ULL(MTK_CLK_SGMII2_RX_250M) | \
BIT_ULL(MTK_CLK_SGMII2_CDR_REF) | \
BIT_ULL(MTK_CLK_SGMII2_CDR_FB))
@@ -230,7 +231,7 @@ Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
#define MT7988_CLKS_BITMAP (BIT_ULL(MTK_CLK_FE) | BIT_ULL(MTK_CLK_ESW) | \
BIT_ULL(MTK_CLK_GP1) | BIT_ULL(MTK_CLK_GP2) | \
BIT_ULL(MTK_CLK_GP3) | BIT_ULL(MTK_CLK_XGP1) | \
@@ -997,12 +1029,14 @@ enum mkt_eth_capabilities {
@@ -1005,12 +1037,14 @@ enum mkt_eth_capabilities {
MTK_RSTCTRL_PPE2_BIT,
MTK_U3_COPHY_V2_BIT,
MTK_SRAM_BIT,
@@ -246,7 +247,7 @@ Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
MTK_ETH_MUX_GMAC2_TO_2P5GPHY_BIT,
MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT,
MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT,
@@ -1044,14 +1078,16 @@ enum mkt_eth_capabilities {
@@ -1052,14 +1086,16 @@ enum mkt_eth_capabilities {
#define MTK_RSTCTRL_PPE2 BIT_ULL(MTK_RSTCTRL_PPE2_BIT)
#define MTK_U3_COPHY_V2 BIT_ULL(MTK_U3_COPHY_V2_BIT)
#define MTK_SRAM BIT_ULL(MTK_SRAM_BIT)
@@ -265,7 +266,7 @@ Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
#define MTK_ETH_MUX_GMAC2_TO_2P5GPHY \
BIT_ULL(MTK_ETH_MUX_GMAC2_TO_2P5GPHY_BIT)
#define MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII \
@@ -1083,12 +1119,13 @@ enum mkt_eth_capabilities {
@@ -1091,12 +1127,13 @@ enum mkt_eth_capabilities {
#define MTK_GMAC2_RGMII (MTK_ETH_PATH_GMAC2_RGMII | MTK_RGMII)
#define MTK_GMAC2_SGMII (MTK_ETH_PATH_GMAC2_SGMII | MTK_SGMII)
#define MTK_GMAC2_GEPHY (MTK_ETH_PATH_GMAC2_GEPHY | MTK_GEPHY)
@@ -283,7 +284,7 @@ Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
/* MUXes present on SoCs */
/* 0: GDM1 -> GMAC1, 1: GDM1 -> ESW */
@@ -1098,9 +1135,9 @@ enum mkt_eth_capabilities {
@@ -1106,9 +1143,9 @@ enum mkt_eth_capabilities {
#define MTK_MUX_GMAC2_GMAC0_TO_GEPHY \
(MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY | MTK_MUX | MTK_INFRA)
@@ -296,7 +297,7 @@ Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
/* 2: GMAC1 -> SGMII, 3: GMAC2 -> SGMII */
#define MTK_MUX_GMAC1_GMAC2_TO_SGMII_RGMII \
@@ -1140,18 +1177,24 @@ enum mkt_eth_capabilities {
@@ -1148,18 +1185,24 @@ enum mkt_eth_capabilities {
#define MT7629_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | MTK_GMAC2_GEPHY | \
MTK_GDM1_ESW | MTK_MUX_GDM1_TO_GMAC1_ESW | \
MTK_MUX_GMAC2_GMAC0_TO_GEPHY | \
target/linux/mediatek/patches-6.18/751-net-ethernet-mtk_eth_soc-revise-hardware-configuration-for-mt7987.patch
+1 -1
View File
@@ -15,7 +15,7 @@ Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -4517,27 +4517,40 @@ static int mtk_hw_init(struct mtk_eth *e
@@ -4570,27 +4570,40 @@ static int mtk_hw_init(struct mtk_eth *e
mtk_w32(eth, PSE_DUMMY_WORK_GDM(1) | PSE_DUMMY_WORK_GDM(2) |
PSE_DUMMY_WORK_GDM(3) | DUMMY_PAGE_THR, PSE_DUMY_REQ);
target/linux/ramips/dts/mt7628an_wavlink_wl-wn575a3.dts
+1 -1
View File
@@ -111,7 +111,7 @@
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
reg = <0x8000 0x4da8>;
};
macaddr_factory_28: macaddr@28 {
target/linux/realtek/files-6.18/arch/mips/include/asm/mach-rtl-otto/mach-rtl-otto.h
+6
View File
@@ -25,6 +25,9 @@
#define RTL839X_CHIP_INFO (0x0FF4)
#define RTL93XX_MODEL_NAME_INFO (0x0004)
#define RTL93XX_CHIP_INFO (0x0008)
#define RTL96XX_MODEL_NAME_INFO (0x10000)
#define RTL96XX_CHIP_INFO (0x10004)
#define RTL96XX_CHIP_SUB_INFO (0x10008)
#define RTL838X_INT_RW_CTRL (0x0058)
#define RTL838X_EXT_VERSION (0x00D0)
@@ -38,12 +41,14 @@
#define RTL8390_FAMILY_ID (0x8390)
#define RTL9300_FAMILY_ID (0x9300)
#define RTL9310_FAMILY_ID (0x9310)
#define RTL9607_FAMILY_ID (0x9607)
/* Basic SoC Features */
#define RTL838X_CPU_PORT 28
#define RTL839X_CPU_PORT 52
#define RTL930X_CPU_PORT 28
#define RTL931X_CPU_PORT 56
#define RTL9607_CPU_PORT 9
struct rtl83xx_soc_info {
unsigned char *name;
@@ -52,6 +57,7 @@ struct rtl83xx_soc_info {
unsigned int revision;
unsigned int cpu;
bool testchip;
unsigned int subtype;
int cpu_port;
int memory_size;
};
target/linux/realtek/files-6.18/arch/mips/rtl-otto/prom.c
+38 -4
View File
@@ -215,6 +215,23 @@ static void __init rtl93xx_read_details(u32 model)
soc_info.testchip = true;
}
static void __init rtl96xx_read_details(u32 model)
{
u32 chip_info, chip_subtype;
sw_w32(0xa << 28, RTL96XX_CHIP_INFO);
chip_info = sw_r32(RTL96XX_CHIP_INFO);
soc_info.cpu = chip_info & 0xffff;
sw_w32(0xb << 28, RTL96XX_CHIP_SUB_INFO);
chip_subtype = sw_r32(RTL96XX_CHIP_SUB_INFO);
soc_info.subtype = chip_subtype & 0x1f;
soc_info.revision = model & 0xf;
}
static u32 __init read_model(void)
{
u32 model, id;
@@ -259,6 +276,16 @@ static u32 __init read_model(void)
return model;
}
model = sw_r32(RTL96XX_MODEL_NAME_INFO);
id = model >> 16 & 0xffff;
if (id == 0x9607) {
soc_info.id = id;
soc_info.family = RTL9607_FAMILY_ID;
soc_info.cpu_port = RTL9607_CPU_PORT;
rtl96xx_read_details(model);
return model;
}
return 0;
}
@@ -281,6 +308,7 @@ static void __init set_system_type(void)
{
char revision = '?';
char *es = "";
char subtype[12] = "";
if (soc_info.revision >= 0 && soc_info.revision < 26)
revision = 'A' + soc_info.revision;
@@ -288,9 +316,12 @@ static void __init set_system_type(void)
if (soc_info.testchip)
es = " ES";
if (soc_info.subtype)
snprintf(subtype, sizeof(subtype), " subtype %02X", soc_info.subtype);
snprintf(rtl_system_type, sizeof(rtl_system_type),
"Realtek %s%s rev %c (%04X)",
soc_info.name, es, revision, soc_info.cpu);
"Realtek %s%s%s rev %c (%04X)",
soc_info.name, es, subtype, revision, soc_info.cpu);
}
static void get_system_memory(void)
@@ -311,8 +342,11 @@ static void get_system_memory(void)
static void prepare_highmem(void)
{
if ((soc_info.family != RTL9300_FAMILY_ID) ||
(soc_info.memory_size <= 256 * 1024 * 1024) ||
if (soc_info.family != RTL9300_FAMILY_ID &&
soc_info.family != RTL9607_FAMILY_ID)
return;
if ((soc_info.memory_size <= 256 * 1024 * 1024) ||
!IS_ENABLED(CONFIG_HIGHMEM))
return;
target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/common.c
+45
View File
@@ -211,6 +211,48 @@ u64 rtl839x_get_port_reg_le(int reg)
return v;
}
static bool rtldsa_phy_load_deferred(struct phy_device *phydev)
{
struct device *d = &phydev->mdio.dev;
if (d->driver)
return false;
return driver_deferred_probe_check_state(d) == -EPROBE_DEFER;
}
static bool rtldsa_phys_load_deferred(void)
{
struct device_node *phy_node;
struct phy_device *phydev;
struct device_node *dn;
bool deferred;
for_each_node_by_name(dn, "port") {
if (!of_device_is_available(dn))
continue;
phy_node = of_parse_phandle(dn, "phy-handle", 0);
if (!phy_node)
continue;
phydev = of_phy_find_device(phy_node);
of_node_put(phy_node);
if (!phydev)
continue;
deferred = rtldsa_phy_load_deferred(phydev);
put_device(&phydev->mdio.dev);
if (deferred) {
of_node_put(dn);
return true;
}
}
return false;
}
static int rtl83xx_mdio_probe(struct rtl838x_switch_priv *priv)
{
struct device_node *dn, *phy_node, *pcs_node, *led_node;
@@ -1528,6 +1570,9 @@ static int rtl83xx_sw_probe(struct platform_device *pdev)
return -EINVAL;
}
if (rtldsa_phys_load_deferred())
return -EPROBE_DEFER;
err = rtldsa_ethernet_loaded(pdev);
if (err)
return err;
target/linux/realtek/files-6.18/drivers/net/mdio/mdio-realtek-otto.c
+13 -26
View File
@@ -739,14 +739,10 @@ static int rtmdio_839x_setup_ctrl(struct rtmdio_ctrl *ctrl)
static int rtmdio_930x_setup_ctrl(struct rtmdio_ctrl *ctrl)
{
unsigned int mask, val;
/* Define C22/C45 bus feature set */
for (int smi_bus = 0; smi_bus < RTMDIO_MAX_SMI_BUSSES; smi_bus++) {
mask = BIT(16 + smi_bus);
val = ctrl->bus[smi_bus].is_c45 ? mask : 0;
regmap_update_bits(ctrl->map, RTMDIO_930X_SMI_GLB_CTRL, mask, val);
}
for (int smi_bus = 0; smi_bus < RTMDIO_MAX_SMI_BUSSES; smi_bus++)
regmap_assign_bits(ctrl->map, RTMDIO_930X_SMI_GLB_CTRL,
BIT(16 + smi_bus), ctrl->bus[smi_bus].is_c45);
return 0;
}
@@ -770,14 +766,12 @@ static void rtmdio_930x_setup_polling(struct rtmdio_ctrl *ctrl)
regmap_update_bits(ctrl->map, RTMDIO_930X_SMI_MAC_TYPE_CTRL, mask, val);
/* polling via standard or resolution register */
mask = BIT(20 + ctrl->port[pn].smi_bus);
val = phyinfo.has_res_reg ? mask : 0;
regmap_update_bits(ctrl->map, RTMDIO_930X_SMI_GLB_CTRL, mask, val);
regmap_assign_bits(ctrl->map, RTMDIO_930X_SMI_GLB_CTRL,
BIT(20 + ctrl->port[pn].smi_bus), phyinfo.has_res_reg);
/* proprietary Realtek 1G/2.5 lite polling */
mask = BIT(pn);
val = phyinfo.has_giga_lite ? mask : 0;
regmap_update_bits(ctrl->map, RTMDIO_930X_SMI_PRVTE_POLLING_CTRL, mask, val);
regmap_assign_bits(ctrl->map, RTMDIO_930X_SMI_PRVTE_POLLING_CTRL,
BIT(pn), phyinfo.has_giga_lite);
/* special duplex/advertisement polling registers */
if (phyinfo.poll_duplex || phyinfo.poll_adv_1000 || phyinfo.poll_lpa_1000) {
@@ -830,24 +824,17 @@ static void rtmdio_931x_setup_polling(struct rtmdio_ctrl *ctrl)
val = RTMDIO_931X_SMI_PHY_ABLTY_MDIO << (ffs(mask) - 1);
regmap_update_bits(ctrl->map, RTMDIO_931X_SMI_PHY_ABLTY_GET_SEL + (pn / 16) * 4,
mask, val);
mask = val = 0;
/* PRVTE0 polling */
mask |= BIT(20 + smi_bus);
if (phyinfo.has_res_reg)
val |= BIT(20 + smi_bus);
regmap_assign_bits(ctrl->map, RTMDIO_931X_SMI_GLB_CTRL0,
BIT(20 + smi_bus), phyinfo.has_res_reg);
/* PRVTE1 polling */
mask |= BIT(24 + smi_bus);
if (phyinfo.force_res)
val |= BIT(24 + smi_bus);
regmap_update_bits(ctrl->map, RTMDIO_931X_SMI_GLB_CTRL0, mask, val);
regmap_assign_bits(ctrl->map, RTMDIO_931X_SMI_GLB_CTRL0,
BIT(24 + smi_bus), phyinfo.force_res);
/* polling std. or proprietary format (bit 0 of SMI_SETX_FMT_SEL) */
mask = BIT(smi_bus * 2);
val = phyinfo.force_res ? mask : 0;
regmap_update_bits(ctrl->map, RTMDIO_931X_SMI_GLB_CTRL1, mask, val);
regmap_assign_bits(ctrl->map, RTMDIO_931X_SMI_GLB_CTRL1,
BIT(smi_bus * 2), phyinfo.force_res);
/* special polling registers */
if (phyinfo.poll_duplex || phyinfo.poll_adv_1000 || phyinfo.poll_lpa_1000) {
target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c
+325 -302
View File
@@ -70,29 +70,28 @@
#define RTPCS_93XX_MODEL_NAME_INFO (0x0004)
#define RTPCS_93XX_CHIP_INFO (0x0008)
/* RTL930X SerDes supports the following modes:
* 0x02: SGMII 0x04: 1000BX_FIBER 0x05: FIBER100
* 0x06: QSGMII 0x09: RSGMII 0x0d: USXGMII
* 0x10: XSGMII 0x12: HISGMII 0x16: 2500Base_X
* 0x17: RXAUI_LITE 0x19: RXAUI_PLUS 0x1a: 10G Base-R
* 0x1b: 10GR1000BX_AUTO 0x1f: OFF
*/
#define RTPCS_930X_SDS_MODE_SGMII 0x02
#define RTPCS_930X_SDS_MODE_1000BASEX 0x04
#define RTPCS_930X_SDS_MODE_QSGMII 0x06
#define RTPCS_930X_SDS_MODE_USXGMII 0x0d
#define RTPCS_930X_SDS_MODE_XSGMII 0x10
#define RTPCS_930X_SDS_MODE_2500BASEX 0x16
#define RTPCS_930X_SDS_MODE_10GBASER 0x1a
#define RTPCS_930X_SDS_OFF 0x1f
#define RTPCS_930X_SDS_MASK 0x1f
#define RTPCS_930X_SDS_MODE_SEL_0 0x0194
#define RTPCS_930X_SDS_MODE_SEL_1 0x02a0
#define RTPCS_930X_SDS_MODE_SEL_2 0x02a4
#define RTPCS_930X_SDS_MODE_SEL_3 0x0198
#define RTPCS_930X_SDS_SUBMODE_CTRL_0 0x01cc
#define RTPCS_930X_SDS_SUBMODE_CTRL_1 0x02d8
/* RTL930X SerDes supports two submodes when mode is USXGMII:
* 0x00: USXGMII (aka USXGMII_SX)
* 0x02: 10G_QXGMII (aka USXGMII_QX)
*/
#define RTPCS_930X_SDS_SUBMODE_USXGMII_SX 0x0
#define RTPCS_930X_SDS_SUBMODE_USXGMII_QX 0x2
#define RTPCS_93XX_SDS_MODE_SGMII 0x02
#define RTPCS_93XX_SDS_MODE_1000BASEX 0x04
#define RTPCS_93XX_SDS_MODE_QSGMII 0x06
#define RTPCS_93XX_SDS_MODE_USXGMII 0x0d
#define RTPCS_93XX_SDS_MODE_XSGMII 0x10
#define RTPCS_93XX_SDS_MODE_2500BASEX 0x16
#define RTPCS_93XX_SDS_MODE_10GBASER 0x1a
#define RTPCS_93XX_SDS_MODE_OFF 0x1f
#define RTPCS_93XX_SDS_USXGMII_SUBMODE_10GSX 0x00
#define RTPCS_93XX_SDS_USXGMII_SUBMODE_10GDX 0x01
#define RTPCS_93XX_SDS_USXGMII_SUBMODE_10GQX 0x02
#define RTPCS_93XX_SDS_USXGMII_SUBMODE_5GSX 0x03
#define RTPCS_93XX_SDS_USXGMII_SUBMODE_5GDX 0x04
#define RTPCS_93XX_SDS_USXGMII_SUBMODE_2_5GSX 0x05
/* Registers of the internal SerDes of the 9310 */
#define RTPCS_931X_MAC_GROUP0_1_CTRL (0x13a4)
@@ -102,6 +101,7 @@
#define RTPCS_931X_MAC_GROUP6_7_CTRL (0x13b4)
#define RTPCS_931X_MAC_GROUP8_11_CTRL (0x13b8)
#define RTPCS_931X_SERDES_MODE_CTRL (0x13cc)
#define RTPCS_931X_SDS_USXGMII_SUBMODE (0x13e8)
#define RTPCS_931X_PS_SERDES_OFF_MODE_CTRL_ADDR (0x13F4)
#define RTPCS_931X_MAC_SERDES_MODE_CTRL(sds) (0x136C + (((sds) << 2)))
#define RTPCS_931X_ISR_SERDES_RXIDLE (0x12f8)
@@ -138,6 +138,8 @@ enum rtpcs_sds_mode {
RTPCS_SDS_MODE_USXGMII_5GSXGMII,
RTPCS_SDS_MODE_USXGMII_5GDXGMII,
RTPCS_SDS_MODE_USXGMII_2_5GSXGMII,
RTPCS_SDS_MODE_MAX,
};
enum rtpcs_sds_media {
@@ -213,6 +215,12 @@ struct rtpcs_serdes {
const struct rtpcs_sds_ops *ops;
const struct rtpcs_sds_regs *regs;
enum rtpcs_sds_type type;
struct {
struct regmap_field *mac_mode;
struct regmap_field *mac_mode_force; /* nullable, 931x only */
struct regmap_field *usxgmii_submode; /* nullable, 93xx only */
} swcore_regs;
enum rtpcs_sds_mode hw_mode;
u8 id;
u8 num_of_links;
@@ -252,6 +260,8 @@ struct rtpcs_config {
const struct phylink_pcs_ops *pcs_ops;
const struct rtpcs_sds_ops *sds_ops;
const struct rtpcs_sds_regs *sds_regs;
const s16 *sds_hw_mode_vals; /* enum rtpcs_sds_mode, -1 = unsupported */
int (*init)(struct rtpcs_ctrl *ctrl);
int (*sds_probe)(struct rtpcs_serdes *sds);
int (*setup_serdes)(struct rtpcs_serdes *sds, enum rtpcs_sds_mode hw_mode);
@@ -599,10 +609,55 @@ static int rtpcs_sds_apply_config_xsg(struct rtpcs_serdes *sds,
return 0;
}
/*
* Allocate a regmap_field on the SoC-side register map for this SerDes and
* store the resulting pointer in *dst. Convenience helper for per-SerDes
* register fields computed from the SerDes ID. Taking reg/lsb/msb as
* integer arguments (rather than a struct reg_field) keeps callers free of
* either local reg_field declarations or compound-literal casts, since
* REG_FIELD() is a brace-initializer and not a usable expression.
*/
static int rtpcs_sds_alloc_field(struct rtpcs_serdes *sds, struct regmap_field **dst,
u32 reg, u8 lsb, u8 msb)
{
struct reg_field rf = REG_FIELD(reg, lsb, msb);
*dst = devm_regmap_field_alloc(sds->ctrl->dev, sds->ctrl->map, rf);
return PTR_ERR_OR_ZERO(*dst);
}
/*
* Write the SerDes MAC mode register. This is the common minimum shared by
* all variants. Variant-specific extras (force bit, companion registers,
* USXGMII submode, post-write delay) live in per-variant wrappers.
*/
static int rtpcs_sds_set_mac_mode(struct rtpcs_serdes *sds, enum rtpcs_sds_mode hw_mode)
{
const struct rtpcs_config *cfg = sds->ctrl->cfg;
int val;
if (hw_mode >= RTPCS_SDS_MODE_MAX)
return -EINVAL;
val = cfg->sds_hw_mode_vals[hw_mode];
if (val < 0)
return -EOPNOTSUPP;
return regmap_field_write(sds->swcore_regs.mac_mode, val);
}
/* Variant-specific functions */
/* RTL838X */
/* RTL838X SDS_MODE_SEL field values */
static const s16 rtpcs_838x_sds_hw_mode_vals[RTPCS_SDS_MODE_MAX] = {
[0 ... RTPCS_SDS_MODE_MAX - 1] = -1,
[RTPCS_SDS_MODE_1000BASEX] = 0x4,
[RTPCS_SDS_MODE_SGMII] = 0x2,
[RTPCS_SDS_MODE_QSGMII] = 0x6,
};
#define SDS(ctrl,n) (&(ctrl)->serdes[n])
static void rtpcs_838x_sds_patch_01_qsgmii_6275b(struct rtpcs_ctrl *ctrl)
@@ -765,42 +820,39 @@ static int rtpcs_838x_sds_power(struct rtpcs_serdes *sds, bool power_on)
return ret;
}
static int rtpcs_838x_sds_set_mode(struct rtpcs_serdes *sds,
enum rtpcs_sds_mode hw_mode)
/*
* RTL838X wrapper: after setting the MAC mode, SerDes 4-5 also need the
* companion INT_MODE_CTRL field written.
*/
static int rtpcs_838x_sds_set_mode(struct rtpcs_serdes *sds, enum rtpcs_sds_mode hw_mode)
{
u8 sds_mode_shift, int_mode_shift;
u32 sds_mode_val, int_mode_val;
u8 int_mode_shift, int_mode_val;
int ret;
ret = rtpcs_sds_set_mac_mode(sds, hw_mode);
if (ret)
return ret;
if (sds->id < 4)
return 0;
int_mode_shift = (sds->id == 5) ? 3 : 0;
switch (hw_mode) {
case RTPCS_SDS_MODE_1000BASEX:
sds_mode_val = 0x4;
int_mode_val = 0x1;
break;
case RTPCS_SDS_MODE_SGMII:
sds_mode_val = 0x2;
int_mode_val = 0x2;
break;
case RTPCS_SDS_MODE_QSGMII:
sds_mode_val = 0x6;
int_mode_val = 0x5;
break;
default:
return -EINVAL;
}
/* Configure SerDes module mode (all SDS 0-5) */
sds_mode_shift = (5 - sds->id) * 5;
regmap_write_bits(sds->ctrl->map, RTPCS_838X_SDS_MODE_SEL,
0x1f << sds_mode_shift, sds_mode_val << sds_mode_shift);
/* Configure MAC interface mode (only SDS 4-5) */
if (sds->id >= 4) {
int_mode_shift = (sds->id == 5) ? 3 : 0;
regmap_write_bits(sds->ctrl->map, RTPCS_838X_INT_MODE_CTRL,
0x7 << int_mode_shift, int_mode_val << int_mode_shift);
}
return 0;
return regmap_write_bits(sds->ctrl->map, RTPCS_838X_INT_MODE_CTRL,
0x7 << int_mode_shift, int_mode_val << int_mode_shift);
}
static int rtpcs_838x_sds_patch(struct rtpcs_serdes *sds,
@@ -847,8 +899,16 @@ static int rtpcs_838x_sds_patch(struct rtpcs_serdes *sds,
static int rtpcs_838x_sds_probe(struct rtpcs_serdes *sds)
{
u8 lsb = (5 - sds->id) * 5;
sds->type = RTPCS_SDS_TYPE_5G;
return 0;
/*
* SDS_MODE_SEL packs 5-bit fields in reverse order: SDS 0 at [25:29],
* SDS 5 at [0:4].
*/
return rtpcs_sds_alloc_field(sds, &sds->swcore_regs.mac_mode,
RTPCS_838X_SDS_MODE_SEL, lsb, lsb + 4);
}
static int rtpcs_838x_init(struct rtpcs_ctrl *ctrl)
@@ -907,6 +967,20 @@ static int rtpcs_838x_setup_serdes(struct rtpcs_serdes *sds,
/* RTL839X */
/*
* RTL839X MAC_SERDES_IF_CTRL mode values.
* From the vendor SDK; 100BASEX (0x8), 1000BASEX/SGMII (0x7) are documented
* but not yet exercised here.
*/
static const s16 rtpcs_839x_sds_hw_mode_vals[RTPCS_SDS_MODE_MAX] = {
[0 ... RTPCS_SDS_MODE_MAX - 1] = -1,
[RTPCS_SDS_MODE_OFF] = 0x0,
/* [RTPCS_SDS_MODE_100BASEX] = 0x8, */
/* [RTPCS_SDS_MODE_1000BASEX] = 0x7, */
/* [RTPCS_SDS_MODE_SGMII] = 0x7, */
[RTPCS_SDS_MODE_QSGMII] = 0x6,
};
static void rtpcs_839x_sds_reset(struct rtpcs_serdes *sds)
{
struct rtpcs_serdes *even_sds = rtpcs_sds_get_even(sds);
@@ -949,42 +1023,20 @@ static void rtpcs_839x_sds_reset(struct rtpcs_serdes *sds)
rtpcs_sds_write(odd_sds, 0x0, 0x3, 0x7106);
}
static int rtpcs_839x_sds_set_mode(struct rtpcs_serdes *sds,
enum rtpcs_sds_mode hw_mode)
{
u32 mode_val, reg, shift;
switch (hw_mode) {
case RTPCS_SDS_MODE_OFF:
mode_val = 0x0;
break;
/*
case RTPCS_SDS_MODE_100BASEX:
mode_val = 0x8;
break;
case RTPCS_SDS_MODE_1000BASEX:
case RTPCS_SDS_MODE_SGMII:
mode_val = 0x7;
break;
*/
case RTPCS_SDS_MODE_QSGMII:
mode_val = 0x6;
break;
default:
return -ENOTSUPP;
}
reg = RTPCS_839X_MAC_SERDES_IF_CTRL + (sds->id / 8) * 4;
shift = (sds->id % 8) * 4;
return regmap_write_bits(sds->ctrl->map, reg, 0xf << shift,
mode_val << shift);
}
static int rtpcs_839x_sds_probe(struct rtpcs_serdes *sds)
{
bool is_even = sds->id % 2 == 0;
u8 id = sds->id;
bool is_even = id % 2 == 0;
u8 lsb = (id % 8) * 4;
int ret;
if (sds->id == 8 || sds->id == 9 || sds->id == 12 || sds->id == 13)
ret = rtpcs_sds_alloc_field(sds, &sds->swcore_regs.mac_mode,
RTPCS_839X_MAC_SERDES_IF_CTRL + (id / 8) * 4,
lsb, lsb + 3);
if (ret)
return ret;
if (id == 8 || id == 9 || id == 12 || id == 13)
sds->type = RTPCS_SDS_TYPE_10G;
else
sds->type = RTPCS_SDS_TYPE_5G;
@@ -1123,7 +1175,7 @@ static int rtpcs_839x_setup_serdes(struct rtpcs_serdes *sds,
if (sds->type == RTPCS_SDS_TYPE_5G)
return 0;
ret = rtpcs_839x_sds_set_mode(sds, hw_mode);
ret = rtpcs_sds_set_mac_mode(sds, hw_mode);
if (ret < 0)
return ret;
@@ -1135,6 +1187,24 @@ static int rtpcs_839x_setup_serdes(struct rtpcs_serdes *sds,
/* RTL93XX */
/* forward mapping: enum rtpcs_sds_mode, -1 = unsupported */
static const s16 rtpcs_93xx_sds_hw_mode_vals[RTPCS_SDS_MODE_MAX] = {
[0 ... RTPCS_SDS_MODE_MAX - 1] = -1,
[RTPCS_SDS_MODE_OFF] = RTPCS_93XX_SDS_MODE_OFF,
[RTPCS_SDS_MODE_SGMII] = RTPCS_93XX_SDS_MODE_SGMII,
[RTPCS_SDS_MODE_1000BASEX] = RTPCS_93XX_SDS_MODE_1000BASEX,
[RTPCS_SDS_MODE_2500BASEX] = RTPCS_93XX_SDS_MODE_2500BASEX,
[RTPCS_SDS_MODE_10GBASER] = RTPCS_93XX_SDS_MODE_10GBASER,
[RTPCS_SDS_MODE_QSGMII] = RTPCS_93XX_SDS_MODE_QSGMII,
[RTPCS_SDS_MODE_XSGMII] = RTPCS_93XX_SDS_MODE_XSGMII,
[RTPCS_SDS_MODE_USXGMII_10GSXGMII] = RTPCS_93XX_SDS_MODE_USXGMII,
[RTPCS_SDS_MODE_USXGMII_10GDXGMII] = RTPCS_93XX_SDS_MODE_USXGMII,
[RTPCS_SDS_MODE_USXGMII_10GQXGMII] = RTPCS_93XX_SDS_MODE_USXGMII,
[RTPCS_SDS_MODE_USXGMII_5GSXGMII] = RTPCS_93XX_SDS_MODE_USXGMII,
[RTPCS_SDS_MODE_USXGMII_5GDXGMII] = RTPCS_93XX_SDS_MODE_USXGMII,
[RTPCS_SDS_MODE_USXGMII_2_5GSXGMII] = RTPCS_93XX_SDS_MODE_USXGMII,
};
static int rtpcs_93xx_sds_set_autoneg(struct rtpcs_serdes *sds, unsigned int neg_mode,
const unsigned long *advertising)
{
@@ -1363,8 +1433,85 @@ pll_setup:
return ret;
}
static const s16 rtpcs_93xx_sds_usxgmii_submodes[RTPCS_SDS_MODE_MAX] = {
[0 ... RTPCS_SDS_MODE_MAX - 1] = -1,
[RTPCS_SDS_MODE_USXGMII_10GSXGMII] = RTPCS_93XX_SDS_USXGMII_SUBMODE_10GSX,
[RTPCS_SDS_MODE_USXGMII_10GDXGMII] = RTPCS_93XX_SDS_USXGMII_SUBMODE_10GDX,
[RTPCS_SDS_MODE_USXGMII_10GQXGMII] = RTPCS_93XX_SDS_USXGMII_SUBMODE_10GQX,
[RTPCS_SDS_MODE_USXGMII_5GSXGMII] = RTPCS_93XX_SDS_USXGMII_SUBMODE_5GSX,
[RTPCS_SDS_MODE_USXGMII_5GDXGMII] = RTPCS_93XX_SDS_USXGMII_SUBMODE_5GDX,
[RTPCS_SDS_MODE_USXGMII_2_5GSXGMII] = RTPCS_93XX_SDS_USXGMII_SUBMODE_2_5GSX,
};
static int rtpcs_93xx_sds_apply_usxgmii_submode(struct rtpcs_serdes *sds,
enum rtpcs_sds_mode hw_mode)
{
s16 val = rtpcs_93xx_sds_usxgmii_submodes[hw_mode];
if (val < 0)
return 0;
if (!sds->swcore_regs.usxgmii_submode)
return -EOPNOTSUPP;
return regmap_field_write(sds->swcore_regs.usxgmii_submode, val);
}
/*
* RTL93XX wrapper: set MAC mode, then handle variant-specific extras:
* - post-write delay (required on 930x)
* - force-mode bit (931x only; nullable field)
*
* Each extra no-ops on the variant that doesn't need it — either because
* the corresponding regmap_field is NULL, or because the mode doesn't match.
*/
static int rtpcs_93xx_sds_set_mac_mode(struct rtpcs_serdes *sds, enum rtpcs_sds_mode hw_mode)
{
int ret;
ret = rtpcs_sds_set_mac_mode(sds, hw_mode);
if (ret)
return ret;
msleep(10);
if (sds->swcore_regs.mac_mode_force) {
ret = regmap_field_write(sds->swcore_regs.mac_mode_force, 1);
if (ret)
return ret;
}
return 0;
}
/* RTL930X */
/* This mapping is not coherent so it cannot be expressed arithmetically */
static const struct reg_field rtpcs_930x_mac_mode_fields[RTPCS_930X_SERDES_CNT] = {
[0] = REG_FIELD(RTPCS_930X_SDS_MODE_SEL_0, 0, 4),
[1] = REG_FIELD(RTPCS_930X_SDS_MODE_SEL_0, 6, 10),
[2] = REG_FIELD(RTPCS_930X_SDS_MODE_SEL_0, 12, 16),
[3] = REG_FIELD(RTPCS_930X_SDS_MODE_SEL_0, 18, 22),
[4] = REG_FIELD(RTPCS_930X_SDS_MODE_SEL_1, 0, 4),
[5] = REG_FIELD(RTPCS_930X_SDS_MODE_SEL_1, 6, 10),
[6] = REG_FIELD(RTPCS_930X_SDS_MODE_SEL_1, 12, 16),
[7] = REG_FIELD(RTPCS_930X_SDS_MODE_SEL_1, 18, 22),
[8] = REG_FIELD(RTPCS_930X_SDS_MODE_SEL_2, 0, 4),
[9] = REG_FIELD(RTPCS_930X_SDS_MODE_SEL_2, 6, 10),
[10] = REG_FIELD(RTPCS_930X_SDS_MODE_SEL_3, 0, 4),
[11] = REG_FIELD(RTPCS_930X_SDS_MODE_SEL_3, 6, 10),
};
static const struct reg_field rtpcs_930x_usxgmii_submode_fields[] = {
[0] = REG_FIELD(RTPCS_930X_SDS_SUBMODE_CTRL_0, 0, 4),
[1] = REG_FIELD(RTPCS_930X_SDS_SUBMODE_CTRL_0, 5, 9),
[2] = REG_FIELD(RTPCS_930X_SDS_SUBMODE_CTRL_1, 0, 4),
[3] = REG_FIELD(RTPCS_930X_SDS_SUBMODE_CTRL_1, 5, 9),
[4] = REG_FIELD(RTPCS_930X_SDS_SUBMODE_CTRL_1, 10, 14),
[5] = REG_FIELD(RTPCS_930X_SDS_SUBMODE_CTRL_1, 15, 19),
[6] = REG_FIELD(RTPCS_930X_SDS_SUBMODE_CTRL_1, 20, 24),
[7] = REG_FIELD(RTPCS_930X_SDS_SUBMODE_CTRL_1, 25, 29),
};
/*
* RTL930X needs a special mapping from logic SerDes ID to physical SerDes ID,
* which takes the page into account. This applies to most of read/write calls.
@@ -1426,86 +1573,6 @@ static int rtpcs_930x_sds_op_xsg_write(struct rtpcs_serdes *sds, int page, int r
value);
}
static const u16 rtpcs_930x_sds_mode_regs[] = {
0x0194, 0x0194, 0x0194, 0x0194, /* SDS_MODE_SEL_0 */
0x02a0, 0x02a0, 0x02a0, 0x02a0, /* SDS_MODE_SEL_1 */
0x02a4, 0x02a4, /* SDS_MODE_SEL_2 */
0x0198, 0x0198 /* SDS_MODE_SEL_3 */
};
static const u8 rtpcs_930x_sds_mode_lsb[] = { 0, 6, 12, 18, 0, 6, 12, 18, 0, 6, 0, 6 };
static const u16 rtpcs_930x_sds_submode_regs[] = {
0x1cc, 0x1cc, /* SDS_SUBMODE_CTRL0 */
0x2d8, 0x2d8, 0x2d8, 0x2d8,0x2d8, 0x2d8 /* SDS_SUBMODE_CTRL1 */
};
static const u8 rtpcs_930x_sds_submode_lsb[] = { 0, 5, 0, 5, 10, 15, 20, 25 };
__always_unused
static int __rtpcs_930x_sds_get_mac_mode(struct rtpcs_serdes *sds)
{
u8 sds_id = sds->id;
int mode_val, ret;
ret = regmap_read(sds->ctrl->map, rtpcs_930x_sds_mode_regs[sds_id], &mode_val);
if (ret < 0)
return ret;
mode_val >>= rtpcs_930x_sds_mode_lsb[sds_id];
return mode_val & RTPCS_930X_SDS_MASK;
}
static int __rtpcs_930x_sds_set_mac_mode(struct rtpcs_serdes *sds, u32 mode)
{
u8 sds_id = sds->id;
int ret;
ret = regmap_write_bits(sds->ctrl->map, rtpcs_930x_sds_mode_regs[sds_id],
RTPCS_930X_SDS_MASK << rtpcs_930x_sds_mode_lsb[sds_id],
mode << rtpcs_930x_sds_mode_lsb[sds_id]);
mdelay(10);
return ret;
}
__always_unused
static int __rtpcs_930x_sds_get_usxgmii_submode(struct rtpcs_serdes *sds)
{
u8 sds_id = sds->id;
int submode, ret;
if (sds->type != RTPCS_SDS_TYPE_10G) {
pr_err("%s: SerDes %u doesn't support USXGMII submode\n", __func__, sds_id);
return -ENOTSUPP;
}
ret = regmap_read(sds->ctrl->map, rtpcs_930x_sds_submode_regs[sds_id], &submode);
if (ret < 0)
return ret;
submode >>= rtpcs_930x_sds_submode_lsb[sds_id];
return submode & RTPCS_930X_SDS_MASK;
}
static int __rtpcs_930x_sds_set_usxgmii_submode(struct rtpcs_serdes *sds, u32 submode)
{
u8 sds_id = sds->id;
if (sds->type != RTPCS_SDS_TYPE_10G) {
pr_err("%s: SerDes %u doesn't support USXGMII submode\n", __func__, sds_id);
return -ENOTSUPP;
}
if (submode != RTPCS_930X_SDS_SUBMODE_USXGMII_SX &&
submode != RTPCS_930X_SDS_SUBMODE_USXGMII_QX) {
pr_err("%s: unsupported submode 0x%x\n", __func__, submode);
return -ENOTSUPP;
}
return regmap_write_bits(sds->ctrl->map, rtpcs_930x_sds_submode_regs[sds_id - 2],
RTPCS_930X_SDS_MASK << rtpcs_930x_sds_submode_lsb[sds_id - 2],
submode << rtpcs_930x_sds_submode_lsb[sds_id - 2]);
}
static void rtpcs_930x_sds_rx_reset(struct rtpcs_serdes *sds,
enum rtpcs_sds_mode hw_mode)
{
@@ -1631,7 +1698,7 @@ static int rtpcs_930x_sds_reconfigure_to_pll(struct rtpcs_serdes *sds, enum rtpc
return ret;
rtpcs_930x_sds_set_power(sds, false);
__rtpcs_930x_sds_set_ip_mode(sds, RTPCS_930X_SDS_OFF);
__rtpcs_930x_sds_set_ip_mode(sds, RTPCS_93XX_SDS_MODE_OFF);
ret = rtpcs_93xx_sds_set_pll_config(sds, pll, speed);
if (ret < 0)
@@ -1686,31 +1753,6 @@ static int rtpcs_930x_sds_init_state_machine(struct rtpcs_serdes *sds,
return ret;
}
static int rtpcs_930x_sds_get_hw_mode_val(enum rtpcs_sds_mode hw_mode)
{
switch (hw_mode) {
case RTPCS_SDS_MODE_OFF:
return RTPCS_930X_SDS_OFF;
case RTPCS_SDS_MODE_SGMII:
return RTPCS_930X_SDS_MODE_SGMII;
case RTPCS_SDS_MODE_1000BASEX:
return RTPCS_930X_SDS_MODE_1000BASEX;
case RTPCS_SDS_MODE_2500BASEX:
return RTPCS_930X_SDS_MODE_2500BASEX;
case RTPCS_SDS_MODE_10GBASER:
return RTPCS_930X_SDS_MODE_10GBASER;
case RTPCS_SDS_MODE_QSGMII:
return RTPCS_930X_SDS_MODE_QSGMII;
case RTPCS_SDS_MODE_XSGMII:
return RTPCS_930X_SDS_MODE_XSGMII;
case RTPCS_SDS_MODE_USXGMII_10GSXGMII:
case RTPCS_SDS_MODE_USXGMII_10GQXGMII:
return RTPCS_930X_SDS_MODE_USXGMII;
default:
return -ENOTSUPP;
}
}
static int rtpcs_930x_sds_set_ip_mode(struct rtpcs_serdes *sds,
enum rtpcs_sds_mode hw_mode)
{
@@ -1723,7 +1765,10 @@ static int rtpcs_930x_sds_set_ip_mode(struct rtpcs_serdes *sds,
* if this sequence should quit early in case of errors.
*/
mode_val = rtpcs_930x_sds_get_hw_mode_val(hw_mode);
if (hw_mode >= RTPCS_SDS_MODE_MAX)
return -EINVAL;
mode_val = sds->ctrl->cfg->sds_hw_mode_vals[hw_mode];
if (mode_val < 0) {
pr_err("%s: SDS %d does not support mode %d\n", __func__,
sds->id, hw_mode);
@@ -1731,7 +1776,7 @@ static int rtpcs_930x_sds_set_ip_mode(struct rtpcs_serdes *sds,
}
rtpcs_930x_sds_set_power(sds, false);
ret = __rtpcs_930x_sds_set_ip_mode(sds, RTPCS_930X_SDS_OFF);
ret = __rtpcs_930x_sds_set_ip_mode(sds, RTPCS_93XX_SDS_MODE_OFF);
if (ret < 0)
return ret;
@@ -1759,53 +1804,10 @@ static int rtpcs_930x_sds_set_ip_mode(struct rtpcs_serdes *sds,
return 0;
}
static int rtpcs_930x_sds_set_mac_mode(struct rtpcs_serdes *sds,
enum rtpcs_sds_mode hw_mode)
static int rtpcs_930x_sds_set_mode(struct rtpcs_serdes *sds, enum rtpcs_sds_mode hw_mode)
{
int submode_val = -1;
int mode_val, ret;
int ret;
mode_val = rtpcs_930x_sds_get_hw_mode_val(hw_mode);
if (mode_val < 0)
return mode_val;
switch (hw_mode) {
case RTPCS_SDS_MODE_USXGMII_10GSXGMII:
submode_val = RTPCS_930X_SDS_SUBMODE_USXGMII_SX;
break;
case RTPCS_SDS_MODE_USXGMII_10GQXGMII:
submode_val = RTPCS_930X_SDS_SUBMODE_USXGMII_QX;
break;
default:
break;
}
/* SerDes off first. */
ret = __rtpcs_930x_sds_set_mac_mode(sds, RTPCS_930X_SDS_OFF);
if (ret < 0)
return ret;
if (hw_mode == RTPCS_SDS_MODE_OFF)
return 0;
/* Set the mode. */
ret = __rtpcs_930x_sds_set_mac_mode(sds, mode_val);
if (ret < 0)
return ret;
/* Set the submode if needed. */
if (submode_val >= 0) {
ret = __rtpcs_930x_sds_set_usxgmii_submode(sds, submode_val);
if (ret < 0)
return ret;
}
return 0;
}
static int rtpcs_930x_sds_set_mode(struct rtpcs_serdes *sds,
enum rtpcs_sds_mode hw_mode)
{
/*
* Several modes can be configured via MAC setup, just by setting
* a register to a specific value and the MAC will configure
@@ -1819,9 +1821,16 @@ static int rtpcs_930x_sds_set_mode(struct rtpcs_serdes *sds,
case RTPCS_SDS_MODE_2500BASEX:
case RTPCS_SDS_MODE_10GBASER:
return rtpcs_930x_sds_set_ip_mode(sds, hw_mode);
default:
return rtpcs_930x_sds_set_mac_mode(sds, hw_mode);
break;
}
ret = rtpcs_93xx_sds_set_mac_mode(sds, hw_mode);
if (ret)
return ret;
return rtpcs_93xx_sds_apply_usxgmii_submode(sds, hw_mode);
}
static void rtpcs_930x_sds_tx_config(struct rtpcs_serdes *sds,
@@ -3048,13 +3057,30 @@ skip_cali:
static int rtpcs_930x_sds_probe(struct rtpcs_serdes *sds)
{
if (sds->id < 2)
struct device *dev = sds->ctrl->dev;
struct regmap *map = sds->ctrl->map;
u8 id = sds->id;
if (id < 2)
sds->type = RTPCS_SDS_TYPE_5G;
else if (sds->id <= 9)
else if (id <= 9)
sds->type = RTPCS_SDS_TYPE_10G;
else
sds->type = RTPCS_SDS_TYPE_UNKNOWN;
sds->swcore_regs.mac_mode = devm_regmap_field_alloc(dev, map,
rtpcs_930x_mac_mode_fields[id]);
if (IS_ERR(sds->swcore_regs.mac_mode))
return PTR_ERR(sds->swcore_regs.mac_mode);
/* submode only for 10G SerDes (id 2-9) */
if (sds->type == RTPCS_SDS_TYPE_10G) {
sds->swcore_regs.usxgmii_submode = devm_regmap_field_alloc(dev, map,
rtpcs_930x_usxgmii_submode_fields[id - 2]);
if (IS_ERR(sds->swcore_regs.usxgmii_submode))
return PTR_ERR(sds->swcore_regs.usxgmii_submode);
}
return 0;
}
@@ -3186,51 +3212,6 @@ static int rtpcs_931x_sds_power(struct rtpcs_serdes *sds, bool power_on)
BIT(sds->id), en_val);
}
/*
* rtpcs_931x_sds_set_mac_mode
*
* Set the SerDes mode in the MAC's registers.
*/
static int rtpcs_931x_sds_set_mac_mode(struct rtpcs_serdes *sds,
enum rtpcs_sds_mode hw_mode)
{
u32 mode_val;
int shift = ((sds->id & 0x3) << 3);
switch (hw_mode) {
case RTPCS_SDS_MODE_OFF:
mode_val = 0x1f;
break;
case RTPCS_SDS_MODE_QSGMII:
mode_val = 0x6;
break;
case RTPCS_SDS_MODE_HISGMII:
mode_val = 0x12;
break;
case RTPCS_SDS_MODE_XSGMII:
mode_val = 0x10;
break;
case RTPCS_SDS_MODE_USXGMII_10GSXGMII:
case RTPCS_SDS_MODE_USXGMII_10GDXGMII:
case RTPCS_SDS_MODE_USXGMII_10GQXGMII:
case RTPCS_SDS_MODE_USXGMII_5GSXGMII:
case RTPCS_SDS_MODE_USXGMII_5GDXGMII:
case RTPCS_SDS_MODE_USXGMII_2_5GSXGMII:
mode_val = 0xd;
break;
case RTPCS_SDS_MODE_SGMII:
mode_val = 0x2;
break;
default:
return -EINVAL;
}
mode_val |= BIT(7); /* force mode bit */
return regmap_write_bits(sds->ctrl->map,
RTPCS_931X_SERDES_MODE_CTRL + 4 * (sds->id >> 2),
0xff << shift, mode_val << shift);
}
/*
* rtpcs_931x_sds_set_ip_mode
*
@@ -3240,10 +3221,13 @@ static int rtpcs_931x_sds_set_ip_mode(struct rtpcs_serdes *sds,
enum rtpcs_sds_mode hw_mode)
{
u32 mode_val;
int ret;
/* clear symbol error count before changing mode */
rtpcs_931x_sds_clear_symerr(sds, hw_mode);
rtpcs_931x_sds_set_mac_mode(sds, RTPCS_SDS_MODE_OFF);
ret = rtpcs_93xx_sds_set_mac_mode(sds, RTPCS_SDS_MODE_OFF);
if (ret)
return ret;
switch (hw_mode) {
case RTPCS_SDS_MODE_OFF:
@@ -3295,28 +3279,37 @@ static int rtpcs_931x_sds_set_ip_mode(struct rtpcs_serdes *sds,
static int rtpcs_931x_sds_set_mode(struct rtpcs_serdes *sds,
enum rtpcs_sds_mode hw_mode)
{
int ret;
if (hw_mode == RTPCS_SDS_MODE_XSGMII)
return rtpcs_931x_sds_set_mac_mode(sds, hw_mode);
else
return rtpcs_931x_sds_set_ip_mode(sds, hw_mode);
return rtpcs_93xx_sds_set_mac_mode(sds, hw_mode);
ret = rtpcs_931x_sds_set_ip_mode(sds, hw_mode);
if (ret)
return ret;
return rtpcs_93xx_sds_apply_usxgmii_submode(sds, hw_mode);
}
static void rtpcs_931x_sds_reset(struct rtpcs_serdes *sds)
{
struct rtpcs_ctrl *ctrl = sds->ctrl;
u32 sds_id = sds->id;
u32 v, o_mode;
int shift = ((sds_id & 0x3) << 3);
u32 o_mode, f_bit;
/* TODO: We need to lock this! */
rtpcs_931x_sds_power(sds, false);
regmap_read(ctrl->map, RTPCS_931X_SERDES_MODE_CTRL + 4 * (sds_id >> 2), &o_mode);
v = BIT(7) | 0x1F;
regmap_write_bits(ctrl->map, RTPCS_931X_SERDES_MODE_CTRL + 4 * (sds_id >> 2),
0xff << shift, v << shift);
regmap_write(ctrl->map, RTPCS_931X_SERDES_MODE_CTRL + 4 * (sds_id >> 2), o_mode);
/* save current */
regmap_field_read(sds->swcore_regs.mac_mode, &o_mode);
regmap_field_read(sds->swcore_regs.mac_mode_force, &f_bit);
/* force off */
regmap_field_write(sds->swcore_regs.mac_mode, 0x1f);
regmap_field_write(sds->swcore_regs.mac_mode_force, 1);
/* restore previous */
regmap_field_write(sds->swcore_regs.mac_mode, o_mode);
regmap_field_write(sds->swcore_regs.mac_mode_force, f_bit);
rtpcs_931x_sds_power(sds, true);
}
@@ -3839,18 +3832,10 @@ static int rtpcs_931x_setup_serdes(struct rtpcs_serdes *sds,
int ret;
/*
* TODO: USXGMII is currently the swiss army knife to declare 10G
* multi port PHYs. Real devices use other modes instead. Especially
*
* - RTL8224 is driven in 10G_QXGMII
* - RTL8218D/E are driven in (Realtek proprietary) XSGMII (10G SGMII)
*
* For now, disable "USXGMII" modes we cannot configure properly. Only
* USXGMII_10GSXGMII is configured properly for now.
* TODO: XSGMII (Realtek-proprietary 10G SGMII used by RTL8218D/E)
* bring-up is not implemented yet.
*/
if (hw_mode == RTPCS_SDS_MODE_USXGMII_10GDXGMII ||
hw_mode == RTPCS_SDS_MODE_USXGMII_10GQXGMII ||
hw_mode == RTPCS_SDS_MODE_XSGMII)
if (hw_mode == RTPCS_SDS_MODE_XSGMII)
return 0;
val = rtpcs_sds_read_bits(sds, 0x1F, 0x9, 11, 6);
@@ -3947,11 +3932,45 @@ static int rtpcs_931x_init_mac_groups(struct rtpcs_ctrl *ctrl)
static int rtpcs_931x_sds_probe(struct rtpcs_serdes *sds)
{
u32 base = RTPCS_931X_SERDES_MODE_CTRL + 4 * (sds->id >> 2);
u8 lsb = (sds->id & 3) * 8;
int ret;
if (sds->id >= 2)
sds->type = RTPCS_SDS_TYPE_10G;
else
sds->type = RTPCS_SDS_TYPE_UNKNOWN;
/*
* Width is 7 bits (lsb..lsb+6) so every MAC mode write also clears
* bit 5 (FEC enable) and bit 6 (10G speedup). These are mode-dependent
* and not yet programmed here; keeping them cleared matches the
* original 8-bit-wide write behaviour.
*/
ret = rtpcs_sds_alloc_field(sds, &sds->swcore_regs.mac_mode,
base, lsb, lsb + 6);
if (ret)
return ret;
ret = rtpcs_sds_alloc_field(sds, &sds->swcore_regs.mac_mode_force,
base, lsb + 7, lsb + 7);
if (ret)
return ret;
/*
* USXGMII submode is packed at 5 bits per SerDes for IDs 2..13,
* six entries per 32-bit word, non-straddling.
*/
if (sds->type == RTPCS_SDS_TYPE_10G) {
u8 submode_lsb = ((sds->id - 2) % 6) * 5;
ret = rtpcs_sds_alloc_field(sds, &sds->swcore_regs.usxgmii_submode,
RTPCS_931X_SDS_USXGMII_SUBMODE + ((sds->id - 2) / 6) * 4,
submode_lsb, submode_lsb + 4);
if (ret)
return ret;
}
return 0;
}
@@ -4320,6 +4339,7 @@ static const struct rtpcs_config rtpcs_838x_cfg = {
.pcs_ops = &rtpcs_838x_pcs_ops,
.sds_ops = &rtpcs_838x_sds_ops,
.sds_regs = &rtpcs_838x_sds_regs,
.sds_hw_mode_vals = rtpcs_838x_sds_hw_mode_vals,
.init = rtpcs_838x_init,
.sds_probe = rtpcs_838x_sds_probe,
.setup_serdes = rtpcs_838x_setup_serdes,
@@ -4356,6 +4376,7 @@ static const struct rtpcs_config rtpcs_839x_cfg = {
.pcs_ops = &rtpcs_839x_pcs_ops,
.sds_ops = &rtpcs_839x_sds_ops,
.sds_regs = &rtpcs_839x_sds_regs,
.sds_hw_mode_vals = rtpcs_839x_sds_hw_mode_vals,
.init = rtpcs_839x_init,
.sds_probe = rtpcs_839x_sds_probe,
.setup_serdes = rtpcs_839x_setup_serdes,
@@ -4398,6 +4419,7 @@ static const struct rtpcs_config rtpcs_930x_cfg = {
.pcs_ops = &rtpcs_930x_pcs_ops,
.sds_ops = &rtpcs_930x_sds_ops,
.sds_regs = &rtpcs_930x_sds_regs,
.sds_hw_mode_vals = rtpcs_93xx_sds_hw_mode_vals,
.init = rtpcs_93xx_init,
.sds_probe = rtpcs_930x_sds_probe,
.setup_serdes = rtpcs_930x_setup_serdes,
@@ -4439,6 +4461,7 @@ static const struct rtpcs_config rtpcs_931x_cfg = {
.pcs_ops = &rtpcs_931x_pcs_ops,
.sds_ops = &rtpcs_931x_sds_ops,
.sds_regs = &rtpcs_931x_sds_regs,
.sds_hw_mode_vals = rtpcs_93xx_sds_hw_mode_vals,
.init = rtpcs_931x_init,
.sds_probe = rtpcs_931x_sds_probe,
.setup_serdes = rtpcs_931x_setup_serdes,
target/linux/realtek/patches-6.18/730-add-pcs-rtl-otto.patch
+1 -1
View File
@@ -11,7 +11,7 @@ Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
---
--- a/drivers/net/pcs/Kconfig
+++ b/drivers/net/pcs/Kconfig
@@ -45,6 +45,15 @@ config PCS_MTK_USXGMII
@@ -46,6 +46,15 @@ config PCS_MTK_USXGMII
1000Base-X, 2500Base-X and Cisco SGMII are supported on the same
differential pairs via an embedded LynxI PCS.
toolchain/gcc/patches-14.x/005-include-memory.patch
+72
View File
@@ -0,0 +1,72 @@
From: Lars Gierth <larsg@systemli.org>
This patch backports a small but important part of the upstream commit:
b3f1b9e2aa07 build: Remove INCLUDE_MEMORY [PR117737]
Its original commit message fails to mention that the commit also moves
the `#include <memory>` to an earlier position within system.h,
which is the actual change that we're after in this patch.
Building our GCC 14.3 with host GCC 16, the inclusion order starts to matter,
which is an issue that was also touched upon by the upstream commits:
9970b576b7e4 Include safe-ctype.h after C++ standard headers, to avoid over-poisoning
f6e00226a4ca build: Move sstream include above safe-ctype.h {PR117771]
Error log:
> gcc -v
Using built-in specs.
COLLECT_GCC=gcc
COLLECT_LTO_WRAPPER=/usr/libexec/gcc/x86_64-redhat-linux/16/lto-wrapper
OFFLOAD_TARGET_NAMES=nvptx-none:amdgcn-amdhsa
OFFLOAD_TARGET_DEFAULT=1
Target: x86_64-redhat-linux
Configured with: ../configure --enable-bootstrap --enable-languages=c,c++,fortran,objc,obj-c++,ada,go,d,m2,cobol,algol68,lto --prefix=/usr --mandir=/usr/share/man --infodir=/usr/share/info --with-bugurl=https://bugzilla.redhat.com/ --enable-shared --enable-threads=posix --enable-checking=release --enable-multilib --with-system-zlib --enable-__cxa_atexit --disable-libunwind-exceptions --enable-gnu-unique-object --enable-linker-build-id --with-gcc-major-version-only --enable-libstdcxx-backtrace --with-libstdcxx-zoneinfo=/usr/share/zoneinfo --with-linker-hash-style=gnu --enable-plugin --enable-initfini-array --with-isl=/builddir/build/BUILD/gcc-16.0.1-build/gcc-16.0.1-20260321/obj-x86_64-redhat-linux/isl-install --enable-offload-targets=nvptx-none,amdgcn-amdhsa --enable-offload-defaulted --without-cuda-driver --enable-gnu-indirect-function --enable-cet --with-tune=generic --with-tls=gnu2 --with-arch_32=i686 --build=x86_64-redhat-linux --with-build-config=bootstrap-lto --enable-link-serialization=1 --disable-libssp
Thread model: posix
Supported LTO compression algorithms: zlib zstd
gcc version 16.0.1 20260321 (Red Hat 16.0.1-0) (GCC)
> git clean -fdx
> make defconfig
> make V=s
[...]
make[5]: Entering directory '/home/user/w/ow/openwrt/build_dir/toolchain-aarch64_cortex-a53_gcc-14.3.0_musl/gcc-14.3.0-initial/gcc'
g++ -fno-PIE -c -DIN_GCC_FRONTEND -O2 -I/home/user/w/ow/openwrt/staging_dir/host/include -pipe -DIN_GCC -DCROSS_DIRECTORY_STRUCTURE -fno-exceptions -fno-rtti -fasynchronous-unwind-tables -W -Wall -Wno-narrowing -Wwrite-strings -Wcast-qual -Wmissing-format-attribute -Wconditionally-supported -Woverloaded-virtual -pedantic -Wno-long-long -Wno-variadic-macros -Wno-overlength-strings -DHAVE_CONFIG_H -fno-PIE -I. -Ic -I/home/user/w/ow/openwrt/build_dir/toolchain-aarch64_cortex-a53_gcc-14.3.0_musl/gcc-14.3.0/gcc -I/home/user/w/ow/openwrt/build_dir/toolchain-aarch64_cortex-a53_gcc-14.3.0_musl/gcc-14.3.0/gcc/c -I/home/user/w/ow/openwrt/build_dir/toolchain-aarch64_cortex-a53_gcc-14.3.0_musl/gcc-14.3.0/gcc/../include -I/home/user/w/ow/openwrt/build_dir/toolchain-aarch64_cortex-a53_gcc-14.3.0_musl/gcc-14.3.0/gcc/../libcpp/include -I/home/user/w/ow/openwrt/build_dir/toolchain-aarch64_cortex-a53_gcc-14.3.0_musl/gcc-14.3.0/gcc/../libcody -I/home/user/w/ow/openwrt/staging_dir/host/include -I/home/user/w/ow/openwrt/staging_dir/host/include -I/home/user/w/ow/openwrt/staging_dir/host/include -I/home/user/w/ow/openwrt/build_dir/toolchain-aarch64_cortex-a53_gcc-14.3.0_musl/gcc-14.3.0/gcc/../libdecnumber -I/home/user/w/ow/openwrt/build_dir/toolchain-aarch64_cortex-a53_gcc-14.3.0_musl/gcc-14.3.0/gcc/../libdecnumber/dpd -I../libdecnumber -I/home/user/w/ow/openwrt/build_dir/toolchain-aarch64_cortex-a53_gcc-14.3.0_musl/gcc-14.3.0/gcc/../libbacktrace -o c/c-decl.o -MT c/c-decl.o -MMD -MP -MF c/.deps/c-decl.TPo /home/user/w/ow/openwrt/build_dir/toolchain-aarch64_cortex-a53_gcc-14.3.0_musl/gcc-14.3.0/gcc/c/c-decl.cc
In file included from /usr/include/c++/16/bits/basic_ios.h:40,
from /usr/include/c++/16/ios:48,
from /usr/include/c++/16/bits/ostream.h:43,
from /usr/include/c++/16/bits/unique_ptr.h:42,
from /usr/include/c++/16/memory:80,
from /home/user/w/ow/openwrt/build_dir/toolchain-aarch64_cortex-a53_gcc-14.3.0_musl/gcc-14.3.0/gcc/system.h:766,
from /home/user/w/ow/openwrt/build_dir/toolchain-aarch64_cortex-a53_gcc-14.3.0_musl/gcc-14.3.0/gcc/c/c-decl.cc:30:
/usr/include/c++/16/bits/locale_facets.h:252:53: error: macro 'toupper' passed 2 arguments, but takes just 1
252 | toupper(char_type *__lo, const char_type* __hi) const
| ^
[...]
--- a/gcc/system.h
+++ b/gcc/system.h
@@ -222,6 +222,7 @@ extern int fprintf_unlocked (FILE *, con
#ifdef INCLUDE_FUNCTIONAL
# include <functional>
#endif
+# include <memory>
# include <cstring>
# include <initializer_list>
# include <new>
@@ -758,13 +759,6 @@ private:
#define LIKELY(x) (__builtin_expect ((x), 1))
#define UNLIKELY(x) (__builtin_expect ((x), 0))
-/* Some of the headers included by <memory> can use "abort" within a
- namespace, e.g. "_VSTD::abort();", which fails after we use the
- preprocessor to redefine "abort" as "fancy_abort" below. */
-
-#ifdef INCLUDE_MEMORY
-# include <memory>
-#endif
#ifdef INCLUDE_MUTEX
# include <mutex>